//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: UNKNOWN
// Unknown Toolkit Version
// Based on LLVM 3.4svn
//

.version 6.3
.target sm_52, texmode_independent
.address_size 64

	// .globl	gpu_decompress
.const .align 8 .b8 k_sha512[640] = {34, 174, 40, 215, 152, 47, 138, 66, 205, 101, 239, 35, 145, 68, 55, 113, 47, 59, 77, 236, 207, 251, 192, 181, 188, 219, 137, 129, 165, 219, 181, 233, 56, 181, 72, 243, 91, 194, 86, 57, 25, 208, 5, 182, 241, 17, 241, 89, 155, 79, 25, 175, 164, 130, 63, 146, 24, 129, 109, 218, 213, 94, 28, 171, 66, 2, 3, 163, 152, 170, 7, 216, 190, 111, 112, 69, 1, 91, 131, 18, 140, 178, 228, 78, 190, 133, 49, 36, 226, 180, 255, 213, 195, 125, 12, 85, 111, 137, 123, 242, 116, 93, 190, 114, 177, 150, 22, 59, 254, 177, 222, 128, 53, 18, 199, 37, 167, 6, 220, 155, 148, 38, 105, 207, 116, 241, 155, 193, 210, 74, 241, 158, 193, 105, 155, 228, 227, 37, 79, 56, 134, 71, 190, 239, 181, 213, 140, 139, 198, 157, 193, 15, 101, 156, 172, 119, 204, 161, 12, 36, 117, 2, 43, 89, 111, 44, 233, 45, 131, 228, 166, 110, 170, 132, 116, 74, 212, 251, 65, 189, 220, 169, 176, 92, 181, 83, 17, 131, 218, 136, 249, 118, 171, 223, 102, 238, 82, 81, 62, 152, 16, 50, 180, 45, 109, 198, 49, 168, 63, 33, 251, 152, 200, 39, 3, 176, 228, 14, 239, 190, 199, 127, 89, 191, 194, 143, 168, 61, 243, 11, 224, 198, 37, 167, 10, 147, 71, 145, 167, 213, 111, 130, 3, 224, 81, 99, 202, 6, 112, 110, 14, 10, 103, 41, 41, 20, 252, 47, 210, 70, 133, 10, 183, 39, 38, 201, 38, 92, 56, 33, 27, 46, 237, 42, 196, 90, 252, 109, 44, 77, 223, 179, 149, 157, 19, 13, 56, 83, 222, 99, 175, 139, 84, 115, 10, 101, 168, 178, 119, 60, 187, 10, 106, 118, 230, 174, 237, 71, 46, 201, 194, 129, 59, 53, 130, 20, 133, 44, 114, 146, 100, 3, 241, 76, 161, 232, 191, 162, 1, 48, 66, 188, 75, 102, 26, 168, 145, 151, 248, 208, 112, 139, 75, 194, 48, 190, 84, 6, 163, 81, 108, 199, 24, 82, 239, 214, 25, 232, 146, 209, 16, 169, 101, 85, 36, 6, 153, 214, 42, 32, 113, 87, 133, 53, 14, 244, 184, 209, 187, 50, 112, 160, 106, 16, 200, 208, 210, 184, 22, 193, 164, 25, 83, 171, 65, 81, 8, 108, 55, 30, 153, 235, 142, 223, 76, 119, 72, 39, 168, 72, 155, 225, 181, 188, 176, 52, 99, 90, 201, 197, 179, 12, 28, 57, 203, 138, 65, 227, 74, 170, 216, 78, 115, 227, 99, 119, 79, 202, 156, 91, 163, 184, 178, 214, 243, 111, 46, 104, 252, 178, 239, 93, 238, 130, 143, 116, 96, 47, 23, 67, 111, 99, 165, 120, 114, 171, 240, 161, 20, 120, 200, 132, 236, 57, 100, 26, 8, 2, 199, 140, 40, 30, 99, 35, 250, 255, 190, 144, 233, 189, 130, 222, 235, 108, 80, 164, 21, 121, 198, 178, 247, 163, 249, 190, 43, 83, 114, 227, 242, 120, 113, 198, 156, 97, 38, 234, 206, 62, 39, 202, 7, 194, 192, 33, 199, 184, 134, 209, 30, 235, 224, 205, 214, 125, 218, 234, 120, 209, 110, 238, 127, 79, 125, 245, 186, 111, 23, 114, 170, 103, 240, 6, 166, 152, 200, 162, 197, 125, 99, 10, 174, 13, 249, 190, 4, 152, 63, 17, 27, 71, 28, 19, 53, 11, 113, 27, 132, 125, 4, 35, 245, 119, 219, 40, 147, 36, 199, 64, 123, 171, 202, 50, 188, 190, 201, 21, 10, 190, 158, 60, 76, 13, 16, 156, 196, 103, 29, 67, 182, 66, 62, 203, 190, 212, 197, 76, 42, 126, 101, 252, 156, 41, 127, 89, 236, 250, 214, 58, 171, 111, 203, 95, 23, 88, 71, 74, 140, 25, 68, 108};

.entry gpu_decompress(
	.param .u64 .ptr .global .align 4 gpu_decompress_param_0,
	.param .u64 .ptr .global .align 4 gpu_decompress_param_1,
	.param .u64 .ptr .global .align 4 gpu_decompress_param_2,
	.param .u64 gpu_decompress_param_3
)
{
	.local .align 4 .b8 	__local_depot0[260];
	.reg .b64 	%SP;
	.reg .b64 	%SPL;
	.reg .pred 	%p<9>;
	.reg .b32 	%r<58>;
	.reg .b64 	%rd<45>;


	mov.u64 	%SPL, __local_depot0;
	ld.param.u64 	%rd7, [gpu_decompress_param_0];
	ld.param.u64 	%rd8, [gpu_decompress_param_1];
	ld.param.u64 	%rd9, [gpu_decompress_param_2];
	ld.param.u64 	%rd10, [gpu_decompress_param_3];
	add.u64 	%rd43, %SPL, 0;
	mov.u32 	%r24, %ctaid.x;
	mov.u32 	%r25, %ntid.x;
	mov.b32	%r26, %envreg3;
	mad.lo.s32 	%r1, %r24, %r25, %r26;
	mov.u32 	%r27, %tid.x;
	add.s32 	%r2, %r1, %r27;
	cvt.s64.s32	%rd12, %r2;
	setp.ge.u64	%p1, %rd12, %rd10;
	@%p1 bra 	BB0_12;

	mul.wide.s32 	%rd13, %r2, 12;
	add.s64 	%rd14, %rd7, %rd13;
	ld.global.u32 	%r3, [%rd14];
	ld.global.u32 	%r4, [%rd14+4];
	ld.global.u32 	%r5, [%rd14+8];
	mov.u64 	%rd15, 0;
	st.local.u32 	[%rd43+4], %rd15;
	st.local.u32 	[%rd43], %rd15;
	st.local.u32 	[%rd43+12], %rd15;
	st.local.u32 	[%rd43+8], %rd15;
	st.local.u32 	[%rd43+20], %rd15;
	st.local.u32 	[%rd43+16], %rd15;
	st.local.u32 	[%rd43+28], %rd15;
	st.local.u32 	[%rd43+24], %rd15;
	st.local.u32 	[%rd43+36], %rd15;
	st.local.u32 	[%rd43+32], %rd15;
	st.local.u32 	[%rd43+44], %rd15;
	st.local.u32 	[%rd43+40], %rd15;
	st.local.u32 	[%rd43+52], %rd15;
	st.local.u32 	[%rd43+48], %rd15;
	st.local.u32 	[%rd43+60], %rd15;
	st.local.u32 	[%rd43+56], %rd15;
	st.local.u32 	[%rd43+68], %rd15;
	st.local.u32 	[%rd43+64], %rd15;
	st.local.u32 	[%rd43+76], %rd15;
	st.local.u32 	[%rd43+72], %rd15;
	st.local.u32 	[%rd43+84], %rd15;
	st.local.u32 	[%rd43+80], %rd15;
	st.local.u32 	[%rd43+92], %rd15;
	st.local.u32 	[%rd43+88], %rd15;
	st.local.u32 	[%rd43+100], %rd15;
	st.local.u32 	[%rd43+96], %rd15;
	st.local.u32 	[%rd43+108], %rd15;
	st.local.u32 	[%rd43+104], %rd15;
	st.local.u32 	[%rd43+116], %rd15;
	st.local.u32 	[%rd43+112], %rd15;
	st.local.u32 	[%rd43+124], %rd15;
	st.local.u32 	[%rd43+120], %rd15;
	st.local.u32 	[%rd43+132], %rd15;
	st.local.u32 	[%rd43+128], %rd15;
	st.local.u32 	[%rd43+140], %rd15;
	st.local.u32 	[%rd43+136], %rd15;
	st.local.u32 	[%rd43+148], %rd15;
	st.local.u32 	[%rd43+144], %rd15;
	st.local.u32 	[%rd43+156], %rd15;
	st.local.u32 	[%rd43+152], %rd15;
	st.local.u32 	[%rd43+164], %rd15;
	st.local.u32 	[%rd43+160], %rd15;
	st.local.u32 	[%rd43+172], %rd15;
	st.local.u32 	[%rd43+168], %rd15;
	st.local.u32 	[%rd43+180], %rd15;
	st.local.u32 	[%rd43+176], %rd15;
	st.local.u32 	[%rd43+188], %rd15;
	st.local.u32 	[%rd43+184], %rd15;
	st.local.u32 	[%rd43+196], %rd15;
	st.local.u32 	[%rd43+192], %rd15;
	st.local.u32 	[%rd43+204], %rd15;
	st.local.u32 	[%rd43+200], %rd15;
	st.local.u32 	[%rd43+212], %rd15;
	st.local.u32 	[%rd43+208], %rd15;
	st.local.u32 	[%rd43+220], %rd15;
	st.local.u32 	[%rd43+216], %rd15;
	st.local.u32 	[%rd43+228], %rd15;
	st.local.u32 	[%rd43+224], %rd15;
	st.local.u32 	[%rd43+236], %rd15;
	st.local.u32 	[%rd43+232], %rd15;
	st.local.u32 	[%rd43+244], %rd15;
	st.local.u32 	[%rd43+240], %rd15;
	st.local.u32 	[%rd43+252], %rd15;
	st.local.u32 	[%rd43+248], %rd15;
	setp.eq.s32	%p2, %r4, 0;
	@%p2 bra 	BB0_10;

	and.b32  	%r6, %r4, 3;
	setp.eq.s32	%p3, %r6, 0;
	mov.u32 	%r56, 0;
	@%p3 bra 	BB0_8;

	setp.eq.s32	%p4, %r6, 1;
	mov.u32 	%r52, 0;
	@%p4 bra 	BB0_7;

	setp.eq.s32	%p5, %r6, 2;
	mov.u32 	%r50, 0;
	@%p5 bra 	BB0_6;

	mul.wide.u32 	%rd16, %r3, 4;
	add.s64 	%rd17, %rd8, %rd16;
	ld.global.u32 	%r32, [%rd17];
	st.local.u32 	[%rd43], %r32;
	add.s32 	%r3, %r3, 1;
	mov.u32 	%r50, 1;

BB0_6:
	mul.wide.u32 	%rd18, %r3, 4;
	add.s64 	%rd19, %rd8, %rd18;
	ld.global.u32 	%r33, [%rd19];
	mul.wide.u32 	%rd20, %r50, 4;
	add.s64 	%rd21, %rd43, %rd20;
	st.local.u32 	[%rd21], %r33;
	add.s32 	%r52, %r50, 1;
	add.s32 	%r3, %r3, 1;

BB0_7:
	mul.wide.u32 	%rd22, %r3, 4;
	add.s64 	%rd23, %rd8, %rd22;
	ld.global.u32 	%r34, [%rd23];
	mul.wide.u32 	%rd24, %r52, 4;
	add.s64 	%rd25, %rd43, %rd24;
	st.local.u32 	[%rd25], %r34;
	add.s32 	%r56, %r52, 1;
	add.s32 	%r3, %r3, 1;

BB0_8:
	setp.lt.u32	%p6, %r4, 4;
	@%p6 bra 	BB0_10;

BB0_9:
	mul.wide.u32 	%rd26, %r3, 4;
	add.s64 	%rd27, %rd8, %rd26;
	ld.global.u32 	%r35, [%rd27];
	mul.wide.u32 	%rd28, %r56, 4;
	add.s64 	%rd29, %rd43, %rd28;
	st.local.u32 	[%rd29], %r35;
	add.s32 	%r36, %r3, 1;
	mul.wide.u32 	%rd30, %r36, 4;
	add.s64 	%rd31, %rd8, %rd30;
	ld.global.u32 	%r37, [%rd31];
	add.s32 	%r38, %r56, 1;
	mul.wide.u32 	%rd32, %r38, 4;
	add.s64 	%rd33, %rd43, %rd32;
	st.local.u32 	[%rd33], %r37;
	add.s32 	%r39, %r3, 2;
	mul.wide.u32 	%rd34, %r39, 4;
	add.s64 	%rd35, %rd8, %rd34;
	ld.global.u32 	%r40, [%rd35];
	add.s32 	%r41, %r56, 2;
	mul.wide.u32 	%rd36, %r41, 4;
	add.s64 	%rd37, %rd43, %rd36;
	st.local.u32 	[%rd37], %r40;
	add.s32 	%r42, %r3, 3;
	mul.wide.u32 	%rd38, %r42, 4;
	add.s64 	%rd39, %rd8, %rd38;
	ld.global.u32 	%r43, [%rd39];
	add.s32 	%r44, %r56, 3;
	mul.wide.u32 	%rd40, %r44, 4;
	add.s64 	%rd41, %rd43, %rd40;
	st.local.u32 	[%rd41], %r43;
	add.s32 	%r3, %r3, 4;
	add.s32 	%r56, %r56, 4;
	setp.lt.u32	%p7, %r56, %r4;
	@%p7 bra 	BB0_9;

BB0_10:
	st.local.u32 	[%rd43+256], %r5;
	mul.wide.s32 	%rd42, %r2, 260;
	add.s64 	%rd44, %rd9, %rd42;
	mov.u32 	%r57, 0;

BB0_11:
	ld.local.u32 	%r48, [%rd43];
	st.global.u32 	[%rd44], %r48;
	add.s64 	%rd44, %rd44, 4;
	add.s64 	%rd43, %rd43, 4;
	add.s32 	%r57, %r57, 1;
	setp.lt.u32	%p8, %r57, 65;
	@%p8 bra 	BB0_11;

BB0_12:
	ret;
}

	// .globl	gpu_memset
.entry gpu_memset(
	.param .u64 .ptr .global .align 16 gpu_memset_param_0,
	.param .u32 gpu_memset_param_1,
	.param .u64 gpu_memset_param_2
)
{
	.reg .pred 	%p<2>;
	.reg .b32 	%r<8>;
	.reg .b64 	%rd<6>;


	ld.param.u64 	%rd1, [gpu_memset_param_0];
	ld.param.u32 	%r2, [gpu_memset_param_1];
	ld.param.u64 	%rd2, [gpu_memset_param_2];
	mov.b32	%r3, %envreg3;
	mov.u32 	%r4, %ctaid.x;
	mov.u32 	%r5, %ntid.x;
	mad.lo.s32 	%r6, %r4, %r5, %r3;
	mov.u32 	%r7, %tid.x;
	add.s32 	%r1, %r6, %r7;
	cvt.s64.s32	%rd3, %r1;
	setp.ge.u64	%p1, %rd3, %rd2;
	@%p1 bra 	BB1_2;

	mul.wide.s32 	%rd4, %r1, 16;
	add.s64 	%rd5, %rd1, %rd4;
	st.global.v4.u32 	[%rd5], {%r2, %r2, %r2, %r2};

BB1_2:
	ret;
}

	// .globl	gpu_atinit
.entry gpu_atinit(
	.param .u64 .ptr .global .align 4 gpu_atinit_param_0,
	.param .u64 gpu_atinit_param_1
)
{
	.reg .pred 	%p<2>;
	.reg .b32 	%r<13>;
	.reg .b64 	%rd<7>;


	ld.param.u64 	%rd2, [gpu_atinit_param_0];
	ld.param.u64 	%rd3, [gpu_atinit_param_1];
	mov.b32	%r2, %envreg3;
	mov.u32 	%r3, %ctaid.x;
	mov.u32 	%r4, %ntid.x;
	mad.lo.s32 	%r5, %r3, %r4, %r2;
	mov.u32 	%r6, %tid.x;
	add.s32 	%r1, %r5, %r6;
	cvt.s64.s32	%rd1, %r1;
	setp.ge.u64	%p1, %rd1, %rd3;
	@%p1 bra 	BB2_2;

	cvt.u32.u64	%r7, %rd1;
	shr.u64 	%rd4, %rd1, 32;
	cvt.u32.u64	%r8, %rd4;
	xor.b32  	%r9, %r7, 1549556828;
	xor.b32  	%r10, %r8, 909522486;
	mul.wide.s32 	%rd5, %r1, 260;
	add.s64 	%rd6, %rd2, %rd5;
	st.global.u32 	[%rd6], %r9;
	st.global.u32 	[%rd6+4], %r10;
	mov.u32 	%r11, 0;
	st.global.u32 	[%rd6+8], %r11;
	st.global.u32 	[%rd6+12], %r11;
	st.global.u32 	[%rd6+16], %r11;
	st.global.u32 	[%rd6+20], %r11;
	st.global.u32 	[%rd6+24], %r11;
	st.global.u32 	[%rd6+28], %r11;
	st.global.u32 	[%rd6+32], %r11;
	st.global.u32 	[%rd6+36], %r11;
	st.global.u32 	[%rd6+40], %r11;
	st.global.u32 	[%rd6+44], %r11;
	st.global.u32 	[%rd6+48], %r11;
	st.global.u32 	[%rd6+52], %r11;
	st.global.u32 	[%rd6+56], %r11;
	st.global.u32 	[%rd6+60], %r11;
	st.global.u32 	[%rd6+64], %r11;
	st.global.u32 	[%rd6+68], %r11;
	st.global.u32 	[%rd6+72], %r11;
	st.global.u32 	[%rd6+76], %r11;
	st.global.u32 	[%rd6+80], %r11;
	st.global.u32 	[%rd6+84], %r11;
	st.global.u32 	[%rd6+88], %r11;
	st.global.u32 	[%rd6+92], %r11;
	st.global.u32 	[%rd6+96], %r11;
	st.global.u32 	[%rd6+100], %r11;
	st.global.u32 	[%rd6+104], %r11;
	st.global.u32 	[%rd6+108], %r11;
	st.global.u32 	[%rd6+112], %r11;
	st.global.u32 	[%rd6+116], %r11;
	st.global.u32 	[%rd6+120], %r11;
	st.global.u32 	[%rd6+124], %r11;
	st.global.u32 	[%rd6+128], %r11;
	st.global.u32 	[%rd6+132], %r11;
	st.global.u32 	[%rd6+136], %r11;
	st.global.u32 	[%rd6+140], %r11;
	st.global.u32 	[%rd6+144], %r11;
	st.global.u32 	[%rd6+148], %r11;
	st.global.u32 	[%rd6+152], %r11;
	st.global.u32 	[%rd6+156], %r11;
	st.global.u32 	[%rd6+160], %r11;
	st.global.u32 	[%rd6+164], %r11;
	st.global.u32 	[%rd6+168], %r11;
	st.global.u32 	[%rd6+172], %r11;
	st.global.u32 	[%rd6+176], %r11;
	st.global.u32 	[%rd6+180], %r11;
	st.global.u32 	[%rd6+184], %r11;
	st.global.u32 	[%rd6+188], %r11;
	st.global.u32 	[%rd6+192], %r11;
	st.global.u32 	[%rd6+196], %r11;
	st.global.u32 	[%rd6+200], %r11;
	st.global.u32 	[%rd6+204], %r11;
	st.global.u32 	[%rd6+208], %r11;
	st.global.u32 	[%rd6+212], %r11;
	st.global.u32 	[%rd6+216], %r11;
	st.global.u32 	[%rd6+220], %r11;
	st.global.u32 	[%rd6+224], %r11;
	st.global.u32 	[%rd6+228], %r11;
	st.global.u32 	[%rd6+232], %r11;
	st.global.u32 	[%rd6+236], %r11;
	st.global.u32 	[%rd6+240], %r11;
	st.global.u32 	[%rd6+244], %r11;
	st.global.u32 	[%rd6+248], %r11;
	st.global.u32 	[%rd6+252], %r11;
	mov.u32 	%r12, 7;
	st.global.u32 	[%rd6+256], %r12;

BB2_2:
	ret;
}

	// .globl	m01800_init
.entry m01800_init(
	.param .u64 .ptr .global .align 4 m01800_init_param_0,
	.param .u64 .ptr .global .align 4 m01800_init_param_1,
	.param .u64 .ptr .global .align 4 m01800_init_param_2,
	.param .u64 .ptr .global .align 4 m01800_init_param_3,
	.param .u64 .ptr .global .align 8 m01800_init_param_4,
	.param .u64 .ptr .global .align 1 m01800_init_param_5,
	.param .u64 .ptr .global .align 4 m01800_init_param_6,
	.param .u64 .ptr .global .align 4 m01800_init_param_7,
	.param .u64 .ptr .global .align 4 m01800_init_param_8,
	.param .u64 .ptr .global .align 4 m01800_init_param_9,
	.param .u64 .ptr .global .align 4 m01800_init_param_10,
	.param .u64 .ptr .global .align 4 m01800_init_param_11,
	.param .u64 .ptr .global .align 4 m01800_init_param_12,
	.param .u64 .ptr .global .align 4 m01800_init_param_13,
	.param .u64 .ptr .global .align 8 m01800_init_param_14,
	.param .u64 .ptr .global .align 4 m01800_init_param_15,
	.param .u64 .ptr .global .align 4 m01800_init_param_16,
	.param .u64 .ptr .global .align 4 m01800_init_param_17,
	.param .u64 .ptr .global .align 1 m01800_init_param_18,
	.param .u64 .ptr .global .align 4 m01800_init_param_19,
	.param .u64 .ptr .global .align 4 m01800_init_param_20,
	.param .u64 .ptr .global .align 4 m01800_init_param_21,
	.param .u64 .ptr .global .align 4 m01800_init_param_22,
	.param .u64 .ptr .global .align 4 m01800_init_param_23,
	.param .u32 m01800_init_param_24,
	.param .u32 m01800_init_param_25,
	.param .u32 m01800_init_param_26,
	.param .u32 m01800_init_param_27,
	.param .u32 m01800_init_param_28,
	.param .u32 m01800_init_param_29,
	.param .u32 m01800_init_param_30,
	.param .u32 m01800_init_param_31,
	.param .u32 m01800_init_param_32,
	.param .u32 m01800_init_param_33,
	.param .u64 m01800_init_param_34
)
{
	.local .align 16 .b8 	__local_depot3[304];
	.reg .b64 	%SP;
	.reg .b64 	%SPL;
	.reg .pred 	%p<222>;
	.reg .b16 	%rs<312>;
	.reg .b32 	%r<14509>;
	.reg .b64 	%rd<21887>;


	mov.u64 	%SPL, __local_depot3;
	cvta.local.u64 	%SP, %SPL;
	ld.param.u64 	%rd1787, [m01800_init_param_0];
	ld.param.u64 	%rd1789, [m01800_init_param_17];
	ld.param.u32 	%r494, [m01800_init_param_27];
	ld.param.u64 	%rd1790, [m01800_init_param_34];
	add.u64 	%rd1, %SPL, 32;
	mov.u32 	%r495, %ctaid.x;
	mov.u32 	%r496, %ntid.x;
	mov.b32	%r497, %envreg3;
	mad.lo.s32 	%r498, %r495, %r496, %r497;
	mov.u32 	%r499, %tid.x;
	add.s32 	%r1, %r498, %r499;
	cvt.s64.s32	%rd1792, %r1;
	setp.ge.u64	%p1, %rd1792, %rd1790;
	@%p1 bra 	BB3_354;

	mul.wide.s32 	%rd1801, %r1, 260;
	add.s64 	%rd1802, %rd1787, %rd1801;
	ld.global.u32 	%r2, [%rd1802+256];
	mul.wide.u32 	%rd1803, %r494, 560;
	add.s64 	%rd1804, %rd1789, %rd1803;
	ld.global.u32 	%r3, [%rd1804+512];
	ld.global.u32 	%r532, [%rd1802+4];
	ld.global.u32 	%r533, [%rd1802];
	mov.b64	%rd1793, {%r533, %r532};
	// inline asm
	mov.b64 {%r500, %r501}, %rd1793;
	// inline asm
	// inline asm
	prmt.b32 %r502, %r500, 0, 0x0123;
	// inline asm
	// inline asm
	prmt.b32 %r504, %r501, 0, 0x0123;
	// inline asm
	// inline asm
	mov.b64 %rd1794, {%r504, %r502};
	// inline asm
	add.u64 	%rd1805, %SP, 0;
	add.u64 	%rd1806, %SPL, 0;
	ld.global.u32 	%r534, [%rd1802+12];
	ld.global.u32 	%r535, [%rd1802+8];
	ld.global.u32 	%r536, [%rd1804+4];
	ld.global.u32 	%r537, [%rd1804];
	ld.global.u32 	%r538, [%rd1804+12];
	ld.global.u32 	%r539, [%rd1804+8];
	st.local.u64 	[%rd1806], %rd1794;
	mov.b64	%rd1795, {%r535, %r534};
	// inline asm
	mov.b64 {%r508, %r509}, %rd1795;
	// inline asm
	// inline asm
	prmt.b32 %r510, %r508, 0, 0x0123;
	// inline asm
	// inline asm
	prmt.b32 %r512, %r509, 0, 0x0123;
	// inline asm
	// inline asm
	mov.b64 %rd1796, {%r512, %r510};
	// inline asm
	st.local.u64 	[%rd1806+8], %rd1796;
	mov.b64	%rd1797, {%r537, %r536};
	// inline asm
	mov.b64 {%r516, %r517}, %rd1797;
	// inline asm
	// inline asm
	prmt.b32 %r518, %r516, 0, 0x0123;
	// inline asm
	// inline asm
	prmt.b32 %r520, %r517, 0, 0x0123;
	// inline asm
	// inline asm
	mov.b64 %rd1798, {%r520, %r518};
	// inline asm
	add.u64 	%rd1808, %SPL, 16;
	st.local.u64 	[%rd1808], %rd1798;
	mov.b64	%rd1799, {%r539, %r538};
	// inline asm
	mov.b64 {%r524, %r525}, %rd1799;
	// inline asm
	// inline asm
	prmt.b32 %r526, %r524, 0, 0x0123;
	// inline asm
	// inline asm
	prmt.b32 %r528, %r525, 0, 0x0123;
	// inline asm
	// inline asm
	mov.b64 %rd1800, {%r528, %r526};
	// inline asm
	st.local.u64 	[%rd1808+8], %rd1800;
	mov.u64 	%rd1809, 7640891576956012808;
	st.local.u64 	[%rd1], %rd1809;
	mov.u64 	%rd1810, -4942790177534073029;
	st.local.u64 	[%rd1+8], %rd1810;
	mov.u64 	%rd1811, 4354685564936845355;
	st.local.u64 	[%rd1+16], %rd1811;
	mov.u64 	%rd1812, -6534734903238641935;
	st.local.u64 	[%rd1+24], %rd1812;
	mov.u64 	%rd1813, 5840696475078001361;
	st.local.u64 	[%rd1+32], %rd1813;
	mov.u64 	%rd1814, -7276294671716946913;
	st.local.u64 	[%rd1+40], %rd1814;
	mov.u64 	%rd1815, 2270897969802886507;
	st.local.u64 	[%rd1+48], %rd1815;
	mov.u64 	%rd1816, 6620516959819538809;
	st.local.u64 	[%rd1+56], %rd1816;
	st.local.u32 	[%rd1+192], %r2;
	setp.lt.s32	%p2, %r2, 128;
	@%p2 bra 	BB3_13;
	bra.uni 	BB3_2;

BB3_13:
	setp.lt.s32	%p11, %r2, 1;
	@%p11 bra 	BB3_23;

	cvta.to.local.u64 	%rd91, %rd1805;
	add.s64 	%rd92, %rd1, 64;
	and.b32  	%r16, %r2, 3;
	setp.eq.s32	%p12, %r16, 0;
	mov.u32 	%r14303, 0;
	@%p12 bra 	BB3_20;

	setp.eq.s32	%p13, %r16, 1;
	mov.u32 	%r14301, 0;
	@%p13 bra 	BB3_19;

	setp.eq.s32	%p14, %r16, 2;
	mov.u32 	%r14300, 0;
	@%p14 bra 	BB3_18;

	ld.local.u8 	%rs31, [%rd91+7];
	st.local.u8 	[%rd1+71], %rs31;
	mov.u32 	%r14300, 1;

BB3_18:
	xor.b32  	%r1293, %r14300, 7;
	cvt.u64.u32	%rd2903, %r1293;
	add.s64 	%rd2904, %rd91, %rd2903;
	ld.local.u8 	%rs32, [%rd2904];
	add.s64 	%rd2905, %rd92, %rd2903;
	st.local.u8 	[%rd2905], %rs32;
	add.s32 	%r14301, %r14300, 1;

BB3_19:
	xor.b32  	%r1294, %r14301, 7;
	cvt.s64.s32	%rd2906, %r1294;
	add.s64 	%rd2907, %rd91, %rd2906;
	ld.local.u8 	%rs33, [%rd2907];
	add.s64 	%rd2908, %rd92, %rd2906;
	st.local.u8 	[%rd2908], %rs33;
	add.s32 	%r14303, %r14301, 1;

BB3_20:
	setp.lt.u32	%p15, %r2, 4;
	@%p15 bra 	BB3_23;

	mov.u32 	%r14304, %r14303;

BB3_22:
	xor.b32  	%r1295, %r14304, 7;
	cvt.s64.s32	%rd2909, %r1295;
	add.s64 	%rd2910, %rd91, %rd2909;
	ld.local.u8 	%rs34, [%rd2910];
	xor.b32  	%r1296, %r14303, 7;
	cvt.s64.s32	%rd2911, %r1296;
	add.s64 	%rd2912, %rd92, %rd2911;
	st.local.u8 	[%rd2912], %rs34;
	add.s32 	%r1297, %r14304, 1;
	xor.b32  	%r1298, %r1297, 7;
	cvt.s64.s32	%rd2913, %r1298;
	add.s64 	%rd2914, %rd91, %rd2913;
	ld.local.u8 	%rs35, [%rd2914];
	add.s32 	%r1299, %r14303, 1;
	xor.b32  	%r1300, %r1299, 7;
	cvt.s64.s32	%rd2915, %r1300;
	add.s64 	%rd2916, %rd92, %rd2915;
	st.local.u8 	[%rd2916], %rs35;
	add.s32 	%r1301, %r14304, 2;
	xor.b32  	%r1302, %r1301, 7;
	cvt.s64.s32	%rd2917, %r1302;
	add.s64 	%rd2918, %rd91, %rd2917;
	ld.local.u8 	%rs36, [%rd2918];
	add.s32 	%r1303, %r14303, 2;
	xor.b32  	%r1304, %r1303, 7;
	cvt.s64.s32	%rd2919, %r1304;
	add.s64 	%rd2920, %rd92, %rd2919;
	st.local.u8 	[%rd2920], %rs36;
	add.s32 	%r1305, %r14304, 3;
	xor.b32  	%r1306, %r1305, 7;
	cvt.s64.s32	%rd2921, %r1306;
	add.s64 	%rd2922, %rd91, %rd2921;
	ld.local.u8 	%rs37, [%rd2922];
	add.s32 	%r1307, %r14303, 3;
	xor.b32  	%r1308, %r1307, 7;
	cvt.s64.s32	%rd2923, %r1308;
	add.s64 	%rd2924, %rd92, %rd2923;
	st.local.u8 	[%rd2924], %rs37;
	add.s32 	%r14304, %r14304, 4;
	setp.lt.s32	%p16, %r14304, %r2;
	add.s32 	%r14303, %r14303, 4;
	@%p16 bra 	BB3_22;
	bra.uni 	BB3_23;

BB3_2:
	add.s64 	%rd3, %rd1, 64;
	mov.u32 	%r14295, 0;
	mov.u64 	%rd21338, %rd1806;
	mov.u64 	%rd21339, %rd1;

BB3_3:
	ld.local.u8 	%rs9, [%rd21338+7];
	st.local.u8 	[%rd21339+71], %rs9;
	add.s32 	%r541, %r14295, 1;
	xor.b32  	%r542, %r541, 7;
	cvt.s64.s32	%rd1818, %r542;
	add.s64 	%rd1819, %rd1806, %rd1818;
	ld.local.u8 	%rs10, [%rd1819];
	add.s64 	%rd1820, %rd3, %rd1818;
	st.local.u8 	[%rd1820], %rs10;
	add.s32 	%r543, %r14295, 2;
	xor.b32  	%r544, %r543, 7;
	cvt.s64.s32	%rd1821, %r544;
	add.s64 	%rd1822, %rd1806, %rd1821;
	ld.local.u8 	%rs11, [%rd1822];
	add.s64 	%rd1823, %rd3, %rd1821;
	st.local.u8 	[%rd1823], %rs11;
	add.s32 	%r545, %r14295, 3;
	xor.b32  	%r546, %r545, 7;
	cvt.s64.s32	%rd1824, %r546;
	add.s64 	%rd1825, %rd1806, %rd1824;
	ld.local.u8 	%rs12, [%rd1825];
	add.s64 	%rd1826, %rd3, %rd1824;
	st.local.u8 	[%rd1826], %rs12;
	add.s32 	%r547, %r14295, 4;
	xor.b32  	%r548, %r547, 7;
	cvt.s64.s32	%rd1827, %r548;
	add.s64 	%rd1828, %rd1806, %rd1827;
	ld.local.u8 	%rs13, [%rd1828];
	add.s64 	%rd1829, %rd3, %rd1827;
	st.local.u8 	[%rd1829], %rs13;
	add.s32 	%r549, %r14295, 5;
	xor.b32  	%r550, %r549, 7;
	cvt.s64.s32	%rd1830, %r550;
	add.s64 	%rd1831, %rd1806, %rd1830;
	ld.local.u8 	%rs14, [%rd1831];
	add.s64 	%rd1832, %rd3, %rd1830;
	st.local.u8 	[%rd1832], %rs14;
	add.s32 	%r551, %r14295, 6;
	xor.b32  	%r552, %r551, 7;
	cvt.s64.s32	%rd1833, %r552;
	add.s64 	%rd1834, %rd1806, %rd1833;
	ld.local.u8 	%rs15, [%rd1834];
	add.s64 	%rd1835, %rd3, %rd1833;
	st.local.u8 	[%rd1835], %rs15;
	add.s32 	%r553, %r14295, 7;
	and.b32  	%r554, %r553, -16;
	cvt.s64.s32	%rd1836, %r554;
	add.s64 	%rd1837, %rd1806, %rd1836;
	ld.local.u8 	%rs16, [%rd1837];
	add.s64 	%rd1838, %rd3, %rd1836;
	st.local.u8 	[%rd1838], %rs16;
	ld.local.u8 	%rs17, [%rd21338+15];
	st.local.u8 	[%rd21339+79], %rs17;
	add.s32 	%r555, %r14295, 9;
	xor.b32  	%r556, %r555, 7;
	cvt.s64.s32	%rd1839, %r556;
	add.s64 	%rd1840, %rd1806, %rd1839;
	ld.local.u8 	%rs18, [%rd1840];
	add.s64 	%rd1841, %rd3, %rd1839;
	st.local.u8 	[%rd1841], %rs18;
	add.s32 	%r557, %r14295, 10;
	xor.b32  	%r558, %r557, 7;
	cvt.s64.s32	%rd1842, %r558;
	add.s64 	%rd1843, %rd1806, %rd1842;
	ld.local.u8 	%rs19, [%rd1843];
	add.s64 	%rd1844, %rd3, %rd1842;
	st.local.u8 	[%rd1844], %rs19;
	add.s32 	%r559, %r14295, 11;
	xor.b32  	%r560, %r559, 7;
	cvt.s64.s32	%rd1845, %r560;
	add.s64 	%rd1846, %rd1806, %rd1845;
	ld.local.u8 	%rs20, [%rd1846];
	add.s64 	%rd1847, %rd3, %rd1845;
	st.local.u8 	[%rd1847], %rs20;
	add.s32 	%r561, %r14295, 12;
	xor.b32  	%r562, %r561, 7;
	cvt.s64.s32	%rd1848, %r562;
	add.s64 	%rd1849, %rd1806, %rd1848;
	ld.local.u8 	%rs21, [%rd1849];
	add.s64 	%rd1850, %rd3, %rd1848;
	st.local.u8 	[%rd1850], %rs21;
	add.s32 	%r563, %r14295, 13;
	xor.b32  	%r564, %r563, 7;
	cvt.s64.s32	%rd1851, %r564;
	add.s64 	%rd1852, %rd1806, %rd1851;
	ld.local.u8 	%rs22, [%rd1852];
	add.s64 	%rd1853, %rd3, %rd1851;
	st.local.u8 	[%rd1853], %rs22;
	add.s32 	%r565, %r14295, 14;
	xor.b32  	%r566, %r565, 7;
	cvt.s64.s32	%rd1854, %r566;
	add.s64 	%rd1855, %rd1806, %rd1854;
	ld.local.u8 	%rs23, [%rd1855];
	add.s64 	%rd1856, %rd3, %rd1854;
	st.local.u8 	[%rd1856], %rs23;
	add.s32 	%r567, %r14295, 15;
	and.b32  	%r568, %r567, -8;
	cvt.s64.s32	%rd1857, %r568;
	add.s64 	%rd1858, %rd1806, %rd1857;
	ld.local.u8 	%rs24, [%rd1858];
	add.s64 	%rd1859, %rd3, %rd1857;
	st.local.u8 	[%rd1859], %rs24;
	add.s64 	%rd21339, %rd21339, 16;
	add.s64 	%rd21338, %rd21338, 16;
	add.s32 	%r14295, %r14295, 16;
	setp.ne.s32	%p3, %r14295, 128;
	@%p3 bra 	BB3_3;

	ld.local.u64 	%rd1861, [%rd3];
	shr.u64 	%rd1862, %rd1861, 32;
	ld.local.u64 	%rd1863, [%rd1+72];
	shr.u64 	%rd1864, %rd1863, 32;
	ld.local.u64 	%rd1865, [%rd1+80];
	shr.u64 	%rd1866, %rd1865, 32;
	ld.local.u64 	%rd1867, [%rd1+88];
	shr.u64 	%rd1868, %rd1867, 32;
	ld.local.u64 	%rd1869, [%rd1+96];
	shr.u64 	%rd1870, %rd1869, 32;
	ld.local.u64 	%rd1871, [%rd1+104];
	shr.u64 	%rd1872, %rd1871, 32;
	ld.local.u64 	%rd1873, [%rd1+112];
	shr.u64 	%rd1874, %rd1873, 32;
	ld.local.u64 	%rd1875, [%rd1+120];
	shr.u64 	%rd1876, %rd1875, 32;
	ld.local.u64 	%rd1877, [%rd1+128];
	shr.u64 	%rd1878, %rd1877, 32;
	ld.local.u64 	%rd1879, [%rd1+136];
	shr.u64 	%rd1880, %rd1879, 32;
	ld.local.u64 	%rd1881, [%rd1+144];
	shr.u64 	%rd1882, %rd1881, 32;
	ld.local.u64 	%rd1883, [%rd1+152];
	shr.u64 	%rd1884, %rd1883, 32;
	ld.local.u64 	%rd1885, [%rd1+160];
	shr.u64 	%rd1886, %rd1885, 32;
	ld.local.u64 	%rd1887, [%rd1+168];
	shr.u64 	%rd1888, %rd1887, 32;
	ld.local.u64 	%rd1889, [%rd1+176];
	shr.u64 	%rd1890, %rd1889, 32;
	ld.local.u64 	%rd1891, [%rd1+184];
	shr.u64 	%rd1892, %rd1891, 32;
	bfi.b64 	%rd21357, %rd1862, %rd1861, 32, 32;
	bfi.b64 	%rd21358, %rd1864, %rd1863, 32, 32;
	bfi.b64 	%rd21359, %rd1866, %rd1865, 32, 32;
	bfi.b64 	%rd21360, %rd1868, %rd1867, 32, 32;
	bfi.b64 	%rd21361, %rd1870, %rd1869, 32, 32;
	bfi.b64 	%rd21362, %rd1872, %rd1871, 32, 32;
	bfi.b64 	%rd21363, %rd1874, %rd1873, 32, 32;
	bfi.b64 	%rd21364, %rd1876, %rd1875, 32, 32;
	bfi.b64 	%rd21348, %rd1878, %rd1877, 32, 32;
	bfi.b64 	%rd21347, %rd1880, %rd1879, 32, 32;
	bfi.b64 	%rd21346, %rd1882, %rd1881, 32, 32;
	bfi.b64 	%rd21345, %rd1884, %rd1883, 32, 32;
	bfi.b64 	%rd21344, %rd1886, %rd1885, 32, 32;
	bfi.b64 	%rd21343, %rd1888, %rd1887, 32, 32;
	bfi.b64 	%rd21342, %rd1890, %rd1889, 32, 32;
	bfi.b64 	%rd21341, %rd1892, %rd1891, 32, 32;
	ld.local.u64 	%rd25, [%rd1+32];
	{
	.reg .b32 %dummy;
	mov.b64 	{%r570,%dummy}, %rd25;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r571}, %rd25;
	}
	shf.r.wrap.b32 	%r572, %r571, %r570, 14;
	shf.r.wrap.b32 	%r573, %r570, %r571, 14;
	mov.b64 	%rd1893, {%r573, %r572};
	shf.r.wrap.b32 	%r574, %r571, %r570, 18;
	shf.r.wrap.b32 	%r575, %r570, %r571, 18;
	mov.b64 	%rd1894, {%r575, %r574};
	xor.b64  	%rd1895, %rd1894, %rd1893;
	shf.l.wrap.b32 	%r576, %r570, %r571, 23;
	shf.l.wrap.b32 	%r577, %r571, %r570, 23;
	mov.b64 	%rd1896, {%r577, %r576};
	xor.b64  	%rd1897, %rd1895, %rd1896;
	ld.local.u64 	%rd26, [%rd1+48];
	ld.local.u64 	%rd27, [%rd1+40];
	xor.b64  	%rd1898, %rd26, %rd27;
	and.b64  	%rd1899, %rd1898, %rd25;
	xor.b64  	%rd1900, %rd1899, %rd26;
	ld.local.u64 	%rd28, [%rd1+56];
	add.s64 	%rd1901, %rd28, %rd21357;
	mov.u64 	%rd21340, k_sha512;
	ld.const.u64 	%rd1902, [k_sha512];
	add.s64 	%rd1903, %rd1901, %rd1902;
	add.s64 	%rd1904, %rd1903, %rd1900;
	add.s64 	%rd1905, %rd1904, %rd1897;
	ld.local.u64 	%rd29, [%rd1+24];
	add.s64 	%rd1906, %rd1905, %rd29;
	ld.local.u64 	%rd30, [%rd1];
	{
	.reg .b32 %dummy;
	mov.b64 	{%r578,%dummy}, %rd30;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r579}, %rd30;
	}
	shf.r.wrap.b32 	%r580, %r579, %r578, 28;
	shf.r.wrap.b32 	%r581, %r578, %r579, 28;
	mov.b64 	%rd1907, {%r581, %r580};
	shf.l.wrap.b32 	%r582, %r578, %r579, 30;
	shf.l.wrap.b32 	%r583, %r579, %r578, 30;
	mov.b64 	%rd1908, {%r583, %r582};
	xor.b64  	%rd1909, %rd1908, %rd1907;
	shf.l.wrap.b32 	%r584, %r578, %r579, 25;
	shf.l.wrap.b32 	%r585, %r579, %r578, 25;
	mov.b64 	%rd1910, {%r585, %r584};
	xor.b64  	%rd1911, %rd1909, %rd1910;
	ld.local.u64 	%rd31, [%rd1+16];
	xor.b64  	%rd1912, %rd31, %rd30;
	ld.local.u64 	%rd32, [%rd1+8];
	xor.b64  	%rd1913, %rd32, %rd30;
	and.b64  	%rd1914, %rd1912, %rd1913;
	xor.b64  	%rd1915, %rd1914, %rd30;
	add.s64 	%rd1916, %rd1905, %rd1915;
	add.s64 	%rd1917, %rd1916, %rd1911;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r586,%dummy}, %rd1906;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r587}, %rd1906;
	}
	shf.r.wrap.b32 	%r588, %r587, %r586, 14;
	shf.r.wrap.b32 	%r589, %r586, %r587, 14;
	mov.b64 	%rd1918, {%r589, %r588};
	shf.r.wrap.b32 	%r590, %r587, %r586, 18;
	shf.r.wrap.b32 	%r591, %r586, %r587, 18;
	mov.b64 	%rd1919, {%r591, %r590};
	xor.b64  	%rd1920, %rd1919, %rd1918;
	shf.l.wrap.b32 	%r592, %r586, %r587, 23;
	shf.l.wrap.b32 	%r593, %r587, %r586, 23;
	mov.b64 	%rd1921, {%r593, %r592};
	xor.b64  	%rd1922, %rd1920, %rd1921;
	xor.b64  	%rd1923, %rd27, %rd25;
	and.b64  	%rd1924, %rd1906, %rd1923;
	xor.b64  	%rd1925, %rd1924, %rd27;
	add.s64 	%rd1926, %rd26, %rd21358;
	ld.const.u64 	%rd1927, [k_sha512+8];
	add.s64 	%rd1928, %rd1926, %rd1927;
	add.s64 	%rd1929, %rd1928, %rd1925;
	add.s64 	%rd1930, %rd1929, %rd1922;
	add.s64 	%rd1931, %rd1930, %rd31;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r594,%dummy}, %rd1917;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r595}, %rd1917;
	}
	shf.r.wrap.b32 	%r596, %r595, %r594, 28;
	shf.r.wrap.b32 	%r597, %r594, %r595, 28;
	mov.b64 	%rd1932, {%r597, %r596};
	shf.l.wrap.b32 	%r598, %r594, %r595, 30;
	shf.l.wrap.b32 	%r599, %r595, %r594, 30;
	mov.b64 	%rd1933, {%r599, %r598};
	xor.b64  	%rd1934, %rd1933, %rd1932;
	shf.l.wrap.b32 	%r600, %r594, %r595, 25;
	shf.l.wrap.b32 	%r601, %r595, %r594, 25;
	mov.b64 	%rd1935, {%r601, %r600};
	xor.b64  	%rd1936, %rd1934, %rd1935;
	xor.b64  	%rd1937, %rd1917, %rd32;
	xor.b64  	%rd1938, %rd1917, %rd30;
	and.b64  	%rd1939, %rd1938, %rd1937;
	xor.b64  	%rd1940, %rd1939, %rd1917;
	add.s64 	%rd1941, %rd1930, %rd1940;
	add.s64 	%rd1942, %rd1941, %rd1936;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r602,%dummy}, %rd1931;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r603}, %rd1931;
	}
	shf.r.wrap.b32 	%r604, %r603, %r602, 14;
	shf.r.wrap.b32 	%r605, %r602, %r603, 14;
	mov.b64 	%rd1943, {%r605, %r604};
	shf.r.wrap.b32 	%r606, %r603, %r602, 18;
	shf.r.wrap.b32 	%r607, %r602, %r603, 18;
	mov.b64 	%rd1944, {%r607, %r606};
	xor.b64  	%rd1945, %rd1944, %rd1943;
	shf.l.wrap.b32 	%r608, %r602, %r603, 23;
	shf.l.wrap.b32 	%r609, %r603, %r602, 23;
	mov.b64 	%rd1946, {%r609, %r608};
	xor.b64  	%rd1947, %rd1945, %rd1946;
	xor.b64  	%rd1948, %rd1906, %rd25;
	and.b64  	%rd1949, %rd1931, %rd1948;
	xor.b64  	%rd1950, %rd1949, %rd25;
	add.s64 	%rd1951, %rd27, %rd21359;
	ld.const.u64 	%rd1952, [k_sha512+16];
	add.s64 	%rd1953, %rd1951, %rd1952;
	add.s64 	%rd1954, %rd1953, %rd1950;
	add.s64 	%rd1955, %rd1954, %rd1947;
	add.s64 	%rd1956, %rd1955, %rd32;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r610,%dummy}, %rd1942;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r611}, %rd1942;
	}
	shf.r.wrap.b32 	%r612, %r611, %r610, 28;
	shf.r.wrap.b32 	%r613, %r610, %r611, 28;
	mov.b64 	%rd1957, {%r613, %r612};
	shf.l.wrap.b32 	%r614, %r610, %r611, 30;
	shf.l.wrap.b32 	%r615, %r611, %r610, 30;
	mov.b64 	%rd1958, {%r615, %r614};
	xor.b64  	%rd1959, %rd1958, %rd1957;
	shf.l.wrap.b32 	%r616, %r610, %r611, 25;
	shf.l.wrap.b32 	%r617, %r611, %r610, 25;
	mov.b64 	%rd1960, {%r617, %r616};
	xor.b64  	%rd1961, %rd1959, %rd1960;
	xor.b64  	%rd1962, %rd1942, %rd30;
	xor.b64  	%rd1963, %rd1942, %rd1917;
	and.b64  	%rd1964, %rd1963, %rd1962;
	xor.b64  	%rd1965, %rd1964, %rd1942;
	add.s64 	%rd1966, %rd1955, %rd1965;
	add.s64 	%rd1967, %rd1966, %rd1961;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r618,%dummy}, %rd1956;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r619}, %rd1956;
	}
	shf.r.wrap.b32 	%r620, %r619, %r618, 14;
	shf.r.wrap.b32 	%r621, %r618, %r619, 14;
	mov.b64 	%rd1968, {%r621, %r620};
	shf.r.wrap.b32 	%r622, %r619, %r618, 18;
	shf.r.wrap.b32 	%r623, %r618, %r619, 18;
	mov.b64 	%rd1969, {%r623, %r622};
	xor.b64  	%rd1970, %rd1969, %rd1968;
	shf.l.wrap.b32 	%r624, %r618, %r619, 23;
	shf.l.wrap.b32 	%r625, %r619, %r618, 23;
	mov.b64 	%rd1971, {%r625, %r624};
	xor.b64  	%rd1972, %rd1970, %rd1971;
	xor.b64  	%rd1973, %rd1931, %rd1906;
	and.b64  	%rd1974, %rd1956, %rd1973;
	xor.b64  	%rd1975, %rd1974, %rd1906;
	add.s64 	%rd1976, %rd25, %rd21360;
	ld.const.u64 	%rd1977, [k_sha512+24];
	add.s64 	%rd1978, %rd1976, %rd1977;
	add.s64 	%rd1979, %rd1978, %rd1975;
	add.s64 	%rd1980, %rd1979, %rd1972;
	add.s64 	%rd1981, %rd1980, %rd30;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r626,%dummy}, %rd1967;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r627}, %rd1967;
	}
	shf.r.wrap.b32 	%r628, %r627, %r626, 28;
	shf.r.wrap.b32 	%r629, %r626, %r627, 28;
	mov.b64 	%rd1982, {%r629, %r628};
	shf.l.wrap.b32 	%r630, %r626, %r627, 30;
	shf.l.wrap.b32 	%r631, %r627, %r626, 30;
	mov.b64 	%rd1983, {%r631, %r630};
	xor.b64  	%rd1984, %rd1983, %rd1982;
	shf.l.wrap.b32 	%r632, %r626, %r627, 25;
	shf.l.wrap.b32 	%r633, %r627, %r626, 25;
	mov.b64 	%rd1985, {%r633, %r632};
	xor.b64  	%rd1986, %rd1984, %rd1985;
	xor.b64  	%rd1987, %rd1967, %rd1917;
	xor.b64  	%rd1988, %rd1967, %rd1942;
	and.b64  	%rd1989, %rd1988, %rd1987;
	xor.b64  	%rd1990, %rd1989, %rd1967;
	add.s64 	%rd1991, %rd1980, %rd1990;
	add.s64 	%rd1992, %rd1991, %rd1986;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r634,%dummy}, %rd1981;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r635}, %rd1981;
	}
	shf.r.wrap.b32 	%r636, %r635, %r634, 14;
	shf.r.wrap.b32 	%r637, %r634, %r635, 14;
	mov.b64 	%rd1993, {%r637, %r636};
	shf.r.wrap.b32 	%r638, %r635, %r634, 18;
	shf.r.wrap.b32 	%r639, %r634, %r635, 18;
	mov.b64 	%rd1994, {%r639, %r638};
	xor.b64  	%rd1995, %rd1994, %rd1993;
	shf.l.wrap.b32 	%r640, %r634, %r635, 23;
	shf.l.wrap.b32 	%r641, %r635, %r634, 23;
	mov.b64 	%rd1996, {%r641, %r640};
	xor.b64  	%rd1997, %rd1995, %rd1996;
	xor.b64  	%rd1998, %rd1956, %rd1931;
	and.b64  	%rd1999, %rd1981, %rd1998;
	xor.b64  	%rd2000, %rd1999, %rd1931;
	add.s64 	%rd2001, %rd1906, %rd21361;
	ld.const.u64 	%rd2002, [k_sha512+32];
	add.s64 	%rd2003, %rd2001, %rd2002;
	add.s64 	%rd2004, %rd2003, %rd2000;
	add.s64 	%rd2005, %rd2004, %rd1997;
	add.s64 	%rd2006, %rd2005, %rd1917;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r642,%dummy}, %rd1992;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r643}, %rd1992;
	}
	shf.r.wrap.b32 	%r644, %r643, %r642, 28;
	shf.r.wrap.b32 	%r645, %r642, %r643, 28;
	mov.b64 	%rd2007, {%r645, %r644};
	shf.l.wrap.b32 	%r646, %r642, %r643, 30;
	shf.l.wrap.b32 	%r647, %r643, %r642, 30;
	mov.b64 	%rd2008, {%r647, %r646};
	xor.b64  	%rd2009, %rd2008, %rd2007;
	shf.l.wrap.b32 	%r648, %r642, %r643, 25;
	shf.l.wrap.b32 	%r649, %r643, %r642, 25;
	mov.b64 	%rd2010, {%r649, %r648};
	xor.b64  	%rd2011, %rd2009, %rd2010;
	xor.b64  	%rd2012, %rd1992, %rd1942;
	xor.b64  	%rd2013, %rd1992, %rd1967;
	and.b64  	%rd2014, %rd2013, %rd2012;
	xor.b64  	%rd2015, %rd2014, %rd1992;
	add.s64 	%rd2016, %rd2005, %rd2015;
	add.s64 	%rd2017, %rd2016, %rd2011;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r650,%dummy}, %rd2006;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r651}, %rd2006;
	}
	shf.r.wrap.b32 	%r652, %r651, %r650, 14;
	shf.r.wrap.b32 	%r653, %r650, %r651, 14;
	mov.b64 	%rd2018, {%r653, %r652};
	shf.r.wrap.b32 	%r654, %r651, %r650, 18;
	shf.r.wrap.b32 	%r655, %r650, %r651, 18;
	mov.b64 	%rd2019, {%r655, %r654};
	xor.b64  	%rd2020, %rd2019, %rd2018;
	shf.l.wrap.b32 	%r656, %r650, %r651, 23;
	shf.l.wrap.b32 	%r657, %r651, %r650, 23;
	mov.b64 	%rd2021, {%r657, %r656};
	xor.b64  	%rd2022, %rd2020, %rd2021;
	xor.b64  	%rd2023, %rd1981, %rd1956;
	and.b64  	%rd2024, %rd2006, %rd2023;
	xor.b64  	%rd2025, %rd2024, %rd1956;
	add.s64 	%rd2026, %rd1931, %rd21362;
	ld.const.u64 	%rd2027, [k_sha512+40];
	add.s64 	%rd2028, %rd2026, %rd2027;
	add.s64 	%rd2029, %rd2028, %rd2025;
	add.s64 	%rd2030, %rd2029, %rd2022;
	add.s64 	%rd2031, %rd2030, %rd1942;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r658,%dummy}, %rd2017;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r659}, %rd2017;
	}
	shf.r.wrap.b32 	%r660, %r659, %r658, 28;
	shf.r.wrap.b32 	%r661, %r658, %r659, 28;
	mov.b64 	%rd2032, {%r661, %r660};
	shf.l.wrap.b32 	%r662, %r658, %r659, 30;
	shf.l.wrap.b32 	%r663, %r659, %r658, 30;
	mov.b64 	%rd2033, {%r663, %r662};
	xor.b64  	%rd2034, %rd2033, %rd2032;
	shf.l.wrap.b32 	%r664, %r658, %r659, 25;
	shf.l.wrap.b32 	%r665, %r659, %r658, 25;
	mov.b64 	%rd2035, {%r665, %r664};
	xor.b64  	%rd2036, %rd2034, %rd2035;
	xor.b64  	%rd2037, %rd2017, %rd1967;
	xor.b64  	%rd2038, %rd2017, %rd1992;
	and.b64  	%rd2039, %rd2038, %rd2037;
	xor.b64  	%rd2040, %rd2039, %rd2017;
	add.s64 	%rd2041, %rd2030, %rd2040;
	add.s64 	%rd2042, %rd2041, %rd2036;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r666,%dummy}, %rd2031;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r667}, %rd2031;
	}
	shf.r.wrap.b32 	%r668, %r667, %r666, 14;
	shf.r.wrap.b32 	%r669, %r666, %r667, 14;
	mov.b64 	%rd2043, {%r669, %r668};
	shf.r.wrap.b32 	%r670, %r667, %r666, 18;
	shf.r.wrap.b32 	%r671, %r666, %r667, 18;
	mov.b64 	%rd2044, {%r671, %r670};
	xor.b64  	%rd2045, %rd2044, %rd2043;
	shf.l.wrap.b32 	%r672, %r666, %r667, 23;
	shf.l.wrap.b32 	%r673, %r667, %r666, 23;
	mov.b64 	%rd2046, {%r673, %r672};
	xor.b64  	%rd2047, %rd2045, %rd2046;
	xor.b64  	%rd2048, %rd2006, %rd1981;
	and.b64  	%rd2049, %rd2031, %rd2048;
	xor.b64  	%rd2050, %rd2049, %rd1981;
	add.s64 	%rd2051, %rd1956, %rd21363;
	ld.const.u64 	%rd2052, [k_sha512+48];
	add.s64 	%rd2053, %rd2051, %rd2052;
	add.s64 	%rd2054, %rd2053, %rd2050;
	add.s64 	%rd2055, %rd2054, %rd2047;
	add.s64 	%rd2056, %rd2055, %rd1967;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r674,%dummy}, %rd2042;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r675}, %rd2042;
	}
	shf.r.wrap.b32 	%r676, %r675, %r674, 28;
	shf.r.wrap.b32 	%r677, %r674, %r675, 28;
	mov.b64 	%rd2057, {%r677, %r676};
	shf.l.wrap.b32 	%r678, %r674, %r675, 30;
	shf.l.wrap.b32 	%r679, %r675, %r674, 30;
	mov.b64 	%rd2058, {%r679, %r678};
	xor.b64  	%rd2059, %rd2058, %rd2057;
	shf.l.wrap.b32 	%r680, %r674, %r675, 25;
	shf.l.wrap.b32 	%r681, %r675, %r674, 25;
	mov.b64 	%rd2060, {%r681, %r680};
	xor.b64  	%rd2061, %rd2059, %rd2060;
	xor.b64  	%rd2062, %rd2042, %rd1992;
	xor.b64  	%rd2063, %rd2042, %rd2017;
	and.b64  	%rd2064, %rd2063, %rd2062;
	xor.b64  	%rd2065, %rd2064, %rd2042;
	add.s64 	%rd2066, %rd2055, %rd2065;
	add.s64 	%rd2067, %rd2066, %rd2061;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r682,%dummy}, %rd2056;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r683}, %rd2056;
	}
	shf.r.wrap.b32 	%r684, %r683, %r682, 14;
	shf.r.wrap.b32 	%r685, %r682, %r683, 14;
	mov.b64 	%rd2068, {%r685, %r684};
	shf.r.wrap.b32 	%r686, %r683, %r682, 18;
	shf.r.wrap.b32 	%r687, %r682, %r683, 18;
	mov.b64 	%rd2069, {%r687, %r686};
	xor.b64  	%rd2070, %rd2069, %rd2068;
	shf.l.wrap.b32 	%r688, %r682, %r683, 23;
	shf.l.wrap.b32 	%r689, %r683, %r682, 23;
	mov.b64 	%rd2071, {%r689, %r688};
	xor.b64  	%rd2072, %rd2070, %rd2071;
	xor.b64  	%rd2073, %rd2031, %rd2006;
	and.b64  	%rd2074, %rd2056, %rd2073;
	xor.b64  	%rd2075, %rd2074, %rd2006;
	add.s64 	%rd2076, %rd1981, %rd21364;
	ld.const.u64 	%rd2077, [k_sha512+56];
	add.s64 	%rd2078, %rd2076, %rd2077;
	add.s64 	%rd2079, %rd2078, %rd2075;
	add.s64 	%rd2080, %rd2079, %rd2072;
	add.s64 	%rd2081, %rd2080, %rd1992;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r690,%dummy}, %rd2067;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r691}, %rd2067;
	}
	shf.r.wrap.b32 	%r692, %r691, %r690, 28;
	shf.r.wrap.b32 	%r693, %r690, %r691, 28;
	mov.b64 	%rd2082, {%r693, %r692};
	shf.l.wrap.b32 	%r694, %r690, %r691, 30;
	shf.l.wrap.b32 	%r695, %r691, %r690, 30;
	mov.b64 	%rd2083, {%r695, %r694};
	xor.b64  	%rd2084, %rd2083, %rd2082;
	shf.l.wrap.b32 	%r696, %r690, %r691, 25;
	shf.l.wrap.b32 	%r697, %r691, %r690, 25;
	mov.b64 	%rd2085, {%r697, %r696};
	xor.b64  	%rd2086, %rd2084, %rd2085;
	xor.b64  	%rd2087, %rd2067, %rd2017;
	xor.b64  	%rd2088, %rd2067, %rd2042;
	and.b64  	%rd2089, %rd2088, %rd2087;
	xor.b64  	%rd2090, %rd2089, %rd2067;
	add.s64 	%rd2091, %rd2080, %rd2090;
	add.s64 	%rd2092, %rd2091, %rd2086;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r698,%dummy}, %rd2081;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r699}, %rd2081;
	}
	shf.r.wrap.b32 	%r700, %r699, %r698, 14;
	shf.r.wrap.b32 	%r701, %r698, %r699, 14;
	mov.b64 	%rd2093, {%r701, %r700};
	shf.r.wrap.b32 	%r702, %r699, %r698, 18;
	shf.r.wrap.b32 	%r703, %r698, %r699, 18;
	mov.b64 	%rd2094, {%r703, %r702};
	xor.b64  	%rd2095, %rd2094, %rd2093;
	shf.l.wrap.b32 	%r704, %r698, %r699, 23;
	shf.l.wrap.b32 	%r705, %r699, %r698, 23;
	mov.b64 	%rd2096, {%r705, %r704};
	xor.b64  	%rd2097, %rd2095, %rd2096;
	xor.b64  	%rd2098, %rd2056, %rd2031;
	and.b64  	%rd2099, %rd2081, %rd2098;
	xor.b64  	%rd2100, %rd2099, %rd2031;
	add.s64 	%rd2101, %rd2006, %rd21348;
	ld.const.u64 	%rd2102, [k_sha512+64];
	add.s64 	%rd2103, %rd2101, %rd2102;
	add.s64 	%rd2104, %rd2103, %rd2100;
	add.s64 	%rd2105, %rd2104, %rd2097;
	add.s64 	%rd2106, %rd2105, %rd2017;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r706,%dummy}, %rd2092;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r707}, %rd2092;
	}
	shf.r.wrap.b32 	%r708, %r707, %r706, 28;
	shf.r.wrap.b32 	%r709, %r706, %r707, 28;
	mov.b64 	%rd2107, {%r709, %r708};
	shf.l.wrap.b32 	%r710, %r706, %r707, 30;
	shf.l.wrap.b32 	%r711, %r707, %r706, 30;
	mov.b64 	%rd2108, {%r711, %r710};
	xor.b64  	%rd2109, %rd2108, %rd2107;
	shf.l.wrap.b32 	%r712, %r706, %r707, 25;
	shf.l.wrap.b32 	%r713, %r707, %r706, 25;
	mov.b64 	%rd2110, {%r713, %r712};
	xor.b64  	%rd2111, %rd2109, %rd2110;
	xor.b64  	%rd2112, %rd2092, %rd2042;
	xor.b64  	%rd2113, %rd2092, %rd2067;
	and.b64  	%rd2114, %rd2113, %rd2112;
	xor.b64  	%rd2115, %rd2114, %rd2092;
	add.s64 	%rd2116, %rd2105, %rd2115;
	add.s64 	%rd2117, %rd2116, %rd2111;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r714,%dummy}, %rd2106;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r715}, %rd2106;
	}
	shf.r.wrap.b32 	%r716, %r715, %r714, 14;
	shf.r.wrap.b32 	%r717, %r714, %r715, 14;
	mov.b64 	%rd2118, {%r717, %r716};
	shf.r.wrap.b32 	%r718, %r715, %r714, 18;
	shf.r.wrap.b32 	%r719, %r714, %r715, 18;
	mov.b64 	%rd2119, {%r719, %r718};
	xor.b64  	%rd2120, %rd2119, %rd2118;
	shf.l.wrap.b32 	%r720, %r714, %r715, 23;
	shf.l.wrap.b32 	%r721, %r715, %r714, 23;
	mov.b64 	%rd2121, {%r721, %r720};
	xor.b64  	%rd2122, %rd2120, %rd2121;
	xor.b64  	%rd2123, %rd2081, %rd2056;
	and.b64  	%rd2124, %rd2106, %rd2123;
	xor.b64  	%rd2125, %rd2124, %rd2056;
	add.s64 	%rd2126, %rd2031, %rd21347;
	ld.const.u64 	%rd2127, [k_sha512+72];
	add.s64 	%rd2128, %rd2126, %rd2127;
	add.s64 	%rd2129, %rd2128, %rd2125;
	add.s64 	%rd2130, %rd2129, %rd2122;
	add.s64 	%rd2131, %rd2130, %rd2042;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r722,%dummy}, %rd2117;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r723}, %rd2117;
	}
	shf.r.wrap.b32 	%r724, %r723, %r722, 28;
	shf.r.wrap.b32 	%r725, %r722, %r723, 28;
	mov.b64 	%rd2132, {%r725, %r724};
	shf.l.wrap.b32 	%r726, %r722, %r723, 30;
	shf.l.wrap.b32 	%r727, %r723, %r722, 30;
	mov.b64 	%rd2133, {%r727, %r726};
	xor.b64  	%rd2134, %rd2133, %rd2132;
	shf.l.wrap.b32 	%r728, %r722, %r723, 25;
	shf.l.wrap.b32 	%r729, %r723, %r722, 25;
	mov.b64 	%rd2135, {%r729, %r728};
	xor.b64  	%rd2136, %rd2134, %rd2135;
	xor.b64  	%rd2137, %rd2117, %rd2067;
	xor.b64  	%rd2138, %rd2117, %rd2092;
	and.b64  	%rd2139, %rd2138, %rd2137;
	xor.b64  	%rd2140, %rd2139, %rd2117;
	add.s64 	%rd2141, %rd2130, %rd2140;
	add.s64 	%rd2142, %rd2141, %rd2136;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r730,%dummy}, %rd2131;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r731}, %rd2131;
	}
	shf.r.wrap.b32 	%r732, %r731, %r730, 14;
	shf.r.wrap.b32 	%r733, %r730, %r731, 14;
	mov.b64 	%rd2143, {%r733, %r732};
	shf.r.wrap.b32 	%r734, %r731, %r730, 18;
	shf.r.wrap.b32 	%r735, %r730, %r731, 18;
	mov.b64 	%rd2144, {%r735, %r734};
	xor.b64  	%rd2145, %rd2144, %rd2143;
	shf.l.wrap.b32 	%r736, %r730, %r731, 23;
	shf.l.wrap.b32 	%r737, %r731, %r730, 23;
	mov.b64 	%rd2146, {%r737, %r736};
	xor.b64  	%rd2147, %rd2145, %rd2146;
	xor.b64  	%rd2148, %rd2106, %rd2081;
	and.b64  	%rd2149, %rd2131, %rd2148;
	xor.b64  	%rd2150, %rd2149, %rd2081;
	add.s64 	%rd2151, %rd2056, %rd21346;
	ld.const.u64 	%rd2152, [k_sha512+80];
	add.s64 	%rd2153, %rd2151, %rd2152;
	add.s64 	%rd2154, %rd2153, %rd2150;
	add.s64 	%rd2155, %rd2154, %rd2147;
	add.s64 	%rd2156, %rd2155, %rd2067;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r738,%dummy}, %rd2142;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r739}, %rd2142;
	}
	shf.r.wrap.b32 	%r740, %r739, %r738, 28;
	shf.r.wrap.b32 	%r741, %r738, %r739, 28;
	mov.b64 	%rd2157, {%r741, %r740};
	shf.l.wrap.b32 	%r742, %r738, %r739, 30;
	shf.l.wrap.b32 	%r743, %r739, %r738, 30;
	mov.b64 	%rd2158, {%r743, %r742};
	xor.b64  	%rd2159, %rd2158, %rd2157;
	shf.l.wrap.b32 	%r744, %r738, %r739, 25;
	shf.l.wrap.b32 	%r745, %r739, %r738, 25;
	mov.b64 	%rd2160, {%r745, %r744};
	xor.b64  	%rd2161, %rd2159, %rd2160;
	xor.b64  	%rd2162, %rd2142, %rd2092;
	xor.b64  	%rd2163, %rd2142, %rd2117;
	and.b64  	%rd2164, %rd2163, %rd2162;
	xor.b64  	%rd2165, %rd2164, %rd2142;
	add.s64 	%rd2166, %rd2155, %rd2165;
	add.s64 	%rd2167, %rd2166, %rd2161;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r746,%dummy}, %rd2156;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r747}, %rd2156;
	}
	shf.r.wrap.b32 	%r748, %r747, %r746, 14;
	shf.r.wrap.b32 	%r749, %r746, %r747, 14;
	mov.b64 	%rd2168, {%r749, %r748};
	shf.r.wrap.b32 	%r750, %r747, %r746, 18;
	shf.r.wrap.b32 	%r751, %r746, %r747, 18;
	mov.b64 	%rd2169, {%r751, %r750};
	xor.b64  	%rd2170, %rd2169, %rd2168;
	shf.l.wrap.b32 	%r752, %r746, %r747, 23;
	shf.l.wrap.b32 	%r753, %r747, %r746, 23;
	mov.b64 	%rd2171, {%r753, %r752};
	xor.b64  	%rd2172, %rd2170, %rd2171;
	xor.b64  	%rd2173, %rd2131, %rd2106;
	and.b64  	%rd2174, %rd2156, %rd2173;
	xor.b64  	%rd2175, %rd2174, %rd2106;
	add.s64 	%rd2176, %rd2081, %rd21345;
	ld.const.u64 	%rd2177, [k_sha512+88];
	add.s64 	%rd2178, %rd2176, %rd2177;
	add.s64 	%rd2179, %rd2178, %rd2175;
	add.s64 	%rd2180, %rd2179, %rd2172;
	add.s64 	%rd2181, %rd2180, %rd2092;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r754,%dummy}, %rd2167;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r755}, %rd2167;
	}
	shf.r.wrap.b32 	%r756, %r755, %r754, 28;
	shf.r.wrap.b32 	%r757, %r754, %r755, 28;
	mov.b64 	%rd2182, {%r757, %r756};
	shf.l.wrap.b32 	%r758, %r754, %r755, 30;
	shf.l.wrap.b32 	%r759, %r755, %r754, 30;
	mov.b64 	%rd2183, {%r759, %r758};
	xor.b64  	%rd2184, %rd2183, %rd2182;
	shf.l.wrap.b32 	%r760, %r754, %r755, 25;
	shf.l.wrap.b32 	%r761, %r755, %r754, 25;
	mov.b64 	%rd2185, {%r761, %r760};
	xor.b64  	%rd2186, %rd2184, %rd2185;
	xor.b64  	%rd2187, %rd2167, %rd2117;
	xor.b64  	%rd2188, %rd2167, %rd2142;
	and.b64  	%rd2189, %rd2188, %rd2187;
	xor.b64  	%rd2190, %rd2189, %rd2167;
	add.s64 	%rd2191, %rd2180, %rd2190;
	add.s64 	%rd2192, %rd2191, %rd2186;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r762,%dummy}, %rd2181;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r763}, %rd2181;
	}
	shf.r.wrap.b32 	%r764, %r763, %r762, 14;
	shf.r.wrap.b32 	%r765, %r762, %r763, 14;
	mov.b64 	%rd2193, {%r765, %r764};
	shf.r.wrap.b32 	%r766, %r763, %r762, 18;
	shf.r.wrap.b32 	%r767, %r762, %r763, 18;
	mov.b64 	%rd2194, {%r767, %r766};
	xor.b64  	%rd2195, %rd2194, %rd2193;
	shf.l.wrap.b32 	%r768, %r762, %r763, 23;
	shf.l.wrap.b32 	%r769, %r763, %r762, 23;
	mov.b64 	%rd2196, {%r769, %r768};
	xor.b64  	%rd2197, %rd2195, %rd2196;
	xor.b64  	%rd2198, %rd2156, %rd2131;
	and.b64  	%rd2199, %rd2181, %rd2198;
	xor.b64  	%rd2200, %rd2199, %rd2131;
	add.s64 	%rd2201, %rd2106, %rd21344;
	ld.const.u64 	%rd2202, [k_sha512+96];
	add.s64 	%rd2203, %rd2201, %rd2202;
	add.s64 	%rd2204, %rd2203, %rd2200;
	add.s64 	%rd2205, %rd2204, %rd2197;
	add.s64 	%rd21356, %rd2205, %rd2117;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r770,%dummy}, %rd2192;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r771}, %rd2192;
	}
	shf.r.wrap.b32 	%r772, %r771, %r770, 28;
	shf.r.wrap.b32 	%r773, %r770, %r771, 28;
	mov.b64 	%rd2206, {%r773, %r772};
	shf.l.wrap.b32 	%r774, %r770, %r771, 30;
	shf.l.wrap.b32 	%r775, %r771, %r770, 30;
	mov.b64 	%rd2207, {%r775, %r774};
	xor.b64  	%rd2208, %rd2207, %rd2206;
	shf.l.wrap.b32 	%r776, %r770, %r771, 25;
	shf.l.wrap.b32 	%r777, %r771, %r770, 25;
	mov.b64 	%rd2209, {%r777, %r776};
	xor.b64  	%rd2210, %rd2208, %rd2209;
	xor.b64  	%rd2211, %rd2192, %rd2142;
	xor.b64  	%rd2212, %rd2192, %rd2167;
	and.b64  	%rd2213, %rd2212, %rd2211;
	xor.b64  	%rd2214, %rd2213, %rd2192;
	add.s64 	%rd2215, %rd2205, %rd2214;
	add.s64 	%rd21352, %rd2215, %rd2210;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r778,%dummy}, %rd21356;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r779}, %rd21356;
	}
	shf.r.wrap.b32 	%r780, %r779, %r778, 14;
	shf.r.wrap.b32 	%r781, %r778, %r779, 14;
	mov.b64 	%rd2216, {%r781, %r780};
	shf.r.wrap.b32 	%r782, %r779, %r778, 18;
	shf.r.wrap.b32 	%r783, %r778, %r779, 18;
	mov.b64 	%rd2217, {%r783, %r782};
	xor.b64  	%rd2218, %rd2217, %rd2216;
	shf.l.wrap.b32 	%r784, %r778, %r779, 23;
	shf.l.wrap.b32 	%r785, %r779, %r778, 23;
	mov.b64 	%rd2219, {%r785, %r784};
	xor.b64  	%rd2220, %rd2218, %rd2219;
	xor.b64  	%rd2221, %rd2181, %rd2156;
	and.b64  	%rd2222, %rd21356, %rd2221;
	xor.b64  	%rd2223, %rd2222, %rd2156;
	add.s64 	%rd2224, %rd2131, %rd21343;
	ld.const.u64 	%rd2225, [k_sha512+104];
	add.s64 	%rd2226, %rd2224, %rd2225;
	add.s64 	%rd2227, %rd2226, %rd2223;
	add.s64 	%rd2228, %rd2227, %rd2220;
	add.s64 	%rd21355, %rd2228, %rd2142;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r786,%dummy}, %rd21352;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r787}, %rd21352;
	}
	shf.r.wrap.b32 	%r788, %r787, %r786, 28;
	shf.r.wrap.b32 	%r789, %r786, %r787, 28;
	mov.b64 	%rd2229, {%r789, %r788};
	shf.l.wrap.b32 	%r790, %r786, %r787, 30;
	shf.l.wrap.b32 	%r791, %r787, %r786, 30;
	mov.b64 	%rd2230, {%r791, %r790};
	xor.b64  	%rd2231, %rd2230, %rd2229;
	shf.l.wrap.b32 	%r792, %r786, %r787, 25;
	shf.l.wrap.b32 	%r793, %r787, %r786, 25;
	mov.b64 	%rd2232, {%r793, %r792};
	xor.b64  	%rd2233, %rd2231, %rd2232;
	xor.b64  	%rd2234, %rd21352, %rd2167;
	xor.b64  	%rd2235, %rd21352, %rd2192;
	and.b64  	%rd2236, %rd2235, %rd2234;
	xor.b64  	%rd2237, %rd2236, %rd21352;
	add.s64 	%rd2238, %rd2228, %rd2237;
	add.s64 	%rd21351, %rd2238, %rd2233;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r794,%dummy}, %rd21355;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r795}, %rd21355;
	}
	shf.r.wrap.b32 	%r796, %r795, %r794, 14;
	shf.r.wrap.b32 	%r797, %r794, %r795, 14;
	mov.b64 	%rd2239, {%r797, %r796};
	shf.r.wrap.b32 	%r798, %r795, %r794, 18;
	shf.r.wrap.b32 	%r799, %r794, %r795, 18;
	mov.b64 	%rd2240, {%r799, %r798};
	xor.b64  	%rd2241, %rd2240, %rd2239;
	shf.l.wrap.b32 	%r800, %r794, %r795, 23;
	shf.l.wrap.b32 	%r801, %r795, %r794, 23;
	mov.b64 	%rd2242, {%r801, %r800};
	xor.b64  	%rd2243, %rd2241, %rd2242;
	xor.b64  	%rd2244, %rd21356, %rd2181;
	and.b64  	%rd2245, %rd21355, %rd2244;
	xor.b64  	%rd2246, %rd2245, %rd2181;
	add.s64 	%rd2247, %rd2156, %rd21342;
	ld.const.u64 	%rd2248, [k_sha512+112];
	add.s64 	%rd2249, %rd2247, %rd2248;
	add.s64 	%rd2250, %rd2249, %rd2246;
	add.s64 	%rd2251, %rd2250, %rd2243;
	add.s64 	%rd21354, %rd2251, %rd2167;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r802,%dummy}, %rd21351;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r803}, %rd21351;
	}
	shf.r.wrap.b32 	%r804, %r803, %r802, 28;
	shf.r.wrap.b32 	%r805, %r802, %r803, 28;
	mov.b64 	%rd2252, {%r805, %r804};
	shf.l.wrap.b32 	%r806, %r802, %r803, 30;
	shf.l.wrap.b32 	%r807, %r803, %r802, 30;
	mov.b64 	%rd2253, {%r807, %r806};
	xor.b64  	%rd2254, %rd2253, %rd2252;
	shf.l.wrap.b32 	%r808, %r802, %r803, 25;
	shf.l.wrap.b32 	%r809, %r803, %r802, 25;
	mov.b64 	%rd2255, {%r809, %r808};
	xor.b64  	%rd2256, %rd2254, %rd2255;
	xor.b64  	%rd2257, %rd21351, %rd2192;
	xor.b64  	%rd2258, %rd21351, %rd21352;
	and.b64  	%rd2259, %rd2258, %rd2257;
	xor.b64  	%rd2260, %rd2259, %rd21351;
	add.s64 	%rd2261, %rd2251, %rd2260;
	add.s64 	%rd21350, %rd2261, %rd2256;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r810,%dummy}, %rd21354;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r811}, %rd21354;
	}
	shf.r.wrap.b32 	%r812, %r811, %r810, 14;
	shf.r.wrap.b32 	%r813, %r810, %r811, 14;
	mov.b64 	%rd2262, {%r813, %r812};
	shf.r.wrap.b32 	%r814, %r811, %r810, 18;
	shf.r.wrap.b32 	%r815, %r810, %r811, 18;
	mov.b64 	%rd2263, {%r815, %r814};
	xor.b64  	%rd2264, %rd2263, %rd2262;
	shf.l.wrap.b32 	%r816, %r810, %r811, 23;
	shf.l.wrap.b32 	%r817, %r811, %r810, 23;
	mov.b64 	%rd2265, {%r817, %r816};
	xor.b64  	%rd2266, %rd2264, %rd2265;
	xor.b64  	%rd2267, %rd21355, %rd21356;
	and.b64  	%rd2268, %rd21354, %rd2267;
	xor.b64  	%rd2269, %rd2268, %rd21356;
	add.s64 	%rd2270, %rd2181, %rd21341;
	ld.const.u64 	%rd2271, [k_sha512+120];
	add.s64 	%rd2272, %rd2270, %rd2271;
	add.s64 	%rd2273, %rd2272, %rd2269;
	add.s64 	%rd2274, %rd2273, %rd2266;
	add.s64 	%rd21353, %rd2274, %rd2192;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r818,%dummy}, %rd21350;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r819}, %rd21350;
	}
	shf.r.wrap.b32 	%r820, %r819, %r818, 28;
	shf.r.wrap.b32 	%r821, %r818, %r819, 28;
	mov.b64 	%rd2275, {%r821, %r820};
	shf.l.wrap.b32 	%r822, %r818, %r819, 30;
	shf.l.wrap.b32 	%r823, %r819, %r818, 30;
	mov.b64 	%rd2276, {%r823, %r822};
	xor.b64  	%rd2277, %rd2276, %rd2275;
	shf.l.wrap.b32 	%r824, %r818, %r819, 25;
	shf.l.wrap.b32 	%r825, %r819, %r818, 25;
	mov.b64 	%rd2278, {%r825, %r824};
	xor.b64  	%rd2279, %rd2277, %rd2278;
	xor.b64  	%rd2280, %rd21350, %rd21352;
	xor.b64  	%rd2281, %rd21350, %rd21351;
	and.b64  	%rd2282, %rd2281, %rd2280;
	xor.b64  	%rd2283, %rd2282, %rd21350;
	add.s64 	%rd2284, %rd2274, %rd2283;
	add.s64 	%rd21349, %rd2284, %rd2279;
	mov.u32 	%r14296, 16;

BB3_5:
	shr.u64 	%rd2285, %rd21342, 6;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r826,%dummy}, %rd21342;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r827}, %rd21342;
	}
	shf.r.wrap.b32 	%r828, %r827, %r826, 19;
	shf.r.wrap.b32 	%r829, %r826, %r827, 19;
	mov.b64 	%rd2286, {%r829, %r828};
	xor.b64  	%rd2287, %rd2286, %rd2285;
	shf.l.wrap.b32 	%r830, %r826, %r827, 3;
	shf.l.wrap.b32 	%r831, %r827, %r826, 3;
	mov.b64 	%rd2288, {%r831, %r830};
	xor.b64  	%rd2289, %rd2287, %rd2288;
	shr.u64 	%rd2290, %rd21358, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r832,%dummy}, %rd21358;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r833}, %rd21358;
	}
	shf.r.wrap.b32 	%r834, %r833, %r832, 1;
	shf.r.wrap.b32 	%r835, %r832, %r833, 1;
	mov.b64 	%rd2291, {%r835, %r834};
	xor.b64  	%rd2292, %rd2291, %rd2290;
	shf.r.wrap.b32 	%r836, %r833, %r832, 8;
	shf.r.wrap.b32 	%r837, %r832, %r833, 8;
	mov.b64 	%rd2293, {%r837, %r836};
	xor.b64  	%rd2294, %rd2292, %rd2293;
	add.s64 	%rd2295, %rd21347, %rd21357;
	add.s64 	%rd2296, %rd2295, %rd2289;
	add.s64 	%rd21357, %rd2296, %rd2294;
	shr.u64 	%rd2297, %rd21341, 6;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r838,%dummy}, %rd21341;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r839}, %rd21341;
	}
	shf.r.wrap.b32 	%r840, %r839, %r838, 19;
	shf.r.wrap.b32 	%r841, %r838, %r839, 19;
	mov.b64 	%rd2298, {%r841, %r840};
	xor.b64  	%rd2299, %rd2298, %rd2297;
	shf.l.wrap.b32 	%r842, %r838, %r839, 3;
	shf.l.wrap.b32 	%r843, %r839, %r838, 3;
	mov.b64 	%rd2300, {%r843, %r842};
	xor.b64  	%rd2301, %rd2299, %rd2300;
	shr.u64 	%rd2302, %rd21359, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r844,%dummy}, %rd21359;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r845}, %rd21359;
	}
	shf.r.wrap.b32 	%r846, %r845, %r844, 1;
	shf.r.wrap.b32 	%r847, %r844, %r845, 1;
	mov.b64 	%rd2303, {%r847, %r846};
	xor.b64  	%rd2304, %rd2303, %rd2302;
	shf.r.wrap.b32 	%r848, %r845, %r844, 8;
	shf.r.wrap.b32 	%r849, %r844, %r845, 8;
	mov.b64 	%rd2305, {%r849, %r848};
	xor.b64  	%rd2306, %rd2304, %rd2305;
	add.s64 	%rd2307, %rd21346, %rd21358;
	add.s64 	%rd2308, %rd2307, %rd2301;
	add.s64 	%rd21358, %rd2308, %rd2306;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r850,%dummy}, %rd21357;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r851}, %rd21357;
	}
	shf.r.wrap.b32 	%r852, %r851, %r850, 19;
	shf.r.wrap.b32 	%r853, %r850, %r851, 19;
	mov.b64 	%rd2309, {%r853, %r852};
	shf.l.wrap.b32 	%r854, %r850, %r851, 3;
	shf.l.wrap.b32 	%r855, %r851, %r850, 3;
	mov.b64 	%rd2310, {%r855, %r854};
	shr.u64 	%rd2311, %rd21357, 6;
	xor.b64  	%rd2312, %rd2309, %rd2311;
	xor.b64  	%rd2313, %rd2312, %rd2310;
	shr.u64 	%rd2314, %rd21360, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r856,%dummy}, %rd21360;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r857}, %rd21360;
	}
	shf.r.wrap.b32 	%r858, %r857, %r856, 1;
	shf.r.wrap.b32 	%r859, %r856, %r857, 1;
	mov.b64 	%rd2315, {%r859, %r858};
	xor.b64  	%rd2316, %rd2315, %rd2314;
	shf.r.wrap.b32 	%r860, %r857, %r856, 8;
	shf.r.wrap.b32 	%r861, %r856, %r857, 8;
	mov.b64 	%rd2317, {%r861, %r860};
	xor.b64  	%rd2318, %rd2316, %rd2317;
	add.s64 	%rd2319, %rd21345, %rd21359;
	add.s64 	%rd2320, %rd2319, %rd2313;
	add.s64 	%rd21359, %rd2320, %rd2318;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r862,%dummy}, %rd21358;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r863}, %rd21358;
	}
	shf.r.wrap.b32 	%r864, %r863, %r862, 19;
	shf.r.wrap.b32 	%r865, %r862, %r863, 19;
	mov.b64 	%rd2321, {%r865, %r864};
	shf.l.wrap.b32 	%r866, %r862, %r863, 3;
	shf.l.wrap.b32 	%r867, %r863, %r862, 3;
	mov.b64 	%rd2322, {%r867, %r866};
	shr.u64 	%rd2323, %rd21358, 6;
	xor.b64  	%rd2324, %rd2321, %rd2323;
	xor.b64  	%rd2325, %rd2324, %rd2322;
	shr.u64 	%rd2326, %rd21361, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r868,%dummy}, %rd21361;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r869}, %rd21361;
	}
	shf.r.wrap.b32 	%r870, %r869, %r868, 1;
	shf.r.wrap.b32 	%r871, %r868, %r869, 1;
	mov.b64 	%rd2327, {%r871, %r870};
	xor.b64  	%rd2328, %rd2327, %rd2326;
	shf.r.wrap.b32 	%r872, %r869, %r868, 8;
	shf.r.wrap.b32 	%r873, %r868, %r869, 8;
	mov.b64 	%rd2329, {%r873, %r872};
	xor.b64  	%rd2330, %rd2328, %rd2329;
	add.s64 	%rd2331, %rd21344, %rd21360;
	add.s64 	%rd2332, %rd2331, %rd2325;
	add.s64 	%rd21360, %rd2332, %rd2330;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r874,%dummy}, %rd21359;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r875}, %rd21359;
	}
	shf.r.wrap.b32 	%r876, %r875, %r874, 19;
	shf.r.wrap.b32 	%r877, %r874, %r875, 19;
	mov.b64 	%rd2333, {%r877, %r876};
	shf.l.wrap.b32 	%r878, %r874, %r875, 3;
	shf.l.wrap.b32 	%r879, %r875, %r874, 3;
	mov.b64 	%rd2334, {%r879, %r878};
	shr.u64 	%rd2335, %rd21359, 6;
	xor.b64  	%rd2336, %rd2333, %rd2335;
	xor.b64  	%rd2337, %rd2336, %rd2334;
	shr.u64 	%rd2338, %rd21362, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r880,%dummy}, %rd21362;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r881}, %rd21362;
	}
	shf.r.wrap.b32 	%r882, %r881, %r880, 1;
	shf.r.wrap.b32 	%r883, %r880, %r881, 1;
	mov.b64 	%rd2339, {%r883, %r882};
	xor.b64  	%rd2340, %rd2339, %rd2338;
	shf.r.wrap.b32 	%r884, %r881, %r880, 8;
	shf.r.wrap.b32 	%r885, %r880, %r881, 8;
	mov.b64 	%rd2341, {%r885, %r884};
	xor.b64  	%rd2342, %rd2340, %rd2341;
	add.s64 	%rd2343, %rd21343, %rd21361;
	add.s64 	%rd2344, %rd2343, %rd2337;
	add.s64 	%rd21361, %rd2344, %rd2342;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r886,%dummy}, %rd21360;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r887}, %rd21360;
	}
	shf.r.wrap.b32 	%r888, %r887, %r886, 19;
	shf.r.wrap.b32 	%r889, %r886, %r887, 19;
	mov.b64 	%rd2345, {%r889, %r888};
	shf.l.wrap.b32 	%r890, %r886, %r887, 3;
	shf.l.wrap.b32 	%r891, %r887, %r886, 3;
	mov.b64 	%rd2346, {%r891, %r890};
	shr.u64 	%rd2347, %rd21360, 6;
	xor.b64  	%rd2348, %rd2345, %rd2347;
	xor.b64  	%rd2349, %rd2348, %rd2346;
	shr.u64 	%rd2350, %rd21363, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r892,%dummy}, %rd21363;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r893}, %rd21363;
	}
	shf.r.wrap.b32 	%r894, %r893, %r892, 1;
	shf.r.wrap.b32 	%r895, %r892, %r893, 1;
	mov.b64 	%rd2351, {%r895, %r894};
	xor.b64  	%rd2352, %rd2351, %rd2350;
	shf.r.wrap.b32 	%r896, %r893, %r892, 8;
	shf.r.wrap.b32 	%r897, %r892, %r893, 8;
	mov.b64 	%rd2353, {%r897, %r896};
	xor.b64  	%rd2354, %rd2352, %rd2353;
	add.s64 	%rd2355, %rd21342, %rd21362;
	add.s64 	%rd2356, %rd2355, %rd2349;
	add.s64 	%rd21362, %rd2356, %rd2354;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r898,%dummy}, %rd21361;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r899}, %rd21361;
	}
	shf.r.wrap.b32 	%r900, %r899, %r898, 19;
	shf.r.wrap.b32 	%r901, %r898, %r899, 19;
	mov.b64 	%rd2357, {%r901, %r900};
	shf.l.wrap.b32 	%r902, %r898, %r899, 3;
	shf.l.wrap.b32 	%r903, %r899, %r898, 3;
	mov.b64 	%rd2358, {%r903, %r902};
	shr.u64 	%rd2359, %rd21361, 6;
	xor.b64  	%rd2360, %rd2357, %rd2359;
	xor.b64  	%rd2361, %rd2360, %rd2358;
	shr.u64 	%rd2362, %rd21364, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r904,%dummy}, %rd21364;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r905}, %rd21364;
	}
	shf.r.wrap.b32 	%r906, %r905, %r904, 1;
	shf.r.wrap.b32 	%r907, %r904, %r905, 1;
	mov.b64 	%rd2363, {%r907, %r906};
	xor.b64  	%rd2364, %rd2363, %rd2362;
	shf.r.wrap.b32 	%r908, %r905, %r904, 8;
	shf.r.wrap.b32 	%r909, %r904, %r905, 8;
	mov.b64 	%rd2365, {%r909, %r908};
	xor.b64  	%rd2366, %rd2364, %rd2365;
	add.s64 	%rd2367, %rd21341, %rd21363;
	add.s64 	%rd2368, %rd2367, %rd2361;
	add.s64 	%rd21363, %rd2368, %rd2366;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r910,%dummy}, %rd21362;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r911}, %rd21362;
	}
	shf.r.wrap.b32 	%r912, %r911, %r910, 19;
	shf.r.wrap.b32 	%r913, %r910, %r911, 19;
	mov.b64 	%rd2369, {%r913, %r912};
	shf.l.wrap.b32 	%r914, %r910, %r911, 3;
	shf.l.wrap.b32 	%r915, %r911, %r910, 3;
	mov.b64 	%rd2370, {%r915, %r914};
	shr.u64 	%rd2371, %rd21362, 6;
	xor.b64  	%rd2372, %rd2369, %rd2371;
	xor.b64  	%rd2373, %rd2372, %rd2370;
	shr.u64 	%rd2374, %rd21348, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r916,%dummy}, %rd21348;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r917}, %rd21348;
	}
	shf.r.wrap.b32 	%r918, %r917, %r916, 1;
	shf.r.wrap.b32 	%r919, %r916, %r917, 1;
	mov.b64 	%rd2375, {%r919, %r918};
	xor.b64  	%rd2376, %rd2375, %rd2374;
	shf.r.wrap.b32 	%r920, %r917, %r916, 8;
	shf.r.wrap.b32 	%r921, %r916, %r917, 8;
	mov.b64 	%rd2377, {%r921, %r920};
	xor.b64  	%rd2378, %rd2376, %rd2377;
	add.s64 	%rd2379, %rd21357, %rd21364;
	add.s64 	%rd2380, %rd2379, %rd2373;
	add.s64 	%rd21364, %rd2380, %rd2378;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r922,%dummy}, %rd21363;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r923}, %rd21363;
	}
	shf.r.wrap.b32 	%r924, %r923, %r922, 19;
	shf.r.wrap.b32 	%r925, %r922, %r923, 19;
	mov.b64 	%rd2381, {%r925, %r924};
	shf.l.wrap.b32 	%r926, %r922, %r923, 3;
	shf.l.wrap.b32 	%r927, %r923, %r922, 3;
	mov.b64 	%rd2382, {%r927, %r926};
	shr.u64 	%rd2383, %rd21363, 6;
	xor.b64  	%rd2384, %rd2381, %rd2383;
	xor.b64  	%rd2385, %rd2384, %rd2382;
	shr.u64 	%rd2386, %rd21347, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r928,%dummy}, %rd21347;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r929}, %rd21347;
	}
	shf.r.wrap.b32 	%r930, %r929, %r928, 1;
	shf.r.wrap.b32 	%r931, %r928, %r929, 1;
	mov.b64 	%rd2387, {%r931, %r930};
	xor.b64  	%rd2388, %rd2387, %rd2386;
	shf.r.wrap.b32 	%r932, %r929, %r928, 8;
	shf.r.wrap.b32 	%r933, %r928, %r929, 8;
	mov.b64 	%rd2389, {%r933, %r932};
	xor.b64  	%rd2390, %rd2388, %rd2389;
	add.s64 	%rd2391, %rd21358, %rd21348;
	add.s64 	%rd2392, %rd2391, %rd2385;
	add.s64 	%rd21348, %rd2392, %rd2390;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r934,%dummy}, %rd21364;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r935}, %rd21364;
	}
	shf.r.wrap.b32 	%r936, %r935, %r934, 19;
	shf.r.wrap.b32 	%r937, %r934, %r935, 19;
	mov.b64 	%rd2393, {%r937, %r936};
	shf.l.wrap.b32 	%r938, %r934, %r935, 3;
	shf.l.wrap.b32 	%r939, %r935, %r934, 3;
	mov.b64 	%rd2394, {%r939, %r938};
	shr.u64 	%rd2395, %rd21364, 6;
	xor.b64  	%rd2396, %rd2393, %rd2395;
	xor.b64  	%rd2397, %rd2396, %rd2394;
	shr.u64 	%rd2398, %rd21346, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r940,%dummy}, %rd21346;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r941}, %rd21346;
	}
	shf.r.wrap.b32 	%r942, %r941, %r940, 1;
	shf.r.wrap.b32 	%r943, %r940, %r941, 1;
	mov.b64 	%rd2399, {%r943, %r942};
	xor.b64  	%rd2400, %rd2399, %rd2398;
	shf.r.wrap.b32 	%r944, %r941, %r940, 8;
	shf.r.wrap.b32 	%r945, %r940, %r941, 8;
	mov.b64 	%rd2401, {%r945, %r944};
	xor.b64  	%rd2402, %rd2400, %rd2401;
	add.s64 	%rd2403, %rd21359, %rd21347;
	add.s64 	%rd2404, %rd2403, %rd2397;
	add.s64 	%rd21347, %rd2404, %rd2402;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r946,%dummy}, %rd21348;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r947}, %rd21348;
	}
	shf.r.wrap.b32 	%r948, %r947, %r946, 19;
	shf.r.wrap.b32 	%r949, %r946, %r947, 19;
	mov.b64 	%rd2405, {%r949, %r948};
	shf.l.wrap.b32 	%r950, %r946, %r947, 3;
	shf.l.wrap.b32 	%r951, %r947, %r946, 3;
	mov.b64 	%rd2406, {%r951, %r950};
	shr.u64 	%rd2407, %rd21348, 6;
	xor.b64  	%rd2408, %rd2405, %rd2407;
	xor.b64  	%rd2409, %rd2408, %rd2406;
	shr.u64 	%rd2410, %rd21345, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r952,%dummy}, %rd21345;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r953}, %rd21345;
	}
	shf.r.wrap.b32 	%r954, %r953, %r952, 1;
	shf.r.wrap.b32 	%r955, %r952, %r953, 1;
	mov.b64 	%rd2411, {%r955, %r954};
	xor.b64  	%rd2412, %rd2411, %rd2410;
	shf.r.wrap.b32 	%r956, %r953, %r952, 8;
	shf.r.wrap.b32 	%r957, %r952, %r953, 8;
	mov.b64 	%rd2413, {%r957, %r956};
	xor.b64  	%rd2414, %rd2412, %rd2413;
	add.s64 	%rd2415, %rd21360, %rd21346;
	add.s64 	%rd2416, %rd2415, %rd2409;
	add.s64 	%rd21346, %rd2416, %rd2414;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r958,%dummy}, %rd21347;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r959}, %rd21347;
	}
	shf.r.wrap.b32 	%r960, %r959, %r958, 19;
	shf.r.wrap.b32 	%r961, %r958, %r959, 19;
	mov.b64 	%rd2417, {%r961, %r960};
	shf.l.wrap.b32 	%r962, %r958, %r959, 3;
	shf.l.wrap.b32 	%r963, %r959, %r958, 3;
	mov.b64 	%rd2418, {%r963, %r962};
	shr.u64 	%rd2419, %rd21347, 6;
	xor.b64  	%rd2420, %rd2417, %rd2419;
	xor.b64  	%rd2421, %rd2420, %rd2418;
	shr.u64 	%rd2422, %rd21344, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r964,%dummy}, %rd21344;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r965}, %rd21344;
	}
	shf.r.wrap.b32 	%r966, %r965, %r964, 1;
	shf.r.wrap.b32 	%r967, %r964, %r965, 1;
	mov.b64 	%rd2423, {%r967, %r966};
	xor.b64  	%rd2424, %rd2423, %rd2422;
	shf.r.wrap.b32 	%r968, %r965, %r964, 8;
	shf.r.wrap.b32 	%r969, %r964, %r965, 8;
	mov.b64 	%rd2425, {%r969, %r968};
	xor.b64  	%rd2426, %rd2424, %rd2425;
	add.s64 	%rd2427, %rd21361, %rd21345;
	add.s64 	%rd2428, %rd2427, %rd2421;
	add.s64 	%rd21345, %rd2428, %rd2426;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r970,%dummy}, %rd21346;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r971}, %rd21346;
	}
	shf.r.wrap.b32 	%r972, %r971, %r970, 19;
	shf.r.wrap.b32 	%r973, %r970, %r971, 19;
	mov.b64 	%rd2429, {%r973, %r972};
	shf.l.wrap.b32 	%r974, %r970, %r971, 3;
	shf.l.wrap.b32 	%r975, %r971, %r970, 3;
	mov.b64 	%rd2430, {%r975, %r974};
	shr.u64 	%rd2431, %rd21346, 6;
	xor.b64  	%rd2432, %rd2429, %rd2431;
	xor.b64  	%rd2433, %rd2432, %rd2430;
	shr.u64 	%rd2434, %rd21343, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r976,%dummy}, %rd21343;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r977}, %rd21343;
	}
	shf.r.wrap.b32 	%r978, %r977, %r976, 1;
	shf.r.wrap.b32 	%r979, %r976, %r977, 1;
	mov.b64 	%rd2435, {%r979, %r978};
	xor.b64  	%rd2436, %rd2435, %rd2434;
	shf.r.wrap.b32 	%r980, %r977, %r976, 8;
	shf.r.wrap.b32 	%r981, %r976, %r977, 8;
	mov.b64 	%rd2437, {%r981, %r980};
	xor.b64  	%rd2438, %rd2436, %rd2437;
	add.s64 	%rd2439, %rd21362, %rd21344;
	add.s64 	%rd2440, %rd2439, %rd2433;
	add.s64 	%rd21344, %rd2440, %rd2438;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r982,%dummy}, %rd21345;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r983}, %rd21345;
	}
	shf.r.wrap.b32 	%r984, %r983, %r982, 19;
	shf.r.wrap.b32 	%r985, %r982, %r983, 19;
	mov.b64 	%rd2441, {%r985, %r984};
	shf.l.wrap.b32 	%r986, %r982, %r983, 3;
	shf.l.wrap.b32 	%r987, %r983, %r982, 3;
	mov.b64 	%rd2442, {%r987, %r986};
	shr.u64 	%rd2443, %rd21345, 6;
	xor.b64  	%rd2444, %rd2441, %rd2443;
	xor.b64  	%rd2445, %rd2444, %rd2442;
	shr.u64 	%rd2446, %rd21342, 7;
	shf.r.wrap.b32 	%r988, %r827, %r826, 1;
	shf.r.wrap.b32 	%r989, %r826, %r827, 1;
	mov.b64 	%rd2447, {%r989, %r988};
	xor.b64  	%rd2448, %rd2447, %rd2446;
	shf.r.wrap.b32 	%r990, %r827, %r826, 8;
	shf.r.wrap.b32 	%r991, %r826, %r827, 8;
	mov.b64 	%rd2449, {%r991, %r990};
	xor.b64  	%rd2450, %rd2448, %rd2449;
	add.s64 	%rd2451, %rd21363, %rd21343;
	add.s64 	%rd2452, %rd2451, %rd2445;
	add.s64 	%rd21343, %rd2452, %rd2450;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r992,%dummy}, %rd21344;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r993}, %rd21344;
	}
	shf.r.wrap.b32 	%r994, %r993, %r992, 19;
	shf.r.wrap.b32 	%r995, %r992, %r993, 19;
	mov.b64 	%rd2453, {%r995, %r994};
	shf.l.wrap.b32 	%r996, %r992, %r993, 3;
	shf.l.wrap.b32 	%r997, %r993, %r992, 3;
	mov.b64 	%rd2454, {%r997, %r996};
	shr.u64 	%rd2455, %rd21344, 6;
	xor.b64  	%rd2456, %rd2453, %rd2455;
	xor.b64  	%rd2457, %rd2456, %rd2454;
	shr.u64 	%rd2458, %rd21341, 7;
	shf.r.wrap.b32 	%r998, %r839, %r838, 1;
	shf.r.wrap.b32 	%r999, %r838, %r839, 1;
	mov.b64 	%rd2459, {%r999, %r998};
	xor.b64  	%rd2460, %rd2459, %rd2458;
	shf.r.wrap.b32 	%r1000, %r839, %r838, 8;
	shf.r.wrap.b32 	%r1001, %r838, %r839, 8;
	mov.b64 	%rd2461, {%r1001, %r1000};
	xor.b64  	%rd2462, %rd2460, %rd2461;
	add.s64 	%rd2463, %rd21364, %rd21342;
	add.s64 	%rd2464, %rd2463, %rd2457;
	add.s64 	%rd21342, %rd2464, %rd2462;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1002,%dummy}, %rd21343;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1003}, %rd21343;
	}
	shf.r.wrap.b32 	%r1004, %r1003, %r1002, 19;
	shf.r.wrap.b32 	%r1005, %r1002, %r1003, 19;
	mov.b64 	%rd2465, {%r1005, %r1004};
	shf.l.wrap.b32 	%r1006, %r1002, %r1003, 3;
	shf.l.wrap.b32 	%r1007, %r1003, %r1002, 3;
	mov.b64 	%rd2466, {%r1007, %r1006};
	shr.u64 	%rd2467, %rd21343, 6;
	xor.b64  	%rd2468, %rd2465, %rd2467;
	xor.b64  	%rd2469, %rd2468, %rd2466;
	shf.r.wrap.b32 	%r1008, %r851, %r850, 1;
	shf.r.wrap.b32 	%r1009, %r850, %r851, 1;
	mov.b64 	%rd2470, {%r1009, %r1008};
	shf.r.wrap.b32 	%r1010, %r851, %r850, 8;
	shf.r.wrap.b32 	%r1011, %r850, %r851, 8;
	mov.b64 	%rd2471, {%r1011, %r1010};
	shr.u64 	%rd2472, %rd21357, 7;
	xor.b64  	%rd2473, %rd2470, %rd2472;
	xor.b64  	%rd2474, %rd2473, %rd2471;
	add.s64 	%rd2475, %rd21348, %rd21341;
	add.s64 	%rd2476, %rd2475, %rd2469;
	add.s64 	%rd21341, %rd2476, %rd2474;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1012,%dummy}, %rd21353;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1013}, %rd21353;
	}
	shf.r.wrap.b32 	%r1014, %r1013, %r1012, 18;
	shf.r.wrap.b32 	%r1015, %r1012, %r1013, 18;
	mov.b64 	%rd2477, {%r1015, %r1014};
	shf.r.wrap.b32 	%r1016, %r1013, %r1012, 14;
	shf.r.wrap.b32 	%r1017, %r1012, %r1013, 14;
	mov.b64 	%rd2478, {%r1017, %r1016};
	xor.b64  	%rd2479, %rd2477, %rd2478;
	shf.l.wrap.b32 	%r1018, %r1012, %r1013, 23;
	shf.l.wrap.b32 	%r1019, %r1013, %r1012, 23;
	mov.b64 	%rd2480, {%r1019, %r1018};
	xor.b64  	%rd2481, %rd2479, %rd2480;
	xor.b64  	%rd2482, %rd21354, %rd21355;
	and.b64  	%rd2483, %rd2482, %rd21353;
	xor.b64  	%rd2484, %rd2483, %rd21355;
	add.s64 	%rd2485, %rd2484, %rd21356;
	add.s64 	%rd2486, %rd2485, %rd21357;
	add.s64 	%rd90, %rd21340, 128;
	ld.const.u64 	%rd2487, [%rd21340+128];
	add.s64 	%rd2488, %rd2486, %rd2487;
	add.s64 	%rd2489, %rd2488, %rd2481;
	add.s64 	%rd2490, %rd2489, %rd21352;
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1020}, %rd21349;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1021,%dummy}, %rd21349;
	}
	shf.l.wrap.b32 	%r1022, %r1021, %r1020, 30;
	shf.l.wrap.b32 	%r1023, %r1020, %r1021, 30;
	mov.b64 	%rd2491, {%r1023, %r1022};
	shf.r.wrap.b32 	%r1024, %r1020, %r1021, 28;
	shf.r.wrap.b32 	%r1025, %r1021, %r1020, 28;
	mov.b64 	%rd2492, {%r1025, %r1024};
	xor.b64  	%rd2493, %rd2491, %rd2492;
	shf.l.wrap.b32 	%r1026, %r1021, %r1020, 25;
	shf.l.wrap.b32 	%r1027, %r1020, %r1021, 25;
	mov.b64 	%rd2494, {%r1027, %r1026};
	xor.b64  	%rd2495, %rd2493, %rd2494;
	xor.b64  	%rd2496, %rd21349, %rd21350;
	xor.b64  	%rd2497, %rd21349, %rd21351;
	and.b64  	%rd2498, %rd2496, %rd2497;
	xor.b64  	%rd2499, %rd2498, %rd21349;
	add.s64 	%rd2500, %rd2489, %rd2499;
	add.s64 	%rd2501, %rd2500, %rd2495;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1028,%dummy}, %rd2490;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1029}, %rd2490;
	}
	shf.r.wrap.b32 	%r1030, %r1029, %r1028, 14;
	shf.r.wrap.b32 	%r1031, %r1028, %r1029, 14;
	mov.b64 	%rd2502, {%r1031, %r1030};
	shf.r.wrap.b32 	%r1032, %r1029, %r1028, 18;
	shf.r.wrap.b32 	%r1033, %r1028, %r1029, 18;
	mov.b64 	%rd2503, {%r1033, %r1032};
	xor.b64  	%rd2504, %rd2503, %rd2502;
	shf.l.wrap.b32 	%r1034, %r1028, %r1029, 23;
	shf.l.wrap.b32 	%r1035, %r1029, %r1028, 23;
	mov.b64 	%rd2505, {%r1035, %r1034};
	xor.b64  	%rd2506, %rd2504, %rd2505;
	xor.b64  	%rd2507, %rd21353, %rd21354;
	and.b64  	%rd2508, %rd2490, %rd2507;
	xor.b64  	%rd2509, %rd2508, %rd21354;
	add.s64 	%rd2510, %rd21358, %rd21355;
	ld.const.u64 	%rd2511, [%rd21340+136];
	add.s64 	%rd2512, %rd2510, %rd2511;
	add.s64 	%rd2513, %rd2512, %rd2509;
	add.s64 	%rd2514, %rd2513, %rd2506;
	add.s64 	%rd2515, %rd2514, %rd21351;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1036,%dummy}, %rd2501;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1037}, %rd2501;
	}
	shf.r.wrap.b32 	%r1038, %r1037, %r1036, 28;
	shf.r.wrap.b32 	%r1039, %r1036, %r1037, 28;
	mov.b64 	%rd2516, {%r1039, %r1038};
	shf.l.wrap.b32 	%r1040, %r1036, %r1037, 30;
	shf.l.wrap.b32 	%r1041, %r1037, %r1036, 30;
	mov.b64 	%rd2517, {%r1041, %r1040};
	xor.b64  	%rd2518, %rd2517, %rd2516;
	shf.l.wrap.b32 	%r1042, %r1036, %r1037, 25;
	shf.l.wrap.b32 	%r1043, %r1037, %r1036, 25;
	mov.b64 	%rd2519, {%r1043, %r1042};
	xor.b64  	%rd2520, %rd2518, %rd2519;
	xor.b64  	%rd2521, %rd2501, %rd21350;
	xor.b64  	%rd2522, %rd2501, %rd21349;
	and.b64  	%rd2523, %rd2522, %rd2521;
	xor.b64  	%rd2524, %rd2523, %rd2501;
	add.s64 	%rd2525, %rd2514, %rd2524;
	add.s64 	%rd2526, %rd2525, %rd2520;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1044,%dummy}, %rd2515;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1045}, %rd2515;
	}
	shf.r.wrap.b32 	%r1046, %r1045, %r1044, 14;
	shf.r.wrap.b32 	%r1047, %r1044, %r1045, 14;
	mov.b64 	%rd2527, {%r1047, %r1046};
	shf.r.wrap.b32 	%r1048, %r1045, %r1044, 18;
	shf.r.wrap.b32 	%r1049, %r1044, %r1045, 18;
	mov.b64 	%rd2528, {%r1049, %r1048};
	xor.b64  	%rd2529, %rd2528, %rd2527;
	shf.l.wrap.b32 	%r1050, %r1044, %r1045, 23;
	shf.l.wrap.b32 	%r1051, %r1045, %r1044, 23;
	mov.b64 	%rd2530, {%r1051, %r1050};
	xor.b64  	%rd2531, %rd2529, %rd2530;
	xor.b64  	%rd2532, %rd2490, %rd21353;
	and.b64  	%rd2533, %rd2515, %rd2532;
	xor.b64  	%rd2534, %rd2533, %rd21353;
	add.s64 	%rd2535, %rd21359, %rd21354;
	ld.const.u64 	%rd2536, [%rd21340+144];
	add.s64 	%rd2537, %rd2535, %rd2536;
	add.s64 	%rd2538, %rd2537, %rd2534;
	add.s64 	%rd2539, %rd2538, %rd2531;
	add.s64 	%rd2540, %rd2539, %rd21350;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1052,%dummy}, %rd2526;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1053}, %rd2526;
	}
	shf.r.wrap.b32 	%r1054, %r1053, %r1052, 28;
	shf.r.wrap.b32 	%r1055, %r1052, %r1053, 28;
	mov.b64 	%rd2541, {%r1055, %r1054};
	shf.l.wrap.b32 	%r1056, %r1052, %r1053, 30;
	shf.l.wrap.b32 	%r1057, %r1053, %r1052, 30;
	mov.b64 	%rd2542, {%r1057, %r1056};
	xor.b64  	%rd2543, %rd2542, %rd2541;
	shf.l.wrap.b32 	%r1058, %r1052, %r1053, 25;
	shf.l.wrap.b32 	%r1059, %r1053, %r1052, 25;
	mov.b64 	%rd2544, {%r1059, %r1058};
	xor.b64  	%rd2545, %rd2543, %rd2544;
	xor.b64  	%rd2546, %rd2526, %rd21349;
	xor.b64  	%rd2547, %rd2526, %rd2501;
	and.b64  	%rd2548, %rd2547, %rd2546;
	xor.b64  	%rd2549, %rd2548, %rd2526;
	add.s64 	%rd2550, %rd2539, %rd2549;
	add.s64 	%rd2551, %rd2550, %rd2545;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1060,%dummy}, %rd2540;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1061}, %rd2540;
	}
	shf.r.wrap.b32 	%r1062, %r1061, %r1060, 14;
	shf.r.wrap.b32 	%r1063, %r1060, %r1061, 14;
	mov.b64 	%rd2552, {%r1063, %r1062};
	shf.r.wrap.b32 	%r1064, %r1061, %r1060, 18;
	shf.r.wrap.b32 	%r1065, %r1060, %r1061, 18;
	mov.b64 	%rd2553, {%r1065, %r1064};
	xor.b64  	%rd2554, %rd2553, %rd2552;
	shf.l.wrap.b32 	%r1066, %r1060, %r1061, 23;
	shf.l.wrap.b32 	%r1067, %r1061, %r1060, 23;
	mov.b64 	%rd2555, {%r1067, %r1066};
	xor.b64  	%rd2556, %rd2554, %rd2555;
	xor.b64  	%rd2557, %rd2515, %rd2490;
	and.b64  	%rd2558, %rd2540, %rd2557;
	xor.b64  	%rd2559, %rd2558, %rd2490;
	add.s64 	%rd2560, %rd21360, %rd21353;
	ld.const.u64 	%rd2561, [%rd21340+152];
	add.s64 	%rd2562, %rd2560, %rd2561;
	add.s64 	%rd2563, %rd2562, %rd2559;
	add.s64 	%rd2564, %rd2563, %rd2556;
	add.s64 	%rd2565, %rd2564, %rd21349;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1068,%dummy}, %rd2551;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1069}, %rd2551;
	}
	shf.r.wrap.b32 	%r1070, %r1069, %r1068, 28;
	shf.r.wrap.b32 	%r1071, %r1068, %r1069, 28;
	mov.b64 	%rd2566, {%r1071, %r1070};
	shf.l.wrap.b32 	%r1072, %r1068, %r1069, 30;
	shf.l.wrap.b32 	%r1073, %r1069, %r1068, 30;
	mov.b64 	%rd2567, {%r1073, %r1072};
	xor.b64  	%rd2568, %rd2567, %rd2566;
	shf.l.wrap.b32 	%r1074, %r1068, %r1069, 25;
	shf.l.wrap.b32 	%r1075, %r1069, %r1068, 25;
	mov.b64 	%rd2569, {%r1075, %r1074};
	xor.b64  	%rd2570, %rd2568, %rd2569;
	xor.b64  	%rd2571, %rd2551, %rd2501;
	xor.b64  	%rd2572, %rd2551, %rd2526;
	and.b64  	%rd2573, %rd2572, %rd2571;
	xor.b64  	%rd2574, %rd2573, %rd2551;
	add.s64 	%rd2575, %rd2564, %rd2574;
	add.s64 	%rd2576, %rd2575, %rd2570;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1076,%dummy}, %rd2565;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1077}, %rd2565;
	}
	shf.r.wrap.b32 	%r1078, %r1077, %r1076, 14;
	shf.r.wrap.b32 	%r1079, %r1076, %r1077, 14;
	mov.b64 	%rd2577, {%r1079, %r1078};
	shf.r.wrap.b32 	%r1080, %r1077, %r1076, 18;
	shf.r.wrap.b32 	%r1081, %r1076, %r1077, 18;
	mov.b64 	%rd2578, {%r1081, %r1080};
	xor.b64  	%rd2579, %rd2578, %rd2577;
	shf.l.wrap.b32 	%r1082, %r1076, %r1077, 23;
	shf.l.wrap.b32 	%r1083, %r1077, %r1076, 23;
	mov.b64 	%rd2580, {%r1083, %r1082};
	xor.b64  	%rd2581, %rd2579, %rd2580;
	xor.b64  	%rd2582, %rd2540, %rd2515;
	and.b64  	%rd2583, %rd2565, %rd2582;
	xor.b64  	%rd2584, %rd2583, %rd2515;
	add.s64 	%rd2585, %rd2490, %rd21361;
	ld.const.u64 	%rd2586, [%rd21340+160];
	add.s64 	%rd2587, %rd2585, %rd2586;
	add.s64 	%rd2588, %rd2587, %rd2584;
	add.s64 	%rd2589, %rd2588, %rd2581;
	add.s64 	%rd2590, %rd2589, %rd2501;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1084,%dummy}, %rd2576;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1085}, %rd2576;
	}
	shf.r.wrap.b32 	%r1086, %r1085, %r1084, 28;
	shf.r.wrap.b32 	%r1087, %r1084, %r1085, 28;
	mov.b64 	%rd2591, {%r1087, %r1086};
	shf.l.wrap.b32 	%r1088, %r1084, %r1085, 30;
	shf.l.wrap.b32 	%r1089, %r1085, %r1084, 30;
	mov.b64 	%rd2592, {%r1089, %r1088};
	xor.b64  	%rd2593, %rd2592, %rd2591;
	shf.l.wrap.b32 	%r1090, %r1084, %r1085, 25;
	shf.l.wrap.b32 	%r1091, %r1085, %r1084, 25;
	mov.b64 	%rd2594, {%r1091, %r1090};
	xor.b64  	%rd2595, %rd2593, %rd2594;
	xor.b64  	%rd2596, %rd2576, %rd2526;
	xor.b64  	%rd2597, %rd2576, %rd2551;
	and.b64  	%rd2598, %rd2597, %rd2596;
	xor.b64  	%rd2599, %rd2598, %rd2576;
	add.s64 	%rd2600, %rd2589, %rd2599;
	add.s64 	%rd2601, %rd2600, %rd2595;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1092,%dummy}, %rd2590;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1093}, %rd2590;
	}
	shf.r.wrap.b32 	%r1094, %r1093, %r1092, 14;
	shf.r.wrap.b32 	%r1095, %r1092, %r1093, 14;
	mov.b64 	%rd2602, {%r1095, %r1094};
	shf.r.wrap.b32 	%r1096, %r1093, %r1092, 18;
	shf.r.wrap.b32 	%r1097, %r1092, %r1093, 18;
	mov.b64 	%rd2603, {%r1097, %r1096};
	xor.b64  	%rd2604, %rd2603, %rd2602;
	shf.l.wrap.b32 	%r1098, %r1092, %r1093, 23;
	shf.l.wrap.b32 	%r1099, %r1093, %r1092, 23;
	mov.b64 	%rd2605, {%r1099, %r1098};
	xor.b64  	%rd2606, %rd2604, %rd2605;
	xor.b64  	%rd2607, %rd2565, %rd2540;
	and.b64  	%rd2608, %rd2590, %rd2607;
	xor.b64  	%rd2609, %rd2608, %rd2540;
	add.s64 	%rd2610, %rd2515, %rd21362;
	ld.const.u64 	%rd2611, [%rd21340+168];
	add.s64 	%rd2612, %rd2610, %rd2611;
	add.s64 	%rd2613, %rd2612, %rd2609;
	add.s64 	%rd2614, %rd2613, %rd2606;
	add.s64 	%rd2615, %rd2614, %rd2526;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1100,%dummy}, %rd2601;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1101}, %rd2601;
	}
	shf.r.wrap.b32 	%r1102, %r1101, %r1100, 28;
	shf.r.wrap.b32 	%r1103, %r1100, %r1101, 28;
	mov.b64 	%rd2616, {%r1103, %r1102};
	shf.l.wrap.b32 	%r1104, %r1100, %r1101, 30;
	shf.l.wrap.b32 	%r1105, %r1101, %r1100, 30;
	mov.b64 	%rd2617, {%r1105, %r1104};
	xor.b64  	%rd2618, %rd2617, %rd2616;
	shf.l.wrap.b32 	%r1106, %r1100, %r1101, 25;
	shf.l.wrap.b32 	%r1107, %r1101, %r1100, 25;
	mov.b64 	%rd2619, {%r1107, %r1106};
	xor.b64  	%rd2620, %rd2618, %rd2619;
	xor.b64  	%rd2621, %rd2601, %rd2551;
	xor.b64  	%rd2622, %rd2601, %rd2576;
	and.b64  	%rd2623, %rd2622, %rd2621;
	xor.b64  	%rd2624, %rd2623, %rd2601;
	add.s64 	%rd2625, %rd2614, %rd2624;
	add.s64 	%rd2626, %rd2625, %rd2620;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1108,%dummy}, %rd2615;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1109}, %rd2615;
	}
	shf.r.wrap.b32 	%r1110, %r1109, %r1108, 14;
	shf.r.wrap.b32 	%r1111, %r1108, %r1109, 14;
	mov.b64 	%rd2627, {%r1111, %r1110};
	shf.r.wrap.b32 	%r1112, %r1109, %r1108, 18;
	shf.r.wrap.b32 	%r1113, %r1108, %r1109, 18;
	mov.b64 	%rd2628, {%r1113, %r1112};
	xor.b64  	%rd2629, %rd2628, %rd2627;
	shf.l.wrap.b32 	%r1114, %r1108, %r1109, 23;
	shf.l.wrap.b32 	%r1115, %r1109, %r1108, 23;
	mov.b64 	%rd2630, {%r1115, %r1114};
	xor.b64  	%rd2631, %rd2629, %rd2630;
	xor.b64  	%rd2632, %rd2590, %rd2565;
	and.b64  	%rd2633, %rd2615, %rd2632;
	xor.b64  	%rd2634, %rd2633, %rd2565;
	add.s64 	%rd2635, %rd2540, %rd21363;
	ld.const.u64 	%rd2636, [%rd21340+176];
	add.s64 	%rd2637, %rd2635, %rd2636;
	add.s64 	%rd2638, %rd2637, %rd2634;
	add.s64 	%rd2639, %rd2638, %rd2631;
	add.s64 	%rd2640, %rd2639, %rd2551;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1116,%dummy}, %rd2626;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1117}, %rd2626;
	}
	shf.r.wrap.b32 	%r1118, %r1117, %r1116, 28;
	shf.r.wrap.b32 	%r1119, %r1116, %r1117, 28;
	mov.b64 	%rd2641, {%r1119, %r1118};
	shf.l.wrap.b32 	%r1120, %r1116, %r1117, 30;
	shf.l.wrap.b32 	%r1121, %r1117, %r1116, 30;
	mov.b64 	%rd2642, {%r1121, %r1120};
	xor.b64  	%rd2643, %rd2642, %rd2641;
	shf.l.wrap.b32 	%r1122, %r1116, %r1117, 25;
	shf.l.wrap.b32 	%r1123, %r1117, %r1116, 25;
	mov.b64 	%rd2644, {%r1123, %r1122};
	xor.b64  	%rd2645, %rd2643, %rd2644;
	xor.b64  	%rd2646, %rd2626, %rd2576;
	xor.b64  	%rd2647, %rd2626, %rd2601;
	and.b64  	%rd2648, %rd2647, %rd2646;
	xor.b64  	%rd2649, %rd2648, %rd2626;
	add.s64 	%rd2650, %rd2639, %rd2649;
	add.s64 	%rd2651, %rd2650, %rd2645;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1124,%dummy}, %rd2640;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1125}, %rd2640;
	}
	shf.r.wrap.b32 	%r1126, %r1125, %r1124, 14;
	shf.r.wrap.b32 	%r1127, %r1124, %r1125, 14;
	mov.b64 	%rd2652, {%r1127, %r1126};
	shf.r.wrap.b32 	%r1128, %r1125, %r1124, 18;
	shf.r.wrap.b32 	%r1129, %r1124, %r1125, 18;
	mov.b64 	%rd2653, {%r1129, %r1128};
	xor.b64  	%rd2654, %rd2653, %rd2652;
	shf.l.wrap.b32 	%r1130, %r1124, %r1125, 23;
	shf.l.wrap.b32 	%r1131, %r1125, %r1124, 23;
	mov.b64 	%rd2655, {%r1131, %r1130};
	xor.b64  	%rd2656, %rd2654, %rd2655;
	xor.b64  	%rd2657, %rd2615, %rd2590;
	and.b64  	%rd2658, %rd2640, %rd2657;
	xor.b64  	%rd2659, %rd2658, %rd2590;
	add.s64 	%rd2660, %rd2565, %rd21364;
	ld.const.u64 	%rd2661, [%rd21340+184];
	add.s64 	%rd2662, %rd2660, %rd2661;
	add.s64 	%rd2663, %rd2662, %rd2659;
	add.s64 	%rd2664, %rd2663, %rd2656;
	add.s64 	%rd2665, %rd2664, %rd2576;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1132,%dummy}, %rd2651;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1133}, %rd2651;
	}
	shf.r.wrap.b32 	%r1134, %r1133, %r1132, 28;
	shf.r.wrap.b32 	%r1135, %r1132, %r1133, 28;
	mov.b64 	%rd2666, {%r1135, %r1134};
	shf.l.wrap.b32 	%r1136, %r1132, %r1133, 30;
	shf.l.wrap.b32 	%r1137, %r1133, %r1132, 30;
	mov.b64 	%rd2667, {%r1137, %r1136};
	xor.b64  	%rd2668, %rd2667, %rd2666;
	shf.l.wrap.b32 	%r1138, %r1132, %r1133, 25;
	shf.l.wrap.b32 	%r1139, %r1133, %r1132, 25;
	mov.b64 	%rd2669, {%r1139, %r1138};
	xor.b64  	%rd2670, %rd2668, %rd2669;
	xor.b64  	%rd2671, %rd2651, %rd2601;
	xor.b64  	%rd2672, %rd2651, %rd2626;
	and.b64  	%rd2673, %rd2672, %rd2671;
	xor.b64  	%rd2674, %rd2673, %rd2651;
	add.s64 	%rd2675, %rd2664, %rd2674;
	add.s64 	%rd2676, %rd2675, %rd2670;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1140,%dummy}, %rd2665;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1141}, %rd2665;
	}
	shf.r.wrap.b32 	%r1142, %r1141, %r1140, 14;
	shf.r.wrap.b32 	%r1143, %r1140, %r1141, 14;
	mov.b64 	%rd2677, {%r1143, %r1142};
	shf.r.wrap.b32 	%r1144, %r1141, %r1140, 18;
	shf.r.wrap.b32 	%r1145, %r1140, %r1141, 18;
	mov.b64 	%rd2678, {%r1145, %r1144};
	xor.b64  	%rd2679, %rd2678, %rd2677;
	shf.l.wrap.b32 	%r1146, %r1140, %r1141, 23;
	shf.l.wrap.b32 	%r1147, %r1141, %r1140, 23;
	mov.b64 	%rd2680, {%r1147, %r1146};
	xor.b64  	%rd2681, %rd2679, %rd2680;
	xor.b64  	%rd2682, %rd2640, %rd2615;
	and.b64  	%rd2683, %rd2665, %rd2682;
	xor.b64  	%rd2684, %rd2683, %rd2615;
	add.s64 	%rd2685, %rd2590, %rd21348;
	ld.const.u64 	%rd2686, [%rd21340+192];
	add.s64 	%rd2687, %rd2685, %rd2686;
	add.s64 	%rd2688, %rd2687, %rd2684;
	add.s64 	%rd2689, %rd2688, %rd2681;
	add.s64 	%rd2690, %rd2689, %rd2601;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1148,%dummy}, %rd2676;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1149}, %rd2676;
	}
	shf.r.wrap.b32 	%r1150, %r1149, %r1148, 28;
	shf.r.wrap.b32 	%r1151, %r1148, %r1149, 28;
	mov.b64 	%rd2691, {%r1151, %r1150};
	shf.l.wrap.b32 	%r1152, %r1148, %r1149, 30;
	shf.l.wrap.b32 	%r1153, %r1149, %r1148, 30;
	mov.b64 	%rd2692, {%r1153, %r1152};
	xor.b64  	%rd2693, %rd2692, %rd2691;
	shf.l.wrap.b32 	%r1154, %r1148, %r1149, 25;
	shf.l.wrap.b32 	%r1155, %r1149, %r1148, 25;
	mov.b64 	%rd2694, {%r1155, %r1154};
	xor.b64  	%rd2695, %rd2693, %rd2694;
	xor.b64  	%rd2696, %rd2676, %rd2626;
	xor.b64  	%rd2697, %rd2676, %rd2651;
	and.b64  	%rd2698, %rd2697, %rd2696;
	xor.b64  	%rd2699, %rd2698, %rd2676;
	add.s64 	%rd2700, %rd2689, %rd2699;
	add.s64 	%rd2701, %rd2700, %rd2695;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1156,%dummy}, %rd2690;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1157}, %rd2690;
	}
	shf.r.wrap.b32 	%r1158, %r1157, %r1156, 14;
	shf.r.wrap.b32 	%r1159, %r1156, %r1157, 14;
	mov.b64 	%rd2702, {%r1159, %r1158};
	shf.r.wrap.b32 	%r1160, %r1157, %r1156, 18;
	shf.r.wrap.b32 	%r1161, %r1156, %r1157, 18;
	mov.b64 	%rd2703, {%r1161, %r1160};
	xor.b64  	%rd2704, %rd2703, %rd2702;
	shf.l.wrap.b32 	%r1162, %r1156, %r1157, 23;
	shf.l.wrap.b32 	%r1163, %r1157, %r1156, 23;
	mov.b64 	%rd2705, {%r1163, %r1162};
	xor.b64  	%rd2706, %rd2704, %rd2705;
	xor.b64  	%rd2707, %rd2665, %rd2640;
	and.b64  	%rd2708, %rd2690, %rd2707;
	xor.b64  	%rd2709, %rd2708, %rd2640;
	add.s64 	%rd2710, %rd2615, %rd21347;
	ld.const.u64 	%rd2711, [%rd21340+200];
	add.s64 	%rd2712, %rd2710, %rd2711;
	add.s64 	%rd2713, %rd2712, %rd2709;
	add.s64 	%rd2714, %rd2713, %rd2706;
	add.s64 	%rd2715, %rd2714, %rd2626;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1164,%dummy}, %rd2701;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1165}, %rd2701;
	}
	shf.r.wrap.b32 	%r1166, %r1165, %r1164, 28;
	shf.r.wrap.b32 	%r1167, %r1164, %r1165, 28;
	mov.b64 	%rd2716, {%r1167, %r1166};
	shf.l.wrap.b32 	%r1168, %r1164, %r1165, 30;
	shf.l.wrap.b32 	%r1169, %r1165, %r1164, 30;
	mov.b64 	%rd2717, {%r1169, %r1168};
	xor.b64  	%rd2718, %rd2717, %rd2716;
	shf.l.wrap.b32 	%r1170, %r1164, %r1165, 25;
	shf.l.wrap.b32 	%r1171, %r1165, %r1164, 25;
	mov.b64 	%rd2719, {%r1171, %r1170};
	xor.b64  	%rd2720, %rd2718, %rd2719;
	xor.b64  	%rd2721, %rd2701, %rd2651;
	xor.b64  	%rd2722, %rd2701, %rd2676;
	and.b64  	%rd2723, %rd2722, %rd2721;
	xor.b64  	%rd2724, %rd2723, %rd2701;
	add.s64 	%rd2725, %rd2714, %rd2724;
	add.s64 	%rd2726, %rd2725, %rd2720;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1172,%dummy}, %rd2715;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1173}, %rd2715;
	}
	shf.r.wrap.b32 	%r1174, %r1173, %r1172, 14;
	shf.r.wrap.b32 	%r1175, %r1172, %r1173, 14;
	mov.b64 	%rd2727, {%r1175, %r1174};
	shf.r.wrap.b32 	%r1176, %r1173, %r1172, 18;
	shf.r.wrap.b32 	%r1177, %r1172, %r1173, 18;
	mov.b64 	%rd2728, {%r1177, %r1176};
	xor.b64  	%rd2729, %rd2728, %rd2727;
	shf.l.wrap.b32 	%r1178, %r1172, %r1173, 23;
	shf.l.wrap.b32 	%r1179, %r1173, %r1172, 23;
	mov.b64 	%rd2730, {%r1179, %r1178};
	xor.b64  	%rd2731, %rd2729, %rd2730;
	xor.b64  	%rd2732, %rd2690, %rd2665;
	and.b64  	%rd2733, %rd2715, %rd2732;
	xor.b64  	%rd2734, %rd2733, %rd2665;
	add.s64 	%rd2735, %rd2640, %rd21346;
	ld.const.u64 	%rd2736, [%rd21340+208];
	add.s64 	%rd2737, %rd2735, %rd2736;
	add.s64 	%rd2738, %rd2737, %rd2734;
	add.s64 	%rd2739, %rd2738, %rd2731;
	add.s64 	%rd2740, %rd2739, %rd2651;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1180,%dummy}, %rd2726;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1181}, %rd2726;
	}
	shf.r.wrap.b32 	%r1182, %r1181, %r1180, 28;
	shf.r.wrap.b32 	%r1183, %r1180, %r1181, 28;
	mov.b64 	%rd2741, {%r1183, %r1182};
	shf.l.wrap.b32 	%r1184, %r1180, %r1181, 30;
	shf.l.wrap.b32 	%r1185, %r1181, %r1180, 30;
	mov.b64 	%rd2742, {%r1185, %r1184};
	xor.b64  	%rd2743, %rd2742, %rd2741;
	shf.l.wrap.b32 	%r1186, %r1180, %r1181, 25;
	shf.l.wrap.b32 	%r1187, %r1181, %r1180, 25;
	mov.b64 	%rd2744, {%r1187, %r1186};
	xor.b64  	%rd2745, %rd2743, %rd2744;
	xor.b64  	%rd2746, %rd2726, %rd2676;
	xor.b64  	%rd2747, %rd2726, %rd2701;
	and.b64  	%rd2748, %rd2747, %rd2746;
	xor.b64  	%rd2749, %rd2748, %rd2726;
	add.s64 	%rd2750, %rd2739, %rd2749;
	add.s64 	%rd2751, %rd2750, %rd2745;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1188,%dummy}, %rd2740;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1189}, %rd2740;
	}
	shf.r.wrap.b32 	%r1190, %r1189, %r1188, 14;
	shf.r.wrap.b32 	%r1191, %r1188, %r1189, 14;
	mov.b64 	%rd2752, {%r1191, %r1190};
	shf.r.wrap.b32 	%r1192, %r1189, %r1188, 18;
	shf.r.wrap.b32 	%r1193, %r1188, %r1189, 18;
	mov.b64 	%rd2753, {%r1193, %r1192};
	xor.b64  	%rd2754, %rd2753, %rd2752;
	shf.l.wrap.b32 	%r1194, %r1188, %r1189, 23;
	shf.l.wrap.b32 	%r1195, %r1189, %r1188, 23;
	mov.b64 	%rd2755, {%r1195, %r1194};
	xor.b64  	%rd2756, %rd2754, %rd2755;
	xor.b64  	%rd2757, %rd2715, %rd2690;
	and.b64  	%rd2758, %rd2740, %rd2757;
	xor.b64  	%rd2759, %rd2758, %rd2690;
	add.s64 	%rd2760, %rd2665, %rd21345;
	ld.const.u64 	%rd2761, [%rd21340+216];
	add.s64 	%rd2762, %rd2760, %rd2761;
	add.s64 	%rd2763, %rd2762, %rd2759;
	add.s64 	%rd2764, %rd2763, %rd2756;
	add.s64 	%rd2765, %rd2764, %rd2676;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1196,%dummy}, %rd2751;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1197}, %rd2751;
	}
	shf.r.wrap.b32 	%r1198, %r1197, %r1196, 28;
	shf.r.wrap.b32 	%r1199, %r1196, %r1197, 28;
	mov.b64 	%rd2766, {%r1199, %r1198};
	shf.l.wrap.b32 	%r1200, %r1196, %r1197, 30;
	shf.l.wrap.b32 	%r1201, %r1197, %r1196, 30;
	mov.b64 	%rd2767, {%r1201, %r1200};
	xor.b64  	%rd2768, %rd2767, %rd2766;
	shf.l.wrap.b32 	%r1202, %r1196, %r1197, 25;
	shf.l.wrap.b32 	%r1203, %r1197, %r1196, 25;
	mov.b64 	%rd2769, {%r1203, %r1202};
	xor.b64  	%rd2770, %rd2768, %rd2769;
	xor.b64  	%rd2771, %rd2751, %rd2701;
	xor.b64  	%rd2772, %rd2751, %rd2726;
	and.b64  	%rd2773, %rd2772, %rd2771;
	xor.b64  	%rd2774, %rd2773, %rd2751;
	add.s64 	%rd2775, %rd2764, %rd2774;
	add.s64 	%rd2776, %rd2775, %rd2770;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1204,%dummy}, %rd2765;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1205}, %rd2765;
	}
	shf.r.wrap.b32 	%r1206, %r1205, %r1204, 14;
	shf.r.wrap.b32 	%r1207, %r1204, %r1205, 14;
	mov.b64 	%rd2777, {%r1207, %r1206};
	shf.r.wrap.b32 	%r1208, %r1205, %r1204, 18;
	shf.r.wrap.b32 	%r1209, %r1204, %r1205, 18;
	mov.b64 	%rd2778, {%r1209, %r1208};
	xor.b64  	%rd2779, %rd2778, %rd2777;
	shf.l.wrap.b32 	%r1210, %r1204, %r1205, 23;
	shf.l.wrap.b32 	%r1211, %r1205, %r1204, 23;
	mov.b64 	%rd2780, {%r1211, %r1210};
	xor.b64  	%rd2781, %rd2779, %rd2780;
	xor.b64  	%rd2782, %rd2740, %rd2715;
	and.b64  	%rd2783, %rd2765, %rd2782;
	xor.b64  	%rd2784, %rd2783, %rd2715;
	add.s64 	%rd2785, %rd2690, %rd21344;
	ld.const.u64 	%rd2786, [%rd21340+224];
	add.s64 	%rd2787, %rd2785, %rd2786;
	add.s64 	%rd2788, %rd2787, %rd2784;
	add.s64 	%rd2789, %rd2788, %rd2781;
	add.s64 	%rd21356, %rd2789, %rd2701;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1212,%dummy}, %rd2776;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1213}, %rd2776;
	}
	shf.r.wrap.b32 	%r1214, %r1213, %r1212, 28;
	shf.r.wrap.b32 	%r1215, %r1212, %r1213, 28;
	mov.b64 	%rd2790, {%r1215, %r1214};
	shf.l.wrap.b32 	%r1216, %r1212, %r1213, 30;
	shf.l.wrap.b32 	%r1217, %r1213, %r1212, 30;
	mov.b64 	%rd2791, {%r1217, %r1216};
	xor.b64  	%rd2792, %rd2791, %rd2790;
	shf.l.wrap.b32 	%r1218, %r1212, %r1213, 25;
	shf.l.wrap.b32 	%r1219, %r1213, %r1212, 25;
	mov.b64 	%rd2793, {%r1219, %r1218};
	xor.b64  	%rd2794, %rd2792, %rd2793;
	xor.b64  	%rd2795, %rd2776, %rd2726;
	xor.b64  	%rd2796, %rd2776, %rd2751;
	and.b64  	%rd2797, %rd2796, %rd2795;
	xor.b64  	%rd2798, %rd2797, %rd2776;
	add.s64 	%rd2799, %rd2789, %rd2798;
	add.s64 	%rd21352, %rd2799, %rd2794;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1220,%dummy}, %rd21356;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1221}, %rd21356;
	}
	shf.r.wrap.b32 	%r1222, %r1221, %r1220, 14;
	shf.r.wrap.b32 	%r1223, %r1220, %r1221, 14;
	mov.b64 	%rd2800, {%r1223, %r1222};
	shf.r.wrap.b32 	%r1224, %r1221, %r1220, 18;
	shf.r.wrap.b32 	%r1225, %r1220, %r1221, 18;
	mov.b64 	%rd2801, {%r1225, %r1224};
	xor.b64  	%rd2802, %rd2801, %rd2800;
	shf.l.wrap.b32 	%r1226, %r1220, %r1221, 23;
	shf.l.wrap.b32 	%r1227, %r1221, %r1220, 23;
	mov.b64 	%rd2803, {%r1227, %r1226};
	xor.b64  	%rd2804, %rd2802, %rd2803;
	xor.b64  	%rd2805, %rd2765, %rd2740;
	and.b64  	%rd2806, %rd21356, %rd2805;
	xor.b64  	%rd2807, %rd2806, %rd2740;
	add.s64 	%rd2808, %rd2715, %rd21343;
	ld.const.u64 	%rd2809, [%rd21340+232];
	add.s64 	%rd2810, %rd2808, %rd2809;
	add.s64 	%rd2811, %rd2810, %rd2807;
	add.s64 	%rd2812, %rd2811, %rd2804;
	add.s64 	%rd21355, %rd2812, %rd2726;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1228,%dummy}, %rd21352;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1229}, %rd21352;
	}
	shf.r.wrap.b32 	%r1230, %r1229, %r1228, 28;
	shf.r.wrap.b32 	%r1231, %r1228, %r1229, 28;
	mov.b64 	%rd2813, {%r1231, %r1230};
	shf.l.wrap.b32 	%r1232, %r1228, %r1229, 30;
	shf.l.wrap.b32 	%r1233, %r1229, %r1228, 30;
	mov.b64 	%rd2814, {%r1233, %r1232};
	xor.b64  	%rd2815, %rd2814, %rd2813;
	shf.l.wrap.b32 	%r1234, %r1228, %r1229, 25;
	shf.l.wrap.b32 	%r1235, %r1229, %r1228, 25;
	mov.b64 	%rd2816, {%r1235, %r1234};
	xor.b64  	%rd2817, %rd2815, %rd2816;
	xor.b64  	%rd2818, %rd21352, %rd2751;
	xor.b64  	%rd2819, %rd21352, %rd2776;
	and.b64  	%rd2820, %rd2819, %rd2818;
	xor.b64  	%rd2821, %rd2820, %rd21352;
	add.s64 	%rd2822, %rd2812, %rd2821;
	add.s64 	%rd21351, %rd2822, %rd2817;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1236,%dummy}, %rd21355;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1237}, %rd21355;
	}
	shf.r.wrap.b32 	%r1238, %r1237, %r1236, 14;
	shf.r.wrap.b32 	%r1239, %r1236, %r1237, 14;
	mov.b64 	%rd2823, {%r1239, %r1238};
	shf.r.wrap.b32 	%r1240, %r1237, %r1236, 18;
	shf.r.wrap.b32 	%r1241, %r1236, %r1237, 18;
	mov.b64 	%rd2824, {%r1241, %r1240};
	xor.b64  	%rd2825, %rd2824, %rd2823;
	shf.l.wrap.b32 	%r1242, %r1236, %r1237, 23;
	shf.l.wrap.b32 	%r1243, %r1237, %r1236, 23;
	mov.b64 	%rd2826, {%r1243, %r1242};
	xor.b64  	%rd2827, %rd2825, %rd2826;
	xor.b64  	%rd2828, %rd21356, %rd2765;
	and.b64  	%rd2829, %rd21355, %rd2828;
	xor.b64  	%rd2830, %rd2829, %rd2765;
	add.s64 	%rd2831, %rd2740, %rd21342;
	ld.const.u64 	%rd2832, [%rd21340+240];
	add.s64 	%rd2833, %rd2831, %rd2832;
	add.s64 	%rd2834, %rd2833, %rd2830;
	add.s64 	%rd2835, %rd2834, %rd2827;
	add.s64 	%rd21354, %rd2835, %rd2751;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1244,%dummy}, %rd21351;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1245}, %rd21351;
	}
	shf.r.wrap.b32 	%r1246, %r1245, %r1244, 28;
	shf.r.wrap.b32 	%r1247, %r1244, %r1245, 28;
	mov.b64 	%rd2836, {%r1247, %r1246};
	shf.l.wrap.b32 	%r1248, %r1244, %r1245, 30;
	shf.l.wrap.b32 	%r1249, %r1245, %r1244, 30;
	mov.b64 	%rd2837, {%r1249, %r1248};
	xor.b64  	%rd2838, %rd2837, %rd2836;
	shf.l.wrap.b32 	%r1250, %r1244, %r1245, 25;
	shf.l.wrap.b32 	%r1251, %r1245, %r1244, 25;
	mov.b64 	%rd2839, {%r1251, %r1250};
	xor.b64  	%rd2840, %rd2838, %rd2839;
	xor.b64  	%rd2841, %rd21351, %rd2776;
	xor.b64  	%rd2842, %rd21351, %rd21352;
	and.b64  	%rd2843, %rd2842, %rd2841;
	xor.b64  	%rd2844, %rd2843, %rd21351;
	add.s64 	%rd2845, %rd2835, %rd2844;
	add.s64 	%rd21350, %rd2845, %rd2840;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1252,%dummy}, %rd21354;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1253}, %rd21354;
	}
	shf.r.wrap.b32 	%r1254, %r1253, %r1252, 14;
	shf.r.wrap.b32 	%r1255, %r1252, %r1253, 14;
	mov.b64 	%rd2846, {%r1255, %r1254};
	shf.r.wrap.b32 	%r1256, %r1253, %r1252, 18;
	shf.r.wrap.b32 	%r1257, %r1252, %r1253, 18;
	mov.b64 	%rd2847, {%r1257, %r1256};
	xor.b64  	%rd2848, %rd2847, %rd2846;
	shf.l.wrap.b32 	%r1258, %r1252, %r1253, 23;
	shf.l.wrap.b32 	%r1259, %r1253, %r1252, 23;
	mov.b64 	%rd2849, {%r1259, %r1258};
	xor.b64  	%rd2850, %rd2848, %rd2849;
	xor.b64  	%rd2851, %rd21355, %rd21356;
	and.b64  	%rd2852, %rd21354, %rd2851;
	xor.b64  	%rd2853, %rd2852, %rd21356;
	add.s64 	%rd2854, %rd2765, %rd21341;
	ld.const.u64 	%rd2855, [%rd21340+248];
	add.s64 	%rd2856, %rd2854, %rd2855;
	add.s64 	%rd2857, %rd2856, %rd2853;
	add.s64 	%rd2858, %rd2857, %rd2850;
	add.s64 	%rd21353, %rd2858, %rd2776;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1260,%dummy}, %rd21350;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1261}, %rd21350;
	}
	shf.r.wrap.b32 	%r1262, %r1261, %r1260, 28;
	shf.r.wrap.b32 	%r1263, %r1260, %r1261, 28;
	mov.b64 	%rd2859, {%r1263, %r1262};
	shf.l.wrap.b32 	%r1264, %r1260, %r1261, 30;
	shf.l.wrap.b32 	%r1265, %r1261, %r1260, 30;
	mov.b64 	%rd2860, {%r1265, %r1264};
	xor.b64  	%rd2861, %rd2860, %rd2859;
	shf.l.wrap.b32 	%r1266, %r1260, %r1261, 25;
	shf.l.wrap.b32 	%r1267, %r1261, %r1260, 25;
	mov.b64 	%rd2862, {%r1267, %r1266};
	xor.b64  	%rd2863, %rd2861, %rd2862;
	xor.b64  	%rd2864, %rd21350, %rd21352;
	xor.b64  	%rd2865, %rd21350, %rd21351;
	and.b64  	%rd2866, %rd2865, %rd2864;
	xor.b64  	%rd2867, %rd2866, %rd21350;
	add.s64 	%rd2868, %rd2858, %rd2867;
	add.s64 	%rd21349, %rd2868, %rd2863;
	add.s32 	%r14296, %r14296, 16;
	setp.lt.s32	%p4, %r14296, 80;
	mov.u64 	%rd21340, %rd90;
	@%p4 bra 	BB3_5;

	add.s64 	%rd2869, %rd30, %rd21349;
	st.local.u64 	[%rd1], %rd2869;
	add.s64 	%rd2870, %rd32, %rd21350;
	st.local.u64 	[%rd1+8], %rd2870;
	add.s64 	%rd2871, %rd31, %rd21351;
	st.local.u64 	[%rd1+16], %rd2871;
	add.s64 	%rd2872, %rd29, %rd21352;
	st.local.u64 	[%rd1+24], %rd2872;
	add.s64 	%rd2873, %rd25, %rd21353;
	st.local.u64 	[%rd1+32], %rd2873;
	add.s64 	%rd2874, %rd27, %rd21354;
	st.local.u64 	[%rd1+40], %rd2874;
	add.s64 	%rd2875, %rd26, %rd21355;
	st.local.u64 	[%rd1+48], %rd2875;
	add.s64 	%rd2876, %rd28, %rd21356;
	st.local.u64 	[%rd1+56], %rd2876;
	add.s32 	%r8, %r2, -128;
	setp.lt.s32	%p5, %r8, 1;
	@%p5 bra 	BB3_23;

	and.b32  	%r9, %r8, 3;
	setp.eq.s32	%p6, %r9, 0;
	mov.u32 	%r14299, 0;
	@%p6 bra 	BB3_11;

	setp.eq.s32	%p7, %r9, 1;
	mov.u32 	%r14297, 0;
	@%p7 bra 	BB3_10;

	setp.ne.s32	%p8, %r9, 2;
	selp.u64	%rd2877, 1, 0, %p8;
	selp.b64	%rd2878, 134, 135, %p8;
	add.s64 	%rd2879, %rd1806, %rd2878;
	ld.local.u8 	%rs25, [%rd2879];
	xor.b64  	%rd2880, %rd2877, 7;
	add.s64 	%rd2881, %rd3, %rd2880;
	st.local.u8 	[%rd2881], %rs25;
	selp.b32	%r14297, 2, 1, %p8;

BB3_10:
	add.s32 	%r1270, %r14297, 128;
	xor.b32  	%r1271, %r1270, 7;
	cvt.u64.u32	%rd2882, %r1271;
	add.s64 	%rd2883, %rd1806, %rd2882;
	ld.local.u8 	%rs26, [%rd2883];
	xor.b32  	%r1272, %r14297, 7;
	cvt.s64.s32	%rd2884, %r1272;
	add.s64 	%rd2885, %rd3, %rd2884;
	st.local.u8 	[%rd2885], %rs26;
	add.s32 	%r14299, %r14297, 1;

BB3_11:
	setp.lt.u32	%p9, %r8, 4;
	@%p9 bra 	BB3_23;

BB3_12:
	add.s32 	%r1273, %r14299, 128;
	xor.b32  	%r1274, %r1273, 7;
	cvt.s64.s32	%rd2886, %r1274;
	add.s64 	%rd2887, %rd1806, %rd2886;
	ld.local.u8 	%rs27, [%rd2887];
	xor.b32  	%r1275, %r14299, 7;
	cvt.s64.s32	%rd2888, %r1275;
	add.s64 	%rd2889, %rd3, %rd2888;
	st.local.u8 	[%rd2889], %rs27;
	add.s32 	%r1276, %r14299, 129;
	xor.b32  	%r1277, %r1276, 7;
	cvt.s64.s32	%rd2890, %r1277;
	add.s64 	%rd2891, %rd1806, %rd2890;
	ld.local.u8 	%rs28, [%rd2891];
	add.s32 	%r1278, %r14299, 1;
	xor.b32  	%r1279, %r1278, 7;
	cvt.s64.s32	%rd2892, %r1279;
	add.s64 	%rd2893, %rd3, %rd2892;
	st.local.u8 	[%rd2893], %rs28;
	add.s32 	%r1280, %r14299, 130;
	xor.b32  	%r1281, %r1280, 7;
	cvt.s64.s32	%rd2894, %r1281;
	add.s64 	%rd2895, %rd1806, %rd2894;
	ld.local.u8 	%rs29, [%rd2895];
	add.s32 	%r1282, %r14299, 2;
	xor.b32  	%r1283, %r1282, 7;
	cvt.s64.s32	%rd2896, %r1283;
	add.s64 	%rd2897, %rd3, %rd2896;
	st.local.u8 	[%rd2897], %rs29;
	add.s32 	%r1284, %r14299, 131;
	xor.b32  	%r1285, %r1284, 7;
	cvt.s64.s32	%rd2898, %r1285;
	add.s64 	%rd2899, %rd1806, %rd2898;
	ld.local.u8 	%rs30, [%rd2899];
	add.s32 	%r1286, %r14299, 3;
	xor.b32  	%r1287, %r1286, 7;
	cvt.s64.s32	%rd2900, %r1287;
	add.s64 	%rd2901, %rd3, %rd2900;
	st.local.u8 	[%rd2901], %rs30;
	add.s32 	%r14299, %r14299, 4;
	setp.lt.s32	%p10, %r14299, %r8;
	@%p10 bra 	BB3_12;

BB3_23:
	ld.local.u32 	%r1309, [%rd1+192];
	and.b32  	%r27, %r1309, 127;
	add.s32 	%r1310, %r1309, %r3;
	st.local.u32 	[%rd1+192], %r1310;
	add.s32 	%r28, %r27, %r3;
	setp.lt.s32	%p17, %r28, 128;
	@%p17 bra 	BB3_44;
	bra.uni 	BB3_24;

BB3_44:
	setp.lt.s32	%p30, %r3, 1;
	@%p30 bra 	BB3_53;

	add.s64 	%rd178, %rd1, 64;
	and.b32  	%r2064, %r3, 3;
	mov.u32 	%r14319, 0;
	setp.eq.s32	%p31, %r2064, 0;
	@%p31 bra 	BB3_51;

	setp.eq.s32	%p32, %r2064, 1;
	@%p32 bra 	BB3_50;

	setp.eq.s32	%p33, %r2064, 2;
	@%p33 bra 	BB3_49;

	ld.local.u8 	%rs52, [%rd1808+7];
	xor.b32  	%r2066, %r27, 7;
	cvt.u64.u32	%rd3996, %r2066;
	add.s64 	%rd3997, %rd178, %rd3996;
	st.local.u8 	[%rd3997], %rs52;
	add.s32 	%r27, %r27, 1;
	mov.u32 	%r14319, 1;

BB3_49:
	xor.b32  	%r2067, %r14319, 7;
	cvt.u64.u32	%rd3998, %r2067;
	add.s64 	%rd3999, %rd1808, %rd3998;
	ld.local.u8 	%rs53, [%rd3999];
	xor.b32  	%r2068, %r27, 7;
	cvt.s64.s32	%rd4000, %r2068;
	add.s64 	%rd4001, %rd178, %rd4000;
	st.local.u8 	[%rd4001], %rs53;
	add.s32 	%r27, %r27, 1;
	add.s32 	%r14319, %r14319, 1;

BB3_50:
	xor.b32  	%r2069, %r14319, 7;
	cvt.s64.s32	%rd4002, %r2069;
	add.s64 	%rd4003, %rd1808, %rd4002;
	ld.local.u8 	%rs54, [%rd4003];
	xor.b32  	%r2070, %r27, 7;
	cvt.s64.s32	%rd4004, %r2070;
	add.s64 	%rd4005, %rd178, %rd4004;
	st.local.u8 	[%rd4005], %rs54;
	add.s32 	%r27, %r27, 1;
	add.s32 	%r14319, %r14319, 1;

BB3_51:
	setp.lt.u32	%p34, %r3, 4;
	@%p34 bra 	BB3_53;

BB3_52:
	xor.b32  	%r2071, %r14319, 7;
	cvt.s64.s32	%rd4006, %r2071;
	add.s64 	%rd4007, %rd1808, %rd4006;
	ld.local.u8 	%rs55, [%rd4007];
	xor.b32  	%r2072, %r27, 7;
	cvt.s64.s32	%rd4008, %r2072;
	add.s64 	%rd4009, %rd178, %rd4008;
	st.local.u8 	[%rd4009], %rs55;
	add.s32 	%r2073, %r14319, 1;
	xor.b32  	%r2074, %r2073, 7;
	cvt.s64.s32	%rd4010, %r2074;
	add.s64 	%rd4011, %rd1808, %rd4010;
	ld.local.u8 	%rs56, [%rd4011];
	add.s32 	%r2075, %r27, 1;
	xor.b32  	%r2076, %r2075, 7;
	cvt.s64.s32	%rd4012, %r2076;
	add.s64 	%rd4013, %rd178, %rd4012;
	st.local.u8 	[%rd4013], %rs56;
	add.s32 	%r2077, %r14319, 2;
	xor.b32  	%r2078, %r2077, 7;
	cvt.s64.s32	%rd4014, %r2078;
	add.s64 	%rd4015, %rd1808, %rd4014;
	ld.local.u8 	%rs57, [%rd4015];
	add.s32 	%r2079, %r27, 2;
	xor.b32  	%r2080, %r2079, 7;
	cvt.s64.s32	%rd4016, %r2080;
	add.s64 	%rd4017, %rd178, %rd4016;
	st.local.u8 	[%rd4017], %rs57;
	add.s32 	%r2081, %r14319, 3;
	xor.b32  	%r2082, %r2081, 7;
	cvt.s64.s32	%rd4018, %r2082;
	add.s64 	%rd4019, %rd1808, %rd4018;
	ld.local.u8 	%rs58, [%rd4019];
	add.s32 	%r2083, %r27, 3;
	xor.b32  	%r2084, %r2083, 7;
	cvt.s64.s32	%rd4020, %r2084;
	add.s64 	%rd4021, %rd178, %rd4020;
	st.local.u8 	[%rd4021], %rs58;
	add.s32 	%r14319, %r14319, 4;
	setp.lt.s32	%p35, %r14319, %r3;
	add.s32 	%r27, %r27, 4;
	@%p35 bra 	BB3_52;
	bra.uni 	BB3_53;

BB3_24:
	mov.u32 	%r1312, 128;
	sub.s32 	%r29, %r1312, %r27;
	add.s64 	%rd93, %rd1, 64;
	mov.u32 	%r1313, 1;
	max.u32 	%r30, %r29, %r1313;
	and.b32  	%r31, %r30, 3;
	setp.eq.s32	%p18, %r31, 0;
	mov.u32 	%r14311, 0;
	@%p18 bra 	BB3_31;

	setp.eq.s32	%p19, %r31, 1;
	mov.u32 	%r14307, 0;
	@%p19 bra 	BB3_30;

	setp.eq.s32	%p20, %r31, 2;
	mov.u32 	%r1315, 0;
	@%p20 bra 	BB3_27;
	bra.uni 	BB3_28;

BB3_27:
	mov.u32 	%r1313, %r1315;
	bra.uni 	BB3_29;

BB3_28:
	ld.local.u8 	%rs38, [%rd1808+7];
	xor.b32  	%r1317, %r27, 7;
	cvt.u64.u32	%rd2926, %r1317;
	add.s64 	%rd2927, %rd93, %rd2926;
	st.local.u8 	[%rd2927], %rs38;
	add.s32 	%r27, %r27, 1;

BB3_29:
	xor.b32  	%r1318, %r1313, 7;
	cvt.u64.u32	%rd2928, %r1318;
	add.s64 	%rd2929, %rd1808, %rd2928;
	ld.local.u8 	%rs39, [%rd2929];
	xor.b32  	%r1319, %r27, 7;
	cvt.s64.s32	%rd2930, %r1319;
	add.s64 	%rd2931, %rd93, %rd2930;
	st.local.u8 	[%rd2931], %rs39;
	add.s32 	%r27, %r27, 1;
	add.s32 	%r14307, %r1313, 1;

BB3_30:
	xor.b32  	%r1320, %r14307, 7;
	cvt.s64.s32	%rd2932, %r1320;
	add.s64 	%rd2933, %rd1808, %rd2932;
	ld.local.u8 	%rs40, [%rd2933];
	xor.b32  	%r1321, %r27, 7;
	cvt.s64.s32	%rd2934, %r1321;
	add.s64 	%rd2935, %rd93, %rd2934;
	st.local.u8 	[%rd2935], %rs40;
	add.s32 	%r27, %r27, 1;
	add.s32 	%r14311, %r14307, 1;

BB3_31:
	setp.lt.u32	%p21, %r30, 4;
	@%p21 bra 	BB3_33;

BB3_32:
	xor.b32  	%r1322, %r14311, 7;
	cvt.s64.s32	%rd2936, %r1322;
	add.s64 	%rd2937, %rd1808, %rd2936;
	ld.local.u8 	%rs41, [%rd2937];
	xor.b32  	%r1323, %r27, 7;
	cvt.s64.s32	%rd2938, %r1323;
	add.s64 	%rd2939, %rd93, %rd2938;
	st.local.u8 	[%rd2939], %rs41;
	add.s32 	%r1324, %r14311, 1;
	xor.b32  	%r1325, %r1324, 7;
	cvt.s64.s32	%rd2940, %r1325;
	add.s64 	%rd2941, %rd1808, %rd2940;
	ld.local.u8 	%rs42, [%rd2941];
	add.s32 	%r1326, %r27, 1;
	xor.b32  	%r1327, %r1326, 7;
	cvt.s64.s32	%rd2942, %r1327;
	add.s64 	%rd2943, %rd93, %rd2942;
	st.local.u8 	[%rd2943], %rs42;
	add.s32 	%r1328, %r14311, 2;
	xor.b32  	%r1329, %r1328, 7;
	cvt.s64.s32	%rd2944, %r1329;
	add.s64 	%rd2945, %rd1808, %rd2944;
	ld.local.u8 	%rs43, [%rd2945];
	add.s32 	%r1330, %r27, 2;
	xor.b32  	%r1331, %r1330, 7;
	cvt.s64.s32	%rd2946, %r1331;
	add.s64 	%rd2947, %rd93, %rd2946;
	st.local.u8 	[%rd2947], %rs43;
	add.s32 	%r1332, %r14311, 3;
	xor.b32  	%r1333, %r1332, 7;
	cvt.s64.s32	%rd2948, %r1333;
	add.s64 	%rd2949, %rd1808, %rd2948;
	ld.local.u8 	%rs44, [%rd2949];
	add.s32 	%r1334, %r27, 3;
	xor.b32  	%r1335, %r1334, 7;
	cvt.s64.s32	%rd2950, %r1335;
	add.s64 	%rd2951, %rd93, %rd2950;
	st.local.u8 	[%rd2951], %rs44;
	add.s32 	%r14311, %r14311, 4;
	setp.lt.s32	%p22, %r14311, %r29;
	add.s32 	%r27, %r27, 4;
	@%p22 bra 	BB3_32;

BB3_33:
	ld.local.u64 	%rd2953, [%rd93];
	shr.u64 	%rd2954, %rd2953, 32;
	ld.local.u64 	%rd2955, [%rd1+72];
	shr.u64 	%rd2956, %rd2955, 32;
	ld.local.u64 	%rd2957, [%rd1+80];
	shr.u64 	%rd2958, %rd2957, 32;
	ld.local.u64 	%rd2959, [%rd1+88];
	shr.u64 	%rd2960, %rd2959, 32;
	ld.local.u64 	%rd2961, [%rd1+96];
	shr.u64 	%rd2962, %rd2961, 32;
	ld.local.u64 	%rd2963, [%rd1+104];
	shr.u64 	%rd2964, %rd2963, 32;
	ld.local.u64 	%rd2965, [%rd1+112];
	shr.u64 	%rd2966, %rd2965, 32;
	ld.local.u64 	%rd2967, [%rd1+120];
	shr.u64 	%rd2968, %rd2967, 32;
	ld.local.u64 	%rd2969, [%rd1+128];
	shr.u64 	%rd2970, %rd2969, 32;
	ld.local.u64 	%rd2971, [%rd1+136];
	shr.u64 	%rd2972, %rd2971, 32;
	ld.local.u64 	%rd2973, [%rd1+144];
	shr.u64 	%rd2974, %rd2973, 32;
	ld.local.u64 	%rd2975, [%rd1+152];
	shr.u64 	%rd2976, %rd2975, 32;
	ld.local.u64 	%rd2977, [%rd1+160];
	shr.u64 	%rd2978, %rd2977, 32;
	ld.local.u64 	%rd2979, [%rd1+168];
	shr.u64 	%rd2980, %rd2979, 32;
	ld.local.u64 	%rd2981, [%rd1+176];
	shr.u64 	%rd2982, %rd2981, 32;
	ld.local.u64 	%rd2983, [%rd1+184];
	shr.u64 	%rd2984, %rd2983, 32;
	bfi.b64 	%rd21382, %rd2954, %rd2953, 32, 32;
	bfi.b64 	%rd21383, %rd2956, %rd2955, 32, 32;
	bfi.b64 	%rd21384, %rd2958, %rd2957, 32, 32;
	bfi.b64 	%rd21385, %rd2960, %rd2959, 32, 32;
	bfi.b64 	%rd21386, %rd2962, %rd2961, 32, 32;
	bfi.b64 	%rd21387, %rd2964, %rd2963, 32, 32;
	bfi.b64 	%rd21388, %rd2966, %rd2965, 32, 32;
	bfi.b64 	%rd21389, %rd2968, %rd2967, 32, 32;
	bfi.b64 	%rd21373, %rd2970, %rd2969, 32, 32;
	bfi.b64 	%rd21372, %rd2972, %rd2971, 32, 32;
	bfi.b64 	%rd21371, %rd2974, %rd2973, 32, 32;
	bfi.b64 	%rd21370, %rd2976, %rd2975, 32, 32;
	bfi.b64 	%rd21369, %rd2978, %rd2977, 32, 32;
	bfi.b64 	%rd21368, %rd2980, %rd2979, 32, 32;
	bfi.b64 	%rd21367, %rd2982, %rd2981, 32, 32;
	bfi.b64 	%rd21366, %rd2984, %rd2983, 32, 32;
	ld.local.u64 	%rd111, [%rd1+32];
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1337,%dummy}, %rd111;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1338}, %rd111;
	}
	shf.r.wrap.b32 	%r1339, %r1338, %r1337, 14;
	shf.r.wrap.b32 	%r1340, %r1337, %r1338, 14;
	mov.b64 	%rd2985, {%r1340, %r1339};
	shf.r.wrap.b32 	%r1341, %r1338, %r1337, 18;
	shf.r.wrap.b32 	%r1342, %r1337, %r1338, 18;
	mov.b64 	%rd2986, {%r1342, %r1341};
	xor.b64  	%rd2987, %rd2986, %rd2985;
	shf.l.wrap.b32 	%r1343, %r1337, %r1338, 23;
	shf.l.wrap.b32 	%r1344, %r1338, %r1337, 23;
	mov.b64 	%rd2988, {%r1344, %r1343};
	xor.b64  	%rd2989, %rd2987, %rd2988;
	ld.local.u64 	%rd112, [%rd1+48];
	ld.local.u64 	%rd113, [%rd1+40];
	xor.b64  	%rd2990, %rd112, %rd113;
	and.b64  	%rd2991, %rd2990, %rd111;
	xor.b64  	%rd2992, %rd2991, %rd112;
	ld.local.u64 	%rd114, [%rd1+56];
	add.s64 	%rd2993, %rd114, %rd21382;
	mov.u64 	%rd21365, k_sha512;
	ld.const.u64 	%rd2994, [k_sha512];
	add.s64 	%rd2995, %rd2993, %rd2994;
	add.s64 	%rd2996, %rd2995, %rd2992;
	add.s64 	%rd2997, %rd2996, %rd2989;
	ld.local.u64 	%rd115, [%rd1+24];
	add.s64 	%rd2998, %rd2997, %rd115;
	ld.local.u64 	%rd116, [%rd1];
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1345,%dummy}, %rd116;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1346}, %rd116;
	}
	shf.r.wrap.b32 	%r1347, %r1346, %r1345, 28;
	shf.r.wrap.b32 	%r1348, %r1345, %r1346, 28;
	mov.b64 	%rd2999, {%r1348, %r1347};
	shf.l.wrap.b32 	%r1349, %r1345, %r1346, 30;
	shf.l.wrap.b32 	%r1350, %r1346, %r1345, 30;
	mov.b64 	%rd3000, {%r1350, %r1349};
	xor.b64  	%rd3001, %rd3000, %rd2999;
	shf.l.wrap.b32 	%r1351, %r1345, %r1346, 25;
	shf.l.wrap.b32 	%r1352, %r1346, %r1345, 25;
	mov.b64 	%rd3002, {%r1352, %r1351};
	xor.b64  	%rd3003, %rd3001, %rd3002;
	ld.local.u64 	%rd117, [%rd1+16];
	xor.b64  	%rd3004, %rd117, %rd116;
	ld.local.u64 	%rd118, [%rd1+8];
	xor.b64  	%rd3005, %rd118, %rd116;
	and.b64  	%rd3006, %rd3004, %rd3005;
	xor.b64  	%rd3007, %rd3006, %rd116;
	add.s64 	%rd3008, %rd2997, %rd3007;
	add.s64 	%rd3009, %rd3008, %rd3003;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1353,%dummy}, %rd2998;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1354}, %rd2998;
	}
	shf.r.wrap.b32 	%r1355, %r1354, %r1353, 14;
	shf.r.wrap.b32 	%r1356, %r1353, %r1354, 14;
	mov.b64 	%rd3010, {%r1356, %r1355};
	shf.r.wrap.b32 	%r1357, %r1354, %r1353, 18;
	shf.r.wrap.b32 	%r1358, %r1353, %r1354, 18;
	mov.b64 	%rd3011, {%r1358, %r1357};
	xor.b64  	%rd3012, %rd3011, %rd3010;
	shf.l.wrap.b32 	%r1359, %r1353, %r1354, 23;
	shf.l.wrap.b32 	%r1360, %r1354, %r1353, 23;
	mov.b64 	%rd3013, {%r1360, %r1359};
	xor.b64  	%rd3014, %rd3012, %rd3013;
	xor.b64  	%rd3015, %rd113, %rd111;
	and.b64  	%rd3016, %rd2998, %rd3015;
	xor.b64  	%rd3017, %rd3016, %rd113;
	add.s64 	%rd3018, %rd112, %rd21383;
	ld.const.u64 	%rd3019, [k_sha512+8];
	add.s64 	%rd3020, %rd3018, %rd3019;
	add.s64 	%rd3021, %rd3020, %rd3017;
	add.s64 	%rd3022, %rd3021, %rd3014;
	add.s64 	%rd3023, %rd3022, %rd117;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1361,%dummy}, %rd3009;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1362}, %rd3009;
	}
	shf.r.wrap.b32 	%r1363, %r1362, %r1361, 28;
	shf.r.wrap.b32 	%r1364, %r1361, %r1362, 28;
	mov.b64 	%rd3024, {%r1364, %r1363};
	shf.l.wrap.b32 	%r1365, %r1361, %r1362, 30;
	shf.l.wrap.b32 	%r1366, %r1362, %r1361, 30;
	mov.b64 	%rd3025, {%r1366, %r1365};
	xor.b64  	%rd3026, %rd3025, %rd3024;
	shf.l.wrap.b32 	%r1367, %r1361, %r1362, 25;
	shf.l.wrap.b32 	%r1368, %r1362, %r1361, 25;
	mov.b64 	%rd3027, {%r1368, %r1367};
	xor.b64  	%rd3028, %rd3026, %rd3027;
	xor.b64  	%rd3029, %rd3009, %rd118;
	xor.b64  	%rd3030, %rd3009, %rd116;
	and.b64  	%rd3031, %rd3030, %rd3029;
	xor.b64  	%rd3032, %rd3031, %rd3009;
	add.s64 	%rd3033, %rd3022, %rd3032;
	add.s64 	%rd3034, %rd3033, %rd3028;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1369,%dummy}, %rd3023;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1370}, %rd3023;
	}
	shf.r.wrap.b32 	%r1371, %r1370, %r1369, 14;
	shf.r.wrap.b32 	%r1372, %r1369, %r1370, 14;
	mov.b64 	%rd3035, {%r1372, %r1371};
	shf.r.wrap.b32 	%r1373, %r1370, %r1369, 18;
	shf.r.wrap.b32 	%r1374, %r1369, %r1370, 18;
	mov.b64 	%rd3036, {%r1374, %r1373};
	xor.b64  	%rd3037, %rd3036, %rd3035;
	shf.l.wrap.b32 	%r1375, %r1369, %r1370, 23;
	shf.l.wrap.b32 	%r1376, %r1370, %r1369, 23;
	mov.b64 	%rd3038, {%r1376, %r1375};
	xor.b64  	%rd3039, %rd3037, %rd3038;
	xor.b64  	%rd3040, %rd2998, %rd111;
	and.b64  	%rd3041, %rd3023, %rd3040;
	xor.b64  	%rd3042, %rd3041, %rd111;
	add.s64 	%rd3043, %rd113, %rd21384;
	ld.const.u64 	%rd3044, [k_sha512+16];
	add.s64 	%rd3045, %rd3043, %rd3044;
	add.s64 	%rd3046, %rd3045, %rd3042;
	add.s64 	%rd3047, %rd3046, %rd3039;
	add.s64 	%rd3048, %rd3047, %rd118;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1377,%dummy}, %rd3034;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1378}, %rd3034;
	}
	shf.r.wrap.b32 	%r1379, %r1378, %r1377, 28;
	shf.r.wrap.b32 	%r1380, %r1377, %r1378, 28;
	mov.b64 	%rd3049, {%r1380, %r1379};
	shf.l.wrap.b32 	%r1381, %r1377, %r1378, 30;
	shf.l.wrap.b32 	%r1382, %r1378, %r1377, 30;
	mov.b64 	%rd3050, {%r1382, %r1381};
	xor.b64  	%rd3051, %rd3050, %rd3049;
	shf.l.wrap.b32 	%r1383, %r1377, %r1378, 25;
	shf.l.wrap.b32 	%r1384, %r1378, %r1377, 25;
	mov.b64 	%rd3052, {%r1384, %r1383};
	xor.b64  	%rd3053, %rd3051, %rd3052;
	xor.b64  	%rd3054, %rd3034, %rd116;
	xor.b64  	%rd3055, %rd3034, %rd3009;
	and.b64  	%rd3056, %rd3055, %rd3054;
	xor.b64  	%rd3057, %rd3056, %rd3034;
	add.s64 	%rd3058, %rd3047, %rd3057;
	add.s64 	%rd3059, %rd3058, %rd3053;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1385,%dummy}, %rd3048;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1386}, %rd3048;
	}
	shf.r.wrap.b32 	%r1387, %r1386, %r1385, 14;
	shf.r.wrap.b32 	%r1388, %r1385, %r1386, 14;
	mov.b64 	%rd3060, {%r1388, %r1387};
	shf.r.wrap.b32 	%r1389, %r1386, %r1385, 18;
	shf.r.wrap.b32 	%r1390, %r1385, %r1386, 18;
	mov.b64 	%rd3061, {%r1390, %r1389};
	xor.b64  	%rd3062, %rd3061, %rd3060;
	shf.l.wrap.b32 	%r1391, %r1385, %r1386, 23;
	shf.l.wrap.b32 	%r1392, %r1386, %r1385, 23;
	mov.b64 	%rd3063, {%r1392, %r1391};
	xor.b64  	%rd3064, %rd3062, %rd3063;
	xor.b64  	%rd3065, %rd3023, %rd2998;
	and.b64  	%rd3066, %rd3048, %rd3065;
	xor.b64  	%rd3067, %rd3066, %rd2998;
	add.s64 	%rd3068, %rd111, %rd21385;
	ld.const.u64 	%rd3069, [k_sha512+24];
	add.s64 	%rd3070, %rd3068, %rd3069;
	add.s64 	%rd3071, %rd3070, %rd3067;
	add.s64 	%rd3072, %rd3071, %rd3064;
	add.s64 	%rd3073, %rd3072, %rd116;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1393,%dummy}, %rd3059;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1394}, %rd3059;
	}
	shf.r.wrap.b32 	%r1395, %r1394, %r1393, 28;
	shf.r.wrap.b32 	%r1396, %r1393, %r1394, 28;
	mov.b64 	%rd3074, {%r1396, %r1395};
	shf.l.wrap.b32 	%r1397, %r1393, %r1394, 30;
	shf.l.wrap.b32 	%r1398, %r1394, %r1393, 30;
	mov.b64 	%rd3075, {%r1398, %r1397};
	xor.b64  	%rd3076, %rd3075, %rd3074;
	shf.l.wrap.b32 	%r1399, %r1393, %r1394, 25;
	shf.l.wrap.b32 	%r1400, %r1394, %r1393, 25;
	mov.b64 	%rd3077, {%r1400, %r1399};
	xor.b64  	%rd3078, %rd3076, %rd3077;
	xor.b64  	%rd3079, %rd3059, %rd3009;
	xor.b64  	%rd3080, %rd3059, %rd3034;
	and.b64  	%rd3081, %rd3080, %rd3079;
	xor.b64  	%rd3082, %rd3081, %rd3059;
	add.s64 	%rd3083, %rd3072, %rd3082;
	add.s64 	%rd3084, %rd3083, %rd3078;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1401,%dummy}, %rd3073;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1402}, %rd3073;
	}
	shf.r.wrap.b32 	%r1403, %r1402, %r1401, 14;
	shf.r.wrap.b32 	%r1404, %r1401, %r1402, 14;
	mov.b64 	%rd3085, {%r1404, %r1403};
	shf.r.wrap.b32 	%r1405, %r1402, %r1401, 18;
	shf.r.wrap.b32 	%r1406, %r1401, %r1402, 18;
	mov.b64 	%rd3086, {%r1406, %r1405};
	xor.b64  	%rd3087, %rd3086, %rd3085;
	shf.l.wrap.b32 	%r1407, %r1401, %r1402, 23;
	shf.l.wrap.b32 	%r1408, %r1402, %r1401, 23;
	mov.b64 	%rd3088, {%r1408, %r1407};
	xor.b64  	%rd3089, %rd3087, %rd3088;
	xor.b64  	%rd3090, %rd3048, %rd3023;
	and.b64  	%rd3091, %rd3073, %rd3090;
	xor.b64  	%rd3092, %rd3091, %rd3023;
	add.s64 	%rd3093, %rd2998, %rd21386;
	ld.const.u64 	%rd3094, [k_sha512+32];
	add.s64 	%rd3095, %rd3093, %rd3094;
	add.s64 	%rd3096, %rd3095, %rd3092;
	add.s64 	%rd3097, %rd3096, %rd3089;
	add.s64 	%rd3098, %rd3097, %rd3009;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1409,%dummy}, %rd3084;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1410}, %rd3084;
	}
	shf.r.wrap.b32 	%r1411, %r1410, %r1409, 28;
	shf.r.wrap.b32 	%r1412, %r1409, %r1410, 28;
	mov.b64 	%rd3099, {%r1412, %r1411};
	shf.l.wrap.b32 	%r1413, %r1409, %r1410, 30;
	shf.l.wrap.b32 	%r1414, %r1410, %r1409, 30;
	mov.b64 	%rd3100, {%r1414, %r1413};
	xor.b64  	%rd3101, %rd3100, %rd3099;
	shf.l.wrap.b32 	%r1415, %r1409, %r1410, 25;
	shf.l.wrap.b32 	%r1416, %r1410, %r1409, 25;
	mov.b64 	%rd3102, {%r1416, %r1415};
	xor.b64  	%rd3103, %rd3101, %rd3102;
	xor.b64  	%rd3104, %rd3084, %rd3034;
	xor.b64  	%rd3105, %rd3084, %rd3059;
	and.b64  	%rd3106, %rd3105, %rd3104;
	xor.b64  	%rd3107, %rd3106, %rd3084;
	add.s64 	%rd3108, %rd3097, %rd3107;
	add.s64 	%rd3109, %rd3108, %rd3103;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1417,%dummy}, %rd3098;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1418}, %rd3098;
	}
	shf.r.wrap.b32 	%r1419, %r1418, %r1417, 14;
	shf.r.wrap.b32 	%r1420, %r1417, %r1418, 14;
	mov.b64 	%rd3110, {%r1420, %r1419};
	shf.r.wrap.b32 	%r1421, %r1418, %r1417, 18;
	shf.r.wrap.b32 	%r1422, %r1417, %r1418, 18;
	mov.b64 	%rd3111, {%r1422, %r1421};
	xor.b64  	%rd3112, %rd3111, %rd3110;
	shf.l.wrap.b32 	%r1423, %r1417, %r1418, 23;
	shf.l.wrap.b32 	%r1424, %r1418, %r1417, 23;
	mov.b64 	%rd3113, {%r1424, %r1423};
	xor.b64  	%rd3114, %rd3112, %rd3113;
	xor.b64  	%rd3115, %rd3073, %rd3048;
	and.b64  	%rd3116, %rd3098, %rd3115;
	xor.b64  	%rd3117, %rd3116, %rd3048;
	add.s64 	%rd3118, %rd3023, %rd21387;
	ld.const.u64 	%rd3119, [k_sha512+40];
	add.s64 	%rd3120, %rd3118, %rd3119;
	add.s64 	%rd3121, %rd3120, %rd3117;
	add.s64 	%rd3122, %rd3121, %rd3114;
	add.s64 	%rd3123, %rd3122, %rd3034;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1425,%dummy}, %rd3109;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1426}, %rd3109;
	}
	shf.r.wrap.b32 	%r1427, %r1426, %r1425, 28;
	shf.r.wrap.b32 	%r1428, %r1425, %r1426, 28;
	mov.b64 	%rd3124, {%r1428, %r1427};
	shf.l.wrap.b32 	%r1429, %r1425, %r1426, 30;
	shf.l.wrap.b32 	%r1430, %r1426, %r1425, 30;
	mov.b64 	%rd3125, {%r1430, %r1429};
	xor.b64  	%rd3126, %rd3125, %rd3124;
	shf.l.wrap.b32 	%r1431, %r1425, %r1426, 25;
	shf.l.wrap.b32 	%r1432, %r1426, %r1425, 25;
	mov.b64 	%rd3127, {%r1432, %r1431};
	xor.b64  	%rd3128, %rd3126, %rd3127;
	xor.b64  	%rd3129, %rd3109, %rd3059;
	xor.b64  	%rd3130, %rd3109, %rd3084;
	and.b64  	%rd3131, %rd3130, %rd3129;
	xor.b64  	%rd3132, %rd3131, %rd3109;
	add.s64 	%rd3133, %rd3122, %rd3132;
	add.s64 	%rd3134, %rd3133, %rd3128;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1433,%dummy}, %rd3123;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1434}, %rd3123;
	}
	shf.r.wrap.b32 	%r1435, %r1434, %r1433, 14;
	shf.r.wrap.b32 	%r1436, %r1433, %r1434, 14;
	mov.b64 	%rd3135, {%r1436, %r1435};
	shf.r.wrap.b32 	%r1437, %r1434, %r1433, 18;
	shf.r.wrap.b32 	%r1438, %r1433, %r1434, 18;
	mov.b64 	%rd3136, {%r1438, %r1437};
	xor.b64  	%rd3137, %rd3136, %rd3135;
	shf.l.wrap.b32 	%r1439, %r1433, %r1434, 23;
	shf.l.wrap.b32 	%r1440, %r1434, %r1433, 23;
	mov.b64 	%rd3138, {%r1440, %r1439};
	xor.b64  	%rd3139, %rd3137, %rd3138;
	xor.b64  	%rd3140, %rd3098, %rd3073;
	and.b64  	%rd3141, %rd3123, %rd3140;
	xor.b64  	%rd3142, %rd3141, %rd3073;
	add.s64 	%rd3143, %rd3048, %rd21388;
	ld.const.u64 	%rd3144, [k_sha512+48];
	add.s64 	%rd3145, %rd3143, %rd3144;
	add.s64 	%rd3146, %rd3145, %rd3142;
	add.s64 	%rd3147, %rd3146, %rd3139;
	add.s64 	%rd3148, %rd3147, %rd3059;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1441,%dummy}, %rd3134;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1442}, %rd3134;
	}
	shf.r.wrap.b32 	%r1443, %r1442, %r1441, 28;
	shf.r.wrap.b32 	%r1444, %r1441, %r1442, 28;
	mov.b64 	%rd3149, {%r1444, %r1443};
	shf.l.wrap.b32 	%r1445, %r1441, %r1442, 30;
	shf.l.wrap.b32 	%r1446, %r1442, %r1441, 30;
	mov.b64 	%rd3150, {%r1446, %r1445};
	xor.b64  	%rd3151, %rd3150, %rd3149;
	shf.l.wrap.b32 	%r1447, %r1441, %r1442, 25;
	shf.l.wrap.b32 	%r1448, %r1442, %r1441, 25;
	mov.b64 	%rd3152, {%r1448, %r1447};
	xor.b64  	%rd3153, %rd3151, %rd3152;
	xor.b64  	%rd3154, %rd3134, %rd3084;
	xor.b64  	%rd3155, %rd3134, %rd3109;
	and.b64  	%rd3156, %rd3155, %rd3154;
	xor.b64  	%rd3157, %rd3156, %rd3134;
	add.s64 	%rd3158, %rd3147, %rd3157;
	add.s64 	%rd3159, %rd3158, %rd3153;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1449,%dummy}, %rd3148;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1450}, %rd3148;
	}
	shf.r.wrap.b32 	%r1451, %r1450, %r1449, 14;
	shf.r.wrap.b32 	%r1452, %r1449, %r1450, 14;
	mov.b64 	%rd3160, {%r1452, %r1451};
	shf.r.wrap.b32 	%r1453, %r1450, %r1449, 18;
	shf.r.wrap.b32 	%r1454, %r1449, %r1450, 18;
	mov.b64 	%rd3161, {%r1454, %r1453};
	xor.b64  	%rd3162, %rd3161, %rd3160;
	shf.l.wrap.b32 	%r1455, %r1449, %r1450, 23;
	shf.l.wrap.b32 	%r1456, %r1450, %r1449, 23;
	mov.b64 	%rd3163, {%r1456, %r1455};
	xor.b64  	%rd3164, %rd3162, %rd3163;
	xor.b64  	%rd3165, %rd3123, %rd3098;
	and.b64  	%rd3166, %rd3148, %rd3165;
	xor.b64  	%rd3167, %rd3166, %rd3098;
	add.s64 	%rd3168, %rd3073, %rd21389;
	ld.const.u64 	%rd3169, [k_sha512+56];
	add.s64 	%rd3170, %rd3168, %rd3169;
	add.s64 	%rd3171, %rd3170, %rd3167;
	add.s64 	%rd3172, %rd3171, %rd3164;
	add.s64 	%rd3173, %rd3172, %rd3084;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1457,%dummy}, %rd3159;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1458}, %rd3159;
	}
	shf.r.wrap.b32 	%r1459, %r1458, %r1457, 28;
	shf.r.wrap.b32 	%r1460, %r1457, %r1458, 28;
	mov.b64 	%rd3174, {%r1460, %r1459};
	shf.l.wrap.b32 	%r1461, %r1457, %r1458, 30;
	shf.l.wrap.b32 	%r1462, %r1458, %r1457, 30;
	mov.b64 	%rd3175, {%r1462, %r1461};
	xor.b64  	%rd3176, %rd3175, %rd3174;
	shf.l.wrap.b32 	%r1463, %r1457, %r1458, 25;
	shf.l.wrap.b32 	%r1464, %r1458, %r1457, 25;
	mov.b64 	%rd3177, {%r1464, %r1463};
	xor.b64  	%rd3178, %rd3176, %rd3177;
	xor.b64  	%rd3179, %rd3159, %rd3109;
	xor.b64  	%rd3180, %rd3159, %rd3134;
	and.b64  	%rd3181, %rd3180, %rd3179;
	xor.b64  	%rd3182, %rd3181, %rd3159;
	add.s64 	%rd3183, %rd3172, %rd3182;
	add.s64 	%rd3184, %rd3183, %rd3178;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1465,%dummy}, %rd3173;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1466}, %rd3173;
	}
	shf.r.wrap.b32 	%r1467, %r1466, %r1465, 14;
	shf.r.wrap.b32 	%r1468, %r1465, %r1466, 14;
	mov.b64 	%rd3185, {%r1468, %r1467};
	shf.r.wrap.b32 	%r1469, %r1466, %r1465, 18;
	shf.r.wrap.b32 	%r1470, %r1465, %r1466, 18;
	mov.b64 	%rd3186, {%r1470, %r1469};
	xor.b64  	%rd3187, %rd3186, %rd3185;
	shf.l.wrap.b32 	%r1471, %r1465, %r1466, 23;
	shf.l.wrap.b32 	%r1472, %r1466, %r1465, 23;
	mov.b64 	%rd3188, {%r1472, %r1471};
	xor.b64  	%rd3189, %rd3187, %rd3188;
	xor.b64  	%rd3190, %rd3148, %rd3123;
	and.b64  	%rd3191, %rd3173, %rd3190;
	xor.b64  	%rd3192, %rd3191, %rd3123;
	add.s64 	%rd3193, %rd3098, %rd21373;
	ld.const.u64 	%rd3194, [k_sha512+64];
	add.s64 	%rd3195, %rd3193, %rd3194;
	add.s64 	%rd3196, %rd3195, %rd3192;
	add.s64 	%rd3197, %rd3196, %rd3189;
	add.s64 	%rd3198, %rd3197, %rd3109;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1473,%dummy}, %rd3184;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1474}, %rd3184;
	}
	shf.r.wrap.b32 	%r1475, %r1474, %r1473, 28;
	shf.r.wrap.b32 	%r1476, %r1473, %r1474, 28;
	mov.b64 	%rd3199, {%r1476, %r1475};
	shf.l.wrap.b32 	%r1477, %r1473, %r1474, 30;
	shf.l.wrap.b32 	%r1478, %r1474, %r1473, 30;
	mov.b64 	%rd3200, {%r1478, %r1477};
	xor.b64  	%rd3201, %rd3200, %rd3199;
	shf.l.wrap.b32 	%r1479, %r1473, %r1474, 25;
	shf.l.wrap.b32 	%r1480, %r1474, %r1473, 25;
	mov.b64 	%rd3202, {%r1480, %r1479};
	xor.b64  	%rd3203, %rd3201, %rd3202;
	xor.b64  	%rd3204, %rd3184, %rd3134;
	xor.b64  	%rd3205, %rd3184, %rd3159;
	and.b64  	%rd3206, %rd3205, %rd3204;
	xor.b64  	%rd3207, %rd3206, %rd3184;
	add.s64 	%rd3208, %rd3197, %rd3207;
	add.s64 	%rd3209, %rd3208, %rd3203;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1481,%dummy}, %rd3198;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1482}, %rd3198;
	}
	shf.r.wrap.b32 	%r1483, %r1482, %r1481, 14;
	shf.r.wrap.b32 	%r1484, %r1481, %r1482, 14;
	mov.b64 	%rd3210, {%r1484, %r1483};
	shf.r.wrap.b32 	%r1485, %r1482, %r1481, 18;
	shf.r.wrap.b32 	%r1486, %r1481, %r1482, 18;
	mov.b64 	%rd3211, {%r1486, %r1485};
	xor.b64  	%rd3212, %rd3211, %rd3210;
	shf.l.wrap.b32 	%r1487, %r1481, %r1482, 23;
	shf.l.wrap.b32 	%r1488, %r1482, %r1481, 23;
	mov.b64 	%rd3213, {%r1488, %r1487};
	xor.b64  	%rd3214, %rd3212, %rd3213;
	xor.b64  	%rd3215, %rd3173, %rd3148;
	and.b64  	%rd3216, %rd3198, %rd3215;
	xor.b64  	%rd3217, %rd3216, %rd3148;
	add.s64 	%rd3218, %rd3123, %rd21372;
	ld.const.u64 	%rd3219, [k_sha512+72];
	add.s64 	%rd3220, %rd3218, %rd3219;
	add.s64 	%rd3221, %rd3220, %rd3217;
	add.s64 	%rd3222, %rd3221, %rd3214;
	add.s64 	%rd3223, %rd3222, %rd3134;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1489,%dummy}, %rd3209;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1490}, %rd3209;
	}
	shf.r.wrap.b32 	%r1491, %r1490, %r1489, 28;
	shf.r.wrap.b32 	%r1492, %r1489, %r1490, 28;
	mov.b64 	%rd3224, {%r1492, %r1491};
	shf.l.wrap.b32 	%r1493, %r1489, %r1490, 30;
	shf.l.wrap.b32 	%r1494, %r1490, %r1489, 30;
	mov.b64 	%rd3225, {%r1494, %r1493};
	xor.b64  	%rd3226, %rd3225, %rd3224;
	shf.l.wrap.b32 	%r1495, %r1489, %r1490, 25;
	shf.l.wrap.b32 	%r1496, %r1490, %r1489, 25;
	mov.b64 	%rd3227, {%r1496, %r1495};
	xor.b64  	%rd3228, %rd3226, %rd3227;
	xor.b64  	%rd3229, %rd3209, %rd3159;
	xor.b64  	%rd3230, %rd3209, %rd3184;
	and.b64  	%rd3231, %rd3230, %rd3229;
	xor.b64  	%rd3232, %rd3231, %rd3209;
	add.s64 	%rd3233, %rd3222, %rd3232;
	add.s64 	%rd3234, %rd3233, %rd3228;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1497,%dummy}, %rd3223;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1498}, %rd3223;
	}
	shf.r.wrap.b32 	%r1499, %r1498, %r1497, 14;
	shf.r.wrap.b32 	%r1500, %r1497, %r1498, 14;
	mov.b64 	%rd3235, {%r1500, %r1499};
	shf.r.wrap.b32 	%r1501, %r1498, %r1497, 18;
	shf.r.wrap.b32 	%r1502, %r1497, %r1498, 18;
	mov.b64 	%rd3236, {%r1502, %r1501};
	xor.b64  	%rd3237, %rd3236, %rd3235;
	shf.l.wrap.b32 	%r1503, %r1497, %r1498, 23;
	shf.l.wrap.b32 	%r1504, %r1498, %r1497, 23;
	mov.b64 	%rd3238, {%r1504, %r1503};
	xor.b64  	%rd3239, %rd3237, %rd3238;
	xor.b64  	%rd3240, %rd3198, %rd3173;
	and.b64  	%rd3241, %rd3223, %rd3240;
	xor.b64  	%rd3242, %rd3241, %rd3173;
	add.s64 	%rd3243, %rd3148, %rd21371;
	ld.const.u64 	%rd3244, [k_sha512+80];
	add.s64 	%rd3245, %rd3243, %rd3244;
	add.s64 	%rd3246, %rd3245, %rd3242;
	add.s64 	%rd3247, %rd3246, %rd3239;
	add.s64 	%rd3248, %rd3247, %rd3159;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1505,%dummy}, %rd3234;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1506}, %rd3234;
	}
	shf.r.wrap.b32 	%r1507, %r1506, %r1505, 28;
	shf.r.wrap.b32 	%r1508, %r1505, %r1506, 28;
	mov.b64 	%rd3249, {%r1508, %r1507};
	shf.l.wrap.b32 	%r1509, %r1505, %r1506, 30;
	shf.l.wrap.b32 	%r1510, %r1506, %r1505, 30;
	mov.b64 	%rd3250, {%r1510, %r1509};
	xor.b64  	%rd3251, %rd3250, %rd3249;
	shf.l.wrap.b32 	%r1511, %r1505, %r1506, 25;
	shf.l.wrap.b32 	%r1512, %r1506, %r1505, 25;
	mov.b64 	%rd3252, {%r1512, %r1511};
	xor.b64  	%rd3253, %rd3251, %rd3252;
	xor.b64  	%rd3254, %rd3234, %rd3184;
	xor.b64  	%rd3255, %rd3234, %rd3209;
	and.b64  	%rd3256, %rd3255, %rd3254;
	xor.b64  	%rd3257, %rd3256, %rd3234;
	add.s64 	%rd3258, %rd3247, %rd3257;
	add.s64 	%rd3259, %rd3258, %rd3253;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1513,%dummy}, %rd3248;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1514}, %rd3248;
	}
	shf.r.wrap.b32 	%r1515, %r1514, %r1513, 14;
	shf.r.wrap.b32 	%r1516, %r1513, %r1514, 14;
	mov.b64 	%rd3260, {%r1516, %r1515};
	shf.r.wrap.b32 	%r1517, %r1514, %r1513, 18;
	shf.r.wrap.b32 	%r1518, %r1513, %r1514, 18;
	mov.b64 	%rd3261, {%r1518, %r1517};
	xor.b64  	%rd3262, %rd3261, %rd3260;
	shf.l.wrap.b32 	%r1519, %r1513, %r1514, 23;
	shf.l.wrap.b32 	%r1520, %r1514, %r1513, 23;
	mov.b64 	%rd3263, {%r1520, %r1519};
	xor.b64  	%rd3264, %rd3262, %rd3263;
	xor.b64  	%rd3265, %rd3223, %rd3198;
	and.b64  	%rd3266, %rd3248, %rd3265;
	xor.b64  	%rd3267, %rd3266, %rd3198;
	add.s64 	%rd3268, %rd3173, %rd21370;
	ld.const.u64 	%rd3269, [k_sha512+88];
	add.s64 	%rd3270, %rd3268, %rd3269;
	add.s64 	%rd3271, %rd3270, %rd3267;
	add.s64 	%rd3272, %rd3271, %rd3264;
	add.s64 	%rd3273, %rd3272, %rd3184;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1521,%dummy}, %rd3259;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1522}, %rd3259;
	}
	shf.r.wrap.b32 	%r1523, %r1522, %r1521, 28;
	shf.r.wrap.b32 	%r1524, %r1521, %r1522, 28;
	mov.b64 	%rd3274, {%r1524, %r1523};
	shf.l.wrap.b32 	%r1525, %r1521, %r1522, 30;
	shf.l.wrap.b32 	%r1526, %r1522, %r1521, 30;
	mov.b64 	%rd3275, {%r1526, %r1525};
	xor.b64  	%rd3276, %rd3275, %rd3274;
	shf.l.wrap.b32 	%r1527, %r1521, %r1522, 25;
	shf.l.wrap.b32 	%r1528, %r1522, %r1521, 25;
	mov.b64 	%rd3277, {%r1528, %r1527};
	xor.b64  	%rd3278, %rd3276, %rd3277;
	xor.b64  	%rd3279, %rd3259, %rd3209;
	xor.b64  	%rd3280, %rd3259, %rd3234;
	and.b64  	%rd3281, %rd3280, %rd3279;
	xor.b64  	%rd3282, %rd3281, %rd3259;
	add.s64 	%rd3283, %rd3272, %rd3282;
	add.s64 	%rd3284, %rd3283, %rd3278;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1529,%dummy}, %rd3273;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1530}, %rd3273;
	}
	shf.r.wrap.b32 	%r1531, %r1530, %r1529, 14;
	shf.r.wrap.b32 	%r1532, %r1529, %r1530, 14;
	mov.b64 	%rd3285, {%r1532, %r1531};
	shf.r.wrap.b32 	%r1533, %r1530, %r1529, 18;
	shf.r.wrap.b32 	%r1534, %r1529, %r1530, 18;
	mov.b64 	%rd3286, {%r1534, %r1533};
	xor.b64  	%rd3287, %rd3286, %rd3285;
	shf.l.wrap.b32 	%r1535, %r1529, %r1530, 23;
	shf.l.wrap.b32 	%r1536, %r1530, %r1529, 23;
	mov.b64 	%rd3288, {%r1536, %r1535};
	xor.b64  	%rd3289, %rd3287, %rd3288;
	xor.b64  	%rd3290, %rd3248, %rd3223;
	and.b64  	%rd3291, %rd3273, %rd3290;
	xor.b64  	%rd3292, %rd3291, %rd3223;
	add.s64 	%rd3293, %rd3198, %rd21369;
	ld.const.u64 	%rd3294, [k_sha512+96];
	add.s64 	%rd3295, %rd3293, %rd3294;
	add.s64 	%rd3296, %rd3295, %rd3292;
	add.s64 	%rd3297, %rd3296, %rd3289;
	add.s64 	%rd21381, %rd3297, %rd3209;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1537,%dummy}, %rd3284;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1538}, %rd3284;
	}
	shf.r.wrap.b32 	%r1539, %r1538, %r1537, 28;
	shf.r.wrap.b32 	%r1540, %r1537, %r1538, 28;
	mov.b64 	%rd3298, {%r1540, %r1539};
	shf.l.wrap.b32 	%r1541, %r1537, %r1538, 30;
	shf.l.wrap.b32 	%r1542, %r1538, %r1537, 30;
	mov.b64 	%rd3299, {%r1542, %r1541};
	xor.b64  	%rd3300, %rd3299, %rd3298;
	shf.l.wrap.b32 	%r1543, %r1537, %r1538, 25;
	shf.l.wrap.b32 	%r1544, %r1538, %r1537, 25;
	mov.b64 	%rd3301, {%r1544, %r1543};
	xor.b64  	%rd3302, %rd3300, %rd3301;
	xor.b64  	%rd3303, %rd3284, %rd3234;
	xor.b64  	%rd3304, %rd3284, %rd3259;
	and.b64  	%rd3305, %rd3304, %rd3303;
	xor.b64  	%rd3306, %rd3305, %rd3284;
	add.s64 	%rd3307, %rd3297, %rd3306;
	add.s64 	%rd21377, %rd3307, %rd3302;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1545,%dummy}, %rd21381;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1546}, %rd21381;
	}
	shf.r.wrap.b32 	%r1547, %r1546, %r1545, 14;
	shf.r.wrap.b32 	%r1548, %r1545, %r1546, 14;
	mov.b64 	%rd3308, {%r1548, %r1547};
	shf.r.wrap.b32 	%r1549, %r1546, %r1545, 18;
	shf.r.wrap.b32 	%r1550, %r1545, %r1546, 18;
	mov.b64 	%rd3309, {%r1550, %r1549};
	xor.b64  	%rd3310, %rd3309, %rd3308;
	shf.l.wrap.b32 	%r1551, %r1545, %r1546, 23;
	shf.l.wrap.b32 	%r1552, %r1546, %r1545, 23;
	mov.b64 	%rd3311, {%r1552, %r1551};
	xor.b64  	%rd3312, %rd3310, %rd3311;
	xor.b64  	%rd3313, %rd3273, %rd3248;
	and.b64  	%rd3314, %rd21381, %rd3313;
	xor.b64  	%rd3315, %rd3314, %rd3248;
	add.s64 	%rd3316, %rd3223, %rd21368;
	ld.const.u64 	%rd3317, [k_sha512+104];
	add.s64 	%rd3318, %rd3316, %rd3317;
	add.s64 	%rd3319, %rd3318, %rd3315;
	add.s64 	%rd3320, %rd3319, %rd3312;
	add.s64 	%rd21380, %rd3320, %rd3234;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1553,%dummy}, %rd21377;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1554}, %rd21377;
	}
	shf.r.wrap.b32 	%r1555, %r1554, %r1553, 28;
	shf.r.wrap.b32 	%r1556, %r1553, %r1554, 28;
	mov.b64 	%rd3321, {%r1556, %r1555};
	shf.l.wrap.b32 	%r1557, %r1553, %r1554, 30;
	shf.l.wrap.b32 	%r1558, %r1554, %r1553, 30;
	mov.b64 	%rd3322, {%r1558, %r1557};
	xor.b64  	%rd3323, %rd3322, %rd3321;
	shf.l.wrap.b32 	%r1559, %r1553, %r1554, 25;
	shf.l.wrap.b32 	%r1560, %r1554, %r1553, 25;
	mov.b64 	%rd3324, {%r1560, %r1559};
	xor.b64  	%rd3325, %rd3323, %rd3324;
	xor.b64  	%rd3326, %rd21377, %rd3259;
	xor.b64  	%rd3327, %rd21377, %rd3284;
	and.b64  	%rd3328, %rd3327, %rd3326;
	xor.b64  	%rd3329, %rd3328, %rd21377;
	add.s64 	%rd3330, %rd3320, %rd3329;
	add.s64 	%rd21376, %rd3330, %rd3325;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1561,%dummy}, %rd21380;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1562}, %rd21380;
	}
	shf.r.wrap.b32 	%r1563, %r1562, %r1561, 14;
	shf.r.wrap.b32 	%r1564, %r1561, %r1562, 14;
	mov.b64 	%rd3331, {%r1564, %r1563};
	shf.r.wrap.b32 	%r1565, %r1562, %r1561, 18;
	shf.r.wrap.b32 	%r1566, %r1561, %r1562, 18;
	mov.b64 	%rd3332, {%r1566, %r1565};
	xor.b64  	%rd3333, %rd3332, %rd3331;
	shf.l.wrap.b32 	%r1567, %r1561, %r1562, 23;
	shf.l.wrap.b32 	%r1568, %r1562, %r1561, 23;
	mov.b64 	%rd3334, {%r1568, %r1567};
	xor.b64  	%rd3335, %rd3333, %rd3334;
	xor.b64  	%rd3336, %rd21381, %rd3273;
	and.b64  	%rd3337, %rd21380, %rd3336;
	xor.b64  	%rd3338, %rd3337, %rd3273;
	add.s64 	%rd3339, %rd3248, %rd21367;
	ld.const.u64 	%rd3340, [k_sha512+112];
	add.s64 	%rd3341, %rd3339, %rd3340;
	add.s64 	%rd3342, %rd3341, %rd3338;
	add.s64 	%rd3343, %rd3342, %rd3335;
	add.s64 	%rd21379, %rd3343, %rd3259;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1569,%dummy}, %rd21376;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1570}, %rd21376;
	}
	shf.r.wrap.b32 	%r1571, %r1570, %r1569, 28;
	shf.r.wrap.b32 	%r1572, %r1569, %r1570, 28;
	mov.b64 	%rd3344, {%r1572, %r1571};
	shf.l.wrap.b32 	%r1573, %r1569, %r1570, 30;
	shf.l.wrap.b32 	%r1574, %r1570, %r1569, 30;
	mov.b64 	%rd3345, {%r1574, %r1573};
	xor.b64  	%rd3346, %rd3345, %rd3344;
	shf.l.wrap.b32 	%r1575, %r1569, %r1570, 25;
	shf.l.wrap.b32 	%r1576, %r1570, %r1569, 25;
	mov.b64 	%rd3347, {%r1576, %r1575};
	xor.b64  	%rd3348, %rd3346, %rd3347;
	xor.b64  	%rd3349, %rd21376, %rd3284;
	xor.b64  	%rd3350, %rd21376, %rd21377;
	and.b64  	%rd3351, %rd3350, %rd3349;
	xor.b64  	%rd3352, %rd3351, %rd21376;
	add.s64 	%rd3353, %rd3343, %rd3352;
	add.s64 	%rd21375, %rd3353, %rd3348;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1577,%dummy}, %rd21379;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1578}, %rd21379;
	}
	shf.r.wrap.b32 	%r1579, %r1578, %r1577, 14;
	shf.r.wrap.b32 	%r1580, %r1577, %r1578, 14;
	mov.b64 	%rd3354, {%r1580, %r1579};
	shf.r.wrap.b32 	%r1581, %r1578, %r1577, 18;
	shf.r.wrap.b32 	%r1582, %r1577, %r1578, 18;
	mov.b64 	%rd3355, {%r1582, %r1581};
	xor.b64  	%rd3356, %rd3355, %rd3354;
	shf.l.wrap.b32 	%r1583, %r1577, %r1578, 23;
	shf.l.wrap.b32 	%r1584, %r1578, %r1577, 23;
	mov.b64 	%rd3357, {%r1584, %r1583};
	xor.b64  	%rd3358, %rd3356, %rd3357;
	xor.b64  	%rd3359, %rd21380, %rd21381;
	and.b64  	%rd3360, %rd21379, %rd3359;
	xor.b64  	%rd3361, %rd3360, %rd21381;
	add.s64 	%rd3362, %rd3273, %rd21366;
	ld.const.u64 	%rd3363, [k_sha512+120];
	add.s64 	%rd3364, %rd3362, %rd3363;
	add.s64 	%rd3365, %rd3364, %rd3361;
	add.s64 	%rd3366, %rd3365, %rd3358;
	add.s64 	%rd21378, %rd3366, %rd3284;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1585,%dummy}, %rd21375;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1586}, %rd21375;
	}
	shf.r.wrap.b32 	%r1587, %r1586, %r1585, 28;
	shf.r.wrap.b32 	%r1588, %r1585, %r1586, 28;
	mov.b64 	%rd3367, {%r1588, %r1587};
	shf.l.wrap.b32 	%r1589, %r1585, %r1586, 30;
	shf.l.wrap.b32 	%r1590, %r1586, %r1585, 30;
	mov.b64 	%rd3368, {%r1590, %r1589};
	xor.b64  	%rd3369, %rd3368, %rd3367;
	shf.l.wrap.b32 	%r1591, %r1585, %r1586, 25;
	shf.l.wrap.b32 	%r1592, %r1586, %r1585, 25;
	mov.b64 	%rd3370, {%r1592, %r1591};
	xor.b64  	%rd3371, %rd3369, %rd3370;
	xor.b64  	%rd3372, %rd21375, %rd21377;
	xor.b64  	%rd3373, %rd21375, %rd21376;
	and.b64  	%rd3374, %rd3373, %rd3372;
	xor.b64  	%rd3375, %rd3374, %rd21375;
	add.s64 	%rd3376, %rd3366, %rd3375;
	add.s64 	%rd21374, %rd3376, %rd3371;
	mov.u32 	%r14313, 16;

BB3_34:
	shr.u64 	%rd3377, %rd21367, 6;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1593,%dummy}, %rd21367;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1594}, %rd21367;
	}
	shf.r.wrap.b32 	%r1595, %r1594, %r1593, 19;
	shf.r.wrap.b32 	%r1596, %r1593, %r1594, 19;
	mov.b64 	%rd3378, {%r1596, %r1595};
	xor.b64  	%rd3379, %rd3378, %rd3377;
	shf.l.wrap.b32 	%r1597, %r1593, %r1594, 3;
	shf.l.wrap.b32 	%r1598, %r1594, %r1593, 3;
	mov.b64 	%rd3380, {%r1598, %r1597};
	xor.b64  	%rd3381, %rd3379, %rd3380;
	shr.u64 	%rd3382, %rd21383, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1599,%dummy}, %rd21383;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1600}, %rd21383;
	}
	shf.r.wrap.b32 	%r1601, %r1600, %r1599, 1;
	shf.r.wrap.b32 	%r1602, %r1599, %r1600, 1;
	mov.b64 	%rd3383, {%r1602, %r1601};
	xor.b64  	%rd3384, %rd3383, %rd3382;
	shf.r.wrap.b32 	%r1603, %r1600, %r1599, 8;
	shf.r.wrap.b32 	%r1604, %r1599, %r1600, 8;
	mov.b64 	%rd3385, {%r1604, %r1603};
	xor.b64  	%rd3386, %rd3384, %rd3385;
	add.s64 	%rd3387, %rd21372, %rd21382;
	add.s64 	%rd3388, %rd3387, %rd3381;
	add.s64 	%rd21382, %rd3388, %rd3386;
	shr.u64 	%rd3389, %rd21366, 6;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1605,%dummy}, %rd21366;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1606}, %rd21366;
	}
	shf.r.wrap.b32 	%r1607, %r1606, %r1605, 19;
	shf.r.wrap.b32 	%r1608, %r1605, %r1606, 19;
	mov.b64 	%rd3390, {%r1608, %r1607};
	xor.b64  	%rd3391, %rd3390, %rd3389;
	shf.l.wrap.b32 	%r1609, %r1605, %r1606, 3;
	shf.l.wrap.b32 	%r1610, %r1606, %r1605, 3;
	mov.b64 	%rd3392, {%r1610, %r1609};
	xor.b64  	%rd3393, %rd3391, %rd3392;
	shr.u64 	%rd3394, %rd21384, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1611,%dummy}, %rd21384;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1612}, %rd21384;
	}
	shf.r.wrap.b32 	%r1613, %r1612, %r1611, 1;
	shf.r.wrap.b32 	%r1614, %r1611, %r1612, 1;
	mov.b64 	%rd3395, {%r1614, %r1613};
	xor.b64  	%rd3396, %rd3395, %rd3394;
	shf.r.wrap.b32 	%r1615, %r1612, %r1611, 8;
	shf.r.wrap.b32 	%r1616, %r1611, %r1612, 8;
	mov.b64 	%rd3397, {%r1616, %r1615};
	xor.b64  	%rd3398, %rd3396, %rd3397;
	add.s64 	%rd3399, %rd21371, %rd21383;
	add.s64 	%rd3400, %rd3399, %rd3393;
	add.s64 	%rd21383, %rd3400, %rd3398;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1617,%dummy}, %rd21382;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1618}, %rd21382;
	}
	shf.r.wrap.b32 	%r1619, %r1618, %r1617, 19;
	shf.r.wrap.b32 	%r1620, %r1617, %r1618, 19;
	mov.b64 	%rd3401, {%r1620, %r1619};
	shf.l.wrap.b32 	%r1621, %r1617, %r1618, 3;
	shf.l.wrap.b32 	%r1622, %r1618, %r1617, 3;
	mov.b64 	%rd3402, {%r1622, %r1621};
	shr.u64 	%rd3403, %rd21382, 6;
	xor.b64  	%rd3404, %rd3401, %rd3403;
	xor.b64  	%rd3405, %rd3404, %rd3402;
	shr.u64 	%rd3406, %rd21385, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1623,%dummy}, %rd21385;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1624}, %rd21385;
	}
	shf.r.wrap.b32 	%r1625, %r1624, %r1623, 1;
	shf.r.wrap.b32 	%r1626, %r1623, %r1624, 1;
	mov.b64 	%rd3407, {%r1626, %r1625};
	xor.b64  	%rd3408, %rd3407, %rd3406;
	shf.r.wrap.b32 	%r1627, %r1624, %r1623, 8;
	shf.r.wrap.b32 	%r1628, %r1623, %r1624, 8;
	mov.b64 	%rd3409, {%r1628, %r1627};
	xor.b64  	%rd3410, %rd3408, %rd3409;
	add.s64 	%rd3411, %rd21370, %rd21384;
	add.s64 	%rd3412, %rd3411, %rd3405;
	add.s64 	%rd21384, %rd3412, %rd3410;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1629,%dummy}, %rd21383;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1630}, %rd21383;
	}
	shf.r.wrap.b32 	%r1631, %r1630, %r1629, 19;
	shf.r.wrap.b32 	%r1632, %r1629, %r1630, 19;
	mov.b64 	%rd3413, {%r1632, %r1631};
	shf.l.wrap.b32 	%r1633, %r1629, %r1630, 3;
	shf.l.wrap.b32 	%r1634, %r1630, %r1629, 3;
	mov.b64 	%rd3414, {%r1634, %r1633};
	shr.u64 	%rd3415, %rd21383, 6;
	xor.b64  	%rd3416, %rd3413, %rd3415;
	xor.b64  	%rd3417, %rd3416, %rd3414;
	shr.u64 	%rd3418, %rd21386, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1635,%dummy}, %rd21386;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1636}, %rd21386;
	}
	shf.r.wrap.b32 	%r1637, %r1636, %r1635, 1;
	shf.r.wrap.b32 	%r1638, %r1635, %r1636, 1;
	mov.b64 	%rd3419, {%r1638, %r1637};
	xor.b64  	%rd3420, %rd3419, %rd3418;
	shf.r.wrap.b32 	%r1639, %r1636, %r1635, 8;
	shf.r.wrap.b32 	%r1640, %r1635, %r1636, 8;
	mov.b64 	%rd3421, {%r1640, %r1639};
	xor.b64  	%rd3422, %rd3420, %rd3421;
	add.s64 	%rd3423, %rd21369, %rd21385;
	add.s64 	%rd3424, %rd3423, %rd3417;
	add.s64 	%rd21385, %rd3424, %rd3422;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1641,%dummy}, %rd21384;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1642}, %rd21384;
	}
	shf.r.wrap.b32 	%r1643, %r1642, %r1641, 19;
	shf.r.wrap.b32 	%r1644, %r1641, %r1642, 19;
	mov.b64 	%rd3425, {%r1644, %r1643};
	shf.l.wrap.b32 	%r1645, %r1641, %r1642, 3;
	shf.l.wrap.b32 	%r1646, %r1642, %r1641, 3;
	mov.b64 	%rd3426, {%r1646, %r1645};
	shr.u64 	%rd3427, %rd21384, 6;
	xor.b64  	%rd3428, %rd3425, %rd3427;
	xor.b64  	%rd3429, %rd3428, %rd3426;
	shr.u64 	%rd3430, %rd21387, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1647,%dummy}, %rd21387;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1648}, %rd21387;
	}
	shf.r.wrap.b32 	%r1649, %r1648, %r1647, 1;
	shf.r.wrap.b32 	%r1650, %r1647, %r1648, 1;
	mov.b64 	%rd3431, {%r1650, %r1649};
	xor.b64  	%rd3432, %rd3431, %rd3430;
	shf.r.wrap.b32 	%r1651, %r1648, %r1647, 8;
	shf.r.wrap.b32 	%r1652, %r1647, %r1648, 8;
	mov.b64 	%rd3433, {%r1652, %r1651};
	xor.b64  	%rd3434, %rd3432, %rd3433;
	add.s64 	%rd3435, %rd21368, %rd21386;
	add.s64 	%rd3436, %rd3435, %rd3429;
	add.s64 	%rd21386, %rd3436, %rd3434;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1653,%dummy}, %rd21385;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1654}, %rd21385;
	}
	shf.r.wrap.b32 	%r1655, %r1654, %r1653, 19;
	shf.r.wrap.b32 	%r1656, %r1653, %r1654, 19;
	mov.b64 	%rd3437, {%r1656, %r1655};
	shf.l.wrap.b32 	%r1657, %r1653, %r1654, 3;
	shf.l.wrap.b32 	%r1658, %r1654, %r1653, 3;
	mov.b64 	%rd3438, {%r1658, %r1657};
	shr.u64 	%rd3439, %rd21385, 6;
	xor.b64  	%rd3440, %rd3437, %rd3439;
	xor.b64  	%rd3441, %rd3440, %rd3438;
	shr.u64 	%rd3442, %rd21388, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1659,%dummy}, %rd21388;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1660}, %rd21388;
	}
	shf.r.wrap.b32 	%r1661, %r1660, %r1659, 1;
	shf.r.wrap.b32 	%r1662, %r1659, %r1660, 1;
	mov.b64 	%rd3443, {%r1662, %r1661};
	xor.b64  	%rd3444, %rd3443, %rd3442;
	shf.r.wrap.b32 	%r1663, %r1660, %r1659, 8;
	shf.r.wrap.b32 	%r1664, %r1659, %r1660, 8;
	mov.b64 	%rd3445, {%r1664, %r1663};
	xor.b64  	%rd3446, %rd3444, %rd3445;
	add.s64 	%rd3447, %rd21367, %rd21387;
	add.s64 	%rd3448, %rd3447, %rd3441;
	add.s64 	%rd21387, %rd3448, %rd3446;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1665,%dummy}, %rd21386;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1666}, %rd21386;
	}
	shf.r.wrap.b32 	%r1667, %r1666, %r1665, 19;
	shf.r.wrap.b32 	%r1668, %r1665, %r1666, 19;
	mov.b64 	%rd3449, {%r1668, %r1667};
	shf.l.wrap.b32 	%r1669, %r1665, %r1666, 3;
	shf.l.wrap.b32 	%r1670, %r1666, %r1665, 3;
	mov.b64 	%rd3450, {%r1670, %r1669};
	shr.u64 	%rd3451, %rd21386, 6;
	xor.b64  	%rd3452, %rd3449, %rd3451;
	xor.b64  	%rd3453, %rd3452, %rd3450;
	shr.u64 	%rd3454, %rd21389, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1671,%dummy}, %rd21389;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1672}, %rd21389;
	}
	shf.r.wrap.b32 	%r1673, %r1672, %r1671, 1;
	shf.r.wrap.b32 	%r1674, %r1671, %r1672, 1;
	mov.b64 	%rd3455, {%r1674, %r1673};
	xor.b64  	%rd3456, %rd3455, %rd3454;
	shf.r.wrap.b32 	%r1675, %r1672, %r1671, 8;
	shf.r.wrap.b32 	%r1676, %r1671, %r1672, 8;
	mov.b64 	%rd3457, {%r1676, %r1675};
	xor.b64  	%rd3458, %rd3456, %rd3457;
	add.s64 	%rd3459, %rd21366, %rd21388;
	add.s64 	%rd3460, %rd3459, %rd3453;
	add.s64 	%rd21388, %rd3460, %rd3458;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1677,%dummy}, %rd21387;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1678}, %rd21387;
	}
	shf.r.wrap.b32 	%r1679, %r1678, %r1677, 19;
	shf.r.wrap.b32 	%r1680, %r1677, %r1678, 19;
	mov.b64 	%rd3461, {%r1680, %r1679};
	shf.l.wrap.b32 	%r1681, %r1677, %r1678, 3;
	shf.l.wrap.b32 	%r1682, %r1678, %r1677, 3;
	mov.b64 	%rd3462, {%r1682, %r1681};
	shr.u64 	%rd3463, %rd21387, 6;
	xor.b64  	%rd3464, %rd3461, %rd3463;
	xor.b64  	%rd3465, %rd3464, %rd3462;
	shr.u64 	%rd3466, %rd21373, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1683,%dummy}, %rd21373;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1684}, %rd21373;
	}
	shf.r.wrap.b32 	%r1685, %r1684, %r1683, 1;
	shf.r.wrap.b32 	%r1686, %r1683, %r1684, 1;
	mov.b64 	%rd3467, {%r1686, %r1685};
	xor.b64  	%rd3468, %rd3467, %rd3466;
	shf.r.wrap.b32 	%r1687, %r1684, %r1683, 8;
	shf.r.wrap.b32 	%r1688, %r1683, %r1684, 8;
	mov.b64 	%rd3469, {%r1688, %r1687};
	xor.b64  	%rd3470, %rd3468, %rd3469;
	add.s64 	%rd3471, %rd21382, %rd21389;
	add.s64 	%rd3472, %rd3471, %rd3465;
	add.s64 	%rd21389, %rd3472, %rd3470;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1689,%dummy}, %rd21388;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1690}, %rd21388;
	}
	shf.r.wrap.b32 	%r1691, %r1690, %r1689, 19;
	shf.r.wrap.b32 	%r1692, %r1689, %r1690, 19;
	mov.b64 	%rd3473, {%r1692, %r1691};
	shf.l.wrap.b32 	%r1693, %r1689, %r1690, 3;
	shf.l.wrap.b32 	%r1694, %r1690, %r1689, 3;
	mov.b64 	%rd3474, {%r1694, %r1693};
	shr.u64 	%rd3475, %rd21388, 6;
	xor.b64  	%rd3476, %rd3473, %rd3475;
	xor.b64  	%rd3477, %rd3476, %rd3474;
	shr.u64 	%rd3478, %rd21372, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1695,%dummy}, %rd21372;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1696}, %rd21372;
	}
	shf.r.wrap.b32 	%r1697, %r1696, %r1695, 1;
	shf.r.wrap.b32 	%r1698, %r1695, %r1696, 1;
	mov.b64 	%rd3479, {%r1698, %r1697};
	xor.b64  	%rd3480, %rd3479, %rd3478;
	shf.r.wrap.b32 	%r1699, %r1696, %r1695, 8;
	shf.r.wrap.b32 	%r1700, %r1695, %r1696, 8;
	mov.b64 	%rd3481, {%r1700, %r1699};
	xor.b64  	%rd3482, %rd3480, %rd3481;
	add.s64 	%rd3483, %rd21383, %rd21373;
	add.s64 	%rd3484, %rd3483, %rd3477;
	add.s64 	%rd21373, %rd3484, %rd3482;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1701,%dummy}, %rd21389;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1702}, %rd21389;
	}
	shf.r.wrap.b32 	%r1703, %r1702, %r1701, 19;
	shf.r.wrap.b32 	%r1704, %r1701, %r1702, 19;
	mov.b64 	%rd3485, {%r1704, %r1703};
	shf.l.wrap.b32 	%r1705, %r1701, %r1702, 3;
	shf.l.wrap.b32 	%r1706, %r1702, %r1701, 3;
	mov.b64 	%rd3486, {%r1706, %r1705};
	shr.u64 	%rd3487, %rd21389, 6;
	xor.b64  	%rd3488, %rd3485, %rd3487;
	xor.b64  	%rd3489, %rd3488, %rd3486;
	shr.u64 	%rd3490, %rd21371, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1707,%dummy}, %rd21371;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1708}, %rd21371;
	}
	shf.r.wrap.b32 	%r1709, %r1708, %r1707, 1;
	shf.r.wrap.b32 	%r1710, %r1707, %r1708, 1;
	mov.b64 	%rd3491, {%r1710, %r1709};
	xor.b64  	%rd3492, %rd3491, %rd3490;
	shf.r.wrap.b32 	%r1711, %r1708, %r1707, 8;
	shf.r.wrap.b32 	%r1712, %r1707, %r1708, 8;
	mov.b64 	%rd3493, {%r1712, %r1711};
	xor.b64  	%rd3494, %rd3492, %rd3493;
	add.s64 	%rd3495, %rd21384, %rd21372;
	add.s64 	%rd3496, %rd3495, %rd3489;
	add.s64 	%rd21372, %rd3496, %rd3494;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1713,%dummy}, %rd21373;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1714}, %rd21373;
	}
	shf.r.wrap.b32 	%r1715, %r1714, %r1713, 19;
	shf.r.wrap.b32 	%r1716, %r1713, %r1714, 19;
	mov.b64 	%rd3497, {%r1716, %r1715};
	shf.l.wrap.b32 	%r1717, %r1713, %r1714, 3;
	shf.l.wrap.b32 	%r1718, %r1714, %r1713, 3;
	mov.b64 	%rd3498, {%r1718, %r1717};
	shr.u64 	%rd3499, %rd21373, 6;
	xor.b64  	%rd3500, %rd3497, %rd3499;
	xor.b64  	%rd3501, %rd3500, %rd3498;
	shr.u64 	%rd3502, %rd21370, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1719,%dummy}, %rd21370;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1720}, %rd21370;
	}
	shf.r.wrap.b32 	%r1721, %r1720, %r1719, 1;
	shf.r.wrap.b32 	%r1722, %r1719, %r1720, 1;
	mov.b64 	%rd3503, {%r1722, %r1721};
	xor.b64  	%rd3504, %rd3503, %rd3502;
	shf.r.wrap.b32 	%r1723, %r1720, %r1719, 8;
	shf.r.wrap.b32 	%r1724, %r1719, %r1720, 8;
	mov.b64 	%rd3505, {%r1724, %r1723};
	xor.b64  	%rd3506, %rd3504, %rd3505;
	add.s64 	%rd3507, %rd21385, %rd21371;
	add.s64 	%rd3508, %rd3507, %rd3501;
	add.s64 	%rd21371, %rd3508, %rd3506;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1725,%dummy}, %rd21372;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1726}, %rd21372;
	}
	shf.r.wrap.b32 	%r1727, %r1726, %r1725, 19;
	shf.r.wrap.b32 	%r1728, %r1725, %r1726, 19;
	mov.b64 	%rd3509, {%r1728, %r1727};
	shf.l.wrap.b32 	%r1729, %r1725, %r1726, 3;
	shf.l.wrap.b32 	%r1730, %r1726, %r1725, 3;
	mov.b64 	%rd3510, {%r1730, %r1729};
	shr.u64 	%rd3511, %rd21372, 6;
	xor.b64  	%rd3512, %rd3509, %rd3511;
	xor.b64  	%rd3513, %rd3512, %rd3510;
	shr.u64 	%rd3514, %rd21369, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1731,%dummy}, %rd21369;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1732}, %rd21369;
	}
	shf.r.wrap.b32 	%r1733, %r1732, %r1731, 1;
	shf.r.wrap.b32 	%r1734, %r1731, %r1732, 1;
	mov.b64 	%rd3515, {%r1734, %r1733};
	xor.b64  	%rd3516, %rd3515, %rd3514;
	shf.r.wrap.b32 	%r1735, %r1732, %r1731, 8;
	shf.r.wrap.b32 	%r1736, %r1731, %r1732, 8;
	mov.b64 	%rd3517, {%r1736, %r1735};
	xor.b64  	%rd3518, %rd3516, %rd3517;
	add.s64 	%rd3519, %rd21386, %rd21370;
	add.s64 	%rd3520, %rd3519, %rd3513;
	add.s64 	%rd21370, %rd3520, %rd3518;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1737,%dummy}, %rd21371;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1738}, %rd21371;
	}
	shf.r.wrap.b32 	%r1739, %r1738, %r1737, 19;
	shf.r.wrap.b32 	%r1740, %r1737, %r1738, 19;
	mov.b64 	%rd3521, {%r1740, %r1739};
	shf.l.wrap.b32 	%r1741, %r1737, %r1738, 3;
	shf.l.wrap.b32 	%r1742, %r1738, %r1737, 3;
	mov.b64 	%rd3522, {%r1742, %r1741};
	shr.u64 	%rd3523, %rd21371, 6;
	xor.b64  	%rd3524, %rd3521, %rd3523;
	xor.b64  	%rd3525, %rd3524, %rd3522;
	shr.u64 	%rd3526, %rd21368, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1743,%dummy}, %rd21368;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1744}, %rd21368;
	}
	shf.r.wrap.b32 	%r1745, %r1744, %r1743, 1;
	shf.r.wrap.b32 	%r1746, %r1743, %r1744, 1;
	mov.b64 	%rd3527, {%r1746, %r1745};
	xor.b64  	%rd3528, %rd3527, %rd3526;
	shf.r.wrap.b32 	%r1747, %r1744, %r1743, 8;
	shf.r.wrap.b32 	%r1748, %r1743, %r1744, 8;
	mov.b64 	%rd3529, {%r1748, %r1747};
	xor.b64  	%rd3530, %rd3528, %rd3529;
	add.s64 	%rd3531, %rd21387, %rd21369;
	add.s64 	%rd3532, %rd3531, %rd3525;
	add.s64 	%rd21369, %rd3532, %rd3530;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1749,%dummy}, %rd21370;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1750}, %rd21370;
	}
	shf.r.wrap.b32 	%r1751, %r1750, %r1749, 19;
	shf.r.wrap.b32 	%r1752, %r1749, %r1750, 19;
	mov.b64 	%rd3533, {%r1752, %r1751};
	shf.l.wrap.b32 	%r1753, %r1749, %r1750, 3;
	shf.l.wrap.b32 	%r1754, %r1750, %r1749, 3;
	mov.b64 	%rd3534, {%r1754, %r1753};
	shr.u64 	%rd3535, %rd21370, 6;
	xor.b64  	%rd3536, %rd3533, %rd3535;
	xor.b64  	%rd3537, %rd3536, %rd3534;
	shr.u64 	%rd3538, %rd21367, 7;
	shf.r.wrap.b32 	%r1755, %r1594, %r1593, 1;
	shf.r.wrap.b32 	%r1756, %r1593, %r1594, 1;
	mov.b64 	%rd3539, {%r1756, %r1755};
	xor.b64  	%rd3540, %rd3539, %rd3538;
	shf.r.wrap.b32 	%r1757, %r1594, %r1593, 8;
	shf.r.wrap.b32 	%r1758, %r1593, %r1594, 8;
	mov.b64 	%rd3541, {%r1758, %r1757};
	xor.b64  	%rd3542, %rd3540, %rd3541;
	add.s64 	%rd3543, %rd21388, %rd21368;
	add.s64 	%rd3544, %rd3543, %rd3537;
	add.s64 	%rd21368, %rd3544, %rd3542;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1759,%dummy}, %rd21369;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1760}, %rd21369;
	}
	shf.r.wrap.b32 	%r1761, %r1760, %r1759, 19;
	shf.r.wrap.b32 	%r1762, %r1759, %r1760, 19;
	mov.b64 	%rd3545, {%r1762, %r1761};
	shf.l.wrap.b32 	%r1763, %r1759, %r1760, 3;
	shf.l.wrap.b32 	%r1764, %r1760, %r1759, 3;
	mov.b64 	%rd3546, {%r1764, %r1763};
	shr.u64 	%rd3547, %rd21369, 6;
	xor.b64  	%rd3548, %rd3545, %rd3547;
	xor.b64  	%rd3549, %rd3548, %rd3546;
	shr.u64 	%rd3550, %rd21366, 7;
	shf.r.wrap.b32 	%r1765, %r1606, %r1605, 1;
	shf.r.wrap.b32 	%r1766, %r1605, %r1606, 1;
	mov.b64 	%rd3551, {%r1766, %r1765};
	xor.b64  	%rd3552, %rd3551, %rd3550;
	shf.r.wrap.b32 	%r1767, %r1606, %r1605, 8;
	shf.r.wrap.b32 	%r1768, %r1605, %r1606, 8;
	mov.b64 	%rd3553, {%r1768, %r1767};
	xor.b64  	%rd3554, %rd3552, %rd3553;
	add.s64 	%rd3555, %rd21389, %rd21367;
	add.s64 	%rd3556, %rd3555, %rd3549;
	add.s64 	%rd21367, %rd3556, %rd3554;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1769,%dummy}, %rd21368;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1770}, %rd21368;
	}
	shf.r.wrap.b32 	%r1771, %r1770, %r1769, 19;
	shf.r.wrap.b32 	%r1772, %r1769, %r1770, 19;
	mov.b64 	%rd3557, {%r1772, %r1771};
	shf.l.wrap.b32 	%r1773, %r1769, %r1770, 3;
	shf.l.wrap.b32 	%r1774, %r1770, %r1769, 3;
	mov.b64 	%rd3558, {%r1774, %r1773};
	shr.u64 	%rd3559, %rd21368, 6;
	xor.b64  	%rd3560, %rd3557, %rd3559;
	xor.b64  	%rd3561, %rd3560, %rd3558;
	shf.r.wrap.b32 	%r1775, %r1618, %r1617, 1;
	shf.r.wrap.b32 	%r1776, %r1617, %r1618, 1;
	mov.b64 	%rd3562, {%r1776, %r1775};
	shf.r.wrap.b32 	%r1777, %r1618, %r1617, 8;
	shf.r.wrap.b32 	%r1778, %r1617, %r1618, 8;
	mov.b64 	%rd3563, {%r1778, %r1777};
	shr.u64 	%rd3564, %rd21382, 7;
	xor.b64  	%rd3565, %rd3562, %rd3564;
	xor.b64  	%rd3566, %rd3565, %rd3563;
	add.s64 	%rd3567, %rd21373, %rd21366;
	add.s64 	%rd3568, %rd3567, %rd3561;
	add.s64 	%rd21366, %rd3568, %rd3566;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1779,%dummy}, %rd21378;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1780}, %rd21378;
	}
	shf.r.wrap.b32 	%r1781, %r1780, %r1779, 18;
	shf.r.wrap.b32 	%r1782, %r1779, %r1780, 18;
	mov.b64 	%rd3569, {%r1782, %r1781};
	shf.r.wrap.b32 	%r1783, %r1780, %r1779, 14;
	shf.r.wrap.b32 	%r1784, %r1779, %r1780, 14;
	mov.b64 	%rd3570, {%r1784, %r1783};
	xor.b64  	%rd3571, %rd3569, %rd3570;
	shf.l.wrap.b32 	%r1785, %r1779, %r1780, 23;
	shf.l.wrap.b32 	%r1786, %r1780, %r1779, 23;
	mov.b64 	%rd3572, {%r1786, %r1785};
	xor.b64  	%rd3573, %rd3571, %rd3572;
	xor.b64  	%rd3574, %rd21379, %rd21380;
	and.b64  	%rd3575, %rd3574, %rd21378;
	xor.b64  	%rd3576, %rd3575, %rd21380;
	add.s64 	%rd3577, %rd3576, %rd21381;
	add.s64 	%rd3578, %rd3577, %rd21382;
	add.s64 	%rd176, %rd21365, 128;
	ld.const.u64 	%rd3579, [%rd21365+128];
	add.s64 	%rd3580, %rd3578, %rd3579;
	add.s64 	%rd3581, %rd3580, %rd3573;
	add.s64 	%rd3582, %rd3581, %rd21377;
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1787}, %rd21374;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1788,%dummy}, %rd21374;
	}
	shf.l.wrap.b32 	%r1789, %r1788, %r1787, 30;
	shf.l.wrap.b32 	%r1790, %r1787, %r1788, 30;
	mov.b64 	%rd3583, {%r1790, %r1789};
	shf.r.wrap.b32 	%r1791, %r1787, %r1788, 28;
	shf.r.wrap.b32 	%r1792, %r1788, %r1787, 28;
	mov.b64 	%rd3584, {%r1792, %r1791};
	xor.b64  	%rd3585, %rd3583, %rd3584;
	shf.l.wrap.b32 	%r1793, %r1788, %r1787, 25;
	shf.l.wrap.b32 	%r1794, %r1787, %r1788, 25;
	mov.b64 	%rd3586, {%r1794, %r1793};
	xor.b64  	%rd3587, %rd3585, %rd3586;
	xor.b64  	%rd3588, %rd21374, %rd21375;
	xor.b64  	%rd3589, %rd21374, %rd21376;
	and.b64  	%rd3590, %rd3588, %rd3589;
	xor.b64  	%rd3591, %rd3590, %rd21374;
	add.s64 	%rd3592, %rd3581, %rd3591;
	add.s64 	%rd3593, %rd3592, %rd3587;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1795,%dummy}, %rd3582;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1796}, %rd3582;
	}
	shf.r.wrap.b32 	%r1797, %r1796, %r1795, 14;
	shf.r.wrap.b32 	%r1798, %r1795, %r1796, 14;
	mov.b64 	%rd3594, {%r1798, %r1797};
	shf.r.wrap.b32 	%r1799, %r1796, %r1795, 18;
	shf.r.wrap.b32 	%r1800, %r1795, %r1796, 18;
	mov.b64 	%rd3595, {%r1800, %r1799};
	xor.b64  	%rd3596, %rd3595, %rd3594;
	shf.l.wrap.b32 	%r1801, %r1795, %r1796, 23;
	shf.l.wrap.b32 	%r1802, %r1796, %r1795, 23;
	mov.b64 	%rd3597, {%r1802, %r1801};
	xor.b64  	%rd3598, %rd3596, %rd3597;
	xor.b64  	%rd3599, %rd21378, %rd21379;
	and.b64  	%rd3600, %rd3582, %rd3599;
	xor.b64  	%rd3601, %rd3600, %rd21379;
	add.s64 	%rd3602, %rd21383, %rd21380;
	ld.const.u64 	%rd3603, [%rd21365+136];
	add.s64 	%rd3604, %rd3602, %rd3603;
	add.s64 	%rd3605, %rd3604, %rd3601;
	add.s64 	%rd3606, %rd3605, %rd3598;
	add.s64 	%rd3607, %rd3606, %rd21376;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1803,%dummy}, %rd3593;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1804}, %rd3593;
	}
	shf.r.wrap.b32 	%r1805, %r1804, %r1803, 28;
	shf.r.wrap.b32 	%r1806, %r1803, %r1804, 28;
	mov.b64 	%rd3608, {%r1806, %r1805};
	shf.l.wrap.b32 	%r1807, %r1803, %r1804, 30;
	shf.l.wrap.b32 	%r1808, %r1804, %r1803, 30;
	mov.b64 	%rd3609, {%r1808, %r1807};
	xor.b64  	%rd3610, %rd3609, %rd3608;
	shf.l.wrap.b32 	%r1809, %r1803, %r1804, 25;
	shf.l.wrap.b32 	%r1810, %r1804, %r1803, 25;
	mov.b64 	%rd3611, {%r1810, %r1809};
	xor.b64  	%rd3612, %rd3610, %rd3611;
	xor.b64  	%rd3613, %rd3593, %rd21375;
	xor.b64  	%rd3614, %rd3593, %rd21374;
	and.b64  	%rd3615, %rd3614, %rd3613;
	xor.b64  	%rd3616, %rd3615, %rd3593;
	add.s64 	%rd3617, %rd3606, %rd3616;
	add.s64 	%rd3618, %rd3617, %rd3612;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1811,%dummy}, %rd3607;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1812}, %rd3607;
	}
	shf.r.wrap.b32 	%r1813, %r1812, %r1811, 14;
	shf.r.wrap.b32 	%r1814, %r1811, %r1812, 14;
	mov.b64 	%rd3619, {%r1814, %r1813};
	shf.r.wrap.b32 	%r1815, %r1812, %r1811, 18;
	shf.r.wrap.b32 	%r1816, %r1811, %r1812, 18;
	mov.b64 	%rd3620, {%r1816, %r1815};
	xor.b64  	%rd3621, %rd3620, %rd3619;
	shf.l.wrap.b32 	%r1817, %r1811, %r1812, 23;
	shf.l.wrap.b32 	%r1818, %r1812, %r1811, 23;
	mov.b64 	%rd3622, {%r1818, %r1817};
	xor.b64  	%rd3623, %rd3621, %rd3622;
	xor.b64  	%rd3624, %rd3582, %rd21378;
	and.b64  	%rd3625, %rd3607, %rd3624;
	xor.b64  	%rd3626, %rd3625, %rd21378;
	add.s64 	%rd3627, %rd21384, %rd21379;
	ld.const.u64 	%rd3628, [%rd21365+144];
	add.s64 	%rd3629, %rd3627, %rd3628;
	add.s64 	%rd3630, %rd3629, %rd3626;
	add.s64 	%rd3631, %rd3630, %rd3623;
	add.s64 	%rd3632, %rd3631, %rd21375;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1819,%dummy}, %rd3618;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1820}, %rd3618;
	}
	shf.r.wrap.b32 	%r1821, %r1820, %r1819, 28;
	shf.r.wrap.b32 	%r1822, %r1819, %r1820, 28;
	mov.b64 	%rd3633, {%r1822, %r1821};
	shf.l.wrap.b32 	%r1823, %r1819, %r1820, 30;
	shf.l.wrap.b32 	%r1824, %r1820, %r1819, 30;
	mov.b64 	%rd3634, {%r1824, %r1823};
	xor.b64  	%rd3635, %rd3634, %rd3633;
	shf.l.wrap.b32 	%r1825, %r1819, %r1820, 25;
	shf.l.wrap.b32 	%r1826, %r1820, %r1819, 25;
	mov.b64 	%rd3636, {%r1826, %r1825};
	xor.b64  	%rd3637, %rd3635, %rd3636;
	xor.b64  	%rd3638, %rd3618, %rd21374;
	xor.b64  	%rd3639, %rd3618, %rd3593;
	and.b64  	%rd3640, %rd3639, %rd3638;
	xor.b64  	%rd3641, %rd3640, %rd3618;
	add.s64 	%rd3642, %rd3631, %rd3641;
	add.s64 	%rd3643, %rd3642, %rd3637;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1827,%dummy}, %rd3632;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1828}, %rd3632;
	}
	shf.r.wrap.b32 	%r1829, %r1828, %r1827, 14;
	shf.r.wrap.b32 	%r1830, %r1827, %r1828, 14;
	mov.b64 	%rd3644, {%r1830, %r1829};
	shf.r.wrap.b32 	%r1831, %r1828, %r1827, 18;
	shf.r.wrap.b32 	%r1832, %r1827, %r1828, 18;
	mov.b64 	%rd3645, {%r1832, %r1831};
	xor.b64  	%rd3646, %rd3645, %rd3644;
	shf.l.wrap.b32 	%r1833, %r1827, %r1828, 23;
	shf.l.wrap.b32 	%r1834, %r1828, %r1827, 23;
	mov.b64 	%rd3647, {%r1834, %r1833};
	xor.b64  	%rd3648, %rd3646, %rd3647;
	xor.b64  	%rd3649, %rd3607, %rd3582;
	and.b64  	%rd3650, %rd3632, %rd3649;
	xor.b64  	%rd3651, %rd3650, %rd3582;
	add.s64 	%rd3652, %rd21385, %rd21378;
	ld.const.u64 	%rd3653, [%rd21365+152];
	add.s64 	%rd3654, %rd3652, %rd3653;
	add.s64 	%rd3655, %rd3654, %rd3651;
	add.s64 	%rd3656, %rd3655, %rd3648;
	add.s64 	%rd3657, %rd3656, %rd21374;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1835,%dummy}, %rd3643;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1836}, %rd3643;
	}
	shf.r.wrap.b32 	%r1837, %r1836, %r1835, 28;
	shf.r.wrap.b32 	%r1838, %r1835, %r1836, 28;
	mov.b64 	%rd3658, {%r1838, %r1837};
	shf.l.wrap.b32 	%r1839, %r1835, %r1836, 30;
	shf.l.wrap.b32 	%r1840, %r1836, %r1835, 30;
	mov.b64 	%rd3659, {%r1840, %r1839};
	xor.b64  	%rd3660, %rd3659, %rd3658;
	shf.l.wrap.b32 	%r1841, %r1835, %r1836, 25;
	shf.l.wrap.b32 	%r1842, %r1836, %r1835, 25;
	mov.b64 	%rd3661, {%r1842, %r1841};
	xor.b64  	%rd3662, %rd3660, %rd3661;
	xor.b64  	%rd3663, %rd3643, %rd3593;
	xor.b64  	%rd3664, %rd3643, %rd3618;
	and.b64  	%rd3665, %rd3664, %rd3663;
	xor.b64  	%rd3666, %rd3665, %rd3643;
	add.s64 	%rd3667, %rd3656, %rd3666;
	add.s64 	%rd3668, %rd3667, %rd3662;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1843,%dummy}, %rd3657;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1844}, %rd3657;
	}
	shf.r.wrap.b32 	%r1845, %r1844, %r1843, 14;
	shf.r.wrap.b32 	%r1846, %r1843, %r1844, 14;
	mov.b64 	%rd3669, {%r1846, %r1845};
	shf.r.wrap.b32 	%r1847, %r1844, %r1843, 18;
	shf.r.wrap.b32 	%r1848, %r1843, %r1844, 18;
	mov.b64 	%rd3670, {%r1848, %r1847};
	xor.b64  	%rd3671, %rd3670, %rd3669;
	shf.l.wrap.b32 	%r1849, %r1843, %r1844, 23;
	shf.l.wrap.b32 	%r1850, %r1844, %r1843, 23;
	mov.b64 	%rd3672, {%r1850, %r1849};
	xor.b64  	%rd3673, %rd3671, %rd3672;
	xor.b64  	%rd3674, %rd3632, %rd3607;
	and.b64  	%rd3675, %rd3657, %rd3674;
	xor.b64  	%rd3676, %rd3675, %rd3607;
	add.s64 	%rd3677, %rd3582, %rd21386;
	ld.const.u64 	%rd3678, [%rd21365+160];
	add.s64 	%rd3679, %rd3677, %rd3678;
	add.s64 	%rd3680, %rd3679, %rd3676;
	add.s64 	%rd3681, %rd3680, %rd3673;
	add.s64 	%rd3682, %rd3681, %rd3593;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1851,%dummy}, %rd3668;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1852}, %rd3668;
	}
	shf.r.wrap.b32 	%r1853, %r1852, %r1851, 28;
	shf.r.wrap.b32 	%r1854, %r1851, %r1852, 28;
	mov.b64 	%rd3683, {%r1854, %r1853};
	shf.l.wrap.b32 	%r1855, %r1851, %r1852, 30;
	shf.l.wrap.b32 	%r1856, %r1852, %r1851, 30;
	mov.b64 	%rd3684, {%r1856, %r1855};
	xor.b64  	%rd3685, %rd3684, %rd3683;
	shf.l.wrap.b32 	%r1857, %r1851, %r1852, 25;
	shf.l.wrap.b32 	%r1858, %r1852, %r1851, 25;
	mov.b64 	%rd3686, {%r1858, %r1857};
	xor.b64  	%rd3687, %rd3685, %rd3686;
	xor.b64  	%rd3688, %rd3668, %rd3618;
	xor.b64  	%rd3689, %rd3668, %rd3643;
	and.b64  	%rd3690, %rd3689, %rd3688;
	xor.b64  	%rd3691, %rd3690, %rd3668;
	add.s64 	%rd3692, %rd3681, %rd3691;
	add.s64 	%rd3693, %rd3692, %rd3687;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1859,%dummy}, %rd3682;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1860}, %rd3682;
	}
	shf.r.wrap.b32 	%r1861, %r1860, %r1859, 14;
	shf.r.wrap.b32 	%r1862, %r1859, %r1860, 14;
	mov.b64 	%rd3694, {%r1862, %r1861};
	shf.r.wrap.b32 	%r1863, %r1860, %r1859, 18;
	shf.r.wrap.b32 	%r1864, %r1859, %r1860, 18;
	mov.b64 	%rd3695, {%r1864, %r1863};
	xor.b64  	%rd3696, %rd3695, %rd3694;
	shf.l.wrap.b32 	%r1865, %r1859, %r1860, 23;
	shf.l.wrap.b32 	%r1866, %r1860, %r1859, 23;
	mov.b64 	%rd3697, {%r1866, %r1865};
	xor.b64  	%rd3698, %rd3696, %rd3697;
	xor.b64  	%rd3699, %rd3657, %rd3632;
	and.b64  	%rd3700, %rd3682, %rd3699;
	xor.b64  	%rd3701, %rd3700, %rd3632;
	add.s64 	%rd3702, %rd3607, %rd21387;
	ld.const.u64 	%rd3703, [%rd21365+168];
	add.s64 	%rd3704, %rd3702, %rd3703;
	add.s64 	%rd3705, %rd3704, %rd3701;
	add.s64 	%rd3706, %rd3705, %rd3698;
	add.s64 	%rd3707, %rd3706, %rd3618;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1867,%dummy}, %rd3693;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1868}, %rd3693;
	}
	shf.r.wrap.b32 	%r1869, %r1868, %r1867, 28;
	shf.r.wrap.b32 	%r1870, %r1867, %r1868, 28;
	mov.b64 	%rd3708, {%r1870, %r1869};
	shf.l.wrap.b32 	%r1871, %r1867, %r1868, 30;
	shf.l.wrap.b32 	%r1872, %r1868, %r1867, 30;
	mov.b64 	%rd3709, {%r1872, %r1871};
	xor.b64  	%rd3710, %rd3709, %rd3708;
	shf.l.wrap.b32 	%r1873, %r1867, %r1868, 25;
	shf.l.wrap.b32 	%r1874, %r1868, %r1867, 25;
	mov.b64 	%rd3711, {%r1874, %r1873};
	xor.b64  	%rd3712, %rd3710, %rd3711;
	xor.b64  	%rd3713, %rd3693, %rd3643;
	xor.b64  	%rd3714, %rd3693, %rd3668;
	and.b64  	%rd3715, %rd3714, %rd3713;
	xor.b64  	%rd3716, %rd3715, %rd3693;
	add.s64 	%rd3717, %rd3706, %rd3716;
	add.s64 	%rd3718, %rd3717, %rd3712;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1875,%dummy}, %rd3707;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1876}, %rd3707;
	}
	shf.r.wrap.b32 	%r1877, %r1876, %r1875, 14;
	shf.r.wrap.b32 	%r1878, %r1875, %r1876, 14;
	mov.b64 	%rd3719, {%r1878, %r1877};
	shf.r.wrap.b32 	%r1879, %r1876, %r1875, 18;
	shf.r.wrap.b32 	%r1880, %r1875, %r1876, 18;
	mov.b64 	%rd3720, {%r1880, %r1879};
	xor.b64  	%rd3721, %rd3720, %rd3719;
	shf.l.wrap.b32 	%r1881, %r1875, %r1876, 23;
	shf.l.wrap.b32 	%r1882, %r1876, %r1875, 23;
	mov.b64 	%rd3722, {%r1882, %r1881};
	xor.b64  	%rd3723, %rd3721, %rd3722;
	xor.b64  	%rd3724, %rd3682, %rd3657;
	and.b64  	%rd3725, %rd3707, %rd3724;
	xor.b64  	%rd3726, %rd3725, %rd3657;
	add.s64 	%rd3727, %rd3632, %rd21388;
	ld.const.u64 	%rd3728, [%rd21365+176];
	add.s64 	%rd3729, %rd3727, %rd3728;
	add.s64 	%rd3730, %rd3729, %rd3726;
	add.s64 	%rd3731, %rd3730, %rd3723;
	add.s64 	%rd3732, %rd3731, %rd3643;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1883,%dummy}, %rd3718;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1884}, %rd3718;
	}
	shf.r.wrap.b32 	%r1885, %r1884, %r1883, 28;
	shf.r.wrap.b32 	%r1886, %r1883, %r1884, 28;
	mov.b64 	%rd3733, {%r1886, %r1885};
	shf.l.wrap.b32 	%r1887, %r1883, %r1884, 30;
	shf.l.wrap.b32 	%r1888, %r1884, %r1883, 30;
	mov.b64 	%rd3734, {%r1888, %r1887};
	xor.b64  	%rd3735, %rd3734, %rd3733;
	shf.l.wrap.b32 	%r1889, %r1883, %r1884, 25;
	shf.l.wrap.b32 	%r1890, %r1884, %r1883, 25;
	mov.b64 	%rd3736, {%r1890, %r1889};
	xor.b64  	%rd3737, %rd3735, %rd3736;
	xor.b64  	%rd3738, %rd3718, %rd3668;
	xor.b64  	%rd3739, %rd3718, %rd3693;
	and.b64  	%rd3740, %rd3739, %rd3738;
	xor.b64  	%rd3741, %rd3740, %rd3718;
	add.s64 	%rd3742, %rd3731, %rd3741;
	add.s64 	%rd3743, %rd3742, %rd3737;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1891,%dummy}, %rd3732;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1892}, %rd3732;
	}
	shf.r.wrap.b32 	%r1893, %r1892, %r1891, 14;
	shf.r.wrap.b32 	%r1894, %r1891, %r1892, 14;
	mov.b64 	%rd3744, {%r1894, %r1893};
	shf.r.wrap.b32 	%r1895, %r1892, %r1891, 18;
	shf.r.wrap.b32 	%r1896, %r1891, %r1892, 18;
	mov.b64 	%rd3745, {%r1896, %r1895};
	xor.b64  	%rd3746, %rd3745, %rd3744;
	shf.l.wrap.b32 	%r1897, %r1891, %r1892, 23;
	shf.l.wrap.b32 	%r1898, %r1892, %r1891, 23;
	mov.b64 	%rd3747, {%r1898, %r1897};
	xor.b64  	%rd3748, %rd3746, %rd3747;
	xor.b64  	%rd3749, %rd3707, %rd3682;
	and.b64  	%rd3750, %rd3732, %rd3749;
	xor.b64  	%rd3751, %rd3750, %rd3682;
	add.s64 	%rd3752, %rd3657, %rd21389;
	ld.const.u64 	%rd3753, [%rd21365+184];
	add.s64 	%rd3754, %rd3752, %rd3753;
	add.s64 	%rd3755, %rd3754, %rd3751;
	add.s64 	%rd3756, %rd3755, %rd3748;
	add.s64 	%rd3757, %rd3756, %rd3668;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1899,%dummy}, %rd3743;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1900}, %rd3743;
	}
	shf.r.wrap.b32 	%r1901, %r1900, %r1899, 28;
	shf.r.wrap.b32 	%r1902, %r1899, %r1900, 28;
	mov.b64 	%rd3758, {%r1902, %r1901};
	shf.l.wrap.b32 	%r1903, %r1899, %r1900, 30;
	shf.l.wrap.b32 	%r1904, %r1900, %r1899, 30;
	mov.b64 	%rd3759, {%r1904, %r1903};
	xor.b64  	%rd3760, %rd3759, %rd3758;
	shf.l.wrap.b32 	%r1905, %r1899, %r1900, 25;
	shf.l.wrap.b32 	%r1906, %r1900, %r1899, 25;
	mov.b64 	%rd3761, {%r1906, %r1905};
	xor.b64  	%rd3762, %rd3760, %rd3761;
	xor.b64  	%rd3763, %rd3743, %rd3693;
	xor.b64  	%rd3764, %rd3743, %rd3718;
	and.b64  	%rd3765, %rd3764, %rd3763;
	xor.b64  	%rd3766, %rd3765, %rd3743;
	add.s64 	%rd3767, %rd3756, %rd3766;
	add.s64 	%rd3768, %rd3767, %rd3762;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1907,%dummy}, %rd3757;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1908}, %rd3757;
	}
	shf.r.wrap.b32 	%r1909, %r1908, %r1907, 14;
	shf.r.wrap.b32 	%r1910, %r1907, %r1908, 14;
	mov.b64 	%rd3769, {%r1910, %r1909};
	shf.r.wrap.b32 	%r1911, %r1908, %r1907, 18;
	shf.r.wrap.b32 	%r1912, %r1907, %r1908, 18;
	mov.b64 	%rd3770, {%r1912, %r1911};
	xor.b64  	%rd3771, %rd3770, %rd3769;
	shf.l.wrap.b32 	%r1913, %r1907, %r1908, 23;
	shf.l.wrap.b32 	%r1914, %r1908, %r1907, 23;
	mov.b64 	%rd3772, {%r1914, %r1913};
	xor.b64  	%rd3773, %rd3771, %rd3772;
	xor.b64  	%rd3774, %rd3732, %rd3707;
	and.b64  	%rd3775, %rd3757, %rd3774;
	xor.b64  	%rd3776, %rd3775, %rd3707;
	add.s64 	%rd3777, %rd3682, %rd21373;
	ld.const.u64 	%rd3778, [%rd21365+192];
	add.s64 	%rd3779, %rd3777, %rd3778;
	add.s64 	%rd3780, %rd3779, %rd3776;
	add.s64 	%rd3781, %rd3780, %rd3773;
	add.s64 	%rd3782, %rd3781, %rd3693;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1915,%dummy}, %rd3768;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1916}, %rd3768;
	}
	shf.r.wrap.b32 	%r1917, %r1916, %r1915, 28;
	shf.r.wrap.b32 	%r1918, %r1915, %r1916, 28;
	mov.b64 	%rd3783, {%r1918, %r1917};
	shf.l.wrap.b32 	%r1919, %r1915, %r1916, 30;
	shf.l.wrap.b32 	%r1920, %r1916, %r1915, 30;
	mov.b64 	%rd3784, {%r1920, %r1919};
	xor.b64  	%rd3785, %rd3784, %rd3783;
	shf.l.wrap.b32 	%r1921, %r1915, %r1916, 25;
	shf.l.wrap.b32 	%r1922, %r1916, %r1915, 25;
	mov.b64 	%rd3786, {%r1922, %r1921};
	xor.b64  	%rd3787, %rd3785, %rd3786;
	xor.b64  	%rd3788, %rd3768, %rd3718;
	xor.b64  	%rd3789, %rd3768, %rd3743;
	and.b64  	%rd3790, %rd3789, %rd3788;
	xor.b64  	%rd3791, %rd3790, %rd3768;
	add.s64 	%rd3792, %rd3781, %rd3791;
	add.s64 	%rd3793, %rd3792, %rd3787;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1923,%dummy}, %rd3782;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1924}, %rd3782;
	}
	shf.r.wrap.b32 	%r1925, %r1924, %r1923, 14;
	shf.r.wrap.b32 	%r1926, %r1923, %r1924, 14;
	mov.b64 	%rd3794, {%r1926, %r1925};
	shf.r.wrap.b32 	%r1927, %r1924, %r1923, 18;
	shf.r.wrap.b32 	%r1928, %r1923, %r1924, 18;
	mov.b64 	%rd3795, {%r1928, %r1927};
	xor.b64  	%rd3796, %rd3795, %rd3794;
	shf.l.wrap.b32 	%r1929, %r1923, %r1924, 23;
	shf.l.wrap.b32 	%r1930, %r1924, %r1923, 23;
	mov.b64 	%rd3797, {%r1930, %r1929};
	xor.b64  	%rd3798, %rd3796, %rd3797;
	xor.b64  	%rd3799, %rd3757, %rd3732;
	and.b64  	%rd3800, %rd3782, %rd3799;
	xor.b64  	%rd3801, %rd3800, %rd3732;
	add.s64 	%rd3802, %rd3707, %rd21372;
	ld.const.u64 	%rd3803, [%rd21365+200];
	add.s64 	%rd3804, %rd3802, %rd3803;
	add.s64 	%rd3805, %rd3804, %rd3801;
	add.s64 	%rd3806, %rd3805, %rd3798;
	add.s64 	%rd3807, %rd3806, %rd3718;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1931,%dummy}, %rd3793;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1932}, %rd3793;
	}
	shf.r.wrap.b32 	%r1933, %r1932, %r1931, 28;
	shf.r.wrap.b32 	%r1934, %r1931, %r1932, 28;
	mov.b64 	%rd3808, {%r1934, %r1933};
	shf.l.wrap.b32 	%r1935, %r1931, %r1932, 30;
	shf.l.wrap.b32 	%r1936, %r1932, %r1931, 30;
	mov.b64 	%rd3809, {%r1936, %r1935};
	xor.b64  	%rd3810, %rd3809, %rd3808;
	shf.l.wrap.b32 	%r1937, %r1931, %r1932, 25;
	shf.l.wrap.b32 	%r1938, %r1932, %r1931, 25;
	mov.b64 	%rd3811, {%r1938, %r1937};
	xor.b64  	%rd3812, %rd3810, %rd3811;
	xor.b64  	%rd3813, %rd3793, %rd3743;
	xor.b64  	%rd3814, %rd3793, %rd3768;
	and.b64  	%rd3815, %rd3814, %rd3813;
	xor.b64  	%rd3816, %rd3815, %rd3793;
	add.s64 	%rd3817, %rd3806, %rd3816;
	add.s64 	%rd3818, %rd3817, %rd3812;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1939,%dummy}, %rd3807;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1940}, %rd3807;
	}
	shf.r.wrap.b32 	%r1941, %r1940, %r1939, 14;
	shf.r.wrap.b32 	%r1942, %r1939, %r1940, 14;
	mov.b64 	%rd3819, {%r1942, %r1941};
	shf.r.wrap.b32 	%r1943, %r1940, %r1939, 18;
	shf.r.wrap.b32 	%r1944, %r1939, %r1940, 18;
	mov.b64 	%rd3820, {%r1944, %r1943};
	xor.b64  	%rd3821, %rd3820, %rd3819;
	shf.l.wrap.b32 	%r1945, %r1939, %r1940, 23;
	shf.l.wrap.b32 	%r1946, %r1940, %r1939, 23;
	mov.b64 	%rd3822, {%r1946, %r1945};
	xor.b64  	%rd3823, %rd3821, %rd3822;
	xor.b64  	%rd3824, %rd3782, %rd3757;
	and.b64  	%rd3825, %rd3807, %rd3824;
	xor.b64  	%rd3826, %rd3825, %rd3757;
	add.s64 	%rd3827, %rd3732, %rd21371;
	ld.const.u64 	%rd3828, [%rd21365+208];
	add.s64 	%rd3829, %rd3827, %rd3828;
	add.s64 	%rd3830, %rd3829, %rd3826;
	add.s64 	%rd3831, %rd3830, %rd3823;
	add.s64 	%rd3832, %rd3831, %rd3743;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1947,%dummy}, %rd3818;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1948}, %rd3818;
	}
	shf.r.wrap.b32 	%r1949, %r1948, %r1947, 28;
	shf.r.wrap.b32 	%r1950, %r1947, %r1948, 28;
	mov.b64 	%rd3833, {%r1950, %r1949};
	shf.l.wrap.b32 	%r1951, %r1947, %r1948, 30;
	shf.l.wrap.b32 	%r1952, %r1948, %r1947, 30;
	mov.b64 	%rd3834, {%r1952, %r1951};
	xor.b64  	%rd3835, %rd3834, %rd3833;
	shf.l.wrap.b32 	%r1953, %r1947, %r1948, 25;
	shf.l.wrap.b32 	%r1954, %r1948, %r1947, 25;
	mov.b64 	%rd3836, {%r1954, %r1953};
	xor.b64  	%rd3837, %rd3835, %rd3836;
	xor.b64  	%rd3838, %rd3818, %rd3768;
	xor.b64  	%rd3839, %rd3818, %rd3793;
	and.b64  	%rd3840, %rd3839, %rd3838;
	xor.b64  	%rd3841, %rd3840, %rd3818;
	add.s64 	%rd3842, %rd3831, %rd3841;
	add.s64 	%rd3843, %rd3842, %rd3837;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1955,%dummy}, %rd3832;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1956}, %rd3832;
	}
	shf.r.wrap.b32 	%r1957, %r1956, %r1955, 14;
	shf.r.wrap.b32 	%r1958, %r1955, %r1956, 14;
	mov.b64 	%rd3844, {%r1958, %r1957};
	shf.r.wrap.b32 	%r1959, %r1956, %r1955, 18;
	shf.r.wrap.b32 	%r1960, %r1955, %r1956, 18;
	mov.b64 	%rd3845, {%r1960, %r1959};
	xor.b64  	%rd3846, %rd3845, %rd3844;
	shf.l.wrap.b32 	%r1961, %r1955, %r1956, 23;
	shf.l.wrap.b32 	%r1962, %r1956, %r1955, 23;
	mov.b64 	%rd3847, {%r1962, %r1961};
	xor.b64  	%rd3848, %rd3846, %rd3847;
	xor.b64  	%rd3849, %rd3807, %rd3782;
	and.b64  	%rd3850, %rd3832, %rd3849;
	xor.b64  	%rd3851, %rd3850, %rd3782;
	add.s64 	%rd3852, %rd3757, %rd21370;
	ld.const.u64 	%rd3853, [%rd21365+216];
	add.s64 	%rd3854, %rd3852, %rd3853;
	add.s64 	%rd3855, %rd3854, %rd3851;
	add.s64 	%rd3856, %rd3855, %rd3848;
	add.s64 	%rd3857, %rd3856, %rd3768;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1963,%dummy}, %rd3843;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1964}, %rd3843;
	}
	shf.r.wrap.b32 	%r1965, %r1964, %r1963, 28;
	shf.r.wrap.b32 	%r1966, %r1963, %r1964, 28;
	mov.b64 	%rd3858, {%r1966, %r1965};
	shf.l.wrap.b32 	%r1967, %r1963, %r1964, 30;
	shf.l.wrap.b32 	%r1968, %r1964, %r1963, 30;
	mov.b64 	%rd3859, {%r1968, %r1967};
	xor.b64  	%rd3860, %rd3859, %rd3858;
	shf.l.wrap.b32 	%r1969, %r1963, %r1964, 25;
	shf.l.wrap.b32 	%r1970, %r1964, %r1963, 25;
	mov.b64 	%rd3861, {%r1970, %r1969};
	xor.b64  	%rd3862, %rd3860, %rd3861;
	xor.b64  	%rd3863, %rd3843, %rd3793;
	xor.b64  	%rd3864, %rd3843, %rd3818;
	and.b64  	%rd3865, %rd3864, %rd3863;
	xor.b64  	%rd3866, %rd3865, %rd3843;
	add.s64 	%rd3867, %rd3856, %rd3866;
	add.s64 	%rd3868, %rd3867, %rd3862;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1971,%dummy}, %rd3857;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1972}, %rd3857;
	}
	shf.r.wrap.b32 	%r1973, %r1972, %r1971, 14;
	shf.r.wrap.b32 	%r1974, %r1971, %r1972, 14;
	mov.b64 	%rd3869, {%r1974, %r1973};
	shf.r.wrap.b32 	%r1975, %r1972, %r1971, 18;
	shf.r.wrap.b32 	%r1976, %r1971, %r1972, 18;
	mov.b64 	%rd3870, {%r1976, %r1975};
	xor.b64  	%rd3871, %rd3870, %rd3869;
	shf.l.wrap.b32 	%r1977, %r1971, %r1972, 23;
	shf.l.wrap.b32 	%r1978, %r1972, %r1971, 23;
	mov.b64 	%rd3872, {%r1978, %r1977};
	xor.b64  	%rd3873, %rd3871, %rd3872;
	xor.b64  	%rd3874, %rd3832, %rd3807;
	and.b64  	%rd3875, %rd3857, %rd3874;
	xor.b64  	%rd3876, %rd3875, %rd3807;
	add.s64 	%rd3877, %rd3782, %rd21369;
	ld.const.u64 	%rd3878, [%rd21365+224];
	add.s64 	%rd3879, %rd3877, %rd3878;
	add.s64 	%rd3880, %rd3879, %rd3876;
	add.s64 	%rd3881, %rd3880, %rd3873;
	add.s64 	%rd21381, %rd3881, %rd3793;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1979,%dummy}, %rd3868;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1980}, %rd3868;
	}
	shf.r.wrap.b32 	%r1981, %r1980, %r1979, 28;
	shf.r.wrap.b32 	%r1982, %r1979, %r1980, 28;
	mov.b64 	%rd3882, {%r1982, %r1981};
	shf.l.wrap.b32 	%r1983, %r1979, %r1980, 30;
	shf.l.wrap.b32 	%r1984, %r1980, %r1979, 30;
	mov.b64 	%rd3883, {%r1984, %r1983};
	xor.b64  	%rd3884, %rd3883, %rd3882;
	shf.l.wrap.b32 	%r1985, %r1979, %r1980, 25;
	shf.l.wrap.b32 	%r1986, %r1980, %r1979, 25;
	mov.b64 	%rd3885, {%r1986, %r1985};
	xor.b64  	%rd3886, %rd3884, %rd3885;
	xor.b64  	%rd3887, %rd3868, %rd3818;
	xor.b64  	%rd3888, %rd3868, %rd3843;
	and.b64  	%rd3889, %rd3888, %rd3887;
	xor.b64  	%rd3890, %rd3889, %rd3868;
	add.s64 	%rd3891, %rd3881, %rd3890;
	add.s64 	%rd21377, %rd3891, %rd3886;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1987,%dummy}, %rd21381;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1988}, %rd21381;
	}
	shf.r.wrap.b32 	%r1989, %r1988, %r1987, 14;
	shf.r.wrap.b32 	%r1990, %r1987, %r1988, 14;
	mov.b64 	%rd3892, {%r1990, %r1989};
	shf.r.wrap.b32 	%r1991, %r1988, %r1987, 18;
	shf.r.wrap.b32 	%r1992, %r1987, %r1988, 18;
	mov.b64 	%rd3893, {%r1992, %r1991};
	xor.b64  	%rd3894, %rd3893, %rd3892;
	shf.l.wrap.b32 	%r1993, %r1987, %r1988, 23;
	shf.l.wrap.b32 	%r1994, %r1988, %r1987, 23;
	mov.b64 	%rd3895, {%r1994, %r1993};
	xor.b64  	%rd3896, %rd3894, %rd3895;
	xor.b64  	%rd3897, %rd3857, %rd3832;
	and.b64  	%rd3898, %rd21381, %rd3897;
	xor.b64  	%rd3899, %rd3898, %rd3832;
	add.s64 	%rd3900, %rd3807, %rd21368;
	ld.const.u64 	%rd3901, [%rd21365+232];
	add.s64 	%rd3902, %rd3900, %rd3901;
	add.s64 	%rd3903, %rd3902, %rd3899;
	add.s64 	%rd3904, %rd3903, %rd3896;
	add.s64 	%rd21380, %rd3904, %rd3818;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1995,%dummy}, %rd21377;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1996}, %rd21377;
	}
	shf.r.wrap.b32 	%r1997, %r1996, %r1995, 28;
	shf.r.wrap.b32 	%r1998, %r1995, %r1996, 28;
	mov.b64 	%rd3905, {%r1998, %r1997};
	shf.l.wrap.b32 	%r1999, %r1995, %r1996, 30;
	shf.l.wrap.b32 	%r2000, %r1996, %r1995, 30;
	mov.b64 	%rd3906, {%r2000, %r1999};
	xor.b64  	%rd3907, %rd3906, %rd3905;
	shf.l.wrap.b32 	%r2001, %r1995, %r1996, 25;
	shf.l.wrap.b32 	%r2002, %r1996, %r1995, 25;
	mov.b64 	%rd3908, {%r2002, %r2001};
	xor.b64  	%rd3909, %rd3907, %rd3908;
	xor.b64  	%rd3910, %rd21377, %rd3843;
	xor.b64  	%rd3911, %rd21377, %rd3868;
	and.b64  	%rd3912, %rd3911, %rd3910;
	xor.b64  	%rd3913, %rd3912, %rd21377;
	add.s64 	%rd3914, %rd3904, %rd3913;
	add.s64 	%rd21376, %rd3914, %rd3909;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2003,%dummy}, %rd21380;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2004}, %rd21380;
	}
	shf.r.wrap.b32 	%r2005, %r2004, %r2003, 14;
	shf.r.wrap.b32 	%r2006, %r2003, %r2004, 14;
	mov.b64 	%rd3915, {%r2006, %r2005};
	shf.r.wrap.b32 	%r2007, %r2004, %r2003, 18;
	shf.r.wrap.b32 	%r2008, %r2003, %r2004, 18;
	mov.b64 	%rd3916, {%r2008, %r2007};
	xor.b64  	%rd3917, %rd3916, %rd3915;
	shf.l.wrap.b32 	%r2009, %r2003, %r2004, 23;
	shf.l.wrap.b32 	%r2010, %r2004, %r2003, 23;
	mov.b64 	%rd3918, {%r2010, %r2009};
	xor.b64  	%rd3919, %rd3917, %rd3918;
	xor.b64  	%rd3920, %rd21381, %rd3857;
	and.b64  	%rd3921, %rd21380, %rd3920;
	xor.b64  	%rd3922, %rd3921, %rd3857;
	add.s64 	%rd3923, %rd3832, %rd21367;
	ld.const.u64 	%rd3924, [%rd21365+240];
	add.s64 	%rd3925, %rd3923, %rd3924;
	add.s64 	%rd3926, %rd3925, %rd3922;
	add.s64 	%rd3927, %rd3926, %rd3919;
	add.s64 	%rd21379, %rd3927, %rd3843;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2011,%dummy}, %rd21376;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2012}, %rd21376;
	}
	shf.r.wrap.b32 	%r2013, %r2012, %r2011, 28;
	shf.r.wrap.b32 	%r2014, %r2011, %r2012, 28;
	mov.b64 	%rd3928, {%r2014, %r2013};
	shf.l.wrap.b32 	%r2015, %r2011, %r2012, 30;
	shf.l.wrap.b32 	%r2016, %r2012, %r2011, 30;
	mov.b64 	%rd3929, {%r2016, %r2015};
	xor.b64  	%rd3930, %rd3929, %rd3928;
	shf.l.wrap.b32 	%r2017, %r2011, %r2012, 25;
	shf.l.wrap.b32 	%r2018, %r2012, %r2011, 25;
	mov.b64 	%rd3931, {%r2018, %r2017};
	xor.b64  	%rd3932, %rd3930, %rd3931;
	xor.b64  	%rd3933, %rd21376, %rd3868;
	xor.b64  	%rd3934, %rd21376, %rd21377;
	and.b64  	%rd3935, %rd3934, %rd3933;
	xor.b64  	%rd3936, %rd3935, %rd21376;
	add.s64 	%rd3937, %rd3927, %rd3936;
	add.s64 	%rd21375, %rd3937, %rd3932;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2019,%dummy}, %rd21379;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2020}, %rd21379;
	}
	shf.r.wrap.b32 	%r2021, %r2020, %r2019, 14;
	shf.r.wrap.b32 	%r2022, %r2019, %r2020, 14;
	mov.b64 	%rd3938, {%r2022, %r2021};
	shf.r.wrap.b32 	%r2023, %r2020, %r2019, 18;
	shf.r.wrap.b32 	%r2024, %r2019, %r2020, 18;
	mov.b64 	%rd3939, {%r2024, %r2023};
	xor.b64  	%rd3940, %rd3939, %rd3938;
	shf.l.wrap.b32 	%r2025, %r2019, %r2020, 23;
	shf.l.wrap.b32 	%r2026, %r2020, %r2019, 23;
	mov.b64 	%rd3941, {%r2026, %r2025};
	xor.b64  	%rd3942, %rd3940, %rd3941;
	xor.b64  	%rd3943, %rd21380, %rd21381;
	and.b64  	%rd3944, %rd21379, %rd3943;
	xor.b64  	%rd3945, %rd3944, %rd21381;
	add.s64 	%rd3946, %rd3857, %rd21366;
	ld.const.u64 	%rd3947, [%rd21365+248];
	add.s64 	%rd3948, %rd3946, %rd3947;
	add.s64 	%rd3949, %rd3948, %rd3945;
	add.s64 	%rd3950, %rd3949, %rd3942;
	add.s64 	%rd21378, %rd3950, %rd3868;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2027,%dummy}, %rd21375;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2028}, %rd21375;
	}
	shf.r.wrap.b32 	%r2029, %r2028, %r2027, 28;
	shf.r.wrap.b32 	%r2030, %r2027, %r2028, 28;
	mov.b64 	%rd3951, {%r2030, %r2029};
	shf.l.wrap.b32 	%r2031, %r2027, %r2028, 30;
	shf.l.wrap.b32 	%r2032, %r2028, %r2027, 30;
	mov.b64 	%rd3952, {%r2032, %r2031};
	xor.b64  	%rd3953, %rd3952, %rd3951;
	shf.l.wrap.b32 	%r2033, %r2027, %r2028, 25;
	shf.l.wrap.b32 	%r2034, %r2028, %r2027, 25;
	mov.b64 	%rd3954, {%r2034, %r2033};
	xor.b64  	%rd3955, %rd3953, %rd3954;
	xor.b64  	%rd3956, %rd21375, %rd21377;
	xor.b64  	%rd3957, %rd21375, %rd21376;
	and.b64  	%rd3958, %rd3957, %rd3956;
	xor.b64  	%rd3959, %rd3958, %rd21375;
	add.s64 	%rd3960, %rd3950, %rd3959;
	add.s64 	%rd21374, %rd3960, %rd3955;
	add.s32 	%r14313, %r14313, 16;
	setp.lt.s32	%p23, %r14313, 80;
	mov.u64 	%rd21365, %rd176;
	@%p23 bra 	BB3_34;

	add.s64 	%rd3961, %rd116, %rd21374;
	st.local.u64 	[%rd1], %rd3961;
	add.s64 	%rd3962, %rd118, %rd21375;
	st.local.u64 	[%rd1+8], %rd3962;
	add.s64 	%rd3963, %rd117, %rd21376;
	st.local.u64 	[%rd1+16], %rd3963;
	add.s64 	%rd3964, %rd115, %rd21377;
	st.local.u64 	[%rd1+24], %rd3964;
	add.s64 	%rd3965, %rd111, %rd21378;
	st.local.u64 	[%rd1+32], %rd3965;
	add.s64 	%rd3966, %rd113, %rd21379;
	st.local.u64 	[%rd1+40], %rd3966;
	add.s64 	%rd3967, %rd112, %rd21380;
	st.local.u64 	[%rd1+48], %rd3967;
	add.s64 	%rd3968, %rd114, %rd21381;
	st.local.u64 	[%rd1+56], %rd3968;
	sub.s32 	%r49, %r3, %r29;
	setp.lt.s32	%p24, %r49, 1;
	@%p24 bra 	BB3_53;

	add.s32 	%r50, %r28, -128;
	and.b32  	%r51, %r50, 3;
	setp.eq.s32	%p25, %r51, 0;
	mov.u32 	%r14317, 0;
	@%p25 bra 	BB3_42;

	setp.eq.s32	%p26, %r51, 1;
	mov.u32 	%r14315, 0;
	@%p26 bra 	BB3_41;

	setp.eq.s32	%p27, %r51, 2;
	mov.u32 	%r14314, 0;
	@%p27 bra 	BB3_40;

	xor.b32  	%r2039, %r29, 7;
	cvt.u64.u32	%rd3969, %r2039;
	add.s64 	%rd3970, %rd1808, %rd3969;
	ld.local.u8 	%rs45, [%rd3970];
	st.local.u8 	[%rd93+7], %rs45;
	mov.u32 	%r14314, 1;

BB3_40:
	add.s32 	%r2040, %r14314, %r29;
	xor.b32  	%r2041, %r2040, 7;
	cvt.s64.s32	%rd3971, %r2041;
	add.s64 	%rd3972, %rd1808, %rd3971;
	ld.local.u8 	%rs46, [%rd3972];
	xor.b32  	%r2042, %r14314, 7;
	cvt.u64.u32	%rd3973, %r2042;
	add.s64 	%rd3974, %rd93, %rd3973;
	st.local.u8 	[%rd3974], %rs46;
	add.s32 	%r14315, %r14314, 1;

BB3_41:
	add.s32 	%r2043, %r14315, %r29;
	xor.b32  	%r2044, %r2043, 7;
	cvt.s64.s32	%rd3975, %r2044;
	add.s64 	%rd3976, %rd1808, %rd3975;
	ld.local.u8 	%rs47, [%rd3976];
	xor.b32  	%r2045, %r14315, 7;
	cvt.s64.s32	%rd3977, %r2045;
	add.s64 	%rd3978, %rd93, %rd3977;
	st.local.u8 	[%rd3978], %rs47;
	add.s32 	%r14317, %r14315, 1;

BB3_42:
	setp.lt.u32	%p28, %r50, 4;
	@%p28 bra 	BB3_53;

BB3_43:
	add.s32 	%r2046, %r14317, %r29;
	xor.b32  	%r2047, %r2046, 7;
	cvt.s64.s32	%rd3979, %r2047;
	add.s64 	%rd3980, %rd1808, %rd3979;
	ld.local.u8 	%rs48, [%rd3980];
	xor.b32  	%r2048, %r14317, 7;
	cvt.s64.s32	%rd3981, %r2048;
	add.s64 	%rd3982, %rd93, %rd3981;
	st.local.u8 	[%rd3982], %rs48;
	add.s32 	%r2049, %r14317, 1;
	add.s32 	%r2050, %r2049, %r29;
	xor.b32  	%r2051, %r2050, 7;
	cvt.s64.s32	%rd3983, %r2051;
	add.s64 	%rd3984, %rd1808, %rd3983;
	ld.local.u8 	%rs49, [%rd3984];
	xor.b32  	%r2052, %r2049, 7;
	cvt.s64.s32	%rd3985, %r2052;
	add.s64 	%rd3986, %rd93, %rd3985;
	st.local.u8 	[%rd3986], %rs49;
	add.s32 	%r2053, %r14317, 2;
	add.s32 	%r2054, %r2053, %r29;
	xor.b32  	%r2055, %r2054, 7;
	cvt.s64.s32	%rd3987, %r2055;
	add.s64 	%rd3988, %rd1808, %rd3987;
	ld.local.u8 	%rs50, [%rd3988];
	xor.b32  	%r2056, %r2053, 7;
	cvt.s64.s32	%rd3989, %r2056;
	add.s64 	%rd3990, %rd93, %rd3989;
	st.local.u8 	[%rd3990], %rs50;
	add.s32 	%r2057, %r14317, 3;
	add.s32 	%r2058, %r2057, %r29;
	xor.b32  	%r2059, %r2058, 7;
	cvt.s64.s32	%rd3991, %r2059;
	add.s64 	%rd3992, %rd1808, %rd3991;
	ld.local.u8 	%rs51, [%rd3992];
	xor.b32  	%r2060, %r2057, 7;
	cvt.s64.s32	%rd3993, %r2060;
	add.s64 	%rd3994, %rd93, %rd3993;
	st.local.u8 	[%rd3994], %rs51;
	add.s32 	%r14317, %r14317, 4;
	setp.lt.s32	%p29, %r14317, %r49;
	@%p29 bra 	BB3_43;

BB3_53:
	ld.local.u32 	%r2085, [%rd1+192];
	and.b32  	%r74, %r2085, 127;
	add.s32 	%r2086, %r2085, %r2;
	st.local.u32 	[%rd1+192], %r2086;
	add.s32 	%r75, %r74, %r2;
	setp.lt.s32	%p36, %r75, 128;
	add.s64 	%rd179, %rd1, 64;
	@%p36 bra 	BB3_74;
	bra.uni 	BB3_54;

BB3_74:
	setp.lt.s32	%p49, %r2, 1;
	@%p49 bra 	BB3_83;

	cvta.to.local.u64 	%rd263, %rd1805;
	and.b32  	%r106, %r2, 3;
	setp.eq.s32	%p50, %r106, 0;
	mov.u32 	%r14346, 0;
	@%p50 bra 	BB3_81;

	setp.eq.s32	%p51, %r106, 1;
	mov.u32 	%r14342, 0;
	@%p51 bra 	BB3_80;

	setp.eq.s32	%p52, %r106, 2;
	mov.u32 	%r14340, 0;
	@%p52 bra 	BB3_79;

	ld.local.u8 	%rs73, [%rd263+7];
	xor.b32  	%r2841, %r74, 7;
	cvt.u64.u32	%rd5093, %r2841;
	add.s64 	%rd5094, %rd179, %rd5093;
	st.local.u8 	[%rd5094], %rs73;
	add.s32 	%r74, %r74, 1;
	mov.u32 	%r14340, 1;

BB3_79:
	xor.b32  	%r2842, %r14340, 7;
	cvt.u64.u32	%rd5095, %r2842;
	add.s64 	%rd5096, %rd263, %rd5095;
	ld.local.u8 	%rs74, [%rd5096];
	xor.b32  	%r2843, %r74, 7;
	cvt.s64.s32	%rd5097, %r2843;
	add.s64 	%rd5098, %rd179, %rd5097;
	st.local.u8 	[%rd5098], %rs74;
	add.s32 	%r74, %r74, 1;
	add.s32 	%r14342, %r14340, 1;

BB3_80:
	xor.b32  	%r2844, %r14342, 7;
	cvt.s64.s32	%rd5099, %r2844;
	add.s64 	%rd5100, %rd263, %rd5099;
	ld.local.u8 	%rs75, [%rd5100];
	xor.b32  	%r2845, %r74, 7;
	cvt.s64.s32	%rd5101, %r2845;
	add.s64 	%rd5102, %rd179, %rd5101;
	st.local.u8 	[%rd5102], %rs75;
	add.s32 	%r74, %r74, 1;
	add.s32 	%r14346, %r14342, 1;

BB3_81:
	setp.lt.u32	%p53, %r2, 4;
	@%p53 bra 	BB3_83;

BB3_82:
	xor.b32  	%r2846, %r14346, 7;
	cvt.s64.s32	%rd5103, %r2846;
	add.s64 	%rd5104, %rd263, %rd5103;
	ld.local.u8 	%rs76, [%rd5104];
	xor.b32  	%r2847, %r74, 7;
	cvt.s64.s32	%rd5105, %r2847;
	add.s64 	%rd5106, %rd179, %rd5105;
	st.local.u8 	[%rd5106], %rs76;
	add.s32 	%r2848, %r14346, 1;
	xor.b32  	%r2849, %r2848, 7;
	cvt.s64.s32	%rd5107, %r2849;
	add.s64 	%rd5108, %rd263, %rd5107;
	ld.local.u8 	%rs77, [%rd5108];
	add.s32 	%r2850, %r74, 1;
	xor.b32  	%r2851, %r2850, 7;
	cvt.s64.s32	%rd5109, %r2851;
	add.s64 	%rd5110, %rd179, %rd5109;
	st.local.u8 	[%rd5110], %rs77;
	add.s32 	%r2852, %r14346, 2;
	xor.b32  	%r2853, %r2852, 7;
	cvt.s64.s32	%rd5111, %r2853;
	add.s64 	%rd5112, %rd263, %rd5111;
	ld.local.u8 	%rs78, [%rd5112];
	add.s32 	%r2854, %r74, 2;
	xor.b32  	%r2855, %r2854, 7;
	cvt.s64.s32	%rd5113, %r2855;
	add.s64 	%rd5114, %rd179, %rd5113;
	st.local.u8 	[%rd5114], %rs78;
	add.s32 	%r2856, %r14346, 3;
	xor.b32  	%r2857, %r2856, 7;
	cvt.s64.s32	%rd5115, %r2857;
	add.s64 	%rd5116, %rd263, %rd5115;
	ld.local.u8 	%rs79, [%rd5116];
	add.s32 	%r2858, %r74, 3;
	xor.b32  	%r2859, %r2858, 7;
	cvt.s64.s32	%rd5117, %r2859;
	add.s64 	%rd5118, %rd179, %rd5117;
	st.local.u8 	[%rd5118], %rs79;
	add.s32 	%r14346, %r14346, 4;
	setp.lt.s32	%p54, %r14346, %r2;
	add.s32 	%r74, %r74, 4;
	@%p54 bra 	BB3_82;
	bra.uni 	BB3_83;

BB3_54:
	mov.u32 	%r2088, 128;
	sub.s32 	%r76, %r2088, %r74;
	cvta.to.local.u64 	%rd180, %rd1805;
	mov.u32 	%r2089, 1;
	max.u32 	%r77, %r76, %r2089;
	and.b32  	%r78, %r77, 3;
	setp.eq.s32	%p37, %r78, 0;
	mov.u32 	%r14332, 0;
	@%p37 bra 	BB3_61;

	setp.eq.s32	%p38, %r78, 1;
	mov.u32 	%r14328, 0;
	@%p38 bra 	BB3_60;

	setp.eq.s32	%p39, %r78, 2;
	mov.u32 	%r2091, 0;
	@%p39 bra 	BB3_57;
	bra.uni 	BB3_58;

BB3_57:
	mov.u32 	%r2089, %r2091;
	bra.uni 	BB3_59;

BB3_58:
	ld.local.u8 	%rs59, [%rd180+7];
	xor.b32  	%r2093, %r74, 7;
	cvt.u64.u32	%rd4023, %r2093;
	add.s64 	%rd4024, %rd179, %rd4023;
	st.local.u8 	[%rd4024], %rs59;
	add.s32 	%r74, %r74, 1;

BB3_59:
	xor.b32  	%r2094, %r2089, 7;
	cvt.u64.u32	%rd4025, %r2094;
	add.s64 	%rd4026, %rd180, %rd4025;
	ld.local.u8 	%rs60, [%rd4026];
	xor.b32  	%r2095, %r74, 7;
	cvt.s64.s32	%rd4027, %r2095;
	add.s64 	%rd4028, %rd179, %rd4027;
	st.local.u8 	[%rd4028], %rs60;
	add.s32 	%r74, %r74, 1;
	add.s32 	%r14328, %r2089, 1;

BB3_60:
	xor.b32  	%r2096, %r14328, 7;
	cvt.s64.s32	%rd4029, %r2096;
	add.s64 	%rd4030, %rd180, %rd4029;
	ld.local.u8 	%rs61, [%rd4030];
	xor.b32  	%r2097, %r74, 7;
	cvt.s64.s32	%rd4031, %r2097;
	add.s64 	%rd4032, %rd179, %rd4031;
	st.local.u8 	[%rd4032], %rs61;
	add.s32 	%r74, %r74, 1;
	add.s32 	%r14332, %r14328, 1;

BB3_61:
	setp.lt.u32	%p40, %r77, 4;
	@%p40 bra 	BB3_63;

BB3_62:
	xor.b32  	%r2098, %r14332, 7;
	cvt.s64.s32	%rd4033, %r2098;
	add.s64 	%rd4034, %rd180, %rd4033;
	ld.local.u8 	%rs62, [%rd4034];
	xor.b32  	%r2099, %r74, 7;
	cvt.s64.s32	%rd4035, %r2099;
	add.s64 	%rd4036, %rd179, %rd4035;
	st.local.u8 	[%rd4036], %rs62;
	add.s32 	%r2100, %r14332, 1;
	xor.b32  	%r2101, %r2100, 7;
	cvt.s64.s32	%rd4037, %r2101;
	add.s64 	%rd4038, %rd180, %rd4037;
	ld.local.u8 	%rs63, [%rd4038];
	add.s32 	%r2102, %r74, 1;
	xor.b32  	%r2103, %r2102, 7;
	cvt.s64.s32	%rd4039, %r2103;
	add.s64 	%rd4040, %rd179, %rd4039;
	st.local.u8 	[%rd4040], %rs63;
	add.s32 	%r2104, %r14332, 2;
	xor.b32  	%r2105, %r2104, 7;
	cvt.s64.s32	%rd4041, %r2105;
	add.s64 	%rd4042, %rd180, %rd4041;
	ld.local.u8 	%rs64, [%rd4042];
	add.s32 	%r2106, %r74, 2;
	xor.b32  	%r2107, %r2106, 7;
	cvt.s64.s32	%rd4043, %r2107;
	add.s64 	%rd4044, %rd179, %rd4043;
	st.local.u8 	[%rd4044], %rs64;
	add.s32 	%r2108, %r14332, 3;
	xor.b32  	%r2109, %r2108, 7;
	cvt.s64.s32	%rd4045, %r2109;
	add.s64 	%rd4046, %rd180, %rd4045;
	ld.local.u8 	%rs65, [%rd4046];
	add.s32 	%r2110, %r74, 3;
	xor.b32  	%r2111, %r2110, 7;
	cvt.s64.s32	%rd4047, %r2111;
	add.s64 	%rd4048, %rd179, %rd4047;
	st.local.u8 	[%rd4048], %rs65;
	add.s32 	%r14332, %r14332, 4;
	setp.lt.s32	%p41, %r14332, %r76;
	add.s32 	%r74, %r74, 4;
	@%p41 bra 	BB3_62;

BB3_63:
	ld.local.u64 	%rd4050, [%rd1+64];
	shr.u64 	%rd4051, %rd4050, 32;
	ld.local.u64 	%rd4052, [%rd1+72];
	shr.u64 	%rd4053, %rd4052, 32;
	ld.local.u64 	%rd4054, [%rd1+80];
	shr.u64 	%rd4055, %rd4054, 32;
	ld.local.u64 	%rd4056, [%rd1+88];
	shr.u64 	%rd4057, %rd4056, 32;
	ld.local.u64 	%rd4058, [%rd1+96];
	shr.u64 	%rd4059, %rd4058, 32;
	ld.local.u64 	%rd4060, [%rd1+104];
	shr.u64 	%rd4061, %rd4060, 32;
	ld.local.u64 	%rd4062, [%rd1+112];
	shr.u64 	%rd4063, %rd4062, 32;
	ld.local.u64 	%rd4064, [%rd1+120];
	shr.u64 	%rd4065, %rd4064, 32;
	ld.local.u64 	%rd4066, [%rd1+128];
	shr.u64 	%rd4067, %rd4066, 32;
	ld.local.u64 	%rd4068, [%rd1+136];
	shr.u64 	%rd4069, %rd4068, 32;
	ld.local.u64 	%rd4070, [%rd1+144];
	shr.u64 	%rd4071, %rd4070, 32;
	ld.local.u64 	%rd4072, [%rd1+152];
	shr.u64 	%rd4073, %rd4072, 32;
	ld.local.u64 	%rd4074, [%rd1+160];
	shr.u64 	%rd4075, %rd4074, 32;
	ld.local.u64 	%rd4076, [%rd1+168];
	shr.u64 	%rd4077, %rd4076, 32;
	ld.local.u64 	%rd4078, [%rd1+176];
	shr.u64 	%rd4079, %rd4078, 32;
	ld.local.u64 	%rd4080, [%rd1+184];
	shr.u64 	%rd4081, %rd4080, 32;
	bfi.b64 	%rd21407, %rd4051, %rd4050, 32, 32;
	bfi.b64 	%rd21408, %rd4053, %rd4052, 32, 32;
	bfi.b64 	%rd21409, %rd4055, %rd4054, 32, 32;
	bfi.b64 	%rd21410, %rd4057, %rd4056, 32, 32;
	bfi.b64 	%rd21411, %rd4059, %rd4058, 32, 32;
	bfi.b64 	%rd21412, %rd4061, %rd4060, 32, 32;
	bfi.b64 	%rd21413, %rd4063, %rd4062, 32, 32;
	bfi.b64 	%rd21414, %rd4065, %rd4064, 32, 32;
	bfi.b64 	%rd21398, %rd4067, %rd4066, 32, 32;
	bfi.b64 	%rd21397, %rd4069, %rd4068, 32, 32;
	bfi.b64 	%rd21396, %rd4071, %rd4070, 32, 32;
	bfi.b64 	%rd21395, %rd4073, %rd4072, 32, 32;
	bfi.b64 	%rd21394, %rd4075, %rd4074, 32, 32;
	bfi.b64 	%rd21393, %rd4077, %rd4076, 32, 32;
	bfi.b64 	%rd21392, %rd4079, %rd4078, 32, 32;
	bfi.b64 	%rd21391, %rd4081, %rd4080, 32, 32;
	ld.local.u64 	%rd197, [%rd1+32];
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2113,%dummy}, %rd197;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2114}, %rd197;
	}
	shf.r.wrap.b32 	%r2115, %r2114, %r2113, 14;
	shf.r.wrap.b32 	%r2116, %r2113, %r2114, 14;
	mov.b64 	%rd4082, {%r2116, %r2115};
	shf.r.wrap.b32 	%r2117, %r2114, %r2113, 18;
	shf.r.wrap.b32 	%r2118, %r2113, %r2114, 18;
	mov.b64 	%rd4083, {%r2118, %r2117};
	xor.b64  	%rd4084, %rd4083, %rd4082;
	shf.l.wrap.b32 	%r2119, %r2113, %r2114, 23;
	shf.l.wrap.b32 	%r2120, %r2114, %r2113, 23;
	mov.b64 	%rd4085, {%r2120, %r2119};
	xor.b64  	%rd4086, %rd4084, %rd4085;
	ld.local.u64 	%rd198, [%rd1+48];
	ld.local.u64 	%rd199, [%rd1+40];
	xor.b64  	%rd4087, %rd198, %rd199;
	and.b64  	%rd4088, %rd4087, %rd197;
	xor.b64  	%rd4089, %rd4088, %rd198;
	ld.local.u64 	%rd200, [%rd1+56];
	add.s64 	%rd4090, %rd200, %rd21407;
	mov.u64 	%rd21390, k_sha512;
	ld.const.u64 	%rd4091, [k_sha512];
	add.s64 	%rd4092, %rd4090, %rd4091;
	add.s64 	%rd4093, %rd4092, %rd4089;
	add.s64 	%rd4094, %rd4093, %rd4086;
	ld.local.u64 	%rd201, [%rd1+24];
	add.s64 	%rd4095, %rd4094, %rd201;
	ld.local.u64 	%rd202, [%rd1];
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2121,%dummy}, %rd202;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2122}, %rd202;
	}
	shf.r.wrap.b32 	%r2123, %r2122, %r2121, 28;
	shf.r.wrap.b32 	%r2124, %r2121, %r2122, 28;
	mov.b64 	%rd4096, {%r2124, %r2123};
	shf.l.wrap.b32 	%r2125, %r2121, %r2122, 30;
	shf.l.wrap.b32 	%r2126, %r2122, %r2121, 30;
	mov.b64 	%rd4097, {%r2126, %r2125};
	xor.b64  	%rd4098, %rd4097, %rd4096;
	shf.l.wrap.b32 	%r2127, %r2121, %r2122, 25;
	shf.l.wrap.b32 	%r2128, %r2122, %r2121, 25;
	mov.b64 	%rd4099, {%r2128, %r2127};
	xor.b64  	%rd4100, %rd4098, %rd4099;
	ld.local.u64 	%rd203, [%rd1+16];
	xor.b64  	%rd4101, %rd203, %rd202;
	ld.local.u64 	%rd204, [%rd1+8];
	xor.b64  	%rd4102, %rd204, %rd202;
	and.b64  	%rd4103, %rd4101, %rd4102;
	xor.b64  	%rd4104, %rd4103, %rd202;
	add.s64 	%rd4105, %rd4094, %rd4104;
	add.s64 	%rd4106, %rd4105, %rd4100;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2129,%dummy}, %rd4095;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2130}, %rd4095;
	}
	shf.r.wrap.b32 	%r2131, %r2130, %r2129, 14;
	shf.r.wrap.b32 	%r2132, %r2129, %r2130, 14;
	mov.b64 	%rd4107, {%r2132, %r2131};
	shf.r.wrap.b32 	%r2133, %r2130, %r2129, 18;
	shf.r.wrap.b32 	%r2134, %r2129, %r2130, 18;
	mov.b64 	%rd4108, {%r2134, %r2133};
	xor.b64  	%rd4109, %rd4108, %rd4107;
	shf.l.wrap.b32 	%r2135, %r2129, %r2130, 23;
	shf.l.wrap.b32 	%r2136, %r2130, %r2129, 23;
	mov.b64 	%rd4110, {%r2136, %r2135};
	xor.b64  	%rd4111, %rd4109, %rd4110;
	xor.b64  	%rd4112, %rd199, %rd197;
	and.b64  	%rd4113, %rd4095, %rd4112;
	xor.b64  	%rd4114, %rd4113, %rd199;
	add.s64 	%rd4115, %rd198, %rd21408;
	ld.const.u64 	%rd4116, [k_sha512+8];
	add.s64 	%rd4117, %rd4115, %rd4116;
	add.s64 	%rd4118, %rd4117, %rd4114;
	add.s64 	%rd4119, %rd4118, %rd4111;
	add.s64 	%rd4120, %rd4119, %rd203;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2137,%dummy}, %rd4106;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2138}, %rd4106;
	}
	shf.r.wrap.b32 	%r2139, %r2138, %r2137, 28;
	shf.r.wrap.b32 	%r2140, %r2137, %r2138, 28;
	mov.b64 	%rd4121, {%r2140, %r2139};
	shf.l.wrap.b32 	%r2141, %r2137, %r2138, 30;
	shf.l.wrap.b32 	%r2142, %r2138, %r2137, 30;
	mov.b64 	%rd4122, {%r2142, %r2141};
	xor.b64  	%rd4123, %rd4122, %rd4121;
	shf.l.wrap.b32 	%r2143, %r2137, %r2138, 25;
	shf.l.wrap.b32 	%r2144, %r2138, %r2137, 25;
	mov.b64 	%rd4124, {%r2144, %r2143};
	xor.b64  	%rd4125, %rd4123, %rd4124;
	xor.b64  	%rd4126, %rd4106, %rd204;
	xor.b64  	%rd4127, %rd4106, %rd202;
	and.b64  	%rd4128, %rd4127, %rd4126;
	xor.b64  	%rd4129, %rd4128, %rd4106;
	add.s64 	%rd4130, %rd4119, %rd4129;
	add.s64 	%rd4131, %rd4130, %rd4125;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2145,%dummy}, %rd4120;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2146}, %rd4120;
	}
	shf.r.wrap.b32 	%r2147, %r2146, %r2145, 14;
	shf.r.wrap.b32 	%r2148, %r2145, %r2146, 14;
	mov.b64 	%rd4132, {%r2148, %r2147};
	shf.r.wrap.b32 	%r2149, %r2146, %r2145, 18;
	shf.r.wrap.b32 	%r2150, %r2145, %r2146, 18;
	mov.b64 	%rd4133, {%r2150, %r2149};
	xor.b64  	%rd4134, %rd4133, %rd4132;
	shf.l.wrap.b32 	%r2151, %r2145, %r2146, 23;
	shf.l.wrap.b32 	%r2152, %r2146, %r2145, 23;
	mov.b64 	%rd4135, {%r2152, %r2151};
	xor.b64  	%rd4136, %rd4134, %rd4135;
	xor.b64  	%rd4137, %rd4095, %rd197;
	and.b64  	%rd4138, %rd4120, %rd4137;
	xor.b64  	%rd4139, %rd4138, %rd197;
	add.s64 	%rd4140, %rd199, %rd21409;
	ld.const.u64 	%rd4141, [k_sha512+16];
	add.s64 	%rd4142, %rd4140, %rd4141;
	add.s64 	%rd4143, %rd4142, %rd4139;
	add.s64 	%rd4144, %rd4143, %rd4136;
	add.s64 	%rd4145, %rd4144, %rd204;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2153,%dummy}, %rd4131;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2154}, %rd4131;
	}
	shf.r.wrap.b32 	%r2155, %r2154, %r2153, 28;
	shf.r.wrap.b32 	%r2156, %r2153, %r2154, 28;
	mov.b64 	%rd4146, {%r2156, %r2155};
	shf.l.wrap.b32 	%r2157, %r2153, %r2154, 30;
	shf.l.wrap.b32 	%r2158, %r2154, %r2153, 30;
	mov.b64 	%rd4147, {%r2158, %r2157};
	xor.b64  	%rd4148, %rd4147, %rd4146;
	shf.l.wrap.b32 	%r2159, %r2153, %r2154, 25;
	shf.l.wrap.b32 	%r2160, %r2154, %r2153, 25;
	mov.b64 	%rd4149, {%r2160, %r2159};
	xor.b64  	%rd4150, %rd4148, %rd4149;
	xor.b64  	%rd4151, %rd4131, %rd202;
	xor.b64  	%rd4152, %rd4131, %rd4106;
	and.b64  	%rd4153, %rd4152, %rd4151;
	xor.b64  	%rd4154, %rd4153, %rd4131;
	add.s64 	%rd4155, %rd4144, %rd4154;
	add.s64 	%rd4156, %rd4155, %rd4150;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2161,%dummy}, %rd4145;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2162}, %rd4145;
	}
	shf.r.wrap.b32 	%r2163, %r2162, %r2161, 14;
	shf.r.wrap.b32 	%r2164, %r2161, %r2162, 14;
	mov.b64 	%rd4157, {%r2164, %r2163};
	shf.r.wrap.b32 	%r2165, %r2162, %r2161, 18;
	shf.r.wrap.b32 	%r2166, %r2161, %r2162, 18;
	mov.b64 	%rd4158, {%r2166, %r2165};
	xor.b64  	%rd4159, %rd4158, %rd4157;
	shf.l.wrap.b32 	%r2167, %r2161, %r2162, 23;
	shf.l.wrap.b32 	%r2168, %r2162, %r2161, 23;
	mov.b64 	%rd4160, {%r2168, %r2167};
	xor.b64  	%rd4161, %rd4159, %rd4160;
	xor.b64  	%rd4162, %rd4120, %rd4095;
	and.b64  	%rd4163, %rd4145, %rd4162;
	xor.b64  	%rd4164, %rd4163, %rd4095;
	add.s64 	%rd4165, %rd197, %rd21410;
	ld.const.u64 	%rd4166, [k_sha512+24];
	add.s64 	%rd4167, %rd4165, %rd4166;
	add.s64 	%rd4168, %rd4167, %rd4164;
	add.s64 	%rd4169, %rd4168, %rd4161;
	add.s64 	%rd4170, %rd4169, %rd202;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2169,%dummy}, %rd4156;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2170}, %rd4156;
	}
	shf.r.wrap.b32 	%r2171, %r2170, %r2169, 28;
	shf.r.wrap.b32 	%r2172, %r2169, %r2170, 28;
	mov.b64 	%rd4171, {%r2172, %r2171};
	shf.l.wrap.b32 	%r2173, %r2169, %r2170, 30;
	shf.l.wrap.b32 	%r2174, %r2170, %r2169, 30;
	mov.b64 	%rd4172, {%r2174, %r2173};
	xor.b64  	%rd4173, %rd4172, %rd4171;
	shf.l.wrap.b32 	%r2175, %r2169, %r2170, 25;
	shf.l.wrap.b32 	%r2176, %r2170, %r2169, 25;
	mov.b64 	%rd4174, {%r2176, %r2175};
	xor.b64  	%rd4175, %rd4173, %rd4174;
	xor.b64  	%rd4176, %rd4156, %rd4106;
	xor.b64  	%rd4177, %rd4156, %rd4131;
	and.b64  	%rd4178, %rd4177, %rd4176;
	xor.b64  	%rd4179, %rd4178, %rd4156;
	add.s64 	%rd4180, %rd4169, %rd4179;
	add.s64 	%rd4181, %rd4180, %rd4175;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2177,%dummy}, %rd4170;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2178}, %rd4170;
	}
	shf.r.wrap.b32 	%r2179, %r2178, %r2177, 14;
	shf.r.wrap.b32 	%r2180, %r2177, %r2178, 14;
	mov.b64 	%rd4182, {%r2180, %r2179};
	shf.r.wrap.b32 	%r2181, %r2178, %r2177, 18;
	shf.r.wrap.b32 	%r2182, %r2177, %r2178, 18;
	mov.b64 	%rd4183, {%r2182, %r2181};
	xor.b64  	%rd4184, %rd4183, %rd4182;
	shf.l.wrap.b32 	%r2183, %r2177, %r2178, 23;
	shf.l.wrap.b32 	%r2184, %r2178, %r2177, 23;
	mov.b64 	%rd4185, {%r2184, %r2183};
	xor.b64  	%rd4186, %rd4184, %rd4185;
	xor.b64  	%rd4187, %rd4145, %rd4120;
	and.b64  	%rd4188, %rd4170, %rd4187;
	xor.b64  	%rd4189, %rd4188, %rd4120;
	add.s64 	%rd4190, %rd4095, %rd21411;
	ld.const.u64 	%rd4191, [k_sha512+32];
	add.s64 	%rd4192, %rd4190, %rd4191;
	add.s64 	%rd4193, %rd4192, %rd4189;
	add.s64 	%rd4194, %rd4193, %rd4186;
	add.s64 	%rd4195, %rd4194, %rd4106;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2185,%dummy}, %rd4181;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2186}, %rd4181;
	}
	shf.r.wrap.b32 	%r2187, %r2186, %r2185, 28;
	shf.r.wrap.b32 	%r2188, %r2185, %r2186, 28;
	mov.b64 	%rd4196, {%r2188, %r2187};
	shf.l.wrap.b32 	%r2189, %r2185, %r2186, 30;
	shf.l.wrap.b32 	%r2190, %r2186, %r2185, 30;
	mov.b64 	%rd4197, {%r2190, %r2189};
	xor.b64  	%rd4198, %rd4197, %rd4196;
	shf.l.wrap.b32 	%r2191, %r2185, %r2186, 25;
	shf.l.wrap.b32 	%r2192, %r2186, %r2185, 25;
	mov.b64 	%rd4199, {%r2192, %r2191};
	xor.b64  	%rd4200, %rd4198, %rd4199;
	xor.b64  	%rd4201, %rd4181, %rd4131;
	xor.b64  	%rd4202, %rd4181, %rd4156;
	and.b64  	%rd4203, %rd4202, %rd4201;
	xor.b64  	%rd4204, %rd4203, %rd4181;
	add.s64 	%rd4205, %rd4194, %rd4204;
	add.s64 	%rd4206, %rd4205, %rd4200;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2193,%dummy}, %rd4195;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2194}, %rd4195;
	}
	shf.r.wrap.b32 	%r2195, %r2194, %r2193, 14;
	shf.r.wrap.b32 	%r2196, %r2193, %r2194, 14;
	mov.b64 	%rd4207, {%r2196, %r2195};
	shf.r.wrap.b32 	%r2197, %r2194, %r2193, 18;
	shf.r.wrap.b32 	%r2198, %r2193, %r2194, 18;
	mov.b64 	%rd4208, {%r2198, %r2197};
	xor.b64  	%rd4209, %rd4208, %rd4207;
	shf.l.wrap.b32 	%r2199, %r2193, %r2194, 23;
	shf.l.wrap.b32 	%r2200, %r2194, %r2193, 23;
	mov.b64 	%rd4210, {%r2200, %r2199};
	xor.b64  	%rd4211, %rd4209, %rd4210;
	xor.b64  	%rd4212, %rd4170, %rd4145;
	and.b64  	%rd4213, %rd4195, %rd4212;
	xor.b64  	%rd4214, %rd4213, %rd4145;
	add.s64 	%rd4215, %rd4120, %rd21412;
	ld.const.u64 	%rd4216, [k_sha512+40];
	add.s64 	%rd4217, %rd4215, %rd4216;
	add.s64 	%rd4218, %rd4217, %rd4214;
	add.s64 	%rd4219, %rd4218, %rd4211;
	add.s64 	%rd4220, %rd4219, %rd4131;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2201,%dummy}, %rd4206;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2202}, %rd4206;
	}
	shf.r.wrap.b32 	%r2203, %r2202, %r2201, 28;
	shf.r.wrap.b32 	%r2204, %r2201, %r2202, 28;
	mov.b64 	%rd4221, {%r2204, %r2203};
	shf.l.wrap.b32 	%r2205, %r2201, %r2202, 30;
	shf.l.wrap.b32 	%r2206, %r2202, %r2201, 30;
	mov.b64 	%rd4222, {%r2206, %r2205};
	xor.b64  	%rd4223, %rd4222, %rd4221;
	shf.l.wrap.b32 	%r2207, %r2201, %r2202, 25;
	shf.l.wrap.b32 	%r2208, %r2202, %r2201, 25;
	mov.b64 	%rd4224, {%r2208, %r2207};
	xor.b64  	%rd4225, %rd4223, %rd4224;
	xor.b64  	%rd4226, %rd4206, %rd4156;
	xor.b64  	%rd4227, %rd4206, %rd4181;
	and.b64  	%rd4228, %rd4227, %rd4226;
	xor.b64  	%rd4229, %rd4228, %rd4206;
	add.s64 	%rd4230, %rd4219, %rd4229;
	add.s64 	%rd4231, %rd4230, %rd4225;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2209,%dummy}, %rd4220;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2210}, %rd4220;
	}
	shf.r.wrap.b32 	%r2211, %r2210, %r2209, 14;
	shf.r.wrap.b32 	%r2212, %r2209, %r2210, 14;
	mov.b64 	%rd4232, {%r2212, %r2211};
	shf.r.wrap.b32 	%r2213, %r2210, %r2209, 18;
	shf.r.wrap.b32 	%r2214, %r2209, %r2210, 18;
	mov.b64 	%rd4233, {%r2214, %r2213};
	xor.b64  	%rd4234, %rd4233, %rd4232;
	shf.l.wrap.b32 	%r2215, %r2209, %r2210, 23;
	shf.l.wrap.b32 	%r2216, %r2210, %r2209, 23;
	mov.b64 	%rd4235, {%r2216, %r2215};
	xor.b64  	%rd4236, %rd4234, %rd4235;
	xor.b64  	%rd4237, %rd4195, %rd4170;
	and.b64  	%rd4238, %rd4220, %rd4237;
	xor.b64  	%rd4239, %rd4238, %rd4170;
	add.s64 	%rd4240, %rd4145, %rd21413;
	ld.const.u64 	%rd4241, [k_sha512+48];
	add.s64 	%rd4242, %rd4240, %rd4241;
	add.s64 	%rd4243, %rd4242, %rd4239;
	add.s64 	%rd4244, %rd4243, %rd4236;
	add.s64 	%rd4245, %rd4244, %rd4156;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2217,%dummy}, %rd4231;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2218}, %rd4231;
	}
	shf.r.wrap.b32 	%r2219, %r2218, %r2217, 28;
	shf.r.wrap.b32 	%r2220, %r2217, %r2218, 28;
	mov.b64 	%rd4246, {%r2220, %r2219};
	shf.l.wrap.b32 	%r2221, %r2217, %r2218, 30;
	shf.l.wrap.b32 	%r2222, %r2218, %r2217, 30;
	mov.b64 	%rd4247, {%r2222, %r2221};
	xor.b64  	%rd4248, %rd4247, %rd4246;
	shf.l.wrap.b32 	%r2223, %r2217, %r2218, 25;
	shf.l.wrap.b32 	%r2224, %r2218, %r2217, 25;
	mov.b64 	%rd4249, {%r2224, %r2223};
	xor.b64  	%rd4250, %rd4248, %rd4249;
	xor.b64  	%rd4251, %rd4231, %rd4181;
	xor.b64  	%rd4252, %rd4231, %rd4206;
	and.b64  	%rd4253, %rd4252, %rd4251;
	xor.b64  	%rd4254, %rd4253, %rd4231;
	add.s64 	%rd4255, %rd4244, %rd4254;
	add.s64 	%rd4256, %rd4255, %rd4250;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2225,%dummy}, %rd4245;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2226}, %rd4245;
	}
	shf.r.wrap.b32 	%r2227, %r2226, %r2225, 14;
	shf.r.wrap.b32 	%r2228, %r2225, %r2226, 14;
	mov.b64 	%rd4257, {%r2228, %r2227};
	shf.r.wrap.b32 	%r2229, %r2226, %r2225, 18;
	shf.r.wrap.b32 	%r2230, %r2225, %r2226, 18;
	mov.b64 	%rd4258, {%r2230, %r2229};
	xor.b64  	%rd4259, %rd4258, %rd4257;
	shf.l.wrap.b32 	%r2231, %r2225, %r2226, 23;
	shf.l.wrap.b32 	%r2232, %r2226, %r2225, 23;
	mov.b64 	%rd4260, {%r2232, %r2231};
	xor.b64  	%rd4261, %rd4259, %rd4260;
	xor.b64  	%rd4262, %rd4220, %rd4195;
	and.b64  	%rd4263, %rd4245, %rd4262;
	xor.b64  	%rd4264, %rd4263, %rd4195;
	add.s64 	%rd4265, %rd4170, %rd21414;
	ld.const.u64 	%rd4266, [k_sha512+56];
	add.s64 	%rd4267, %rd4265, %rd4266;
	add.s64 	%rd4268, %rd4267, %rd4264;
	add.s64 	%rd4269, %rd4268, %rd4261;
	add.s64 	%rd4270, %rd4269, %rd4181;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2233,%dummy}, %rd4256;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2234}, %rd4256;
	}
	shf.r.wrap.b32 	%r2235, %r2234, %r2233, 28;
	shf.r.wrap.b32 	%r2236, %r2233, %r2234, 28;
	mov.b64 	%rd4271, {%r2236, %r2235};
	shf.l.wrap.b32 	%r2237, %r2233, %r2234, 30;
	shf.l.wrap.b32 	%r2238, %r2234, %r2233, 30;
	mov.b64 	%rd4272, {%r2238, %r2237};
	xor.b64  	%rd4273, %rd4272, %rd4271;
	shf.l.wrap.b32 	%r2239, %r2233, %r2234, 25;
	shf.l.wrap.b32 	%r2240, %r2234, %r2233, 25;
	mov.b64 	%rd4274, {%r2240, %r2239};
	xor.b64  	%rd4275, %rd4273, %rd4274;
	xor.b64  	%rd4276, %rd4256, %rd4206;
	xor.b64  	%rd4277, %rd4256, %rd4231;
	and.b64  	%rd4278, %rd4277, %rd4276;
	xor.b64  	%rd4279, %rd4278, %rd4256;
	add.s64 	%rd4280, %rd4269, %rd4279;
	add.s64 	%rd4281, %rd4280, %rd4275;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2241,%dummy}, %rd4270;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2242}, %rd4270;
	}
	shf.r.wrap.b32 	%r2243, %r2242, %r2241, 14;
	shf.r.wrap.b32 	%r2244, %r2241, %r2242, 14;
	mov.b64 	%rd4282, {%r2244, %r2243};
	shf.r.wrap.b32 	%r2245, %r2242, %r2241, 18;
	shf.r.wrap.b32 	%r2246, %r2241, %r2242, 18;
	mov.b64 	%rd4283, {%r2246, %r2245};
	xor.b64  	%rd4284, %rd4283, %rd4282;
	shf.l.wrap.b32 	%r2247, %r2241, %r2242, 23;
	shf.l.wrap.b32 	%r2248, %r2242, %r2241, 23;
	mov.b64 	%rd4285, {%r2248, %r2247};
	xor.b64  	%rd4286, %rd4284, %rd4285;
	xor.b64  	%rd4287, %rd4245, %rd4220;
	and.b64  	%rd4288, %rd4270, %rd4287;
	xor.b64  	%rd4289, %rd4288, %rd4220;
	add.s64 	%rd4290, %rd4195, %rd21398;
	ld.const.u64 	%rd4291, [k_sha512+64];
	add.s64 	%rd4292, %rd4290, %rd4291;
	add.s64 	%rd4293, %rd4292, %rd4289;
	add.s64 	%rd4294, %rd4293, %rd4286;
	add.s64 	%rd4295, %rd4294, %rd4206;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2249,%dummy}, %rd4281;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2250}, %rd4281;
	}
	shf.r.wrap.b32 	%r2251, %r2250, %r2249, 28;
	shf.r.wrap.b32 	%r2252, %r2249, %r2250, 28;
	mov.b64 	%rd4296, {%r2252, %r2251};
	shf.l.wrap.b32 	%r2253, %r2249, %r2250, 30;
	shf.l.wrap.b32 	%r2254, %r2250, %r2249, 30;
	mov.b64 	%rd4297, {%r2254, %r2253};
	xor.b64  	%rd4298, %rd4297, %rd4296;
	shf.l.wrap.b32 	%r2255, %r2249, %r2250, 25;
	shf.l.wrap.b32 	%r2256, %r2250, %r2249, 25;
	mov.b64 	%rd4299, {%r2256, %r2255};
	xor.b64  	%rd4300, %rd4298, %rd4299;
	xor.b64  	%rd4301, %rd4281, %rd4231;
	xor.b64  	%rd4302, %rd4281, %rd4256;
	and.b64  	%rd4303, %rd4302, %rd4301;
	xor.b64  	%rd4304, %rd4303, %rd4281;
	add.s64 	%rd4305, %rd4294, %rd4304;
	add.s64 	%rd4306, %rd4305, %rd4300;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2257,%dummy}, %rd4295;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2258}, %rd4295;
	}
	shf.r.wrap.b32 	%r2259, %r2258, %r2257, 14;
	shf.r.wrap.b32 	%r2260, %r2257, %r2258, 14;
	mov.b64 	%rd4307, {%r2260, %r2259};
	shf.r.wrap.b32 	%r2261, %r2258, %r2257, 18;
	shf.r.wrap.b32 	%r2262, %r2257, %r2258, 18;
	mov.b64 	%rd4308, {%r2262, %r2261};
	xor.b64  	%rd4309, %rd4308, %rd4307;
	shf.l.wrap.b32 	%r2263, %r2257, %r2258, 23;
	shf.l.wrap.b32 	%r2264, %r2258, %r2257, 23;
	mov.b64 	%rd4310, {%r2264, %r2263};
	xor.b64  	%rd4311, %rd4309, %rd4310;
	xor.b64  	%rd4312, %rd4270, %rd4245;
	and.b64  	%rd4313, %rd4295, %rd4312;
	xor.b64  	%rd4314, %rd4313, %rd4245;
	add.s64 	%rd4315, %rd4220, %rd21397;
	ld.const.u64 	%rd4316, [k_sha512+72];
	add.s64 	%rd4317, %rd4315, %rd4316;
	add.s64 	%rd4318, %rd4317, %rd4314;
	add.s64 	%rd4319, %rd4318, %rd4311;
	add.s64 	%rd4320, %rd4319, %rd4231;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2265,%dummy}, %rd4306;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2266}, %rd4306;
	}
	shf.r.wrap.b32 	%r2267, %r2266, %r2265, 28;
	shf.r.wrap.b32 	%r2268, %r2265, %r2266, 28;
	mov.b64 	%rd4321, {%r2268, %r2267};
	shf.l.wrap.b32 	%r2269, %r2265, %r2266, 30;
	shf.l.wrap.b32 	%r2270, %r2266, %r2265, 30;
	mov.b64 	%rd4322, {%r2270, %r2269};
	xor.b64  	%rd4323, %rd4322, %rd4321;
	shf.l.wrap.b32 	%r2271, %r2265, %r2266, 25;
	shf.l.wrap.b32 	%r2272, %r2266, %r2265, 25;
	mov.b64 	%rd4324, {%r2272, %r2271};
	xor.b64  	%rd4325, %rd4323, %rd4324;
	xor.b64  	%rd4326, %rd4306, %rd4256;
	xor.b64  	%rd4327, %rd4306, %rd4281;
	and.b64  	%rd4328, %rd4327, %rd4326;
	xor.b64  	%rd4329, %rd4328, %rd4306;
	add.s64 	%rd4330, %rd4319, %rd4329;
	add.s64 	%rd4331, %rd4330, %rd4325;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2273,%dummy}, %rd4320;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2274}, %rd4320;
	}
	shf.r.wrap.b32 	%r2275, %r2274, %r2273, 14;
	shf.r.wrap.b32 	%r2276, %r2273, %r2274, 14;
	mov.b64 	%rd4332, {%r2276, %r2275};
	shf.r.wrap.b32 	%r2277, %r2274, %r2273, 18;
	shf.r.wrap.b32 	%r2278, %r2273, %r2274, 18;
	mov.b64 	%rd4333, {%r2278, %r2277};
	xor.b64  	%rd4334, %rd4333, %rd4332;
	shf.l.wrap.b32 	%r2279, %r2273, %r2274, 23;
	shf.l.wrap.b32 	%r2280, %r2274, %r2273, 23;
	mov.b64 	%rd4335, {%r2280, %r2279};
	xor.b64  	%rd4336, %rd4334, %rd4335;
	xor.b64  	%rd4337, %rd4295, %rd4270;
	and.b64  	%rd4338, %rd4320, %rd4337;
	xor.b64  	%rd4339, %rd4338, %rd4270;
	add.s64 	%rd4340, %rd4245, %rd21396;
	ld.const.u64 	%rd4341, [k_sha512+80];
	add.s64 	%rd4342, %rd4340, %rd4341;
	add.s64 	%rd4343, %rd4342, %rd4339;
	add.s64 	%rd4344, %rd4343, %rd4336;
	add.s64 	%rd4345, %rd4344, %rd4256;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2281,%dummy}, %rd4331;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2282}, %rd4331;
	}
	shf.r.wrap.b32 	%r2283, %r2282, %r2281, 28;
	shf.r.wrap.b32 	%r2284, %r2281, %r2282, 28;
	mov.b64 	%rd4346, {%r2284, %r2283};
	shf.l.wrap.b32 	%r2285, %r2281, %r2282, 30;
	shf.l.wrap.b32 	%r2286, %r2282, %r2281, 30;
	mov.b64 	%rd4347, {%r2286, %r2285};
	xor.b64  	%rd4348, %rd4347, %rd4346;
	shf.l.wrap.b32 	%r2287, %r2281, %r2282, 25;
	shf.l.wrap.b32 	%r2288, %r2282, %r2281, 25;
	mov.b64 	%rd4349, {%r2288, %r2287};
	xor.b64  	%rd4350, %rd4348, %rd4349;
	xor.b64  	%rd4351, %rd4331, %rd4281;
	xor.b64  	%rd4352, %rd4331, %rd4306;
	and.b64  	%rd4353, %rd4352, %rd4351;
	xor.b64  	%rd4354, %rd4353, %rd4331;
	add.s64 	%rd4355, %rd4344, %rd4354;
	add.s64 	%rd4356, %rd4355, %rd4350;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2289,%dummy}, %rd4345;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2290}, %rd4345;
	}
	shf.r.wrap.b32 	%r2291, %r2290, %r2289, 14;
	shf.r.wrap.b32 	%r2292, %r2289, %r2290, 14;
	mov.b64 	%rd4357, {%r2292, %r2291};
	shf.r.wrap.b32 	%r2293, %r2290, %r2289, 18;
	shf.r.wrap.b32 	%r2294, %r2289, %r2290, 18;
	mov.b64 	%rd4358, {%r2294, %r2293};
	xor.b64  	%rd4359, %rd4358, %rd4357;
	shf.l.wrap.b32 	%r2295, %r2289, %r2290, 23;
	shf.l.wrap.b32 	%r2296, %r2290, %r2289, 23;
	mov.b64 	%rd4360, {%r2296, %r2295};
	xor.b64  	%rd4361, %rd4359, %rd4360;
	xor.b64  	%rd4362, %rd4320, %rd4295;
	and.b64  	%rd4363, %rd4345, %rd4362;
	xor.b64  	%rd4364, %rd4363, %rd4295;
	add.s64 	%rd4365, %rd4270, %rd21395;
	ld.const.u64 	%rd4366, [k_sha512+88];
	add.s64 	%rd4367, %rd4365, %rd4366;
	add.s64 	%rd4368, %rd4367, %rd4364;
	add.s64 	%rd4369, %rd4368, %rd4361;
	add.s64 	%rd4370, %rd4369, %rd4281;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2297,%dummy}, %rd4356;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2298}, %rd4356;
	}
	shf.r.wrap.b32 	%r2299, %r2298, %r2297, 28;
	shf.r.wrap.b32 	%r2300, %r2297, %r2298, 28;
	mov.b64 	%rd4371, {%r2300, %r2299};
	shf.l.wrap.b32 	%r2301, %r2297, %r2298, 30;
	shf.l.wrap.b32 	%r2302, %r2298, %r2297, 30;
	mov.b64 	%rd4372, {%r2302, %r2301};
	xor.b64  	%rd4373, %rd4372, %rd4371;
	shf.l.wrap.b32 	%r2303, %r2297, %r2298, 25;
	shf.l.wrap.b32 	%r2304, %r2298, %r2297, 25;
	mov.b64 	%rd4374, {%r2304, %r2303};
	xor.b64  	%rd4375, %rd4373, %rd4374;
	xor.b64  	%rd4376, %rd4356, %rd4306;
	xor.b64  	%rd4377, %rd4356, %rd4331;
	and.b64  	%rd4378, %rd4377, %rd4376;
	xor.b64  	%rd4379, %rd4378, %rd4356;
	add.s64 	%rd4380, %rd4369, %rd4379;
	add.s64 	%rd4381, %rd4380, %rd4375;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2305,%dummy}, %rd4370;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2306}, %rd4370;
	}
	shf.r.wrap.b32 	%r2307, %r2306, %r2305, 14;
	shf.r.wrap.b32 	%r2308, %r2305, %r2306, 14;
	mov.b64 	%rd4382, {%r2308, %r2307};
	shf.r.wrap.b32 	%r2309, %r2306, %r2305, 18;
	shf.r.wrap.b32 	%r2310, %r2305, %r2306, 18;
	mov.b64 	%rd4383, {%r2310, %r2309};
	xor.b64  	%rd4384, %rd4383, %rd4382;
	shf.l.wrap.b32 	%r2311, %r2305, %r2306, 23;
	shf.l.wrap.b32 	%r2312, %r2306, %r2305, 23;
	mov.b64 	%rd4385, {%r2312, %r2311};
	xor.b64  	%rd4386, %rd4384, %rd4385;
	xor.b64  	%rd4387, %rd4345, %rd4320;
	and.b64  	%rd4388, %rd4370, %rd4387;
	xor.b64  	%rd4389, %rd4388, %rd4320;
	add.s64 	%rd4390, %rd4295, %rd21394;
	ld.const.u64 	%rd4391, [k_sha512+96];
	add.s64 	%rd4392, %rd4390, %rd4391;
	add.s64 	%rd4393, %rd4392, %rd4389;
	add.s64 	%rd4394, %rd4393, %rd4386;
	add.s64 	%rd21406, %rd4394, %rd4306;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2313,%dummy}, %rd4381;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2314}, %rd4381;
	}
	shf.r.wrap.b32 	%r2315, %r2314, %r2313, 28;
	shf.r.wrap.b32 	%r2316, %r2313, %r2314, 28;
	mov.b64 	%rd4395, {%r2316, %r2315};
	shf.l.wrap.b32 	%r2317, %r2313, %r2314, 30;
	shf.l.wrap.b32 	%r2318, %r2314, %r2313, 30;
	mov.b64 	%rd4396, {%r2318, %r2317};
	xor.b64  	%rd4397, %rd4396, %rd4395;
	shf.l.wrap.b32 	%r2319, %r2313, %r2314, 25;
	shf.l.wrap.b32 	%r2320, %r2314, %r2313, 25;
	mov.b64 	%rd4398, {%r2320, %r2319};
	xor.b64  	%rd4399, %rd4397, %rd4398;
	xor.b64  	%rd4400, %rd4381, %rd4331;
	xor.b64  	%rd4401, %rd4381, %rd4356;
	and.b64  	%rd4402, %rd4401, %rd4400;
	xor.b64  	%rd4403, %rd4402, %rd4381;
	add.s64 	%rd4404, %rd4394, %rd4403;
	add.s64 	%rd21402, %rd4404, %rd4399;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2321,%dummy}, %rd21406;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2322}, %rd21406;
	}
	shf.r.wrap.b32 	%r2323, %r2322, %r2321, 14;
	shf.r.wrap.b32 	%r2324, %r2321, %r2322, 14;
	mov.b64 	%rd4405, {%r2324, %r2323};
	shf.r.wrap.b32 	%r2325, %r2322, %r2321, 18;
	shf.r.wrap.b32 	%r2326, %r2321, %r2322, 18;
	mov.b64 	%rd4406, {%r2326, %r2325};
	xor.b64  	%rd4407, %rd4406, %rd4405;
	shf.l.wrap.b32 	%r2327, %r2321, %r2322, 23;
	shf.l.wrap.b32 	%r2328, %r2322, %r2321, 23;
	mov.b64 	%rd4408, {%r2328, %r2327};
	xor.b64  	%rd4409, %rd4407, %rd4408;
	xor.b64  	%rd4410, %rd4370, %rd4345;
	and.b64  	%rd4411, %rd21406, %rd4410;
	xor.b64  	%rd4412, %rd4411, %rd4345;
	add.s64 	%rd4413, %rd4320, %rd21393;
	ld.const.u64 	%rd4414, [k_sha512+104];
	add.s64 	%rd4415, %rd4413, %rd4414;
	add.s64 	%rd4416, %rd4415, %rd4412;
	add.s64 	%rd4417, %rd4416, %rd4409;
	add.s64 	%rd21405, %rd4417, %rd4331;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2329,%dummy}, %rd21402;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2330}, %rd21402;
	}
	shf.r.wrap.b32 	%r2331, %r2330, %r2329, 28;
	shf.r.wrap.b32 	%r2332, %r2329, %r2330, 28;
	mov.b64 	%rd4418, {%r2332, %r2331};
	shf.l.wrap.b32 	%r2333, %r2329, %r2330, 30;
	shf.l.wrap.b32 	%r2334, %r2330, %r2329, 30;
	mov.b64 	%rd4419, {%r2334, %r2333};
	xor.b64  	%rd4420, %rd4419, %rd4418;
	shf.l.wrap.b32 	%r2335, %r2329, %r2330, 25;
	shf.l.wrap.b32 	%r2336, %r2330, %r2329, 25;
	mov.b64 	%rd4421, {%r2336, %r2335};
	xor.b64  	%rd4422, %rd4420, %rd4421;
	xor.b64  	%rd4423, %rd21402, %rd4356;
	xor.b64  	%rd4424, %rd21402, %rd4381;
	and.b64  	%rd4425, %rd4424, %rd4423;
	xor.b64  	%rd4426, %rd4425, %rd21402;
	add.s64 	%rd4427, %rd4417, %rd4426;
	add.s64 	%rd21401, %rd4427, %rd4422;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2337,%dummy}, %rd21405;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2338}, %rd21405;
	}
	shf.r.wrap.b32 	%r2339, %r2338, %r2337, 14;
	shf.r.wrap.b32 	%r2340, %r2337, %r2338, 14;
	mov.b64 	%rd4428, {%r2340, %r2339};
	shf.r.wrap.b32 	%r2341, %r2338, %r2337, 18;
	shf.r.wrap.b32 	%r2342, %r2337, %r2338, 18;
	mov.b64 	%rd4429, {%r2342, %r2341};
	xor.b64  	%rd4430, %rd4429, %rd4428;
	shf.l.wrap.b32 	%r2343, %r2337, %r2338, 23;
	shf.l.wrap.b32 	%r2344, %r2338, %r2337, 23;
	mov.b64 	%rd4431, {%r2344, %r2343};
	xor.b64  	%rd4432, %rd4430, %rd4431;
	xor.b64  	%rd4433, %rd21406, %rd4370;
	and.b64  	%rd4434, %rd21405, %rd4433;
	xor.b64  	%rd4435, %rd4434, %rd4370;
	add.s64 	%rd4436, %rd4345, %rd21392;
	ld.const.u64 	%rd4437, [k_sha512+112];
	add.s64 	%rd4438, %rd4436, %rd4437;
	add.s64 	%rd4439, %rd4438, %rd4435;
	add.s64 	%rd4440, %rd4439, %rd4432;
	add.s64 	%rd21404, %rd4440, %rd4356;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2345,%dummy}, %rd21401;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2346}, %rd21401;
	}
	shf.r.wrap.b32 	%r2347, %r2346, %r2345, 28;
	shf.r.wrap.b32 	%r2348, %r2345, %r2346, 28;
	mov.b64 	%rd4441, {%r2348, %r2347};
	shf.l.wrap.b32 	%r2349, %r2345, %r2346, 30;
	shf.l.wrap.b32 	%r2350, %r2346, %r2345, 30;
	mov.b64 	%rd4442, {%r2350, %r2349};
	xor.b64  	%rd4443, %rd4442, %rd4441;
	shf.l.wrap.b32 	%r2351, %r2345, %r2346, 25;
	shf.l.wrap.b32 	%r2352, %r2346, %r2345, 25;
	mov.b64 	%rd4444, {%r2352, %r2351};
	xor.b64  	%rd4445, %rd4443, %rd4444;
	xor.b64  	%rd4446, %rd21401, %rd4381;
	xor.b64  	%rd4447, %rd21401, %rd21402;
	and.b64  	%rd4448, %rd4447, %rd4446;
	xor.b64  	%rd4449, %rd4448, %rd21401;
	add.s64 	%rd4450, %rd4440, %rd4449;
	add.s64 	%rd21400, %rd4450, %rd4445;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2353,%dummy}, %rd21404;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2354}, %rd21404;
	}
	shf.r.wrap.b32 	%r2355, %r2354, %r2353, 14;
	shf.r.wrap.b32 	%r2356, %r2353, %r2354, 14;
	mov.b64 	%rd4451, {%r2356, %r2355};
	shf.r.wrap.b32 	%r2357, %r2354, %r2353, 18;
	shf.r.wrap.b32 	%r2358, %r2353, %r2354, 18;
	mov.b64 	%rd4452, {%r2358, %r2357};
	xor.b64  	%rd4453, %rd4452, %rd4451;
	shf.l.wrap.b32 	%r2359, %r2353, %r2354, 23;
	shf.l.wrap.b32 	%r2360, %r2354, %r2353, 23;
	mov.b64 	%rd4454, {%r2360, %r2359};
	xor.b64  	%rd4455, %rd4453, %rd4454;
	xor.b64  	%rd4456, %rd21405, %rd21406;
	and.b64  	%rd4457, %rd21404, %rd4456;
	xor.b64  	%rd4458, %rd4457, %rd21406;
	add.s64 	%rd4459, %rd4370, %rd21391;
	ld.const.u64 	%rd4460, [k_sha512+120];
	add.s64 	%rd4461, %rd4459, %rd4460;
	add.s64 	%rd4462, %rd4461, %rd4458;
	add.s64 	%rd4463, %rd4462, %rd4455;
	add.s64 	%rd21403, %rd4463, %rd4381;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2361,%dummy}, %rd21400;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2362}, %rd21400;
	}
	shf.r.wrap.b32 	%r2363, %r2362, %r2361, 28;
	shf.r.wrap.b32 	%r2364, %r2361, %r2362, 28;
	mov.b64 	%rd4464, {%r2364, %r2363};
	shf.l.wrap.b32 	%r2365, %r2361, %r2362, 30;
	shf.l.wrap.b32 	%r2366, %r2362, %r2361, 30;
	mov.b64 	%rd4465, {%r2366, %r2365};
	xor.b64  	%rd4466, %rd4465, %rd4464;
	shf.l.wrap.b32 	%r2367, %r2361, %r2362, 25;
	shf.l.wrap.b32 	%r2368, %r2362, %r2361, 25;
	mov.b64 	%rd4467, {%r2368, %r2367};
	xor.b64  	%rd4468, %rd4466, %rd4467;
	xor.b64  	%rd4469, %rd21400, %rd21402;
	xor.b64  	%rd4470, %rd21400, %rd21401;
	and.b64  	%rd4471, %rd4470, %rd4469;
	xor.b64  	%rd4472, %rd4471, %rd21400;
	add.s64 	%rd4473, %rd4463, %rd4472;
	add.s64 	%rd21399, %rd4473, %rd4468;
	mov.u32 	%r14334, 16;

BB3_64:
	shr.u64 	%rd4474, %rd21392, 6;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2369,%dummy}, %rd21392;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2370}, %rd21392;
	}
	shf.r.wrap.b32 	%r2371, %r2370, %r2369, 19;
	shf.r.wrap.b32 	%r2372, %r2369, %r2370, 19;
	mov.b64 	%rd4475, {%r2372, %r2371};
	xor.b64  	%rd4476, %rd4475, %rd4474;
	shf.l.wrap.b32 	%r2373, %r2369, %r2370, 3;
	shf.l.wrap.b32 	%r2374, %r2370, %r2369, 3;
	mov.b64 	%rd4477, {%r2374, %r2373};
	xor.b64  	%rd4478, %rd4476, %rd4477;
	shr.u64 	%rd4479, %rd21408, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2375,%dummy}, %rd21408;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2376}, %rd21408;
	}
	shf.r.wrap.b32 	%r2377, %r2376, %r2375, 1;
	shf.r.wrap.b32 	%r2378, %r2375, %r2376, 1;
	mov.b64 	%rd4480, {%r2378, %r2377};
	xor.b64  	%rd4481, %rd4480, %rd4479;
	shf.r.wrap.b32 	%r2379, %r2376, %r2375, 8;
	shf.r.wrap.b32 	%r2380, %r2375, %r2376, 8;
	mov.b64 	%rd4482, {%r2380, %r2379};
	xor.b64  	%rd4483, %rd4481, %rd4482;
	add.s64 	%rd4484, %rd21397, %rd21407;
	add.s64 	%rd4485, %rd4484, %rd4478;
	add.s64 	%rd21407, %rd4485, %rd4483;
	shr.u64 	%rd4486, %rd21391, 6;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2381,%dummy}, %rd21391;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2382}, %rd21391;
	}
	shf.r.wrap.b32 	%r2383, %r2382, %r2381, 19;
	shf.r.wrap.b32 	%r2384, %r2381, %r2382, 19;
	mov.b64 	%rd4487, {%r2384, %r2383};
	xor.b64  	%rd4488, %rd4487, %rd4486;
	shf.l.wrap.b32 	%r2385, %r2381, %r2382, 3;
	shf.l.wrap.b32 	%r2386, %r2382, %r2381, 3;
	mov.b64 	%rd4489, {%r2386, %r2385};
	xor.b64  	%rd4490, %rd4488, %rd4489;
	shr.u64 	%rd4491, %rd21409, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2387,%dummy}, %rd21409;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2388}, %rd21409;
	}
	shf.r.wrap.b32 	%r2389, %r2388, %r2387, 1;
	shf.r.wrap.b32 	%r2390, %r2387, %r2388, 1;
	mov.b64 	%rd4492, {%r2390, %r2389};
	xor.b64  	%rd4493, %rd4492, %rd4491;
	shf.r.wrap.b32 	%r2391, %r2388, %r2387, 8;
	shf.r.wrap.b32 	%r2392, %r2387, %r2388, 8;
	mov.b64 	%rd4494, {%r2392, %r2391};
	xor.b64  	%rd4495, %rd4493, %rd4494;
	add.s64 	%rd4496, %rd21396, %rd21408;
	add.s64 	%rd4497, %rd4496, %rd4490;
	add.s64 	%rd21408, %rd4497, %rd4495;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2393,%dummy}, %rd21407;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2394}, %rd21407;
	}
	shf.r.wrap.b32 	%r2395, %r2394, %r2393, 19;
	shf.r.wrap.b32 	%r2396, %r2393, %r2394, 19;
	mov.b64 	%rd4498, {%r2396, %r2395};
	shf.l.wrap.b32 	%r2397, %r2393, %r2394, 3;
	shf.l.wrap.b32 	%r2398, %r2394, %r2393, 3;
	mov.b64 	%rd4499, {%r2398, %r2397};
	shr.u64 	%rd4500, %rd21407, 6;
	xor.b64  	%rd4501, %rd4498, %rd4500;
	xor.b64  	%rd4502, %rd4501, %rd4499;
	shr.u64 	%rd4503, %rd21410, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2399,%dummy}, %rd21410;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2400}, %rd21410;
	}
	shf.r.wrap.b32 	%r2401, %r2400, %r2399, 1;
	shf.r.wrap.b32 	%r2402, %r2399, %r2400, 1;
	mov.b64 	%rd4504, {%r2402, %r2401};
	xor.b64  	%rd4505, %rd4504, %rd4503;
	shf.r.wrap.b32 	%r2403, %r2400, %r2399, 8;
	shf.r.wrap.b32 	%r2404, %r2399, %r2400, 8;
	mov.b64 	%rd4506, {%r2404, %r2403};
	xor.b64  	%rd4507, %rd4505, %rd4506;
	add.s64 	%rd4508, %rd21395, %rd21409;
	add.s64 	%rd4509, %rd4508, %rd4502;
	add.s64 	%rd21409, %rd4509, %rd4507;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2405,%dummy}, %rd21408;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2406}, %rd21408;
	}
	shf.r.wrap.b32 	%r2407, %r2406, %r2405, 19;
	shf.r.wrap.b32 	%r2408, %r2405, %r2406, 19;
	mov.b64 	%rd4510, {%r2408, %r2407};
	shf.l.wrap.b32 	%r2409, %r2405, %r2406, 3;
	shf.l.wrap.b32 	%r2410, %r2406, %r2405, 3;
	mov.b64 	%rd4511, {%r2410, %r2409};
	shr.u64 	%rd4512, %rd21408, 6;
	xor.b64  	%rd4513, %rd4510, %rd4512;
	xor.b64  	%rd4514, %rd4513, %rd4511;
	shr.u64 	%rd4515, %rd21411, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2411,%dummy}, %rd21411;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2412}, %rd21411;
	}
	shf.r.wrap.b32 	%r2413, %r2412, %r2411, 1;
	shf.r.wrap.b32 	%r2414, %r2411, %r2412, 1;
	mov.b64 	%rd4516, {%r2414, %r2413};
	xor.b64  	%rd4517, %rd4516, %rd4515;
	shf.r.wrap.b32 	%r2415, %r2412, %r2411, 8;
	shf.r.wrap.b32 	%r2416, %r2411, %r2412, 8;
	mov.b64 	%rd4518, {%r2416, %r2415};
	xor.b64  	%rd4519, %rd4517, %rd4518;
	add.s64 	%rd4520, %rd21394, %rd21410;
	add.s64 	%rd4521, %rd4520, %rd4514;
	add.s64 	%rd21410, %rd4521, %rd4519;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2417,%dummy}, %rd21409;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2418}, %rd21409;
	}
	shf.r.wrap.b32 	%r2419, %r2418, %r2417, 19;
	shf.r.wrap.b32 	%r2420, %r2417, %r2418, 19;
	mov.b64 	%rd4522, {%r2420, %r2419};
	shf.l.wrap.b32 	%r2421, %r2417, %r2418, 3;
	shf.l.wrap.b32 	%r2422, %r2418, %r2417, 3;
	mov.b64 	%rd4523, {%r2422, %r2421};
	shr.u64 	%rd4524, %rd21409, 6;
	xor.b64  	%rd4525, %rd4522, %rd4524;
	xor.b64  	%rd4526, %rd4525, %rd4523;
	shr.u64 	%rd4527, %rd21412, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2423,%dummy}, %rd21412;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2424}, %rd21412;
	}
	shf.r.wrap.b32 	%r2425, %r2424, %r2423, 1;
	shf.r.wrap.b32 	%r2426, %r2423, %r2424, 1;
	mov.b64 	%rd4528, {%r2426, %r2425};
	xor.b64  	%rd4529, %rd4528, %rd4527;
	shf.r.wrap.b32 	%r2427, %r2424, %r2423, 8;
	shf.r.wrap.b32 	%r2428, %r2423, %r2424, 8;
	mov.b64 	%rd4530, {%r2428, %r2427};
	xor.b64  	%rd4531, %rd4529, %rd4530;
	add.s64 	%rd4532, %rd21393, %rd21411;
	add.s64 	%rd4533, %rd4532, %rd4526;
	add.s64 	%rd21411, %rd4533, %rd4531;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2429,%dummy}, %rd21410;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2430}, %rd21410;
	}
	shf.r.wrap.b32 	%r2431, %r2430, %r2429, 19;
	shf.r.wrap.b32 	%r2432, %r2429, %r2430, 19;
	mov.b64 	%rd4534, {%r2432, %r2431};
	shf.l.wrap.b32 	%r2433, %r2429, %r2430, 3;
	shf.l.wrap.b32 	%r2434, %r2430, %r2429, 3;
	mov.b64 	%rd4535, {%r2434, %r2433};
	shr.u64 	%rd4536, %rd21410, 6;
	xor.b64  	%rd4537, %rd4534, %rd4536;
	xor.b64  	%rd4538, %rd4537, %rd4535;
	shr.u64 	%rd4539, %rd21413, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2435,%dummy}, %rd21413;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2436}, %rd21413;
	}
	shf.r.wrap.b32 	%r2437, %r2436, %r2435, 1;
	shf.r.wrap.b32 	%r2438, %r2435, %r2436, 1;
	mov.b64 	%rd4540, {%r2438, %r2437};
	xor.b64  	%rd4541, %rd4540, %rd4539;
	shf.r.wrap.b32 	%r2439, %r2436, %r2435, 8;
	shf.r.wrap.b32 	%r2440, %r2435, %r2436, 8;
	mov.b64 	%rd4542, {%r2440, %r2439};
	xor.b64  	%rd4543, %rd4541, %rd4542;
	add.s64 	%rd4544, %rd21392, %rd21412;
	add.s64 	%rd4545, %rd4544, %rd4538;
	add.s64 	%rd21412, %rd4545, %rd4543;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2441,%dummy}, %rd21411;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2442}, %rd21411;
	}
	shf.r.wrap.b32 	%r2443, %r2442, %r2441, 19;
	shf.r.wrap.b32 	%r2444, %r2441, %r2442, 19;
	mov.b64 	%rd4546, {%r2444, %r2443};
	shf.l.wrap.b32 	%r2445, %r2441, %r2442, 3;
	shf.l.wrap.b32 	%r2446, %r2442, %r2441, 3;
	mov.b64 	%rd4547, {%r2446, %r2445};
	shr.u64 	%rd4548, %rd21411, 6;
	xor.b64  	%rd4549, %rd4546, %rd4548;
	xor.b64  	%rd4550, %rd4549, %rd4547;
	shr.u64 	%rd4551, %rd21414, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2447,%dummy}, %rd21414;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2448}, %rd21414;
	}
	shf.r.wrap.b32 	%r2449, %r2448, %r2447, 1;
	shf.r.wrap.b32 	%r2450, %r2447, %r2448, 1;
	mov.b64 	%rd4552, {%r2450, %r2449};
	xor.b64  	%rd4553, %rd4552, %rd4551;
	shf.r.wrap.b32 	%r2451, %r2448, %r2447, 8;
	shf.r.wrap.b32 	%r2452, %r2447, %r2448, 8;
	mov.b64 	%rd4554, {%r2452, %r2451};
	xor.b64  	%rd4555, %rd4553, %rd4554;
	add.s64 	%rd4556, %rd21391, %rd21413;
	add.s64 	%rd4557, %rd4556, %rd4550;
	add.s64 	%rd21413, %rd4557, %rd4555;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2453,%dummy}, %rd21412;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2454}, %rd21412;
	}
	shf.r.wrap.b32 	%r2455, %r2454, %r2453, 19;
	shf.r.wrap.b32 	%r2456, %r2453, %r2454, 19;
	mov.b64 	%rd4558, {%r2456, %r2455};
	shf.l.wrap.b32 	%r2457, %r2453, %r2454, 3;
	shf.l.wrap.b32 	%r2458, %r2454, %r2453, 3;
	mov.b64 	%rd4559, {%r2458, %r2457};
	shr.u64 	%rd4560, %rd21412, 6;
	xor.b64  	%rd4561, %rd4558, %rd4560;
	xor.b64  	%rd4562, %rd4561, %rd4559;
	shr.u64 	%rd4563, %rd21398, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2459,%dummy}, %rd21398;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2460}, %rd21398;
	}
	shf.r.wrap.b32 	%r2461, %r2460, %r2459, 1;
	shf.r.wrap.b32 	%r2462, %r2459, %r2460, 1;
	mov.b64 	%rd4564, {%r2462, %r2461};
	xor.b64  	%rd4565, %rd4564, %rd4563;
	shf.r.wrap.b32 	%r2463, %r2460, %r2459, 8;
	shf.r.wrap.b32 	%r2464, %r2459, %r2460, 8;
	mov.b64 	%rd4566, {%r2464, %r2463};
	xor.b64  	%rd4567, %rd4565, %rd4566;
	add.s64 	%rd4568, %rd21407, %rd21414;
	add.s64 	%rd4569, %rd4568, %rd4562;
	add.s64 	%rd21414, %rd4569, %rd4567;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2465,%dummy}, %rd21413;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2466}, %rd21413;
	}
	shf.r.wrap.b32 	%r2467, %r2466, %r2465, 19;
	shf.r.wrap.b32 	%r2468, %r2465, %r2466, 19;
	mov.b64 	%rd4570, {%r2468, %r2467};
	shf.l.wrap.b32 	%r2469, %r2465, %r2466, 3;
	shf.l.wrap.b32 	%r2470, %r2466, %r2465, 3;
	mov.b64 	%rd4571, {%r2470, %r2469};
	shr.u64 	%rd4572, %rd21413, 6;
	xor.b64  	%rd4573, %rd4570, %rd4572;
	xor.b64  	%rd4574, %rd4573, %rd4571;
	shr.u64 	%rd4575, %rd21397, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2471,%dummy}, %rd21397;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2472}, %rd21397;
	}
	shf.r.wrap.b32 	%r2473, %r2472, %r2471, 1;
	shf.r.wrap.b32 	%r2474, %r2471, %r2472, 1;
	mov.b64 	%rd4576, {%r2474, %r2473};
	xor.b64  	%rd4577, %rd4576, %rd4575;
	shf.r.wrap.b32 	%r2475, %r2472, %r2471, 8;
	shf.r.wrap.b32 	%r2476, %r2471, %r2472, 8;
	mov.b64 	%rd4578, {%r2476, %r2475};
	xor.b64  	%rd4579, %rd4577, %rd4578;
	add.s64 	%rd4580, %rd21408, %rd21398;
	add.s64 	%rd4581, %rd4580, %rd4574;
	add.s64 	%rd21398, %rd4581, %rd4579;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2477,%dummy}, %rd21414;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2478}, %rd21414;
	}
	shf.r.wrap.b32 	%r2479, %r2478, %r2477, 19;
	shf.r.wrap.b32 	%r2480, %r2477, %r2478, 19;
	mov.b64 	%rd4582, {%r2480, %r2479};
	shf.l.wrap.b32 	%r2481, %r2477, %r2478, 3;
	shf.l.wrap.b32 	%r2482, %r2478, %r2477, 3;
	mov.b64 	%rd4583, {%r2482, %r2481};
	shr.u64 	%rd4584, %rd21414, 6;
	xor.b64  	%rd4585, %rd4582, %rd4584;
	xor.b64  	%rd4586, %rd4585, %rd4583;
	shr.u64 	%rd4587, %rd21396, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2483,%dummy}, %rd21396;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2484}, %rd21396;
	}
	shf.r.wrap.b32 	%r2485, %r2484, %r2483, 1;
	shf.r.wrap.b32 	%r2486, %r2483, %r2484, 1;
	mov.b64 	%rd4588, {%r2486, %r2485};
	xor.b64  	%rd4589, %rd4588, %rd4587;
	shf.r.wrap.b32 	%r2487, %r2484, %r2483, 8;
	shf.r.wrap.b32 	%r2488, %r2483, %r2484, 8;
	mov.b64 	%rd4590, {%r2488, %r2487};
	xor.b64  	%rd4591, %rd4589, %rd4590;
	add.s64 	%rd4592, %rd21409, %rd21397;
	add.s64 	%rd4593, %rd4592, %rd4586;
	add.s64 	%rd21397, %rd4593, %rd4591;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2489,%dummy}, %rd21398;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2490}, %rd21398;
	}
	shf.r.wrap.b32 	%r2491, %r2490, %r2489, 19;
	shf.r.wrap.b32 	%r2492, %r2489, %r2490, 19;
	mov.b64 	%rd4594, {%r2492, %r2491};
	shf.l.wrap.b32 	%r2493, %r2489, %r2490, 3;
	shf.l.wrap.b32 	%r2494, %r2490, %r2489, 3;
	mov.b64 	%rd4595, {%r2494, %r2493};
	shr.u64 	%rd4596, %rd21398, 6;
	xor.b64  	%rd4597, %rd4594, %rd4596;
	xor.b64  	%rd4598, %rd4597, %rd4595;
	shr.u64 	%rd4599, %rd21395, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2495,%dummy}, %rd21395;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2496}, %rd21395;
	}
	shf.r.wrap.b32 	%r2497, %r2496, %r2495, 1;
	shf.r.wrap.b32 	%r2498, %r2495, %r2496, 1;
	mov.b64 	%rd4600, {%r2498, %r2497};
	xor.b64  	%rd4601, %rd4600, %rd4599;
	shf.r.wrap.b32 	%r2499, %r2496, %r2495, 8;
	shf.r.wrap.b32 	%r2500, %r2495, %r2496, 8;
	mov.b64 	%rd4602, {%r2500, %r2499};
	xor.b64  	%rd4603, %rd4601, %rd4602;
	add.s64 	%rd4604, %rd21410, %rd21396;
	add.s64 	%rd4605, %rd4604, %rd4598;
	add.s64 	%rd21396, %rd4605, %rd4603;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2501,%dummy}, %rd21397;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2502}, %rd21397;
	}
	shf.r.wrap.b32 	%r2503, %r2502, %r2501, 19;
	shf.r.wrap.b32 	%r2504, %r2501, %r2502, 19;
	mov.b64 	%rd4606, {%r2504, %r2503};
	shf.l.wrap.b32 	%r2505, %r2501, %r2502, 3;
	shf.l.wrap.b32 	%r2506, %r2502, %r2501, 3;
	mov.b64 	%rd4607, {%r2506, %r2505};
	shr.u64 	%rd4608, %rd21397, 6;
	xor.b64  	%rd4609, %rd4606, %rd4608;
	xor.b64  	%rd4610, %rd4609, %rd4607;
	shr.u64 	%rd4611, %rd21394, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2507,%dummy}, %rd21394;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2508}, %rd21394;
	}
	shf.r.wrap.b32 	%r2509, %r2508, %r2507, 1;
	shf.r.wrap.b32 	%r2510, %r2507, %r2508, 1;
	mov.b64 	%rd4612, {%r2510, %r2509};
	xor.b64  	%rd4613, %rd4612, %rd4611;
	shf.r.wrap.b32 	%r2511, %r2508, %r2507, 8;
	shf.r.wrap.b32 	%r2512, %r2507, %r2508, 8;
	mov.b64 	%rd4614, {%r2512, %r2511};
	xor.b64  	%rd4615, %rd4613, %rd4614;
	add.s64 	%rd4616, %rd21411, %rd21395;
	add.s64 	%rd4617, %rd4616, %rd4610;
	add.s64 	%rd21395, %rd4617, %rd4615;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2513,%dummy}, %rd21396;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2514}, %rd21396;
	}
	shf.r.wrap.b32 	%r2515, %r2514, %r2513, 19;
	shf.r.wrap.b32 	%r2516, %r2513, %r2514, 19;
	mov.b64 	%rd4618, {%r2516, %r2515};
	shf.l.wrap.b32 	%r2517, %r2513, %r2514, 3;
	shf.l.wrap.b32 	%r2518, %r2514, %r2513, 3;
	mov.b64 	%rd4619, {%r2518, %r2517};
	shr.u64 	%rd4620, %rd21396, 6;
	xor.b64  	%rd4621, %rd4618, %rd4620;
	xor.b64  	%rd4622, %rd4621, %rd4619;
	shr.u64 	%rd4623, %rd21393, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2519,%dummy}, %rd21393;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2520}, %rd21393;
	}
	shf.r.wrap.b32 	%r2521, %r2520, %r2519, 1;
	shf.r.wrap.b32 	%r2522, %r2519, %r2520, 1;
	mov.b64 	%rd4624, {%r2522, %r2521};
	xor.b64  	%rd4625, %rd4624, %rd4623;
	shf.r.wrap.b32 	%r2523, %r2520, %r2519, 8;
	shf.r.wrap.b32 	%r2524, %r2519, %r2520, 8;
	mov.b64 	%rd4626, {%r2524, %r2523};
	xor.b64  	%rd4627, %rd4625, %rd4626;
	add.s64 	%rd4628, %rd21412, %rd21394;
	add.s64 	%rd4629, %rd4628, %rd4622;
	add.s64 	%rd21394, %rd4629, %rd4627;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2525,%dummy}, %rd21395;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2526}, %rd21395;
	}
	shf.r.wrap.b32 	%r2527, %r2526, %r2525, 19;
	shf.r.wrap.b32 	%r2528, %r2525, %r2526, 19;
	mov.b64 	%rd4630, {%r2528, %r2527};
	shf.l.wrap.b32 	%r2529, %r2525, %r2526, 3;
	shf.l.wrap.b32 	%r2530, %r2526, %r2525, 3;
	mov.b64 	%rd4631, {%r2530, %r2529};
	shr.u64 	%rd4632, %rd21395, 6;
	xor.b64  	%rd4633, %rd4630, %rd4632;
	xor.b64  	%rd4634, %rd4633, %rd4631;
	shr.u64 	%rd4635, %rd21392, 7;
	shf.r.wrap.b32 	%r2531, %r2370, %r2369, 1;
	shf.r.wrap.b32 	%r2532, %r2369, %r2370, 1;
	mov.b64 	%rd4636, {%r2532, %r2531};
	xor.b64  	%rd4637, %rd4636, %rd4635;
	shf.r.wrap.b32 	%r2533, %r2370, %r2369, 8;
	shf.r.wrap.b32 	%r2534, %r2369, %r2370, 8;
	mov.b64 	%rd4638, {%r2534, %r2533};
	xor.b64  	%rd4639, %rd4637, %rd4638;
	add.s64 	%rd4640, %rd21413, %rd21393;
	add.s64 	%rd4641, %rd4640, %rd4634;
	add.s64 	%rd21393, %rd4641, %rd4639;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2535,%dummy}, %rd21394;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2536}, %rd21394;
	}
	shf.r.wrap.b32 	%r2537, %r2536, %r2535, 19;
	shf.r.wrap.b32 	%r2538, %r2535, %r2536, 19;
	mov.b64 	%rd4642, {%r2538, %r2537};
	shf.l.wrap.b32 	%r2539, %r2535, %r2536, 3;
	shf.l.wrap.b32 	%r2540, %r2536, %r2535, 3;
	mov.b64 	%rd4643, {%r2540, %r2539};
	shr.u64 	%rd4644, %rd21394, 6;
	xor.b64  	%rd4645, %rd4642, %rd4644;
	xor.b64  	%rd4646, %rd4645, %rd4643;
	shr.u64 	%rd4647, %rd21391, 7;
	shf.r.wrap.b32 	%r2541, %r2382, %r2381, 1;
	shf.r.wrap.b32 	%r2542, %r2381, %r2382, 1;
	mov.b64 	%rd4648, {%r2542, %r2541};
	xor.b64  	%rd4649, %rd4648, %rd4647;
	shf.r.wrap.b32 	%r2543, %r2382, %r2381, 8;
	shf.r.wrap.b32 	%r2544, %r2381, %r2382, 8;
	mov.b64 	%rd4650, {%r2544, %r2543};
	xor.b64  	%rd4651, %rd4649, %rd4650;
	add.s64 	%rd4652, %rd21414, %rd21392;
	add.s64 	%rd4653, %rd4652, %rd4646;
	add.s64 	%rd21392, %rd4653, %rd4651;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2545,%dummy}, %rd21393;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2546}, %rd21393;
	}
	shf.r.wrap.b32 	%r2547, %r2546, %r2545, 19;
	shf.r.wrap.b32 	%r2548, %r2545, %r2546, 19;
	mov.b64 	%rd4654, {%r2548, %r2547};
	shf.l.wrap.b32 	%r2549, %r2545, %r2546, 3;
	shf.l.wrap.b32 	%r2550, %r2546, %r2545, 3;
	mov.b64 	%rd4655, {%r2550, %r2549};
	shr.u64 	%rd4656, %rd21393, 6;
	xor.b64  	%rd4657, %rd4654, %rd4656;
	xor.b64  	%rd4658, %rd4657, %rd4655;
	shf.r.wrap.b32 	%r2551, %r2394, %r2393, 1;
	shf.r.wrap.b32 	%r2552, %r2393, %r2394, 1;
	mov.b64 	%rd4659, {%r2552, %r2551};
	shf.r.wrap.b32 	%r2553, %r2394, %r2393, 8;
	shf.r.wrap.b32 	%r2554, %r2393, %r2394, 8;
	mov.b64 	%rd4660, {%r2554, %r2553};
	shr.u64 	%rd4661, %rd21407, 7;
	xor.b64  	%rd4662, %rd4659, %rd4661;
	xor.b64  	%rd4663, %rd4662, %rd4660;
	add.s64 	%rd4664, %rd21398, %rd21391;
	add.s64 	%rd4665, %rd4664, %rd4658;
	add.s64 	%rd21391, %rd4665, %rd4663;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2555,%dummy}, %rd21403;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2556}, %rd21403;
	}
	shf.r.wrap.b32 	%r2557, %r2556, %r2555, 18;
	shf.r.wrap.b32 	%r2558, %r2555, %r2556, 18;
	mov.b64 	%rd4666, {%r2558, %r2557};
	shf.r.wrap.b32 	%r2559, %r2556, %r2555, 14;
	shf.r.wrap.b32 	%r2560, %r2555, %r2556, 14;
	mov.b64 	%rd4667, {%r2560, %r2559};
	xor.b64  	%rd4668, %rd4666, %rd4667;
	shf.l.wrap.b32 	%r2561, %r2555, %r2556, 23;
	shf.l.wrap.b32 	%r2562, %r2556, %r2555, 23;
	mov.b64 	%rd4669, {%r2562, %r2561};
	xor.b64  	%rd4670, %rd4668, %rd4669;
	xor.b64  	%rd4671, %rd21404, %rd21405;
	and.b64  	%rd4672, %rd4671, %rd21403;
	xor.b64  	%rd4673, %rd4672, %rd21405;
	add.s64 	%rd4674, %rd4673, %rd21406;
	add.s64 	%rd4675, %rd4674, %rd21407;
	add.s64 	%rd262, %rd21390, 128;
	ld.const.u64 	%rd4676, [%rd21390+128];
	add.s64 	%rd4677, %rd4675, %rd4676;
	add.s64 	%rd4678, %rd4677, %rd4670;
	add.s64 	%rd4679, %rd4678, %rd21402;
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2563}, %rd21399;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2564,%dummy}, %rd21399;
	}
	shf.l.wrap.b32 	%r2565, %r2564, %r2563, 30;
	shf.l.wrap.b32 	%r2566, %r2563, %r2564, 30;
	mov.b64 	%rd4680, {%r2566, %r2565};
	shf.r.wrap.b32 	%r2567, %r2563, %r2564, 28;
	shf.r.wrap.b32 	%r2568, %r2564, %r2563, 28;
	mov.b64 	%rd4681, {%r2568, %r2567};
	xor.b64  	%rd4682, %rd4680, %rd4681;
	shf.l.wrap.b32 	%r2569, %r2564, %r2563, 25;
	shf.l.wrap.b32 	%r2570, %r2563, %r2564, 25;
	mov.b64 	%rd4683, {%r2570, %r2569};
	xor.b64  	%rd4684, %rd4682, %rd4683;
	xor.b64  	%rd4685, %rd21399, %rd21400;
	xor.b64  	%rd4686, %rd21399, %rd21401;
	and.b64  	%rd4687, %rd4685, %rd4686;
	xor.b64  	%rd4688, %rd4687, %rd21399;
	add.s64 	%rd4689, %rd4678, %rd4688;
	add.s64 	%rd4690, %rd4689, %rd4684;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2571,%dummy}, %rd4679;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2572}, %rd4679;
	}
	shf.r.wrap.b32 	%r2573, %r2572, %r2571, 14;
	shf.r.wrap.b32 	%r2574, %r2571, %r2572, 14;
	mov.b64 	%rd4691, {%r2574, %r2573};
	shf.r.wrap.b32 	%r2575, %r2572, %r2571, 18;
	shf.r.wrap.b32 	%r2576, %r2571, %r2572, 18;
	mov.b64 	%rd4692, {%r2576, %r2575};
	xor.b64  	%rd4693, %rd4692, %rd4691;
	shf.l.wrap.b32 	%r2577, %r2571, %r2572, 23;
	shf.l.wrap.b32 	%r2578, %r2572, %r2571, 23;
	mov.b64 	%rd4694, {%r2578, %r2577};
	xor.b64  	%rd4695, %rd4693, %rd4694;
	xor.b64  	%rd4696, %rd21403, %rd21404;
	and.b64  	%rd4697, %rd4679, %rd4696;
	xor.b64  	%rd4698, %rd4697, %rd21404;
	add.s64 	%rd4699, %rd21408, %rd21405;
	ld.const.u64 	%rd4700, [%rd21390+136];
	add.s64 	%rd4701, %rd4699, %rd4700;
	add.s64 	%rd4702, %rd4701, %rd4698;
	add.s64 	%rd4703, %rd4702, %rd4695;
	add.s64 	%rd4704, %rd4703, %rd21401;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2579,%dummy}, %rd4690;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2580}, %rd4690;
	}
	shf.r.wrap.b32 	%r2581, %r2580, %r2579, 28;
	shf.r.wrap.b32 	%r2582, %r2579, %r2580, 28;
	mov.b64 	%rd4705, {%r2582, %r2581};
	shf.l.wrap.b32 	%r2583, %r2579, %r2580, 30;
	shf.l.wrap.b32 	%r2584, %r2580, %r2579, 30;
	mov.b64 	%rd4706, {%r2584, %r2583};
	xor.b64  	%rd4707, %rd4706, %rd4705;
	shf.l.wrap.b32 	%r2585, %r2579, %r2580, 25;
	shf.l.wrap.b32 	%r2586, %r2580, %r2579, 25;
	mov.b64 	%rd4708, {%r2586, %r2585};
	xor.b64  	%rd4709, %rd4707, %rd4708;
	xor.b64  	%rd4710, %rd4690, %rd21400;
	xor.b64  	%rd4711, %rd4690, %rd21399;
	and.b64  	%rd4712, %rd4711, %rd4710;
	xor.b64  	%rd4713, %rd4712, %rd4690;
	add.s64 	%rd4714, %rd4703, %rd4713;
	add.s64 	%rd4715, %rd4714, %rd4709;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2587,%dummy}, %rd4704;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2588}, %rd4704;
	}
	shf.r.wrap.b32 	%r2589, %r2588, %r2587, 14;
	shf.r.wrap.b32 	%r2590, %r2587, %r2588, 14;
	mov.b64 	%rd4716, {%r2590, %r2589};
	shf.r.wrap.b32 	%r2591, %r2588, %r2587, 18;
	shf.r.wrap.b32 	%r2592, %r2587, %r2588, 18;
	mov.b64 	%rd4717, {%r2592, %r2591};
	xor.b64  	%rd4718, %rd4717, %rd4716;
	shf.l.wrap.b32 	%r2593, %r2587, %r2588, 23;
	shf.l.wrap.b32 	%r2594, %r2588, %r2587, 23;
	mov.b64 	%rd4719, {%r2594, %r2593};
	xor.b64  	%rd4720, %rd4718, %rd4719;
	xor.b64  	%rd4721, %rd4679, %rd21403;
	and.b64  	%rd4722, %rd4704, %rd4721;
	xor.b64  	%rd4723, %rd4722, %rd21403;
	add.s64 	%rd4724, %rd21409, %rd21404;
	ld.const.u64 	%rd4725, [%rd21390+144];
	add.s64 	%rd4726, %rd4724, %rd4725;
	add.s64 	%rd4727, %rd4726, %rd4723;
	add.s64 	%rd4728, %rd4727, %rd4720;
	add.s64 	%rd4729, %rd4728, %rd21400;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2595,%dummy}, %rd4715;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2596}, %rd4715;
	}
	shf.r.wrap.b32 	%r2597, %r2596, %r2595, 28;
	shf.r.wrap.b32 	%r2598, %r2595, %r2596, 28;
	mov.b64 	%rd4730, {%r2598, %r2597};
	shf.l.wrap.b32 	%r2599, %r2595, %r2596, 30;
	shf.l.wrap.b32 	%r2600, %r2596, %r2595, 30;
	mov.b64 	%rd4731, {%r2600, %r2599};
	xor.b64  	%rd4732, %rd4731, %rd4730;
	shf.l.wrap.b32 	%r2601, %r2595, %r2596, 25;
	shf.l.wrap.b32 	%r2602, %r2596, %r2595, 25;
	mov.b64 	%rd4733, {%r2602, %r2601};
	xor.b64  	%rd4734, %rd4732, %rd4733;
	xor.b64  	%rd4735, %rd4715, %rd21399;
	xor.b64  	%rd4736, %rd4715, %rd4690;
	and.b64  	%rd4737, %rd4736, %rd4735;
	xor.b64  	%rd4738, %rd4737, %rd4715;
	add.s64 	%rd4739, %rd4728, %rd4738;
	add.s64 	%rd4740, %rd4739, %rd4734;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2603,%dummy}, %rd4729;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2604}, %rd4729;
	}
	shf.r.wrap.b32 	%r2605, %r2604, %r2603, 14;
	shf.r.wrap.b32 	%r2606, %r2603, %r2604, 14;
	mov.b64 	%rd4741, {%r2606, %r2605};
	shf.r.wrap.b32 	%r2607, %r2604, %r2603, 18;
	shf.r.wrap.b32 	%r2608, %r2603, %r2604, 18;
	mov.b64 	%rd4742, {%r2608, %r2607};
	xor.b64  	%rd4743, %rd4742, %rd4741;
	shf.l.wrap.b32 	%r2609, %r2603, %r2604, 23;
	shf.l.wrap.b32 	%r2610, %r2604, %r2603, 23;
	mov.b64 	%rd4744, {%r2610, %r2609};
	xor.b64  	%rd4745, %rd4743, %rd4744;
	xor.b64  	%rd4746, %rd4704, %rd4679;
	and.b64  	%rd4747, %rd4729, %rd4746;
	xor.b64  	%rd4748, %rd4747, %rd4679;
	add.s64 	%rd4749, %rd21410, %rd21403;
	ld.const.u64 	%rd4750, [%rd21390+152];
	add.s64 	%rd4751, %rd4749, %rd4750;
	add.s64 	%rd4752, %rd4751, %rd4748;
	add.s64 	%rd4753, %rd4752, %rd4745;
	add.s64 	%rd4754, %rd4753, %rd21399;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2611,%dummy}, %rd4740;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2612}, %rd4740;
	}
	shf.r.wrap.b32 	%r2613, %r2612, %r2611, 28;
	shf.r.wrap.b32 	%r2614, %r2611, %r2612, 28;
	mov.b64 	%rd4755, {%r2614, %r2613};
	shf.l.wrap.b32 	%r2615, %r2611, %r2612, 30;
	shf.l.wrap.b32 	%r2616, %r2612, %r2611, 30;
	mov.b64 	%rd4756, {%r2616, %r2615};
	xor.b64  	%rd4757, %rd4756, %rd4755;
	shf.l.wrap.b32 	%r2617, %r2611, %r2612, 25;
	shf.l.wrap.b32 	%r2618, %r2612, %r2611, 25;
	mov.b64 	%rd4758, {%r2618, %r2617};
	xor.b64  	%rd4759, %rd4757, %rd4758;
	xor.b64  	%rd4760, %rd4740, %rd4690;
	xor.b64  	%rd4761, %rd4740, %rd4715;
	and.b64  	%rd4762, %rd4761, %rd4760;
	xor.b64  	%rd4763, %rd4762, %rd4740;
	add.s64 	%rd4764, %rd4753, %rd4763;
	add.s64 	%rd4765, %rd4764, %rd4759;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2619,%dummy}, %rd4754;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2620}, %rd4754;
	}
	shf.r.wrap.b32 	%r2621, %r2620, %r2619, 14;
	shf.r.wrap.b32 	%r2622, %r2619, %r2620, 14;
	mov.b64 	%rd4766, {%r2622, %r2621};
	shf.r.wrap.b32 	%r2623, %r2620, %r2619, 18;
	shf.r.wrap.b32 	%r2624, %r2619, %r2620, 18;
	mov.b64 	%rd4767, {%r2624, %r2623};
	xor.b64  	%rd4768, %rd4767, %rd4766;
	shf.l.wrap.b32 	%r2625, %r2619, %r2620, 23;
	shf.l.wrap.b32 	%r2626, %r2620, %r2619, 23;
	mov.b64 	%rd4769, {%r2626, %r2625};
	xor.b64  	%rd4770, %rd4768, %rd4769;
	xor.b64  	%rd4771, %rd4729, %rd4704;
	and.b64  	%rd4772, %rd4754, %rd4771;
	xor.b64  	%rd4773, %rd4772, %rd4704;
	add.s64 	%rd4774, %rd4679, %rd21411;
	ld.const.u64 	%rd4775, [%rd21390+160];
	add.s64 	%rd4776, %rd4774, %rd4775;
	add.s64 	%rd4777, %rd4776, %rd4773;
	add.s64 	%rd4778, %rd4777, %rd4770;
	add.s64 	%rd4779, %rd4778, %rd4690;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2627,%dummy}, %rd4765;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2628}, %rd4765;
	}
	shf.r.wrap.b32 	%r2629, %r2628, %r2627, 28;
	shf.r.wrap.b32 	%r2630, %r2627, %r2628, 28;
	mov.b64 	%rd4780, {%r2630, %r2629};
	shf.l.wrap.b32 	%r2631, %r2627, %r2628, 30;
	shf.l.wrap.b32 	%r2632, %r2628, %r2627, 30;
	mov.b64 	%rd4781, {%r2632, %r2631};
	xor.b64  	%rd4782, %rd4781, %rd4780;
	shf.l.wrap.b32 	%r2633, %r2627, %r2628, 25;
	shf.l.wrap.b32 	%r2634, %r2628, %r2627, 25;
	mov.b64 	%rd4783, {%r2634, %r2633};
	xor.b64  	%rd4784, %rd4782, %rd4783;
	xor.b64  	%rd4785, %rd4765, %rd4715;
	xor.b64  	%rd4786, %rd4765, %rd4740;
	and.b64  	%rd4787, %rd4786, %rd4785;
	xor.b64  	%rd4788, %rd4787, %rd4765;
	add.s64 	%rd4789, %rd4778, %rd4788;
	add.s64 	%rd4790, %rd4789, %rd4784;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2635,%dummy}, %rd4779;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2636}, %rd4779;
	}
	shf.r.wrap.b32 	%r2637, %r2636, %r2635, 14;
	shf.r.wrap.b32 	%r2638, %r2635, %r2636, 14;
	mov.b64 	%rd4791, {%r2638, %r2637};
	shf.r.wrap.b32 	%r2639, %r2636, %r2635, 18;
	shf.r.wrap.b32 	%r2640, %r2635, %r2636, 18;
	mov.b64 	%rd4792, {%r2640, %r2639};
	xor.b64  	%rd4793, %rd4792, %rd4791;
	shf.l.wrap.b32 	%r2641, %r2635, %r2636, 23;
	shf.l.wrap.b32 	%r2642, %r2636, %r2635, 23;
	mov.b64 	%rd4794, {%r2642, %r2641};
	xor.b64  	%rd4795, %rd4793, %rd4794;
	xor.b64  	%rd4796, %rd4754, %rd4729;
	and.b64  	%rd4797, %rd4779, %rd4796;
	xor.b64  	%rd4798, %rd4797, %rd4729;
	add.s64 	%rd4799, %rd4704, %rd21412;
	ld.const.u64 	%rd4800, [%rd21390+168];
	add.s64 	%rd4801, %rd4799, %rd4800;
	add.s64 	%rd4802, %rd4801, %rd4798;
	add.s64 	%rd4803, %rd4802, %rd4795;
	add.s64 	%rd4804, %rd4803, %rd4715;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2643,%dummy}, %rd4790;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2644}, %rd4790;
	}
	shf.r.wrap.b32 	%r2645, %r2644, %r2643, 28;
	shf.r.wrap.b32 	%r2646, %r2643, %r2644, 28;
	mov.b64 	%rd4805, {%r2646, %r2645};
	shf.l.wrap.b32 	%r2647, %r2643, %r2644, 30;
	shf.l.wrap.b32 	%r2648, %r2644, %r2643, 30;
	mov.b64 	%rd4806, {%r2648, %r2647};
	xor.b64  	%rd4807, %rd4806, %rd4805;
	shf.l.wrap.b32 	%r2649, %r2643, %r2644, 25;
	shf.l.wrap.b32 	%r2650, %r2644, %r2643, 25;
	mov.b64 	%rd4808, {%r2650, %r2649};
	xor.b64  	%rd4809, %rd4807, %rd4808;
	xor.b64  	%rd4810, %rd4790, %rd4740;
	xor.b64  	%rd4811, %rd4790, %rd4765;
	and.b64  	%rd4812, %rd4811, %rd4810;
	xor.b64  	%rd4813, %rd4812, %rd4790;
	add.s64 	%rd4814, %rd4803, %rd4813;
	add.s64 	%rd4815, %rd4814, %rd4809;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2651,%dummy}, %rd4804;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2652}, %rd4804;
	}
	shf.r.wrap.b32 	%r2653, %r2652, %r2651, 14;
	shf.r.wrap.b32 	%r2654, %r2651, %r2652, 14;
	mov.b64 	%rd4816, {%r2654, %r2653};
	shf.r.wrap.b32 	%r2655, %r2652, %r2651, 18;
	shf.r.wrap.b32 	%r2656, %r2651, %r2652, 18;
	mov.b64 	%rd4817, {%r2656, %r2655};
	xor.b64  	%rd4818, %rd4817, %rd4816;
	shf.l.wrap.b32 	%r2657, %r2651, %r2652, 23;
	shf.l.wrap.b32 	%r2658, %r2652, %r2651, 23;
	mov.b64 	%rd4819, {%r2658, %r2657};
	xor.b64  	%rd4820, %rd4818, %rd4819;
	xor.b64  	%rd4821, %rd4779, %rd4754;
	and.b64  	%rd4822, %rd4804, %rd4821;
	xor.b64  	%rd4823, %rd4822, %rd4754;
	add.s64 	%rd4824, %rd4729, %rd21413;
	ld.const.u64 	%rd4825, [%rd21390+176];
	add.s64 	%rd4826, %rd4824, %rd4825;
	add.s64 	%rd4827, %rd4826, %rd4823;
	add.s64 	%rd4828, %rd4827, %rd4820;
	add.s64 	%rd4829, %rd4828, %rd4740;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2659,%dummy}, %rd4815;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2660}, %rd4815;
	}
	shf.r.wrap.b32 	%r2661, %r2660, %r2659, 28;
	shf.r.wrap.b32 	%r2662, %r2659, %r2660, 28;
	mov.b64 	%rd4830, {%r2662, %r2661};
	shf.l.wrap.b32 	%r2663, %r2659, %r2660, 30;
	shf.l.wrap.b32 	%r2664, %r2660, %r2659, 30;
	mov.b64 	%rd4831, {%r2664, %r2663};
	xor.b64  	%rd4832, %rd4831, %rd4830;
	shf.l.wrap.b32 	%r2665, %r2659, %r2660, 25;
	shf.l.wrap.b32 	%r2666, %r2660, %r2659, 25;
	mov.b64 	%rd4833, {%r2666, %r2665};
	xor.b64  	%rd4834, %rd4832, %rd4833;
	xor.b64  	%rd4835, %rd4815, %rd4765;
	xor.b64  	%rd4836, %rd4815, %rd4790;
	and.b64  	%rd4837, %rd4836, %rd4835;
	xor.b64  	%rd4838, %rd4837, %rd4815;
	add.s64 	%rd4839, %rd4828, %rd4838;
	add.s64 	%rd4840, %rd4839, %rd4834;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2667,%dummy}, %rd4829;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2668}, %rd4829;
	}
	shf.r.wrap.b32 	%r2669, %r2668, %r2667, 14;
	shf.r.wrap.b32 	%r2670, %r2667, %r2668, 14;
	mov.b64 	%rd4841, {%r2670, %r2669};
	shf.r.wrap.b32 	%r2671, %r2668, %r2667, 18;
	shf.r.wrap.b32 	%r2672, %r2667, %r2668, 18;
	mov.b64 	%rd4842, {%r2672, %r2671};
	xor.b64  	%rd4843, %rd4842, %rd4841;
	shf.l.wrap.b32 	%r2673, %r2667, %r2668, 23;
	shf.l.wrap.b32 	%r2674, %r2668, %r2667, 23;
	mov.b64 	%rd4844, {%r2674, %r2673};
	xor.b64  	%rd4845, %rd4843, %rd4844;
	xor.b64  	%rd4846, %rd4804, %rd4779;
	and.b64  	%rd4847, %rd4829, %rd4846;
	xor.b64  	%rd4848, %rd4847, %rd4779;
	add.s64 	%rd4849, %rd4754, %rd21414;
	ld.const.u64 	%rd4850, [%rd21390+184];
	add.s64 	%rd4851, %rd4849, %rd4850;
	add.s64 	%rd4852, %rd4851, %rd4848;
	add.s64 	%rd4853, %rd4852, %rd4845;
	add.s64 	%rd4854, %rd4853, %rd4765;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2675,%dummy}, %rd4840;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2676}, %rd4840;
	}
	shf.r.wrap.b32 	%r2677, %r2676, %r2675, 28;
	shf.r.wrap.b32 	%r2678, %r2675, %r2676, 28;
	mov.b64 	%rd4855, {%r2678, %r2677};
	shf.l.wrap.b32 	%r2679, %r2675, %r2676, 30;
	shf.l.wrap.b32 	%r2680, %r2676, %r2675, 30;
	mov.b64 	%rd4856, {%r2680, %r2679};
	xor.b64  	%rd4857, %rd4856, %rd4855;
	shf.l.wrap.b32 	%r2681, %r2675, %r2676, 25;
	shf.l.wrap.b32 	%r2682, %r2676, %r2675, 25;
	mov.b64 	%rd4858, {%r2682, %r2681};
	xor.b64  	%rd4859, %rd4857, %rd4858;
	xor.b64  	%rd4860, %rd4840, %rd4790;
	xor.b64  	%rd4861, %rd4840, %rd4815;
	and.b64  	%rd4862, %rd4861, %rd4860;
	xor.b64  	%rd4863, %rd4862, %rd4840;
	add.s64 	%rd4864, %rd4853, %rd4863;
	add.s64 	%rd4865, %rd4864, %rd4859;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2683,%dummy}, %rd4854;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2684}, %rd4854;
	}
	shf.r.wrap.b32 	%r2685, %r2684, %r2683, 14;
	shf.r.wrap.b32 	%r2686, %r2683, %r2684, 14;
	mov.b64 	%rd4866, {%r2686, %r2685};
	shf.r.wrap.b32 	%r2687, %r2684, %r2683, 18;
	shf.r.wrap.b32 	%r2688, %r2683, %r2684, 18;
	mov.b64 	%rd4867, {%r2688, %r2687};
	xor.b64  	%rd4868, %rd4867, %rd4866;
	shf.l.wrap.b32 	%r2689, %r2683, %r2684, 23;
	shf.l.wrap.b32 	%r2690, %r2684, %r2683, 23;
	mov.b64 	%rd4869, {%r2690, %r2689};
	xor.b64  	%rd4870, %rd4868, %rd4869;
	xor.b64  	%rd4871, %rd4829, %rd4804;
	and.b64  	%rd4872, %rd4854, %rd4871;
	xor.b64  	%rd4873, %rd4872, %rd4804;
	add.s64 	%rd4874, %rd4779, %rd21398;
	ld.const.u64 	%rd4875, [%rd21390+192];
	add.s64 	%rd4876, %rd4874, %rd4875;
	add.s64 	%rd4877, %rd4876, %rd4873;
	add.s64 	%rd4878, %rd4877, %rd4870;
	add.s64 	%rd4879, %rd4878, %rd4790;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2691,%dummy}, %rd4865;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2692}, %rd4865;
	}
	shf.r.wrap.b32 	%r2693, %r2692, %r2691, 28;
	shf.r.wrap.b32 	%r2694, %r2691, %r2692, 28;
	mov.b64 	%rd4880, {%r2694, %r2693};
	shf.l.wrap.b32 	%r2695, %r2691, %r2692, 30;
	shf.l.wrap.b32 	%r2696, %r2692, %r2691, 30;
	mov.b64 	%rd4881, {%r2696, %r2695};
	xor.b64  	%rd4882, %rd4881, %rd4880;
	shf.l.wrap.b32 	%r2697, %r2691, %r2692, 25;
	shf.l.wrap.b32 	%r2698, %r2692, %r2691, 25;
	mov.b64 	%rd4883, {%r2698, %r2697};
	xor.b64  	%rd4884, %rd4882, %rd4883;
	xor.b64  	%rd4885, %rd4865, %rd4815;
	xor.b64  	%rd4886, %rd4865, %rd4840;
	and.b64  	%rd4887, %rd4886, %rd4885;
	xor.b64  	%rd4888, %rd4887, %rd4865;
	add.s64 	%rd4889, %rd4878, %rd4888;
	add.s64 	%rd4890, %rd4889, %rd4884;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2699,%dummy}, %rd4879;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2700}, %rd4879;
	}
	shf.r.wrap.b32 	%r2701, %r2700, %r2699, 14;
	shf.r.wrap.b32 	%r2702, %r2699, %r2700, 14;
	mov.b64 	%rd4891, {%r2702, %r2701};
	shf.r.wrap.b32 	%r2703, %r2700, %r2699, 18;
	shf.r.wrap.b32 	%r2704, %r2699, %r2700, 18;
	mov.b64 	%rd4892, {%r2704, %r2703};
	xor.b64  	%rd4893, %rd4892, %rd4891;
	shf.l.wrap.b32 	%r2705, %r2699, %r2700, 23;
	shf.l.wrap.b32 	%r2706, %r2700, %r2699, 23;
	mov.b64 	%rd4894, {%r2706, %r2705};
	xor.b64  	%rd4895, %rd4893, %rd4894;
	xor.b64  	%rd4896, %rd4854, %rd4829;
	and.b64  	%rd4897, %rd4879, %rd4896;
	xor.b64  	%rd4898, %rd4897, %rd4829;
	add.s64 	%rd4899, %rd4804, %rd21397;
	ld.const.u64 	%rd4900, [%rd21390+200];
	add.s64 	%rd4901, %rd4899, %rd4900;
	add.s64 	%rd4902, %rd4901, %rd4898;
	add.s64 	%rd4903, %rd4902, %rd4895;
	add.s64 	%rd4904, %rd4903, %rd4815;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2707,%dummy}, %rd4890;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2708}, %rd4890;
	}
	shf.r.wrap.b32 	%r2709, %r2708, %r2707, 28;
	shf.r.wrap.b32 	%r2710, %r2707, %r2708, 28;
	mov.b64 	%rd4905, {%r2710, %r2709};
	shf.l.wrap.b32 	%r2711, %r2707, %r2708, 30;
	shf.l.wrap.b32 	%r2712, %r2708, %r2707, 30;
	mov.b64 	%rd4906, {%r2712, %r2711};
	xor.b64  	%rd4907, %rd4906, %rd4905;
	shf.l.wrap.b32 	%r2713, %r2707, %r2708, 25;
	shf.l.wrap.b32 	%r2714, %r2708, %r2707, 25;
	mov.b64 	%rd4908, {%r2714, %r2713};
	xor.b64  	%rd4909, %rd4907, %rd4908;
	xor.b64  	%rd4910, %rd4890, %rd4840;
	xor.b64  	%rd4911, %rd4890, %rd4865;
	and.b64  	%rd4912, %rd4911, %rd4910;
	xor.b64  	%rd4913, %rd4912, %rd4890;
	add.s64 	%rd4914, %rd4903, %rd4913;
	add.s64 	%rd4915, %rd4914, %rd4909;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2715,%dummy}, %rd4904;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2716}, %rd4904;
	}
	shf.r.wrap.b32 	%r2717, %r2716, %r2715, 14;
	shf.r.wrap.b32 	%r2718, %r2715, %r2716, 14;
	mov.b64 	%rd4916, {%r2718, %r2717};
	shf.r.wrap.b32 	%r2719, %r2716, %r2715, 18;
	shf.r.wrap.b32 	%r2720, %r2715, %r2716, 18;
	mov.b64 	%rd4917, {%r2720, %r2719};
	xor.b64  	%rd4918, %rd4917, %rd4916;
	shf.l.wrap.b32 	%r2721, %r2715, %r2716, 23;
	shf.l.wrap.b32 	%r2722, %r2716, %r2715, 23;
	mov.b64 	%rd4919, {%r2722, %r2721};
	xor.b64  	%rd4920, %rd4918, %rd4919;
	xor.b64  	%rd4921, %rd4879, %rd4854;
	and.b64  	%rd4922, %rd4904, %rd4921;
	xor.b64  	%rd4923, %rd4922, %rd4854;
	add.s64 	%rd4924, %rd4829, %rd21396;
	ld.const.u64 	%rd4925, [%rd21390+208];
	add.s64 	%rd4926, %rd4924, %rd4925;
	add.s64 	%rd4927, %rd4926, %rd4923;
	add.s64 	%rd4928, %rd4927, %rd4920;
	add.s64 	%rd4929, %rd4928, %rd4840;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2723,%dummy}, %rd4915;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2724}, %rd4915;
	}
	shf.r.wrap.b32 	%r2725, %r2724, %r2723, 28;
	shf.r.wrap.b32 	%r2726, %r2723, %r2724, 28;
	mov.b64 	%rd4930, {%r2726, %r2725};
	shf.l.wrap.b32 	%r2727, %r2723, %r2724, 30;
	shf.l.wrap.b32 	%r2728, %r2724, %r2723, 30;
	mov.b64 	%rd4931, {%r2728, %r2727};
	xor.b64  	%rd4932, %rd4931, %rd4930;
	shf.l.wrap.b32 	%r2729, %r2723, %r2724, 25;
	shf.l.wrap.b32 	%r2730, %r2724, %r2723, 25;
	mov.b64 	%rd4933, {%r2730, %r2729};
	xor.b64  	%rd4934, %rd4932, %rd4933;
	xor.b64  	%rd4935, %rd4915, %rd4865;
	xor.b64  	%rd4936, %rd4915, %rd4890;
	and.b64  	%rd4937, %rd4936, %rd4935;
	xor.b64  	%rd4938, %rd4937, %rd4915;
	add.s64 	%rd4939, %rd4928, %rd4938;
	add.s64 	%rd4940, %rd4939, %rd4934;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2731,%dummy}, %rd4929;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2732}, %rd4929;
	}
	shf.r.wrap.b32 	%r2733, %r2732, %r2731, 14;
	shf.r.wrap.b32 	%r2734, %r2731, %r2732, 14;
	mov.b64 	%rd4941, {%r2734, %r2733};
	shf.r.wrap.b32 	%r2735, %r2732, %r2731, 18;
	shf.r.wrap.b32 	%r2736, %r2731, %r2732, 18;
	mov.b64 	%rd4942, {%r2736, %r2735};
	xor.b64  	%rd4943, %rd4942, %rd4941;
	shf.l.wrap.b32 	%r2737, %r2731, %r2732, 23;
	shf.l.wrap.b32 	%r2738, %r2732, %r2731, 23;
	mov.b64 	%rd4944, {%r2738, %r2737};
	xor.b64  	%rd4945, %rd4943, %rd4944;
	xor.b64  	%rd4946, %rd4904, %rd4879;
	and.b64  	%rd4947, %rd4929, %rd4946;
	xor.b64  	%rd4948, %rd4947, %rd4879;
	add.s64 	%rd4949, %rd4854, %rd21395;
	ld.const.u64 	%rd4950, [%rd21390+216];
	add.s64 	%rd4951, %rd4949, %rd4950;
	add.s64 	%rd4952, %rd4951, %rd4948;
	add.s64 	%rd4953, %rd4952, %rd4945;
	add.s64 	%rd4954, %rd4953, %rd4865;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2739,%dummy}, %rd4940;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2740}, %rd4940;
	}
	shf.r.wrap.b32 	%r2741, %r2740, %r2739, 28;
	shf.r.wrap.b32 	%r2742, %r2739, %r2740, 28;
	mov.b64 	%rd4955, {%r2742, %r2741};
	shf.l.wrap.b32 	%r2743, %r2739, %r2740, 30;
	shf.l.wrap.b32 	%r2744, %r2740, %r2739, 30;
	mov.b64 	%rd4956, {%r2744, %r2743};
	xor.b64  	%rd4957, %rd4956, %rd4955;
	shf.l.wrap.b32 	%r2745, %r2739, %r2740, 25;
	shf.l.wrap.b32 	%r2746, %r2740, %r2739, 25;
	mov.b64 	%rd4958, {%r2746, %r2745};
	xor.b64  	%rd4959, %rd4957, %rd4958;
	xor.b64  	%rd4960, %rd4940, %rd4890;
	xor.b64  	%rd4961, %rd4940, %rd4915;
	and.b64  	%rd4962, %rd4961, %rd4960;
	xor.b64  	%rd4963, %rd4962, %rd4940;
	add.s64 	%rd4964, %rd4953, %rd4963;
	add.s64 	%rd4965, %rd4964, %rd4959;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2747,%dummy}, %rd4954;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2748}, %rd4954;
	}
	shf.r.wrap.b32 	%r2749, %r2748, %r2747, 14;
	shf.r.wrap.b32 	%r2750, %r2747, %r2748, 14;
	mov.b64 	%rd4966, {%r2750, %r2749};
	shf.r.wrap.b32 	%r2751, %r2748, %r2747, 18;
	shf.r.wrap.b32 	%r2752, %r2747, %r2748, 18;
	mov.b64 	%rd4967, {%r2752, %r2751};
	xor.b64  	%rd4968, %rd4967, %rd4966;
	shf.l.wrap.b32 	%r2753, %r2747, %r2748, 23;
	shf.l.wrap.b32 	%r2754, %r2748, %r2747, 23;
	mov.b64 	%rd4969, {%r2754, %r2753};
	xor.b64  	%rd4970, %rd4968, %rd4969;
	xor.b64  	%rd4971, %rd4929, %rd4904;
	and.b64  	%rd4972, %rd4954, %rd4971;
	xor.b64  	%rd4973, %rd4972, %rd4904;
	add.s64 	%rd4974, %rd4879, %rd21394;
	ld.const.u64 	%rd4975, [%rd21390+224];
	add.s64 	%rd4976, %rd4974, %rd4975;
	add.s64 	%rd4977, %rd4976, %rd4973;
	add.s64 	%rd4978, %rd4977, %rd4970;
	add.s64 	%rd21406, %rd4978, %rd4890;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2755,%dummy}, %rd4965;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2756}, %rd4965;
	}
	shf.r.wrap.b32 	%r2757, %r2756, %r2755, 28;
	shf.r.wrap.b32 	%r2758, %r2755, %r2756, 28;
	mov.b64 	%rd4979, {%r2758, %r2757};
	shf.l.wrap.b32 	%r2759, %r2755, %r2756, 30;
	shf.l.wrap.b32 	%r2760, %r2756, %r2755, 30;
	mov.b64 	%rd4980, {%r2760, %r2759};
	xor.b64  	%rd4981, %rd4980, %rd4979;
	shf.l.wrap.b32 	%r2761, %r2755, %r2756, 25;
	shf.l.wrap.b32 	%r2762, %r2756, %r2755, 25;
	mov.b64 	%rd4982, {%r2762, %r2761};
	xor.b64  	%rd4983, %rd4981, %rd4982;
	xor.b64  	%rd4984, %rd4965, %rd4915;
	xor.b64  	%rd4985, %rd4965, %rd4940;
	and.b64  	%rd4986, %rd4985, %rd4984;
	xor.b64  	%rd4987, %rd4986, %rd4965;
	add.s64 	%rd4988, %rd4978, %rd4987;
	add.s64 	%rd21402, %rd4988, %rd4983;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2763,%dummy}, %rd21406;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2764}, %rd21406;
	}
	shf.r.wrap.b32 	%r2765, %r2764, %r2763, 14;
	shf.r.wrap.b32 	%r2766, %r2763, %r2764, 14;
	mov.b64 	%rd4989, {%r2766, %r2765};
	shf.r.wrap.b32 	%r2767, %r2764, %r2763, 18;
	shf.r.wrap.b32 	%r2768, %r2763, %r2764, 18;
	mov.b64 	%rd4990, {%r2768, %r2767};
	xor.b64  	%rd4991, %rd4990, %rd4989;
	shf.l.wrap.b32 	%r2769, %r2763, %r2764, 23;
	shf.l.wrap.b32 	%r2770, %r2764, %r2763, 23;
	mov.b64 	%rd4992, {%r2770, %r2769};
	xor.b64  	%rd4993, %rd4991, %rd4992;
	xor.b64  	%rd4994, %rd4954, %rd4929;
	and.b64  	%rd4995, %rd21406, %rd4994;
	xor.b64  	%rd4996, %rd4995, %rd4929;
	add.s64 	%rd4997, %rd4904, %rd21393;
	ld.const.u64 	%rd4998, [%rd21390+232];
	add.s64 	%rd4999, %rd4997, %rd4998;
	add.s64 	%rd5000, %rd4999, %rd4996;
	add.s64 	%rd5001, %rd5000, %rd4993;
	add.s64 	%rd21405, %rd5001, %rd4915;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2771,%dummy}, %rd21402;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2772}, %rd21402;
	}
	shf.r.wrap.b32 	%r2773, %r2772, %r2771, 28;
	shf.r.wrap.b32 	%r2774, %r2771, %r2772, 28;
	mov.b64 	%rd5002, {%r2774, %r2773};
	shf.l.wrap.b32 	%r2775, %r2771, %r2772, 30;
	shf.l.wrap.b32 	%r2776, %r2772, %r2771, 30;
	mov.b64 	%rd5003, {%r2776, %r2775};
	xor.b64  	%rd5004, %rd5003, %rd5002;
	shf.l.wrap.b32 	%r2777, %r2771, %r2772, 25;
	shf.l.wrap.b32 	%r2778, %r2772, %r2771, 25;
	mov.b64 	%rd5005, {%r2778, %r2777};
	xor.b64  	%rd5006, %rd5004, %rd5005;
	xor.b64  	%rd5007, %rd21402, %rd4940;
	xor.b64  	%rd5008, %rd21402, %rd4965;
	and.b64  	%rd5009, %rd5008, %rd5007;
	xor.b64  	%rd5010, %rd5009, %rd21402;
	add.s64 	%rd5011, %rd5001, %rd5010;
	add.s64 	%rd21401, %rd5011, %rd5006;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2779,%dummy}, %rd21405;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2780}, %rd21405;
	}
	shf.r.wrap.b32 	%r2781, %r2780, %r2779, 14;
	shf.r.wrap.b32 	%r2782, %r2779, %r2780, 14;
	mov.b64 	%rd5012, {%r2782, %r2781};
	shf.r.wrap.b32 	%r2783, %r2780, %r2779, 18;
	shf.r.wrap.b32 	%r2784, %r2779, %r2780, 18;
	mov.b64 	%rd5013, {%r2784, %r2783};
	xor.b64  	%rd5014, %rd5013, %rd5012;
	shf.l.wrap.b32 	%r2785, %r2779, %r2780, 23;
	shf.l.wrap.b32 	%r2786, %r2780, %r2779, 23;
	mov.b64 	%rd5015, {%r2786, %r2785};
	xor.b64  	%rd5016, %rd5014, %rd5015;
	xor.b64  	%rd5017, %rd21406, %rd4954;
	and.b64  	%rd5018, %rd21405, %rd5017;
	xor.b64  	%rd5019, %rd5018, %rd4954;
	add.s64 	%rd5020, %rd4929, %rd21392;
	ld.const.u64 	%rd5021, [%rd21390+240];
	add.s64 	%rd5022, %rd5020, %rd5021;
	add.s64 	%rd5023, %rd5022, %rd5019;
	add.s64 	%rd5024, %rd5023, %rd5016;
	add.s64 	%rd21404, %rd5024, %rd4940;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2787,%dummy}, %rd21401;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2788}, %rd21401;
	}
	shf.r.wrap.b32 	%r2789, %r2788, %r2787, 28;
	shf.r.wrap.b32 	%r2790, %r2787, %r2788, 28;
	mov.b64 	%rd5025, {%r2790, %r2789};
	shf.l.wrap.b32 	%r2791, %r2787, %r2788, 30;
	shf.l.wrap.b32 	%r2792, %r2788, %r2787, 30;
	mov.b64 	%rd5026, {%r2792, %r2791};
	xor.b64  	%rd5027, %rd5026, %rd5025;
	shf.l.wrap.b32 	%r2793, %r2787, %r2788, 25;
	shf.l.wrap.b32 	%r2794, %r2788, %r2787, 25;
	mov.b64 	%rd5028, {%r2794, %r2793};
	xor.b64  	%rd5029, %rd5027, %rd5028;
	xor.b64  	%rd5030, %rd21401, %rd4965;
	xor.b64  	%rd5031, %rd21401, %rd21402;
	and.b64  	%rd5032, %rd5031, %rd5030;
	xor.b64  	%rd5033, %rd5032, %rd21401;
	add.s64 	%rd5034, %rd5024, %rd5033;
	add.s64 	%rd21400, %rd5034, %rd5029;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2795,%dummy}, %rd21404;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2796}, %rd21404;
	}
	shf.r.wrap.b32 	%r2797, %r2796, %r2795, 14;
	shf.r.wrap.b32 	%r2798, %r2795, %r2796, 14;
	mov.b64 	%rd5035, {%r2798, %r2797};
	shf.r.wrap.b32 	%r2799, %r2796, %r2795, 18;
	shf.r.wrap.b32 	%r2800, %r2795, %r2796, 18;
	mov.b64 	%rd5036, {%r2800, %r2799};
	xor.b64  	%rd5037, %rd5036, %rd5035;
	shf.l.wrap.b32 	%r2801, %r2795, %r2796, 23;
	shf.l.wrap.b32 	%r2802, %r2796, %r2795, 23;
	mov.b64 	%rd5038, {%r2802, %r2801};
	xor.b64  	%rd5039, %rd5037, %rd5038;
	xor.b64  	%rd5040, %rd21405, %rd21406;
	and.b64  	%rd5041, %rd21404, %rd5040;
	xor.b64  	%rd5042, %rd5041, %rd21406;
	add.s64 	%rd5043, %rd4954, %rd21391;
	ld.const.u64 	%rd5044, [%rd21390+248];
	add.s64 	%rd5045, %rd5043, %rd5044;
	add.s64 	%rd5046, %rd5045, %rd5042;
	add.s64 	%rd5047, %rd5046, %rd5039;
	add.s64 	%rd21403, %rd5047, %rd4965;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2803,%dummy}, %rd21400;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2804}, %rd21400;
	}
	shf.r.wrap.b32 	%r2805, %r2804, %r2803, 28;
	shf.r.wrap.b32 	%r2806, %r2803, %r2804, 28;
	mov.b64 	%rd5048, {%r2806, %r2805};
	shf.l.wrap.b32 	%r2807, %r2803, %r2804, 30;
	shf.l.wrap.b32 	%r2808, %r2804, %r2803, 30;
	mov.b64 	%rd5049, {%r2808, %r2807};
	xor.b64  	%rd5050, %rd5049, %rd5048;
	shf.l.wrap.b32 	%r2809, %r2803, %r2804, 25;
	shf.l.wrap.b32 	%r2810, %r2804, %r2803, 25;
	mov.b64 	%rd5051, {%r2810, %r2809};
	xor.b64  	%rd5052, %rd5050, %rd5051;
	xor.b64  	%rd5053, %rd21400, %rd21402;
	xor.b64  	%rd5054, %rd21400, %rd21401;
	and.b64  	%rd5055, %rd5054, %rd5053;
	xor.b64  	%rd5056, %rd5055, %rd21400;
	add.s64 	%rd5057, %rd5047, %rd5056;
	add.s64 	%rd21399, %rd5057, %rd5052;
	add.s32 	%r14334, %r14334, 16;
	setp.lt.s32	%p42, %r14334, 80;
	mov.u64 	%rd21390, %rd262;
	@%p42 bra 	BB3_64;

	add.s64 	%rd5058, %rd202, %rd21399;
	st.local.u64 	[%rd1], %rd5058;
	add.s64 	%rd5059, %rd204, %rd21400;
	st.local.u64 	[%rd1+8], %rd5059;
	add.s64 	%rd5060, %rd203, %rd21401;
	st.local.u64 	[%rd1+16], %rd5060;
	add.s64 	%rd5061, %rd201, %rd21402;
	st.local.u64 	[%rd1+24], %rd5061;
	add.s64 	%rd5062, %rd197, %rd21403;
	st.local.u64 	[%rd1+32], %rd5062;
	add.s64 	%rd5063, %rd199, %rd21404;
	st.local.u64 	[%rd1+40], %rd5063;
	add.s64 	%rd5064, %rd198, %rd21405;
	st.local.u64 	[%rd1+48], %rd5064;
	add.s64 	%rd5065, %rd200, %rd21406;
	st.local.u64 	[%rd1+56], %rd5065;
	sub.s32 	%r96, %r2, %r76;
	setp.lt.s32	%p43, %r96, 1;
	@%p43 bra 	BB3_83;

	add.s32 	%r97, %r75, -128;
	and.b32  	%r98, %r97, 3;
	setp.eq.s32	%p44, %r98, 0;
	mov.u32 	%r14338, 0;
	@%p44 bra 	BB3_72;

	setp.eq.s32	%p45, %r98, 1;
	mov.u32 	%r14336, 0;
	@%p45 bra 	BB3_71;

	setp.eq.s32	%p46, %r98, 2;
	mov.u32 	%r14335, 0;
	@%p46 bra 	BB3_70;

	xor.b32  	%r2815, %r76, 7;
	cvt.u64.u32	%rd5066, %r2815;
	add.s64 	%rd5067, %rd180, %rd5066;
	ld.local.u8 	%rs66, [%rd5067];
	st.local.u8 	[%rd179+7], %rs66;
	mov.u32 	%r14335, 1;

BB3_70:
	add.s32 	%r2816, %r14335, %r76;
	xor.b32  	%r2817, %r2816, 7;
	cvt.s64.s32	%rd5068, %r2817;
	add.s64 	%rd5069, %rd180, %rd5068;
	ld.local.u8 	%rs67, [%rd5069];
	xor.b32  	%r2818, %r14335, 7;
	cvt.u64.u32	%rd5070, %r2818;
	add.s64 	%rd5071, %rd179, %rd5070;
	st.local.u8 	[%rd5071], %rs67;
	add.s32 	%r14336, %r14335, 1;

BB3_71:
	add.s32 	%r2819, %r14336, %r76;
	xor.b32  	%r2820, %r2819, 7;
	cvt.s64.s32	%rd5072, %r2820;
	add.s64 	%rd5073, %rd180, %rd5072;
	ld.local.u8 	%rs68, [%rd5073];
	xor.b32  	%r2821, %r14336, 7;
	cvt.s64.s32	%rd5074, %r2821;
	add.s64 	%rd5075, %rd179, %rd5074;
	st.local.u8 	[%rd5075], %rs68;
	add.s32 	%r14338, %r14336, 1;

BB3_72:
	setp.lt.u32	%p47, %r97, 4;
	@%p47 bra 	BB3_83;

BB3_73:
	add.s32 	%r2822, %r14338, %r76;
	xor.b32  	%r2823, %r2822, 7;
	cvt.s64.s32	%rd5076, %r2823;
	add.s64 	%rd5077, %rd180, %rd5076;
	ld.local.u8 	%rs69, [%rd5077];
	xor.b32  	%r2824, %r14338, 7;
	cvt.s64.s32	%rd5078, %r2824;
	add.s64 	%rd5079, %rd179, %rd5078;
	st.local.u8 	[%rd5079], %rs69;
	add.s32 	%r2825, %r14338, 1;
	add.s32 	%r2826, %r2825, %r76;
	xor.b32  	%r2827, %r2826, 7;
	cvt.s64.s32	%rd5080, %r2827;
	add.s64 	%rd5081, %rd180, %rd5080;
	ld.local.u8 	%rs70, [%rd5081];
	xor.b32  	%r2828, %r2825, 7;
	cvt.s64.s32	%rd5082, %r2828;
	add.s64 	%rd5083, %rd179, %rd5082;
	st.local.u8 	[%rd5083], %rs70;
	add.s32 	%r2829, %r14338, 2;
	add.s32 	%r2830, %r2829, %r76;
	xor.b32  	%r2831, %r2830, 7;
	cvt.s64.s32	%rd5084, %r2831;
	add.s64 	%rd5085, %rd180, %rd5084;
	ld.local.u8 	%rs71, [%rd5085];
	xor.b32  	%r2832, %r2829, 7;
	cvt.s64.s32	%rd5086, %r2832;
	add.s64 	%rd5087, %rd179, %rd5086;
	st.local.u8 	[%rd5087], %rs71;
	add.s32 	%r2833, %r14338, 3;
	add.s32 	%r2834, %r2833, %r76;
	xor.b32  	%r2835, %r2834, 7;
	cvt.s64.s32	%rd5088, %r2835;
	add.s64 	%rd5089, %rd180, %rd5088;
	ld.local.u8 	%rs72, [%rd5089];
	xor.b32  	%r2836, %r2833, 7;
	cvt.s64.s32	%rd5090, %r2836;
	add.s64 	%rd5091, %rd179, %rd5090;
	st.local.u8 	[%rd5091], %rs72;
	add.s32 	%r14338, %r14338, 4;
	setp.lt.s32	%p48, %r14338, %r96;
	@%p48 bra 	BB3_73;

BB3_83:
	ld.local.u32 	%r2860, [%rd1+192];
	and.b32  	%r122, %r2860, 127;
	mov.u32 	%r2861, 128;
	sub.s32 	%r123, %r2861, %r122;
	and.b32  	%r124, %r123, 3;
	setp.eq.s32	%p55, %r124, 0;
	mov.u32 	%r14350, %r122;
	@%p55 bra 	BB3_89;

	setp.eq.s32	%p56, %r124, 1;
	mov.u32 	%r14348, %r122;
	@%p56 bra 	BB3_88;

	setp.eq.s32	%p57, %r124, 2;
	mov.u32 	%r14347, %r122;
	@%p57 bra 	BB3_87;

	xor.b32  	%r2862, %r122, 7;
	cvt.u64.u32	%rd5119, %r2862;
	add.s64 	%rd5120, %rd179, %rd5119;
	mov.u16 	%rs80, 0;
	st.local.u8 	[%rd5120], %rs80;
	add.s32 	%r14347, %r122, 1;

BB3_87:
	xor.b32  	%r2863, %r14347, 7;
	cvt.s64.s32	%rd5121, %r2863;
	add.s64 	%rd5122, %rd179, %rd5121;
	mov.u16 	%rs81, 0;
	st.local.u8 	[%rd5122], %rs81;
	add.s32 	%r14348, %r14347, 1;

BB3_88:
	xor.b32  	%r2864, %r14348, 7;
	cvt.s64.s32	%rd5123, %r2864;
	add.s64 	%rd5124, %rd179, %rd5123;
	mov.u16 	%rs82, 0;
	st.local.u8 	[%rd5124], %rs82;
	add.s32 	%r14350, %r14348, 1;

BB3_89:
	setp.lt.u32	%p58, %r123, 4;
	@%p58 bra 	BB3_91;

BB3_90:
	xor.b32  	%r2865, %r14350, 7;
	cvt.s64.s32	%rd5125, %r2865;
	add.s64 	%rd5126, %rd179, %rd5125;
	mov.u16 	%rs83, 0;
	st.local.u8 	[%rd5126], %rs83;
	add.s32 	%r2866, %r14350, 1;
	xor.b32  	%r2867, %r2866, 7;
	cvt.s64.s32	%rd5127, %r2867;
	add.s64 	%rd5128, %rd179, %rd5127;
	st.local.u8 	[%rd5128], %rs83;
	add.s32 	%r2868, %r14350, 2;
	xor.b32  	%r2869, %r2868, 7;
	cvt.s64.s32	%rd5129, %r2869;
	add.s64 	%rd5130, %rd179, %rd5129;
	st.local.u8 	[%rd5130], %rs83;
	add.s32 	%r2870, %r14350, 3;
	xor.b32  	%r2871, %r2870, 7;
	cvt.s64.s32	%rd5131, %r2871;
	add.s64 	%rd5132, %rd179, %rd5131;
	st.local.u8 	[%rd5132], %rs83;
	add.s32 	%r14350, %r14350, 4;
	setp.lt.s32	%p59, %r14350, 128;
	@%p59 bra 	BB3_90;

BB3_91:
	xor.b32  	%r2872, %r122, 7;
	cvt.u64.u32	%rd5133, %r2872;
	add.s64 	%rd5134, %rd179, %rd5133;
	mov.u16 	%rs84, 128;
	st.local.u8 	[%rd5134], %rs84;
	ld.local.u64 	%rd21477, [%rd1+64];
	setp.gt.u32	%p60, %r122, 111;
	@%p60 bra 	BB3_93;
	bra.uni 	BB3_92;

BB3_93:
	shr.u64 	%rd5135, %rd21477, 32;
	ld.local.u64 	%rd5136, [%rd1+72];
	shr.u64 	%rd5137, %rd5136, 32;
	ld.local.u64 	%rd5138, [%rd1+80];
	shr.u64 	%rd5139, %rd5138, 32;
	ld.local.u64 	%rd5140, [%rd1+88];
	shr.u64 	%rd5141, %rd5140, 32;
	ld.local.u64 	%rd5142, [%rd1+96];
	shr.u64 	%rd5143, %rd5142, 32;
	ld.local.u64 	%rd5144, [%rd1+104];
	shr.u64 	%rd5145, %rd5144, 32;
	ld.local.u64 	%rd5146, [%rd1+112];
	shr.u64 	%rd5147, %rd5146, 32;
	ld.local.u64 	%rd5148, [%rd1+120];
	shr.u64 	%rd5149, %rd5148, 32;
	ld.local.u64 	%rd5150, [%rd1+128];
	shr.u64 	%rd5151, %rd5150, 32;
	ld.local.u64 	%rd5152, [%rd1+136];
	shr.u64 	%rd5153, %rd5152, 32;
	ld.local.u64 	%rd5154, [%rd1+144];
	shr.u64 	%rd5155, %rd5154, 32;
	ld.local.u64 	%rd5156, [%rd1+152];
	shr.u64 	%rd5157, %rd5156, 32;
	ld.local.u64 	%rd5158, [%rd1+160];
	shr.u64 	%rd5159, %rd5158, 32;
	ld.local.u64 	%rd5160, [%rd1+168];
	shr.u64 	%rd5161, %rd5160, 32;
	ld.local.u64 	%rd5162, [%rd1+176];
	shr.u64 	%rd5163, %rd5162, 32;
	ld.local.u64 	%rd5164, [%rd1+184];
	shr.u64 	%rd5165, %rd5164, 32;
	bfi.b64 	%rd21431, %rd5135, %rd21477, 32, 32;
	bfi.b64 	%rd21432, %rd5137, %rd5136, 32, 32;
	bfi.b64 	%rd21433, %rd5139, %rd5138, 32, 32;
	bfi.b64 	%rd21434, %rd5141, %rd5140, 32, 32;
	bfi.b64 	%rd21435, %rd5143, %rd5142, 32, 32;
	bfi.b64 	%rd21436, %rd5145, %rd5144, 32, 32;
	bfi.b64 	%rd21437, %rd5147, %rd5146, 32, 32;
	bfi.b64 	%rd21438, %rd5149, %rd5148, 32, 32;
	bfi.b64 	%rd21422, %rd5151, %rd5150, 32, 32;
	bfi.b64 	%rd21421, %rd5153, %rd5152, 32, 32;
	bfi.b64 	%rd21420, %rd5155, %rd5154, 32, 32;
	bfi.b64 	%rd21419, %rd5157, %rd5156, 32, 32;
	bfi.b64 	%rd21418, %rd5159, %rd5158, 32, 32;
	bfi.b64 	%rd21417, %rd5161, %rd5160, 32, 32;
	bfi.b64 	%rd21416, %rd5163, %rd5162, 32, 32;
	bfi.b64 	%rd21415, %rd5165, %rd5164, 32, 32;
	ld.local.u64 	%rd319, [%rd1+32];
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2874,%dummy}, %rd319;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2875}, %rd319;
	}
	shf.r.wrap.b32 	%r2876, %r2875, %r2874, 14;
	shf.r.wrap.b32 	%r2877, %r2874, %r2875, 14;
	mov.b64 	%rd5166, {%r2877, %r2876};
	shf.r.wrap.b32 	%r2878, %r2875, %r2874, 18;
	shf.r.wrap.b32 	%r2879, %r2874, %r2875, 18;
	mov.b64 	%rd5167, {%r2879, %r2878};
	xor.b64  	%rd5168, %rd5167, %rd5166;
	shf.l.wrap.b32 	%r2880, %r2874, %r2875, 23;
	shf.l.wrap.b32 	%r2881, %r2875, %r2874, 23;
	mov.b64 	%rd5169, {%r2881, %r2880};
	xor.b64  	%rd5170, %rd5168, %rd5169;
	ld.local.u64 	%rd320, [%rd1+48];
	ld.local.u64 	%rd321, [%rd1+40];
	xor.b64  	%rd5171, %rd320, %rd321;
	and.b64  	%rd5172, %rd5171, %rd319;
	xor.b64  	%rd5173, %rd5172, %rd320;
	ld.local.u64 	%rd322, [%rd1+56];
	add.s64 	%rd5174, %rd322, %rd21431;
	ld.const.u64 	%rd21454, [k_sha512];
	add.s64 	%rd5175, %rd5174, %rd21454;
	add.s64 	%rd5176, %rd5175, %rd5173;
	add.s64 	%rd5177, %rd5176, %rd5170;
	ld.local.u64 	%rd324, [%rd1+24];
	add.s64 	%rd5178, %rd5177, %rd324;
	ld.local.u64 	%rd325, [%rd1];
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2882,%dummy}, %rd325;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2883}, %rd325;
	}
	shf.r.wrap.b32 	%r2884, %r2883, %r2882, 28;
	shf.r.wrap.b32 	%r2885, %r2882, %r2883, 28;
	mov.b64 	%rd5179, {%r2885, %r2884};
	shf.l.wrap.b32 	%r2886, %r2882, %r2883, 30;
	shf.l.wrap.b32 	%r2887, %r2883, %r2882, 30;
	mov.b64 	%rd5180, {%r2887, %r2886};
	xor.b64  	%rd5181, %rd5180, %rd5179;
	shf.l.wrap.b32 	%r2888, %r2882, %r2883, 25;
	shf.l.wrap.b32 	%r2889, %r2883, %r2882, 25;
	mov.b64 	%rd5182, {%r2889, %r2888};
	xor.b64  	%rd5183, %rd5181, %rd5182;
	ld.local.u64 	%rd326, [%rd1+16];
	xor.b64  	%rd5184, %rd326, %rd325;
	ld.local.u64 	%rd327, [%rd1+8];
	xor.b64  	%rd5185, %rd327, %rd325;
	and.b64  	%rd5186, %rd5184, %rd5185;
	xor.b64  	%rd5187, %rd5186, %rd325;
	add.s64 	%rd5188, %rd5177, %rd5187;
	add.s64 	%rd5189, %rd5188, %rd5183;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2890,%dummy}, %rd5178;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2891}, %rd5178;
	}
	shf.r.wrap.b32 	%r2892, %r2891, %r2890, 14;
	shf.r.wrap.b32 	%r2893, %r2890, %r2891, 14;
	mov.b64 	%rd5190, {%r2893, %r2892};
	shf.r.wrap.b32 	%r2894, %r2891, %r2890, 18;
	shf.r.wrap.b32 	%r2895, %r2890, %r2891, 18;
	mov.b64 	%rd5191, {%r2895, %r2894};
	xor.b64  	%rd5192, %rd5191, %rd5190;
	shf.l.wrap.b32 	%r2896, %r2890, %r2891, 23;
	shf.l.wrap.b32 	%r2897, %r2891, %r2890, 23;
	mov.b64 	%rd5193, {%r2897, %r2896};
	xor.b64  	%rd5194, %rd5192, %rd5193;
	xor.b64  	%rd5195, %rd321, %rd319;
	and.b64  	%rd5196, %rd5178, %rd5195;
	xor.b64  	%rd5197, %rd5196, %rd321;
	add.s64 	%rd5198, %rd320, %rd21432;
	ld.const.u64 	%rd21453, [k_sha512+8];
	add.s64 	%rd5199, %rd5198, %rd21453;
	add.s64 	%rd5200, %rd5199, %rd5197;
	add.s64 	%rd5201, %rd5200, %rd5194;
	add.s64 	%rd5202, %rd5201, %rd326;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2898,%dummy}, %rd5189;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2899}, %rd5189;
	}
	shf.r.wrap.b32 	%r2900, %r2899, %r2898, 28;
	shf.r.wrap.b32 	%r2901, %r2898, %r2899, 28;
	mov.b64 	%rd5203, {%r2901, %r2900};
	shf.l.wrap.b32 	%r2902, %r2898, %r2899, 30;
	shf.l.wrap.b32 	%r2903, %r2899, %r2898, 30;
	mov.b64 	%rd5204, {%r2903, %r2902};
	xor.b64  	%rd5205, %rd5204, %rd5203;
	shf.l.wrap.b32 	%r2904, %r2898, %r2899, 25;
	shf.l.wrap.b32 	%r2905, %r2899, %r2898, 25;
	mov.b64 	%rd5206, {%r2905, %r2904};
	xor.b64  	%rd5207, %rd5205, %rd5206;
	xor.b64  	%rd5208, %rd5189, %rd327;
	xor.b64  	%rd5209, %rd5189, %rd325;
	and.b64  	%rd5210, %rd5209, %rd5208;
	xor.b64  	%rd5211, %rd5210, %rd5189;
	add.s64 	%rd5212, %rd5201, %rd5211;
	add.s64 	%rd5213, %rd5212, %rd5207;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2906,%dummy}, %rd5202;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2907}, %rd5202;
	}
	shf.r.wrap.b32 	%r2908, %r2907, %r2906, 14;
	shf.r.wrap.b32 	%r2909, %r2906, %r2907, 14;
	mov.b64 	%rd5214, {%r2909, %r2908};
	shf.r.wrap.b32 	%r2910, %r2907, %r2906, 18;
	shf.r.wrap.b32 	%r2911, %r2906, %r2907, 18;
	mov.b64 	%rd5215, {%r2911, %r2910};
	xor.b64  	%rd5216, %rd5215, %rd5214;
	shf.l.wrap.b32 	%r2912, %r2906, %r2907, 23;
	shf.l.wrap.b32 	%r2913, %r2907, %r2906, 23;
	mov.b64 	%rd5217, {%r2913, %r2912};
	xor.b64  	%rd5218, %rd5216, %rd5217;
	xor.b64  	%rd5219, %rd5178, %rd319;
	and.b64  	%rd5220, %rd5202, %rd5219;
	xor.b64  	%rd5221, %rd5220, %rd319;
	add.s64 	%rd5222, %rd321, %rd21433;
	ld.const.u64 	%rd21452, [k_sha512+16];
	add.s64 	%rd5223, %rd5222, %rd21452;
	add.s64 	%rd5224, %rd5223, %rd5221;
	add.s64 	%rd5225, %rd5224, %rd5218;
	add.s64 	%rd5226, %rd5225, %rd327;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2914,%dummy}, %rd5213;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2915}, %rd5213;
	}
	shf.r.wrap.b32 	%r2916, %r2915, %r2914, 28;
	shf.r.wrap.b32 	%r2917, %r2914, %r2915, 28;
	mov.b64 	%rd5227, {%r2917, %r2916};
	shf.l.wrap.b32 	%r2918, %r2914, %r2915, 30;
	shf.l.wrap.b32 	%r2919, %r2915, %r2914, 30;
	mov.b64 	%rd5228, {%r2919, %r2918};
	xor.b64  	%rd5229, %rd5228, %rd5227;
	shf.l.wrap.b32 	%r2920, %r2914, %r2915, 25;
	shf.l.wrap.b32 	%r2921, %r2915, %r2914, 25;
	mov.b64 	%rd5230, {%r2921, %r2920};
	xor.b64  	%rd5231, %rd5229, %rd5230;
	xor.b64  	%rd5232, %rd5213, %rd325;
	xor.b64  	%rd5233, %rd5213, %rd5189;
	and.b64  	%rd5234, %rd5233, %rd5232;
	xor.b64  	%rd5235, %rd5234, %rd5213;
	add.s64 	%rd5236, %rd5225, %rd5235;
	add.s64 	%rd5237, %rd5236, %rd5231;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2922,%dummy}, %rd5226;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2923}, %rd5226;
	}
	shf.r.wrap.b32 	%r2924, %r2923, %r2922, 14;
	shf.r.wrap.b32 	%r2925, %r2922, %r2923, 14;
	mov.b64 	%rd5238, {%r2925, %r2924};
	shf.r.wrap.b32 	%r2926, %r2923, %r2922, 18;
	shf.r.wrap.b32 	%r2927, %r2922, %r2923, 18;
	mov.b64 	%rd5239, {%r2927, %r2926};
	xor.b64  	%rd5240, %rd5239, %rd5238;
	shf.l.wrap.b32 	%r2928, %r2922, %r2923, 23;
	shf.l.wrap.b32 	%r2929, %r2923, %r2922, 23;
	mov.b64 	%rd5241, {%r2929, %r2928};
	xor.b64  	%rd5242, %rd5240, %rd5241;
	xor.b64  	%rd5243, %rd5202, %rd5178;
	and.b64  	%rd5244, %rd5226, %rd5243;
	xor.b64  	%rd5245, %rd5244, %rd5178;
	add.s64 	%rd5246, %rd319, %rd21434;
	ld.const.u64 	%rd21451, [k_sha512+24];
	add.s64 	%rd5247, %rd5246, %rd21451;
	add.s64 	%rd5248, %rd5247, %rd5245;
	add.s64 	%rd5249, %rd5248, %rd5242;
	add.s64 	%rd5250, %rd5249, %rd325;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2930,%dummy}, %rd5237;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2931}, %rd5237;
	}
	shf.r.wrap.b32 	%r2932, %r2931, %r2930, 28;
	shf.r.wrap.b32 	%r2933, %r2930, %r2931, 28;
	mov.b64 	%rd5251, {%r2933, %r2932};
	shf.l.wrap.b32 	%r2934, %r2930, %r2931, 30;
	shf.l.wrap.b32 	%r2935, %r2931, %r2930, 30;
	mov.b64 	%rd5252, {%r2935, %r2934};
	xor.b64  	%rd5253, %rd5252, %rd5251;
	shf.l.wrap.b32 	%r2936, %r2930, %r2931, 25;
	shf.l.wrap.b32 	%r2937, %r2931, %r2930, 25;
	mov.b64 	%rd5254, {%r2937, %r2936};
	xor.b64  	%rd5255, %rd5253, %rd5254;
	xor.b64  	%rd5256, %rd5237, %rd5189;
	xor.b64  	%rd5257, %rd5237, %rd5213;
	and.b64  	%rd5258, %rd5257, %rd5256;
	xor.b64  	%rd5259, %rd5258, %rd5237;
	add.s64 	%rd5260, %rd5249, %rd5259;
	add.s64 	%rd5261, %rd5260, %rd5255;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2938,%dummy}, %rd5250;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2939}, %rd5250;
	}
	shf.r.wrap.b32 	%r2940, %r2939, %r2938, 14;
	shf.r.wrap.b32 	%r2941, %r2938, %r2939, 14;
	mov.b64 	%rd5262, {%r2941, %r2940};
	shf.r.wrap.b32 	%r2942, %r2939, %r2938, 18;
	shf.r.wrap.b32 	%r2943, %r2938, %r2939, 18;
	mov.b64 	%rd5263, {%r2943, %r2942};
	xor.b64  	%rd5264, %rd5263, %rd5262;
	shf.l.wrap.b32 	%r2944, %r2938, %r2939, 23;
	shf.l.wrap.b32 	%r2945, %r2939, %r2938, 23;
	mov.b64 	%rd5265, {%r2945, %r2944};
	xor.b64  	%rd5266, %rd5264, %rd5265;
	xor.b64  	%rd5267, %rd5226, %rd5202;
	and.b64  	%rd5268, %rd5250, %rd5267;
	xor.b64  	%rd5269, %rd5268, %rd5202;
	add.s64 	%rd5270, %rd5178, %rd21435;
	ld.const.u64 	%rd21450, [k_sha512+32];
	add.s64 	%rd5271, %rd5270, %rd21450;
	add.s64 	%rd5272, %rd5271, %rd5269;
	add.s64 	%rd5273, %rd5272, %rd5266;
	add.s64 	%rd5274, %rd5273, %rd5189;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2946,%dummy}, %rd5261;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2947}, %rd5261;
	}
	shf.r.wrap.b32 	%r2948, %r2947, %r2946, 28;
	shf.r.wrap.b32 	%r2949, %r2946, %r2947, 28;
	mov.b64 	%rd5275, {%r2949, %r2948};
	shf.l.wrap.b32 	%r2950, %r2946, %r2947, 30;
	shf.l.wrap.b32 	%r2951, %r2947, %r2946, 30;
	mov.b64 	%rd5276, {%r2951, %r2950};
	xor.b64  	%rd5277, %rd5276, %rd5275;
	shf.l.wrap.b32 	%r2952, %r2946, %r2947, 25;
	shf.l.wrap.b32 	%r2953, %r2947, %r2946, 25;
	mov.b64 	%rd5278, {%r2953, %r2952};
	xor.b64  	%rd5279, %rd5277, %rd5278;
	xor.b64  	%rd5280, %rd5261, %rd5213;
	xor.b64  	%rd5281, %rd5261, %rd5237;
	and.b64  	%rd5282, %rd5281, %rd5280;
	xor.b64  	%rd5283, %rd5282, %rd5261;
	add.s64 	%rd5284, %rd5273, %rd5283;
	add.s64 	%rd5285, %rd5284, %rd5279;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2954,%dummy}, %rd5274;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2955}, %rd5274;
	}
	shf.r.wrap.b32 	%r2956, %r2955, %r2954, 14;
	shf.r.wrap.b32 	%r2957, %r2954, %r2955, 14;
	mov.b64 	%rd5286, {%r2957, %r2956};
	shf.r.wrap.b32 	%r2958, %r2955, %r2954, 18;
	shf.r.wrap.b32 	%r2959, %r2954, %r2955, 18;
	mov.b64 	%rd5287, {%r2959, %r2958};
	xor.b64  	%rd5288, %rd5287, %rd5286;
	shf.l.wrap.b32 	%r2960, %r2954, %r2955, 23;
	shf.l.wrap.b32 	%r2961, %r2955, %r2954, 23;
	mov.b64 	%rd5289, {%r2961, %r2960};
	xor.b64  	%rd5290, %rd5288, %rd5289;
	xor.b64  	%rd5291, %rd5250, %rd5226;
	and.b64  	%rd5292, %rd5274, %rd5291;
	xor.b64  	%rd5293, %rd5292, %rd5226;
	add.s64 	%rd5294, %rd5202, %rd21436;
	ld.const.u64 	%rd21449, [k_sha512+40];
	add.s64 	%rd5295, %rd5294, %rd21449;
	add.s64 	%rd5296, %rd5295, %rd5293;
	add.s64 	%rd5297, %rd5296, %rd5290;
	add.s64 	%rd5298, %rd5297, %rd5213;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2962,%dummy}, %rd5285;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2963}, %rd5285;
	}
	shf.r.wrap.b32 	%r2964, %r2963, %r2962, 28;
	shf.r.wrap.b32 	%r2965, %r2962, %r2963, 28;
	mov.b64 	%rd5299, {%r2965, %r2964};
	shf.l.wrap.b32 	%r2966, %r2962, %r2963, 30;
	shf.l.wrap.b32 	%r2967, %r2963, %r2962, 30;
	mov.b64 	%rd5300, {%r2967, %r2966};
	xor.b64  	%rd5301, %rd5300, %rd5299;
	shf.l.wrap.b32 	%r2968, %r2962, %r2963, 25;
	shf.l.wrap.b32 	%r2969, %r2963, %r2962, 25;
	mov.b64 	%rd5302, {%r2969, %r2968};
	xor.b64  	%rd5303, %rd5301, %rd5302;
	xor.b64  	%rd5304, %rd5285, %rd5237;
	xor.b64  	%rd5305, %rd5285, %rd5261;
	and.b64  	%rd5306, %rd5305, %rd5304;
	xor.b64  	%rd5307, %rd5306, %rd5285;
	add.s64 	%rd5308, %rd5297, %rd5307;
	add.s64 	%rd5309, %rd5308, %rd5303;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2970,%dummy}, %rd5298;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2971}, %rd5298;
	}
	shf.r.wrap.b32 	%r2972, %r2971, %r2970, 14;
	shf.r.wrap.b32 	%r2973, %r2970, %r2971, 14;
	mov.b64 	%rd5310, {%r2973, %r2972};
	shf.r.wrap.b32 	%r2974, %r2971, %r2970, 18;
	shf.r.wrap.b32 	%r2975, %r2970, %r2971, 18;
	mov.b64 	%rd5311, {%r2975, %r2974};
	xor.b64  	%rd5312, %rd5311, %rd5310;
	shf.l.wrap.b32 	%r2976, %r2970, %r2971, 23;
	shf.l.wrap.b32 	%r2977, %r2971, %r2970, 23;
	mov.b64 	%rd5313, {%r2977, %r2976};
	xor.b64  	%rd5314, %rd5312, %rd5313;
	xor.b64  	%rd5315, %rd5274, %rd5250;
	and.b64  	%rd5316, %rd5298, %rd5315;
	xor.b64  	%rd5317, %rd5316, %rd5250;
	add.s64 	%rd5318, %rd5226, %rd21437;
	ld.const.u64 	%rd21448, [k_sha512+48];
	add.s64 	%rd5319, %rd5318, %rd21448;
	add.s64 	%rd5320, %rd5319, %rd5317;
	add.s64 	%rd5321, %rd5320, %rd5314;
	add.s64 	%rd5322, %rd5321, %rd5237;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2978,%dummy}, %rd5309;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2979}, %rd5309;
	}
	shf.r.wrap.b32 	%r2980, %r2979, %r2978, 28;
	shf.r.wrap.b32 	%r2981, %r2978, %r2979, 28;
	mov.b64 	%rd5323, {%r2981, %r2980};
	shf.l.wrap.b32 	%r2982, %r2978, %r2979, 30;
	shf.l.wrap.b32 	%r2983, %r2979, %r2978, 30;
	mov.b64 	%rd5324, {%r2983, %r2982};
	xor.b64  	%rd5325, %rd5324, %rd5323;
	shf.l.wrap.b32 	%r2984, %r2978, %r2979, 25;
	shf.l.wrap.b32 	%r2985, %r2979, %r2978, 25;
	mov.b64 	%rd5326, {%r2985, %r2984};
	xor.b64  	%rd5327, %rd5325, %rd5326;
	xor.b64  	%rd5328, %rd5309, %rd5261;
	xor.b64  	%rd5329, %rd5309, %rd5285;
	and.b64  	%rd5330, %rd5329, %rd5328;
	xor.b64  	%rd5331, %rd5330, %rd5309;
	add.s64 	%rd5332, %rd5321, %rd5331;
	add.s64 	%rd5333, %rd5332, %rd5327;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2986,%dummy}, %rd5322;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2987}, %rd5322;
	}
	shf.r.wrap.b32 	%r2988, %r2987, %r2986, 14;
	shf.r.wrap.b32 	%r2989, %r2986, %r2987, 14;
	mov.b64 	%rd5334, {%r2989, %r2988};
	shf.r.wrap.b32 	%r2990, %r2987, %r2986, 18;
	shf.r.wrap.b32 	%r2991, %r2986, %r2987, 18;
	mov.b64 	%rd5335, {%r2991, %r2990};
	xor.b64  	%rd5336, %rd5335, %rd5334;
	shf.l.wrap.b32 	%r2992, %r2986, %r2987, 23;
	shf.l.wrap.b32 	%r2993, %r2987, %r2986, 23;
	mov.b64 	%rd5337, {%r2993, %r2992};
	xor.b64  	%rd5338, %rd5336, %rd5337;
	xor.b64  	%rd5339, %rd5298, %rd5274;
	and.b64  	%rd5340, %rd5322, %rd5339;
	xor.b64  	%rd5341, %rd5340, %rd5274;
	add.s64 	%rd5342, %rd5250, %rd21438;
	ld.const.u64 	%rd21447, [k_sha512+56];
	add.s64 	%rd5343, %rd5342, %rd21447;
	add.s64 	%rd5344, %rd5343, %rd5341;
	add.s64 	%rd5345, %rd5344, %rd5338;
	add.s64 	%rd5346, %rd5345, %rd5261;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r2994,%dummy}, %rd5333;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r2995}, %rd5333;
	}
	shf.r.wrap.b32 	%r2996, %r2995, %r2994, 28;
	shf.r.wrap.b32 	%r2997, %r2994, %r2995, 28;
	mov.b64 	%rd5347, {%r2997, %r2996};
	shf.l.wrap.b32 	%r2998, %r2994, %r2995, 30;
	shf.l.wrap.b32 	%r2999, %r2995, %r2994, 30;
	mov.b64 	%rd5348, {%r2999, %r2998};
	xor.b64  	%rd5349, %rd5348, %rd5347;
	shf.l.wrap.b32 	%r3000, %r2994, %r2995, 25;
	shf.l.wrap.b32 	%r3001, %r2995, %r2994, 25;
	mov.b64 	%rd5350, {%r3001, %r3000};
	xor.b64  	%rd5351, %rd5349, %rd5350;
	xor.b64  	%rd5352, %rd5333, %rd5285;
	xor.b64  	%rd5353, %rd5333, %rd5309;
	and.b64  	%rd5354, %rd5353, %rd5352;
	xor.b64  	%rd5355, %rd5354, %rd5333;
	add.s64 	%rd5356, %rd5345, %rd5355;
	add.s64 	%rd5357, %rd5356, %rd5351;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3002,%dummy}, %rd5346;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3003}, %rd5346;
	}
	shf.r.wrap.b32 	%r3004, %r3003, %r3002, 14;
	shf.r.wrap.b32 	%r3005, %r3002, %r3003, 14;
	mov.b64 	%rd5358, {%r3005, %r3004};
	shf.r.wrap.b32 	%r3006, %r3003, %r3002, 18;
	shf.r.wrap.b32 	%r3007, %r3002, %r3003, 18;
	mov.b64 	%rd5359, {%r3007, %r3006};
	xor.b64  	%rd5360, %rd5359, %rd5358;
	shf.l.wrap.b32 	%r3008, %r3002, %r3003, 23;
	shf.l.wrap.b32 	%r3009, %r3003, %r3002, 23;
	mov.b64 	%rd5361, {%r3009, %r3008};
	xor.b64  	%rd5362, %rd5360, %rd5361;
	xor.b64  	%rd5363, %rd5322, %rd5298;
	and.b64  	%rd5364, %rd5346, %rd5363;
	xor.b64  	%rd5365, %rd5364, %rd5298;
	add.s64 	%rd5366, %rd5274, %rd21422;
	ld.const.u64 	%rd21446, [k_sha512+64];
	add.s64 	%rd5367, %rd5366, %rd21446;
	add.s64 	%rd5368, %rd5367, %rd5365;
	add.s64 	%rd5369, %rd5368, %rd5362;
	add.s64 	%rd5370, %rd5369, %rd5285;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3010,%dummy}, %rd5357;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3011}, %rd5357;
	}
	shf.r.wrap.b32 	%r3012, %r3011, %r3010, 28;
	shf.r.wrap.b32 	%r3013, %r3010, %r3011, 28;
	mov.b64 	%rd5371, {%r3013, %r3012};
	shf.l.wrap.b32 	%r3014, %r3010, %r3011, 30;
	shf.l.wrap.b32 	%r3015, %r3011, %r3010, 30;
	mov.b64 	%rd5372, {%r3015, %r3014};
	xor.b64  	%rd5373, %rd5372, %rd5371;
	shf.l.wrap.b32 	%r3016, %r3010, %r3011, 25;
	shf.l.wrap.b32 	%r3017, %r3011, %r3010, 25;
	mov.b64 	%rd5374, {%r3017, %r3016};
	xor.b64  	%rd5375, %rd5373, %rd5374;
	xor.b64  	%rd5376, %rd5357, %rd5309;
	xor.b64  	%rd5377, %rd5357, %rd5333;
	and.b64  	%rd5378, %rd5377, %rd5376;
	xor.b64  	%rd5379, %rd5378, %rd5357;
	add.s64 	%rd5380, %rd5369, %rd5379;
	add.s64 	%rd5381, %rd5380, %rd5375;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3018,%dummy}, %rd5370;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3019}, %rd5370;
	}
	shf.r.wrap.b32 	%r3020, %r3019, %r3018, 14;
	shf.r.wrap.b32 	%r3021, %r3018, %r3019, 14;
	mov.b64 	%rd5382, {%r3021, %r3020};
	shf.r.wrap.b32 	%r3022, %r3019, %r3018, 18;
	shf.r.wrap.b32 	%r3023, %r3018, %r3019, 18;
	mov.b64 	%rd5383, {%r3023, %r3022};
	xor.b64  	%rd5384, %rd5383, %rd5382;
	shf.l.wrap.b32 	%r3024, %r3018, %r3019, 23;
	shf.l.wrap.b32 	%r3025, %r3019, %r3018, 23;
	mov.b64 	%rd5385, {%r3025, %r3024};
	xor.b64  	%rd5386, %rd5384, %rd5385;
	xor.b64  	%rd5387, %rd5346, %rd5322;
	and.b64  	%rd5388, %rd5370, %rd5387;
	xor.b64  	%rd5389, %rd5388, %rd5322;
	add.s64 	%rd5390, %rd5298, %rd21421;
	ld.const.u64 	%rd21445, [k_sha512+72];
	add.s64 	%rd5391, %rd5390, %rd21445;
	add.s64 	%rd5392, %rd5391, %rd5389;
	add.s64 	%rd5393, %rd5392, %rd5386;
	add.s64 	%rd5394, %rd5393, %rd5309;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3026,%dummy}, %rd5381;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3027}, %rd5381;
	}
	shf.r.wrap.b32 	%r3028, %r3027, %r3026, 28;
	shf.r.wrap.b32 	%r3029, %r3026, %r3027, 28;
	mov.b64 	%rd5395, {%r3029, %r3028};
	shf.l.wrap.b32 	%r3030, %r3026, %r3027, 30;
	shf.l.wrap.b32 	%r3031, %r3027, %r3026, 30;
	mov.b64 	%rd5396, {%r3031, %r3030};
	xor.b64  	%rd5397, %rd5396, %rd5395;
	shf.l.wrap.b32 	%r3032, %r3026, %r3027, 25;
	shf.l.wrap.b32 	%r3033, %r3027, %r3026, 25;
	mov.b64 	%rd5398, {%r3033, %r3032};
	xor.b64  	%rd5399, %rd5397, %rd5398;
	xor.b64  	%rd5400, %rd5381, %rd5333;
	xor.b64  	%rd5401, %rd5381, %rd5357;
	and.b64  	%rd5402, %rd5401, %rd5400;
	xor.b64  	%rd5403, %rd5402, %rd5381;
	add.s64 	%rd5404, %rd5393, %rd5403;
	add.s64 	%rd5405, %rd5404, %rd5399;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3034,%dummy}, %rd5394;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3035}, %rd5394;
	}
	shf.r.wrap.b32 	%r3036, %r3035, %r3034, 14;
	shf.r.wrap.b32 	%r3037, %r3034, %r3035, 14;
	mov.b64 	%rd5406, {%r3037, %r3036};
	shf.r.wrap.b32 	%r3038, %r3035, %r3034, 18;
	shf.r.wrap.b32 	%r3039, %r3034, %r3035, 18;
	mov.b64 	%rd5407, {%r3039, %r3038};
	xor.b64  	%rd5408, %rd5407, %rd5406;
	shf.l.wrap.b32 	%r3040, %r3034, %r3035, 23;
	shf.l.wrap.b32 	%r3041, %r3035, %r3034, 23;
	mov.b64 	%rd5409, {%r3041, %r3040};
	xor.b64  	%rd5410, %rd5408, %rd5409;
	xor.b64  	%rd5411, %rd5370, %rd5346;
	and.b64  	%rd5412, %rd5394, %rd5411;
	xor.b64  	%rd5413, %rd5412, %rd5346;
	add.s64 	%rd5414, %rd5322, %rd21420;
	ld.const.u64 	%rd21444, [k_sha512+80];
	add.s64 	%rd5415, %rd5414, %rd21444;
	add.s64 	%rd5416, %rd5415, %rd5413;
	add.s64 	%rd5417, %rd5416, %rd5410;
	add.s64 	%rd5418, %rd5417, %rd5333;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3042,%dummy}, %rd5405;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3043}, %rd5405;
	}
	shf.r.wrap.b32 	%r3044, %r3043, %r3042, 28;
	shf.r.wrap.b32 	%r3045, %r3042, %r3043, 28;
	mov.b64 	%rd5419, {%r3045, %r3044};
	shf.l.wrap.b32 	%r3046, %r3042, %r3043, 30;
	shf.l.wrap.b32 	%r3047, %r3043, %r3042, 30;
	mov.b64 	%rd5420, {%r3047, %r3046};
	xor.b64  	%rd5421, %rd5420, %rd5419;
	shf.l.wrap.b32 	%r3048, %r3042, %r3043, 25;
	shf.l.wrap.b32 	%r3049, %r3043, %r3042, 25;
	mov.b64 	%rd5422, {%r3049, %r3048};
	xor.b64  	%rd5423, %rd5421, %rd5422;
	xor.b64  	%rd5424, %rd5405, %rd5357;
	xor.b64  	%rd5425, %rd5405, %rd5381;
	and.b64  	%rd5426, %rd5425, %rd5424;
	xor.b64  	%rd5427, %rd5426, %rd5405;
	add.s64 	%rd5428, %rd5417, %rd5427;
	add.s64 	%rd5429, %rd5428, %rd5423;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3050,%dummy}, %rd5418;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3051}, %rd5418;
	}
	shf.r.wrap.b32 	%r3052, %r3051, %r3050, 14;
	shf.r.wrap.b32 	%r3053, %r3050, %r3051, 14;
	mov.b64 	%rd5430, {%r3053, %r3052};
	shf.r.wrap.b32 	%r3054, %r3051, %r3050, 18;
	shf.r.wrap.b32 	%r3055, %r3050, %r3051, 18;
	mov.b64 	%rd5431, {%r3055, %r3054};
	xor.b64  	%rd5432, %rd5431, %rd5430;
	shf.l.wrap.b32 	%r3056, %r3050, %r3051, 23;
	shf.l.wrap.b32 	%r3057, %r3051, %r3050, 23;
	mov.b64 	%rd5433, {%r3057, %r3056};
	xor.b64  	%rd5434, %rd5432, %rd5433;
	xor.b64  	%rd5435, %rd5394, %rd5370;
	and.b64  	%rd5436, %rd5418, %rd5435;
	xor.b64  	%rd5437, %rd5436, %rd5370;
	add.s64 	%rd5438, %rd5346, %rd21419;
	ld.const.u64 	%rd21443, [k_sha512+88];
	add.s64 	%rd5439, %rd5438, %rd21443;
	add.s64 	%rd5440, %rd5439, %rd5437;
	add.s64 	%rd5441, %rd5440, %rd5434;
	add.s64 	%rd5442, %rd5441, %rd5357;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3058,%dummy}, %rd5429;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3059}, %rd5429;
	}
	shf.r.wrap.b32 	%r3060, %r3059, %r3058, 28;
	shf.r.wrap.b32 	%r3061, %r3058, %r3059, 28;
	mov.b64 	%rd5443, {%r3061, %r3060};
	shf.l.wrap.b32 	%r3062, %r3058, %r3059, 30;
	shf.l.wrap.b32 	%r3063, %r3059, %r3058, 30;
	mov.b64 	%rd5444, {%r3063, %r3062};
	xor.b64  	%rd5445, %rd5444, %rd5443;
	shf.l.wrap.b32 	%r3064, %r3058, %r3059, 25;
	shf.l.wrap.b32 	%r3065, %r3059, %r3058, 25;
	mov.b64 	%rd5446, {%r3065, %r3064};
	xor.b64  	%rd5447, %rd5445, %rd5446;
	xor.b64  	%rd5448, %rd5429, %rd5381;
	xor.b64  	%rd5449, %rd5429, %rd5405;
	and.b64  	%rd5450, %rd5449, %rd5448;
	xor.b64  	%rd5451, %rd5450, %rd5429;
	add.s64 	%rd5452, %rd5441, %rd5451;
	add.s64 	%rd5453, %rd5452, %rd5447;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3066,%dummy}, %rd5442;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3067}, %rd5442;
	}
	shf.r.wrap.b32 	%r3068, %r3067, %r3066, 14;
	shf.r.wrap.b32 	%r3069, %r3066, %r3067, 14;
	mov.b64 	%rd5454, {%r3069, %r3068};
	shf.r.wrap.b32 	%r3070, %r3067, %r3066, 18;
	shf.r.wrap.b32 	%r3071, %r3066, %r3067, 18;
	mov.b64 	%rd5455, {%r3071, %r3070};
	xor.b64  	%rd5456, %rd5455, %rd5454;
	shf.l.wrap.b32 	%r3072, %r3066, %r3067, 23;
	shf.l.wrap.b32 	%r3073, %r3067, %r3066, 23;
	mov.b64 	%rd5457, {%r3073, %r3072};
	xor.b64  	%rd5458, %rd5456, %rd5457;
	xor.b64  	%rd5459, %rd5418, %rd5394;
	and.b64  	%rd5460, %rd5442, %rd5459;
	xor.b64  	%rd5461, %rd5460, %rd5394;
	add.s64 	%rd5462, %rd5370, %rd21418;
	ld.const.u64 	%rd21442, [k_sha512+96];
	add.s64 	%rd5463, %rd5462, %rd21442;
	add.s64 	%rd5464, %rd5463, %rd5461;
	add.s64 	%rd5465, %rd5464, %rd5458;
	add.s64 	%rd21430, %rd5465, %rd5381;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3074,%dummy}, %rd5453;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3075}, %rd5453;
	}
	shf.r.wrap.b32 	%r3076, %r3075, %r3074, 28;
	shf.r.wrap.b32 	%r3077, %r3074, %r3075, 28;
	mov.b64 	%rd5466, {%r3077, %r3076};
	shf.l.wrap.b32 	%r3078, %r3074, %r3075, 30;
	shf.l.wrap.b32 	%r3079, %r3075, %r3074, 30;
	mov.b64 	%rd5467, {%r3079, %r3078};
	xor.b64  	%rd5468, %rd5467, %rd5466;
	shf.l.wrap.b32 	%r3080, %r3074, %r3075, 25;
	shf.l.wrap.b32 	%r3081, %r3075, %r3074, 25;
	mov.b64 	%rd5469, {%r3081, %r3080};
	xor.b64  	%rd5470, %rd5468, %rd5469;
	xor.b64  	%rd5471, %rd5453, %rd5405;
	xor.b64  	%rd5472, %rd5453, %rd5429;
	and.b64  	%rd5473, %rd5472, %rd5471;
	xor.b64  	%rd5474, %rd5473, %rd5453;
	add.s64 	%rd5475, %rd5465, %rd5474;
	add.s64 	%rd21426, %rd5475, %rd5470;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3082,%dummy}, %rd21430;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3083}, %rd21430;
	}
	shf.r.wrap.b32 	%r3084, %r3083, %r3082, 14;
	shf.r.wrap.b32 	%r3085, %r3082, %r3083, 14;
	mov.b64 	%rd5476, {%r3085, %r3084};
	shf.r.wrap.b32 	%r3086, %r3083, %r3082, 18;
	shf.r.wrap.b32 	%r3087, %r3082, %r3083, 18;
	mov.b64 	%rd5477, {%r3087, %r3086};
	xor.b64  	%rd5478, %rd5477, %rd5476;
	shf.l.wrap.b32 	%r3088, %r3082, %r3083, 23;
	shf.l.wrap.b32 	%r3089, %r3083, %r3082, 23;
	mov.b64 	%rd5479, {%r3089, %r3088};
	xor.b64  	%rd5480, %rd5478, %rd5479;
	xor.b64  	%rd5481, %rd5442, %rd5418;
	and.b64  	%rd5482, %rd21430, %rd5481;
	xor.b64  	%rd5483, %rd5482, %rd5418;
	add.s64 	%rd5484, %rd5394, %rd21417;
	ld.const.u64 	%rd21441, [k_sha512+104];
	add.s64 	%rd5485, %rd5484, %rd21441;
	add.s64 	%rd5486, %rd5485, %rd5483;
	add.s64 	%rd5487, %rd5486, %rd5480;
	add.s64 	%rd21429, %rd5487, %rd5405;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3090,%dummy}, %rd21426;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3091}, %rd21426;
	}
	shf.r.wrap.b32 	%r3092, %r3091, %r3090, 28;
	shf.r.wrap.b32 	%r3093, %r3090, %r3091, 28;
	mov.b64 	%rd5488, {%r3093, %r3092};
	shf.l.wrap.b32 	%r3094, %r3090, %r3091, 30;
	shf.l.wrap.b32 	%r3095, %r3091, %r3090, 30;
	mov.b64 	%rd5489, {%r3095, %r3094};
	xor.b64  	%rd5490, %rd5489, %rd5488;
	shf.l.wrap.b32 	%r3096, %r3090, %r3091, 25;
	shf.l.wrap.b32 	%r3097, %r3091, %r3090, 25;
	mov.b64 	%rd5491, {%r3097, %r3096};
	xor.b64  	%rd5492, %rd5490, %rd5491;
	xor.b64  	%rd5493, %rd21426, %rd5429;
	xor.b64  	%rd5494, %rd21426, %rd5453;
	and.b64  	%rd5495, %rd5494, %rd5493;
	xor.b64  	%rd5496, %rd5495, %rd21426;
	add.s64 	%rd5497, %rd5487, %rd5496;
	add.s64 	%rd21425, %rd5497, %rd5492;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3098,%dummy}, %rd21429;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3099}, %rd21429;
	}
	shf.r.wrap.b32 	%r3100, %r3099, %r3098, 14;
	shf.r.wrap.b32 	%r3101, %r3098, %r3099, 14;
	mov.b64 	%rd5498, {%r3101, %r3100};
	shf.r.wrap.b32 	%r3102, %r3099, %r3098, 18;
	shf.r.wrap.b32 	%r3103, %r3098, %r3099, 18;
	mov.b64 	%rd5499, {%r3103, %r3102};
	xor.b64  	%rd5500, %rd5499, %rd5498;
	shf.l.wrap.b32 	%r3104, %r3098, %r3099, 23;
	shf.l.wrap.b32 	%r3105, %r3099, %r3098, 23;
	mov.b64 	%rd5501, {%r3105, %r3104};
	xor.b64  	%rd5502, %rd5500, %rd5501;
	xor.b64  	%rd5503, %rd21430, %rd5442;
	and.b64  	%rd5504, %rd21429, %rd5503;
	xor.b64  	%rd5505, %rd5504, %rd5442;
	add.s64 	%rd5506, %rd5418, %rd21416;
	ld.const.u64 	%rd21440, [k_sha512+112];
	add.s64 	%rd5507, %rd5506, %rd21440;
	add.s64 	%rd5508, %rd5507, %rd5505;
	add.s64 	%rd5509, %rd5508, %rd5502;
	add.s64 	%rd21428, %rd5509, %rd5429;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3106,%dummy}, %rd21425;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3107}, %rd21425;
	}
	shf.r.wrap.b32 	%r3108, %r3107, %r3106, 28;
	shf.r.wrap.b32 	%r3109, %r3106, %r3107, 28;
	mov.b64 	%rd5510, {%r3109, %r3108};
	shf.l.wrap.b32 	%r3110, %r3106, %r3107, 30;
	shf.l.wrap.b32 	%r3111, %r3107, %r3106, 30;
	mov.b64 	%rd5511, {%r3111, %r3110};
	xor.b64  	%rd5512, %rd5511, %rd5510;
	shf.l.wrap.b32 	%r3112, %r3106, %r3107, 25;
	shf.l.wrap.b32 	%r3113, %r3107, %r3106, 25;
	mov.b64 	%rd5513, {%r3113, %r3112};
	xor.b64  	%rd5514, %rd5512, %rd5513;
	xor.b64  	%rd5515, %rd21425, %rd5453;
	xor.b64  	%rd5516, %rd21425, %rd21426;
	and.b64  	%rd5517, %rd5516, %rd5515;
	xor.b64  	%rd5518, %rd5517, %rd21425;
	add.s64 	%rd5519, %rd5509, %rd5518;
	add.s64 	%rd21424, %rd5519, %rd5514;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3114,%dummy}, %rd21428;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3115}, %rd21428;
	}
	shf.r.wrap.b32 	%r3116, %r3115, %r3114, 14;
	shf.r.wrap.b32 	%r3117, %r3114, %r3115, 14;
	mov.b64 	%rd5520, {%r3117, %r3116};
	shf.r.wrap.b32 	%r3118, %r3115, %r3114, 18;
	shf.r.wrap.b32 	%r3119, %r3114, %r3115, 18;
	mov.b64 	%rd5521, {%r3119, %r3118};
	xor.b64  	%rd5522, %rd5521, %rd5520;
	shf.l.wrap.b32 	%r3120, %r3114, %r3115, 23;
	shf.l.wrap.b32 	%r3121, %r3115, %r3114, 23;
	mov.b64 	%rd5523, {%r3121, %r3120};
	xor.b64  	%rd5524, %rd5522, %rd5523;
	xor.b64  	%rd5525, %rd21429, %rd21430;
	and.b64  	%rd5526, %rd21428, %rd5525;
	xor.b64  	%rd5527, %rd5526, %rd21430;
	add.s64 	%rd5528, %rd5442, %rd21415;
	ld.const.u64 	%rd21439, [k_sha512+120];
	add.s64 	%rd5529, %rd5528, %rd21439;
	add.s64 	%rd5530, %rd5529, %rd5527;
	add.s64 	%rd5531, %rd5530, %rd5524;
	add.s64 	%rd21427, %rd5531, %rd5453;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3122,%dummy}, %rd21424;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3123}, %rd21424;
	}
	shf.r.wrap.b32 	%r3124, %r3123, %r3122, 28;
	shf.r.wrap.b32 	%r3125, %r3122, %r3123, 28;
	mov.b64 	%rd5532, {%r3125, %r3124};
	shf.l.wrap.b32 	%r3126, %r3122, %r3123, 30;
	shf.l.wrap.b32 	%r3127, %r3123, %r3122, 30;
	mov.b64 	%rd5533, {%r3127, %r3126};
	xor.b64  	%rd5534, %rd5533, %rd5532;
	shf.l.wrap.b32 	%r3128, %r3122, %r3123, 25;
	shf.l.wrap.b32 	%r3129, %r3123, %r3122, 25;
	mov.b64 	%rd5535, {%r3129, %r3128};
	xor.b64  	%rd5536, %rd5534, %rd5535;
	xor.b64  	%rd5537, %rd21424, %rd21426;
	xor.b64  	%rd5538, %rd21424, %rd21425;
	and.b64  	%rd5539, %rd5538, %rd5537;
	xor.b64  	%rd5540, %rd5539, %rd21424;
	add.s64 	%rd5541, %rd5531, %rd5540;
	add.s64 	%rd21423, %rd5541, %rd5536;
	mov.u32 	%r14351, 16;

BB3_94:
	shr.u64 	%rd5542, %rd21416, 6;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3130,%dummy}, %rd21416;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3131}, %rd21416;
	}
	shf.r.wrap.b32 	%r3132, %r3131, %r3130, 19;
	shf.r.wrap.b32 	%r3133, %r3130, %r3131, 19;
	mov.b64 	%rd5543, {%r3133, %r3132};
	xor.b64  	%rd5544, %rd5543, %rd5542;
	shf.l.wrap.b32 	%r3134, %r3130, %r3131, 3;
	shf.l.wrap.b32 	%r3135, %r3131, %r3130, 3;
	mov.b64 	%rd5545, {%r3135, %r3134};
	xor.b64  	%rd5546, %rd5544, %rd5545;
	shr.u64 	%rd5547, %rd21432, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3136,%dummy}, %rd21432;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3137}, %rd21432;
	}
	shf.r.wrap.b32 	%r3138, %r3137, %r3136, 1;
	shf.r.wrap.b32 	%r3139, %r3136, %r3137, 1;
	mov.b64 	%rd5548, {%r3139, %r3138};
	xor.b64  	%rd5549, %rd5548, %rd5547;
	shf.r.wrap.b32 	%r3140, %r3137, %r3136, 8;
	shf.r.wrap.b32 	%r3141, %r3136, %r3137, 8;
	mov.b64 	%rd5550, {%r3141, %r3140};
	xor.b64  	%rd5551, %rd5549, %rd5550;
	add.s64 	%rd5552, %rd21421, %rd21431;
	add.s64 	%rd5553, %rd5552, %rd5546;
	add.s64 	%rd21431, %rd5553, %rd5551;
	shr.u64 	%rd5554, %rd21415, 6;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3142,%dummy}, %rd21415;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3143}, %rd21415;
	}
	shf.r.wrap.b32 	%r3144, %r3143, %r3142, 19;
	shf.r.wrap.b32 	%r3145, %r3142, %r3143, 19;
	mov.b64 	%rd5555, {%r3145, %r3144};
	xor.b64  	%rd5556, %rd5555, %rd5554;
	shf.l.wrap.b32 	%r3146, %r3142, %r3143, 3;
	shf.l.wrap.b32 	%r3147, %r3143, %r3142, 3;
	mov.b64 	%rd5557, {%r3147, %r3146};
	xor.b64  	%rd5558, %rd5556, %rd5557;
	shr.u64 	%rd5559, %rd21433, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3148,%dummy}, %rd21433;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3149}, %rd21433;
	}
	shf.r.wrap.b32 	%r3150, %r3149, %r3148, 1;
	shf.r.wrap.b32 	%r3151, %r3148, %r3149, 1;
	mov.b64 	%rd5560, {%r3151, %r3150};
	xor.b64  	%rd5561, %rd5560, %rd5559;
	shf.r.wrap.b32 	%r3152, %r3149, %r3148, 8;
	shf.r.wrap.b32 	%r3153, %r3148, %r3149, 8;
	mov.b64 	%rd5562, {%r3153, %r3152};
	xor.b64  	%rd5563, %rd5561, %rd5562;
	add.s64 	%rd5564, %rd21420, %rd21432;
	add.s64 	%rd5565, %rd5564, %rd5558;
	add.s64 	%rd21432, %rd5565, %rd5563;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3154,%dummy}, %rd21431;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3155}, %rd21431;
	}
	shf.r.wrap.b32 	%r3156, %r3155, %r3154, 19;
	shf.r.wrap.b32 	%r3157, %r3154, %r3155, 19;
	mov.b64 	%rd5566, {%r3157, %r3156};
	shf.l.wrap.b32 	%r3158, %r3154, %r3155, 3;
	shf.l.wrap.b32 	%r3159, %r3155, %r3154, 3;
	mov.b64 	%rd5567, {%r3159, %r3158};
	shr.u64 	%rd5568, %rd21431, 6;
	xor.b64  	%rd5569, %rd5566, %rd5568;
	xor.b64  	%rd5570, %rd5569, %rd5567;
	shr.u64 	%rd5571, %rd21434, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3160,%dummy}, %rd21434;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3161}, %rd21434;
	}
	shf.r.wrap.b32 	%r3162, %r3161, %r3160, 1;
	shf.r.wrap.b32 	%r3163, %r3160, %r3161, 1;
	mov.b64 	%rd5572, {%r3163, %r3162};
	xor.b64  	%rd5573, %rd5572, %rd5571;
	shf.r.wrap.b32 	%r3164, %r3161, %r3160, 8;
	shf.r.wrap.b32 	%r3165, %r3160, %r3161, 8;
	mov.b64 	%rd5574, {%r3165, %r3164};
	xor.b64  	%rd5575, %rd5573, %rd5574;
	add.s64 	%rd5576, %rd21419, %rd21433;
	add.s64 	%rd5577, %rd5576, %rd5570;
	add.s64 	%rd21433, %rd5577, %rd5575;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3166,%dummy}, %rd21432;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3167}, %rd21432;
	}
	shf.r.wrap.b32 	%r3168, %r3167, %r3166, 19;
	shf.r.wrap.b32 	%r3169, %r3166, %r3167, 19;
	mov.b64 	%rd5578, {%r3169, %r3168};
	shf.l.wrap.b32 	%r3170, %r3166, %r3167, 3;
	shf.l.wrap.b32 	%r3171, %r3167, %r3166, 3;
	mov.b64 	%rd5579, {%r3171, %r3170};
	shr.u64 	%rd5580, %rd21432, 6;
	xor.b64  	%rd5581, %rd5578, %rd5580;
	xor.b64  	%rd5582, %rd5581, %rd5579;
	shr.u64 	%rd5583, %rd21435, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3172,%dummy}, %rd21435;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3173}, %rd21435;
	}
	shf.r.wrap.b32 	%r3174, %r3173, %r3172, 1;
	shf.r.wrap.b32 	%r3175, %r3172, %r3173, 1;
	mov.b64 	%rd5584, {%r3175, %r3174};
	xor.b64  	%rd5585, %rd5584, %rd5583;
	shf.r.wrap.b32 	%r3176, %r3173, %r3172, 8;
	shf.r.wrap.b32 	%r3177, %r3172, %r3173, 8;
	mov.b64 	%rd5586, {%r3177, %r3176};
	xor.b64  	%rd5587, %rd5585, %rd5586;
	add.s64 	%rd5588, %rd21418, %rd21434;
	add.s64 	%rd5589, %rd5588, %rd5582;
	add.s64 	%rd21434, %rd5589, %rd5587;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3178,%dummy}, %rd21433;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3179}, %rd21433;
	}
	shf.r.wrap.b32 	%r3180, %r3179, %r3178, 19;
	shf.r.wrap.b32 	%r3181, %r3178, %r3179, 19;
	mov.b64 	%rd5590, {%r3181, %r3180};
	shf.l.wrap.b32 	%r3182, %r3178, %r3179, 3;
	shf.l.wrap.b32 	%r3183, %r3179, %r3178, 3;
	mov.b64 	%rd5591, {%r3183, %r3182};
	shr.u64 	%rd5592, %rd21433, 6;
	xor.b64  	%rd5593, %rd5590, %rd5592;
	xor.b64  	%rd5594, %rd5593, %rd5591;
	shr.u64 	%rd5595, %rd21436, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3184,%dummy}, %rd21436;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3185}, %rd21436;
	}
	shf.r.wrap.b32 	%r3186, %r3185, %r3184, 1;
	shf.r.wrap.b32 	%r3187, %r3184, %r3185, 1;
	mov.b64 	%rd5596, {%r3187, %r3186};
	xor.b64  	%rd5597, %rd5596, %rd5595;
	shf.r.wrap.b32 	%r3188, %r3185, %r3184, 8;
	shf.r.wrap.b32 	%r3189, %r3184, %r3185, 8;
	mov.b64 	%rd5598, {%r3189, %r3188};
	xor.b64  	%rd5599, %rd5597, %rd5598;
	add.s64 	%rd5600, %rd21417, %rd21435;
	add.s64 	%rd5601, %rd5600, %rd5594;
	add.s64 	%rd21435, %rd5601, %rd5599;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3190,%dummy}, %rd21434;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3191}, %rd21434;
	}
	shf.r.wrap.b32 	%r3192, %r3191, %r3190, 19;
	shf.r.wrap.b32 	%r3193, %r3190, %r3191, 19;
	mov.b64 	%rd5602, {%r3193, %r3192};
	shf.l.wrap.b32 	%r3194, %r3190, %r3191, 3;
	shf.l.wrap.b32 	%r3195, %r3191, %r3190, 3;
	mov.b64 	%rd5603, {%r3195, %r3194};
	shr.u64 	%rd5604, %rd21434, 6;
	xor.b64  	%rd5605, %rd5602, %rd5604;
	xor.b64  	%rd5606, %rd5605, %rd5603;
	shr.u64 	%rd5607, %rd21437, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3196,%dummy}, %rd21437;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3197}, %rd21437;
	}
	shf.r.wrap.b32 	%r3198, %r3197, %r3196, 1;
	shf.r.wrap.b32 	%r3199, %r3196, %r3197, 1;
	mov.b64 	%rd5608, {%r3199, %r3198};
	xor.b64  	%rd5609, %rd5608, %rd5607;
	shf.r.wrap.b32 	%r3200, %r3197, %r3196, 8;
	shf.r.wrap.b32 	%r3201, %r3196, %r3197, 8;
	mov.b64 	%rd5610, {%r3201, %r3200};
	xor.b64  	%rd5611, %rd5609, %rd5610;
	add.s64 	%rd5612, %rd21416, %rd21436;
	add.s64 	%rd5613, %rd5612, %rd5606;
	add.s64 	%rd21436, %rd5613, %rd5611;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3202,%dummy}, %rd21435;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3203}, %rd21435;
	}
	shf.r.wrap.b32 	%r3204, %r3203, %r3202, 19;
	shf.r.wrap.b32 	%r3205, %r3202, %r3203, 19;
	mov.b64 	%rd5614, {%r3205, %r3204};
	shf.l.wrap.b32 	%r3206, %r3202, %r3203, 3;
	shf.l.wrap.b32 	%r3207, %r3203, %r3202, 3;
	mov.b64 	%rd5615, {%r3207, %r3206};
	shr.u64 	%rd5616, %rd21435, 6;
	xor.b64  	%rd5617, %rd5614, %rd5616;
	xor.b64  	%rd5618, %rd5617, %rd5615;
	shr.u64 	%rd5619, %rd21438, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3208,%dummy}, %rd21438;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3209}, %rd21438;
	}
	shf.r.wrap.b32 	%r3210, %r3209, %r3208, 1;
	shf.r.wrap.b32 	%r3211, %r3208, %r3209, 1;
	mov.b64 	%rd5620, {%r3211, %r3210};
	xor.b64  	%rd5621, %rd5620, %rd5619;
	shf.r.wrap.b32 	%r3212, %r3209, %r3208, 8;
	shf.r.wrap.b32 	%r3213, %r3208, %r3209, 8;
	mov.b64 	%rd5622, {%r3213, %r3212};
	xor.b64  	%rd5623, %rd5621, %rd5622;
	add.s64 	%rd5624, %rd21415, %rd21437;
	add.s64 	%rd5625, %rd5624, %rd5618;
	add.s64 	%rd21437, %rd5625, %rd5623;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3214,%dummy}, %rd21436;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3215}, %rd21436;
	}
	shf.r.wrap.b32 	%r3216, %r3215, %r3214, 19;
	shf.r.wrap.b32 	%r3217, %r3214, %r3215, 19;
	mov.b64 	%rd5626, {%r3217, %r3216};
	shf.l.wrap.b32 	%r3218, %r3214, %r3215, 3;
	shf.l.wrap.b32 	%r3219, %r3215, %r3214, 3;
	mov.b64 	%rd5627, {%r3219, %r3218};
	shr.u64 	%rd5628, %rd21436, 6;
	xor.b64  	%rd5629, %rd5626, %rd5628;
	xor.b64  	%rd5630, %rd5629, %rd5627;
	shr.u64 	%rd5631, %rd21422, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3220,%dummy}, %rd21422;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3221}, %rd21422;
	}
	shf.r.wrap.b32 	%r3222, %r3221, %r3220, 1;
	shf.r.wrap.b32 	%r3223, %r3220, %r3221, 1;
	mov.b64 	%rd5632, {%r3223, %r3222};
	xor.b64  	%rd5633, %rd5632, %rd5631;
	shf.r.wrap.b32 	%r3224, %r3221, %r3220, 8;
	shf.r.wrap.b32 	%r3225, %r3220, %r3221, 8;
	mov.b64 	%rd5634, {%r3225, %r3224};
	xor.b64  	%rd5635, %rd5633, %rd5634;
	add.s64 	%rd5636, %rd21431, %rd21438;
	add.s64 	%rd5637, %rd5636, %rd5630;
	add.s64 	%rd21438, %rd5637, %rd5635;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3226,%dummy}, %rd21437;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3227}, %rd21437;
	}
	shf.r.wrap.b32 	%r3228, %r3227, %r3226, 19;
	shf.r.wrap.b32 	%r3229, %r3226, %r3227, 19;
	mov.b64 	%rd5638, {%r3229, %r3228};
	shf.l.wrap.b32 	%r3230, %r3226, %r3227, 3;
	shf.l.wrap.b32 	%r3231, %r3227, %r3226, 3;
	mov.b64 	%rd5639, {%r3231, %r3230};
	shr.u64 	%rd5640, %rd21437, 6;
	xor.b64  	%rd5641, %rd5638, %rd5640;
	xor.b64  	%rd5642, %rd5641, %rd5639;
	shr.u64 	%rd5643, %rd21421, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3232,%dummy}, %rd21421;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3233}, %rd21421;
	}
	shf.r.wrap.b32 	%r3234, %r3233, %r3232, 1;
	shf.r.wrap.b32 	%r3235, %r3232, %r3233, 1;
	mov.b64 	%rd5644, {%r3235, %r3234};
	xor.b64  	%rd5645, %rd5644, %rd5643;
	shf.r.wrap.b32 	%r3236, %r3233, %r3232, 8;
	shf.r.wrap.b32 	%r3237, %r3232, %r3233, 8;
	mov.b64 	%rd5646, {%r3237, %r3236};
	xor.b64  	%rd5647, %rd5645, %rd5646;
	add.s64 	%rd5648, %rd21432, %rd21422;
	add.s64 	%rd5649, %rd5648, %rd5642;
	add.s64 	%rd21422, %rd5649, %rd5647;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3238,%dummy}, %rd21438;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3239}, %rd21438;
	}
	shf.r.wrap.b32 	%r3240, %r3239, %r3238, 19;
	shf.r.wrap.b32 	%r3241, %r3238, %r3239, 19;
	mov.b64 	%rd5650, {%r3241, %r3240};
	shf.l.wrap.b32 	%r3242, %r3238, %r3239, 3;
	shf.l.wrap.b32 	%r3243, %r3239, %r3238, 3;
	mov.b64 	%rd5651, {%r3243, %r3242};
	shr.u64 	%rd5652, %rd21438, 6;
	xor.b64  	%rd5653, %rd5650, %rd5652;
	xor.b64  	%rd5654, %rd5653, %rd5651;
	shr.u64 	%rd5655, %rd21420, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3244,%dummy}, %rd21420;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3245}, %rd21420;
	}
	shf.r.wrap.b32 	%r3246, %r3245, %r3244, 1;
	shf.r.wrap.b32 	%r3247, %r3244, %r3245, 1;
	mov.b64 	%rd5656, {%r3247, %r3246};
	xor.b64  	%rd5657, %rd5656, %rd5655;
	shf.r.wrap.b32 	%r3248, %r3245, %r3244, 8;
	shf.r.wrap.b32 	%r3249, %r3244, %r3245, 8;
	mov.b64 	%rd5658, {%r3249, %r3248};
	xor.b64  	%rd5659, %rd5657, %rd5658;
	add.s64 	%rd5660, %rd21433, %rd21421;
	add.s64 	%rd5661, %rd5660, %rd5654;
	add.s64 	%rd21421, %rd5661, %rd5659;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3250,%dummy}, %rd21422;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3251}, %rd21422;
	}
	shf.r.wrap.b32 	%r3252, %r3251, %r3250, 19;
	shf.r.wrap.b32 	%r3253, %r3250, %r3251, 19;
	mov.b64 	%rd5662, {%r3253, %r3252};
	shf.l.wrap.b32 	%r3254, %r3250, %r3251, 3;
	shf.l.wrap.b32 	%r3255, %r3251, %r3250, 3;
	mov.b64 	%rd5663, {%r3255, %r3254};
	shr.u64 	%rd5664, %rd21422, 6;
	xor.b64  	%rd5665, %rd5662, %rd5664;
	xor.b64  	%rd5666, %rd5665, %rd5663;
	shr.u64 	%rd5667, %rd21419, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3256,%dummy}, %rd21419;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3257}, %rd21419;
	}
	shf.r.wrap.b32 	%r3258, %r3257, %r3256, 1;
	shf.r.wrap.b32 	%r3259, %r3256, %r3257, 1;
	mov.b64 	%rd5668, {%r3259, %r3258};
	xor.b64  	%rd5669, %rd5668, %rd5667;
	shf.r.wrap.b32 	%r3260, %r3257, %r3256, 8;
	shf.r.wrap.b32 	%r3261, %r3256, %r3257, 8;
	mov.b64 	%rd5670, {%r3261, %r3260};
	xor.b64  	%rd5671, %rd5669, %rd5670;
	add.s64 	%rd5672, %rd21434, %rd21420;
	add.s64 	%rd5673, %rd5672, %rd5666;
	add.s64 	%rd21420, %rd5673, %rd5671;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3262,%dummy}, %rd21421;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3263}, %rd21421;
	}
	shf.r.wrap.b32 	%r3264, %r3263, %r3262, 19;
	shf.r.wrap.b32 	%r3265, %r3262, %r3263, 19;
	mov.b64 	%rd5674, {%r3265, %r3264};
	shf.l.wrap.b32 	%r3266, %r3262, %r3263, 3;
	shf.l.wrap.b32 	%r3267, %r3263, %r3262, 3;
	mov.b64 	%rd5675, {%r3267, %r3266};
	shr.u64 	%rd5676, %rd21421, 6;
	xor.b64  	%rd5677, %rd5674, %rd5676;
	xor.b64  	%rd5678, %rd5677, %rd5675;
	shr.u64 	%rd5679, %rd21418, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3268,%dummy}, %rd21418;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3269}, %rd21418;
	}
	shf.r.wrap.b32 	%r3270, %r3269, %r3268, 1;
	shf.r.wrap.b32 	%r3271, %r3268, %r3269, 1;
	mov.b64 	%rd5680, {%r3271, %r3270};
	xor.b64  	%rd5681, %rd5680, %rd5679;
	shf.r.wrap.b32 	%r3272, %r3269, %r3268, 8;
	shf.r.wrap.b32 	%r3273, %r3268, %r3269, 8;
	mov.b64 	%rd5682, {%r3273, %r3272};
	xor.b64  	%rd5683, %rd5681, %rd5682;
	add.s64 	%rd5684, %rd21435, %rd21419;
	add.s64 	%rd5685, %rd5684, %rd5678;
	add.s64 	%rd21419, %rd5685, %rd5683;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3274,%dummy}, %rd21420;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3275}, %rd21420;
	}
	shf.r.wrap.b32 	%r3276, %r3275, %r3274, 19;
	shf.r.wrap.b32 	%r3277, %r3274, %r3275, 19;
	mov.b64 	%rd5686, {%r3277, %r3276};
	shf.l.wrap.b32 	%r3278, %r3274, %r3275, 3;
	shf.l.wrap.b32 	%r3279, %r3275, %r3274, 3;
	mov.b64 	%rd5687, {%r3279, %r3278};
	shr.u64 	%rd5688, %rd21420, 6;
	xor.b64  	%rd5689, %rd5686, %rd5688;
	xor.b64  	%rd5690, %rd5689, %rd5687;
	shr.u64 	%rd5691, %rd21417, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3280,%dummy}, %rd21417;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3281}, %rd21417;
	}
	shf.r.wrap.b32 	%r3282, %r3281, %r3280, 1;
	shf.r.wrap.b32 	%r3283, %r3280, %r3281, 1;
	mov.b64 	%rd5692, {%r3283, %r3282};
	xor.b64  	%rd5693, %rd5692, %rd5691;
	shf.r.wrap.b32 	%r3284, %r3281, %r3280, 8;
	shf.r.wrap.b32 	%r3285, %r3280, %r3281, 8;
	mov.b64 	%rd5694, {%r3285, %r3284};
	xor.b64  	%rd5695, %rd5693, %rd5694;
	add.s64 	%rd5696, %rd21436, %rd21418;
	add.s64 	%rd5697, %rd5696, %rd5690;
	add.s64 	%rd21418, %rd5697, %rd5695;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3286,%dummy}, %rd21419;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3287}, %rd21419;
	}
	shf.r.wrap.b32 	%r3288, %r3287, %r3286, 19;
	shf.r.wrap.b32 	%r3289, %r3286, %r3287, 19;
	mov.b64 	%rd5698, {%r3289, %r3288};
	shf.l.wrap.b32 	%r3290, %r3286, %r3287, 3;
	shf.l.wrap.b32 	%r3291, %r3287, %r3286, 3;
	mov.b64 	%rd5699, {%r3291, %r3290};
	shr.u64 	%rd5700, %rd21419, 6;
	xor.b64  	%rd5701, %rd5698, %rd5700;
	xor.b64  	%rd5702, %rd5701, %rd5699;
	shr.u64 	%rd5703, %rd21416, 7;
	shf.r.wrap.b32 	%r3292, %r3131, %r3130, 1;
	shf.r.wrap.b32 	%r3293, %r3130, %r3131, 1;
	mov.b64 	%rd5704, {%r3293, %r3292};
	xor.b64  	%rd5705, %rd5704, %rd5703;
	shf.r.wrap.b32 	%r3294, %r3131, %r3130, 8;
	shf.r.wrap.b32 	%r3295, %r3130, %r3131, 8;
	mov.b64 	%rd5706, {%r3295, %r3294};
	xor.b64  	%rd5707, %rd5705, %rd5706;
	add.s64 	%rd5708, %rd21437, %rd21417;
	add.s64 	%rd5709, %rd5708, %rd5702;
	add.s64 	%rd21417, %rd5709, %rd5707;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3296,%dummy}, %rd21418;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3297}, %rd21418;
	}
	shf.r.wrap.b32 	%r3298, %r3297, %r3296, 19;
	shf.r.wrap.b32 	%r3299, %r3296, %r3297, 19;
	mov.b64 	%rd5710, {%r3299, %r3298};
	shf.l.wrap.b32 	%r3300, %r3296, %r3297, 3;
	shf.l.wrap.b32 	%r3301, %r3297, %r3296, 3;
	mov.b64 	%rd5711, {%r3301, %r3300};
	shr.u64 	%rd5712, %rd21418, 6;
	xor.b64  	%rd5713, %rd5710, %rd5712;
	xor.b64  	%rd5714, %rd5713, %rd5711;
	shr.u64 	%rd5715, %rd21415, 7;
	shf.r.wrap.b32 	%r3302, %r3143, %r3142, 1;
	shf.r.wrap.b32 	%r3303, %r3142, %r3143, 1;
	mov.b64 	%rd5716, {%r3303, %r3302};
	xor.b64  	%rd5717, %rd5716, %rd5715;
	shf.r.wrap.b32 	%r3304, %r3143, %r3142, 8;
	shf.r.wrap.b32 	%r3305, %r3142, %r3143, 8;
	mov.b64 	%rd5718, {%r3305, %r3304};
	xor.b64  	%rd5719, %rd5717, %rd5718;
	add.s64 	%rd5720, %rd21438, %rd21416;
	add.s64 	%rd5721, %rd5720, %rd5714;
	add.s64 	%rd21416, %rd5721, %rd5719;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3306,%dummy}, %rd21417;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3307}, %rd21417;
	}
	shf.r.wrap.b32 	%r3308, %r3307, %r3306, 19;
	shf.r.wrap.b32 	%r3309, %r3306, %r3307, 19;
	mov.b64 	%rd5722, {%r3309, %r3308};
	shf.l.wrap.b32 	%r3310, %r3306, %r3307, 3;
	shf.l.wrap.b32 	%r3311, %r3307, %r3306, 3;
	mov.b64 	%rd5723, {%r3311, %r3310};
	shr.u64 	%rd5724, %rd21417, 6;
	xor.b64  	%rd5725, %rd5722, %rd5724;
	xor.b64  	%rd5726, %rd5725, %rd5723;
	shf.r.wrap.b32 	%r3312, %r3155, %r3154, 1;
	shf.r.wrap.b32 	%r3313, %r3154, %r3155, 1;
	mov.b64 	%rd5727, {%r3313, %r3312};
	shf.r.wrap.b32 	%r3314, %r3155, %r3154, 8;
	shf.r.wrap.b32 	%r3315, %r3154, %r3155, 8;
	mov.b64 	%rd5728, {%r3315, %r3314};
	shr.u64 	%rd5729, %rd21431, 7;
	xor.b64  	%rd5730, %rd5727, %rd5729;
	xor.b64  	%rd5731, %rd5730, %rd5728;
	add.s64 	%rd5732, %rd21422, %rd21415;
	add.s64 	%rd5733, %rd5732, %rd5726;
	add.s64 	%rd21415, %rd5733, %rd5731;
	mul.wide.s32 	%rd5734, %r14351, 8;
	mov.u64 	%rd5735, k_sha512;
	add.s64 	%rd5736, %rd5735, %rd5734;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3316,%dummy}, %rd21427;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3317}, %rd21427;
	}
	shf.r.wrap.b32 	%r3318, %r3317, %r3316, 18;
	shf.r.wrap.b32 	%r3319, %r3316, %r3317, 18;
	mov.b64 	%rd5737, {%r3319, %r3318};
	shf.r.wrap.b32 	%r3320, %r3317, %r3316, 14;
	shf.r.wrap.b32 	%r3321, %r3316, %r3317, 14;
	mov.b64 	%rd5738, {%r3321, %r3320};
	xor.b64  	%rd5739, %rd5737, %rd5738;
	shf.l.wrap.b32 	%r3322, %r3316, %r3317, 23;
	shf.l.wrap.b32 	%r3323, %r3317, %r3316, 23;
	mov.b64 	%rd5740, {%r3323, %r3322};
	xor.b64  	%rd5741, %rd5739, %rd5740;
	xor.b64  	%rd5742, %rd21428, %rd21429;
	and.b64  	%rd5743, %rd5742, %rd21427;
	xor.b64  	%rd5744, %rd5743, %rd21429;
	add.s64 	%rd5745, %rd5744, %rd21430;
	add.s64 	%rd5746, %rd5745, %rd21431;
	ld.const.u64 	%rd5747, [%rd5736];
	add.s64 	%rd5748, %rd5746, %rd5747;
	add.s64 	%rd5749, %rd5748, %rd5741;
	add.s64 	%rd5750, %rd5749, %rd21426;
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3324}, %rd21423;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3325,%dummy}, %rd21423;
	}
	shf.l.wrap.b32 	%r3326, %r3325, %r3324, 30;
	shf.l.wrap.b32 	%r3327, %r3324, %r3325, 30;
	mov.b64 	%rd5751, {%r3327, %r3326};
	shf.r.wrap.b32 	%r3328, %r3324, %r3325, 28;
	shf.r.wrap.b32 	%r3329, %r3325, %r3324, 28;
	mov.b64 	%rd5752, {%r3329, %r3328};
	xor.b64  	%rd5753, %rd5751, %rd5752;
	shf.l.wrap.b32 	%r3330, %r3325, %r3324, 25;
	shf.l.wrap.b32 	%r3331, %r3324, %r3325, 25;
	mov.b64 	%rd5754, {%r3331, %r3330};
	xor.b64  	%rd5755, %rd5753, %rd5754;
	xor.b64  	%rd5756, %rd21423, %rd21424;
	xor.b64  	%rd5757, %rd21423, %rd21425;
	and.b64  	%rd5758, %rd5756, %rd5757;
	xor.b64  	%rd5759, %rd5758, %rd21423;
	add.s64 	%rd5760, %rd5749, %rd5759;
	add.s64 	%rd5761, %rd5760, %rd5755;
	add.s32 	%r3332, %r14351, 1;
	mul.wide.s32 	%rd5762, %r3332, 8;
	add.s64 	%rd5763, %rd5735, %rd5762;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3333,%dummy}, %rd5750;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3334}, %rd5750;
	}
	shf.r.wrap.b32 	%r3335, %r3334, %r3333, 14;
	shf.r.wrap.b32 	%r3336, %r3333, %r3334, 14;
	mov.b64 	%rd5764, {%r3336, %r3335};
	shf.r.wrap.b32 	%r3337, %r3334, %r3333, 18;
	shf.r.wrap.b32 	%r3338, %r3333, %r3334, 18;
	mov.b64 	%rd5765, {%r3338, %r3337};
	xor.b64  	%rd5766, %rd5765, %rd5764;
	shf.l.wrap.b32 	%r3339, %r3333, %r3334, 23;
	shf.l.wrap.b32 	%r3340, %r3334, %r3333, 23;
	mov.b64 	%rd5767, {%r3340, %r3339};
	xor.b64  	%rd5768, %rd5766, %rd5767;
	xor.b64  	%rd5769, %rd21427, %rd21428;
	and.b64  	%rd5770, %rd5750, %rd5769;
	xor.b64  	%rd5771, %rd5770, %rd21428;
	add.s64 	%rd5772, %rd21432, %rd21429;
	ld.const.u64 	%rd5773, [%rd5763];
	add.s64 	%rd5774, %rd5772, %rd5773;
	add.s64 	%rd5775, %rd5774, %rd5771;
	add.s64 	%rd5776, %rd5775, %rd5768;
	add.s64 	%rd5777, %rd5776, %rd21425;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3341,%dummy}, %rd5761;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3342}, %rd5761;
	}
	shf.r.wrap.b32 	%r3343, %r3342, %r3341, 28;
	shf.r.wrap.b32 	%r3344, %r3341, %r3342, 28;
	mov.b64 	%rd5778, {%r3344, %r3343};
	shf.l.wrap.b32 	%r3345, %r3341, %r3342, 30;
	shf.l.wrap.b32 	%r3346, %r3342, %r3341, 30;
	mov.b64 	%rd5779, {%r3346, %r3345};
	xor.b64  	%rd5780, %rd5779, %rd5778;
	shf.l.wrap.b32 	%r3347, %r3341, %r3342, 25;
	shf.l.wrap.b32 	%r3348, %r3342, %r3341, 25;
	mov.b64 	%rd5781, {%r3348, %r3347};
	xor.b64  	%rd5782, %rd5780, %rd5781;
	xor.b64  	%rd5783, %rd5761, %rd21424;
	xor.b64  	%rd5784, %rd5761, %rd21423;
	and.b64  	%rd5785, %rd5784, %rd5783;
	xor.b64  	%rd5786, %rd5785, %rd5761;
	add.s64 	%rd5787, %rd5776, %rd5786;
	add.s64 	%rd5788, %rd5787, %rd5782;
	add.s32 	%r3349, %r14351, 2;
	mul.wide.s32 	%rd5789, %r3349, 8;
	add.s64 	%rd5790, %rd5735, %rd5789;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3350,%dummy}, %rd5777;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3351}, %rd5777;
	}
	shf.r.wrap.b32 	%r3352, %r3351, %r3350, 14;
	shf.r.wrap.b32 	%r3353, %r3350, %r3351, 14;
	mov.b64 	%rd5791, {%r3353, %r3352};
	shf.r.wrap.b32 	%r3354, %r3351, %r3350, 18;
	shf.r.wrap.b32 	%r3355, %r3350, %r3351, 18;
	mov.b64 	%rd5792, {%r3355, %r3354};
	xor.b64  	%rd5793, %rd5792, %rd5791;
	shf.l.wrap.b32 	%r3356, %r3350, %r3351, 23;
	shf.l.wrap.b32 	%r3357, %r3351, %r3350, 23;
	mov.b64 	%rd5794, {%r3357, %r3356};
	xor.b64  	%rd5795, %rd5793, %rd5794;
	xor.b64  	%rd5796, %rd5750, %rd21427;
	and.b64  	%rd5797, %rd5777, %rd5796;
	xor.b64  	%rd5798, %rd5797, %rd21427;
	add.s64 	%rd5799, %rd21433, %rd21428;
	ld.const.u64 	%rd5800, [%rd5790];
	add.s64 	%rd5801, %rd5799, %rd5800;
	add.s64 	%rd5802, %rd5801, %rd5798;
	add.s64 	%rd5803, %rd5802, %rd5795;
	add.s64 	%rd5804, %rd5803, %rd21424;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3358,%dummy}, %rd5788;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3359}, %rd5788;
	}
	shf.r.wrap.b32 	%r3360, %r3359, %r3358, 28;
	shf.r.wrap.b32 	%r3361, %r3358, %r3359, 28;
	mov.b64 	%rd5805, {%r3361, %r3360};
	shf.l.wrap.b32 	%r3362, %r3358, %r3359, 30;
	shf.l.wrap.b32 	%r3363, %r3359, %r3358, 30;
	mov.b64 	%rd5806, {%r3363, %r3362};
	xor.b64  	%rd5807, %rd5806, %rd5805;
	shf.l.wrap.b32 	%r3364, %r3358, %r3359, 25;
	shf.l.wrap.b32 	%r3365, %r3359, %r3358, 25;
	mov.b64 	%rd5808, {%r3365, %r3364};
	xor.b64  	%rd5809, %rd5807, %rd5808;
	xor.b64  	%rd5810, %rd5788, %rd21423;
	xor.b64  	%rd5811, %rd5788, %rd5761;
	and.b64  	%rd5812, %rd5811, %rd5810;
	xor.b64  	%rd5813, %rd5812, %rd5788;
	add.s64 	%rd5814, %rd5803, %rd5813;
	add.s64 	%rd5815, %rd5814, %rd5809;
	add.s32 	%r3366, %r14351, 3;
	mul.wide.s32 	%rd5816, %r3366, 8;
	add.s64 	%rd5817, %rd5735, %rd5816;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3367,%dummy}, %rd5804;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3368}, %rd5804;
	}
	shf.r.wrap.b32 	%r3369, %r3368, %r3367, 14;
	shf.r.wrap.b32 	%r3370, %r3367, %r3368, 14;
	mov.b64 	%rd5818, {%r3370, %r3369};
	shf.r.wrap.b32 	%r3371, %r3368, %r3367, 18;
	shf.r.wrap.b32 	%r3372, %r3367, %r3368, 18;
	mov.b64 	%rd5819, {%r3372, %r3371};
	xor.b64  	%rd5820, %rd5819, %rd5818;
	shf.l.wrap.b32 	%r3373, %r3367, %r3368, 23;
	shf.l.wrap.b32 	%r3374, %r3368, %r3367, 23;
	mov.b64 	%rd5821, {%r3374, %r3373};
	xor.b64  	%rd5822, %rd5820, %rd5821;
	xor.b64  	%rd5823, %rd5777, %rd5750;
	and.b64  	%rd5824, %rd5804, %rd5823;
	xor.b64  	%rd5825, %rd5824, %rd5750;
	add.s64 	%rd5826, %rd21434, %rd21427;
	ld.const.u64 	%rd5827, [%rd5817];
	add.s64 	%rd5828, %rd5826, %rd5827;
	add.s64 	%rd5829, %rd5828, %rd5825;
	add.s64 	%rd5830, %rd5829, %rd5822;
	add.s64 	%rd5831, %rd5830, %rd21423;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3375,%dummy}, %rd5815;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3376}, %rd5815;
	}
	shf.r.wrap.b32 	%r3377, %r3376, %r3375, 28;
	shf.r.wrap.b32 	%r3378, %r3375, %r3376, 28;
	mov.b64 	%rd5832, {%r3378, %r3377};
	shf.l.wrap.b32 	%r3379, %r3375, %r3376, 30;
	shf.l.wrap.b32 	%r3380, %r3376, %r3375, 30;
	mov.b64 	%rd5833, {%r3380, %r3379};
	xor.b64  	%rd5834, %rd5833, %rd5832;
	shf.l.wrap.b32 	%r3381, %r3375, %r3376, 25;
	shf.l.wrap.b32 	%r3382, %r3376, %r3375, 25;
	mov.b64 	%rd5835, {%r3382, %r3381};
	xor.b64  	%rd5836, %rd5834, %rd5835;
	xor.b64  	%rd5837, %rd5815, %rd5761;
	xor.b64  	%rd5838, %rd5815, %rd5788;
	and.b64  	%rd5839, %rd5838, %rd5837;
	xor.b64  	%rd5840, %rd5839, %rd5815;
	add.s64 	%rd5841, %rd5830, %rd5840;
	add.s64 	%rd5842, %rd5841, %rd5836;
	add.s32 	%r3383, %r14351, 4;
	mul.wide.s32 	%rd5843, %r3383, 8;
	add.s64 	%rd5844, %rd5735, %rd5843;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3384,%dummy}, %rd5831;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3385}, %rd5831;
	}
	shf.r.wrap.b32 	%r3386, %r3385, %r3384, 14;
	shf.r.wrap.b32 	%r3387, %r3384, %r3385, 14;
	mov.b64 	%rd5845, {%r3387, %r3386};
	shf.r.wrap.b32 	%r3388, %r3385, %r3384, 18;
	shf.r.wrap.b32 	%r3389, %r3384, %r3385, 18;
	mov.b64 	%rd5846, {%r3389, %r3388};
	xor.b64  	%rd5847, %rd5846, %rd5845;
	shf.l.wrap.b32 	%r3390, %r3384, %r3385, 23;
	shf.l.wrap.b32 	%r3391, %r3385, %r3384, 23;
	mov.b64 	%rd5848, {%r3391, %r3390};
	xor.b64  	%rd5849, %rd5847, %rd5848;
	xor.b64  	%rd5850, %rd5804, %rd5777;
	and.b64  	%rd5851, %rd5831, %rd5850;
	xor.b64  	%rd5852, %rd5851, %rd5777;
	add.s64 	%rd5853, %rd5750, %rd21435;
	ld.const.u64 	%rd5854, [%rd5844];
	add.s64 	%rd5855, %rd5853, %rd5854;
	add.s64 	%rd5856, %rd5855, %rd5852;
	add.s64 	%rd5857, %rd5856, %rd5849;
	add.s64 	%rd5858, %rd5857, %rd5761;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3392,%dummy}, %rd5842;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3393}, %rd5842;
	}
	shf.r.wrap.b32 	%r3394, %r3393, %r3392, 28;
	shf.r.wrap.b32 	%r3395, %r3392, %r3393, 28;
	mov.b64 	%rd5859, {%r3395, %r3394};
	shf.l.wrap.b32 	%r3396, %r3392, %r3393, 30;
	shf.l.wrap.b32 	%r3397, %r3393, %r3392, 30;
	mov.b64 	%rd5860, {%r3397, %r3396};
	xor.b64  	%rd5861, %rd5860, %rd5859;
	shf.l.wrap.b32 	%r3398, %r3392, %r3393, 25;
	shf.l.wrap.b32 	%r3399, %r3393, %r3392, 25;
	mov.b64 	%rd5862, {%r3399, %r3398};
	xor.b64  	%rd5863, %rd5861, %rd5862;
	xor.b64  	%rd5864, %rd5842, %rd5788;
	xor.b64  	%rd5865, %rd5842, %rd5815;
	and.b64  	%rd5866, %rd5865, %rd5864;
	xor.b64  	%rd5867, %rd5866, %rd5842;
	add.s64 	%rd5868, %rd5857, %rd5867;
	add.s64 	%rd5869, %rd5868, %rd5863;
	add.s32 	%r3400, %r14351, 5;
	mul.wide.s32 	%rd5870, %r3400, 8;
	add.s64 	%rd5871, %rd5735, %rd5870;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3401,%dummy}, %rd5858;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3402}, %rd5858;
	}
	shf.r.wrap.b32 	%r3403, %r3402, %r3401, 14;
	shf.r.wrap.b32 	%r3404, %r3401, %r3402, 14;
	mov.b64 	%rd5872, {%r3404, %r3403};
	shf.r.wrap.b32 	%r3405, %r3402, %r3401, 18;
	shf.r.wrap.b32 	%r3406, %r3401, %r3402, 18;
	mov.b64 	%rd5873, {%r3406, %r3405};
	xor.b64  	%rd5874, %rd5873, %rd5872;
	shf.l.wrap.b32 	%r3407, %r3401, %r3402, 23;
	shf.l.wrap.b32 	%r3408, %r3402, %r3401, 23;
	mov.b64 	%rd5875, {%r3408, %r3407};
	xor.b64  	%rd5876, %rd5874, %rd5875;
	xor.b64  	%rd5877, %rd5831, %rd5804;
	and.b64  	%rd5878, %rd5858, %rd5877;
	xor.b64  	%rd5879, %rd5878, %rd5804;
	add.s64 	%rd5880, %rd5777, %rd21436;
	ld.const.u64 	%rd5881, [%rd5871];
	add.s64 	%rd5882, %rd5880, %rd5881;
	add.s64 	%rd5883, %rd5882, %rd5879;
	add.s64 	%rd5884, %rd5883, %rd5876;
	add.s64 	%rd5885, %rd5884, %rd5788;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3409,%dummy}, %rd5869;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3410}, %rd5869;
	}
	shf.r.wrap.b32 	%r3411, %r3410, %r3409, 28;
	shf.r.wrap.b32 	%r3412, %r3409, %r3410, 28;
	mov.b64 	%rd5886, {%r3412, %r3411};
	shf.l.wrap.b32 	%r3413, %r3409, %r3410, 30;
	shf.l.wrap.b32 	%r3414, %r3410, %r3409, 30;
	mov.b64 	%rd5887, {%r3414, %r3413};
	xor.b64  	%rd5888, %rd5887, %rd5886;
	shf.l.wrap.b32 	%r3415, %r3409, %r3410, 25;
	shf.l.wrap.b32 	%r3416, %r3410, %r3409, 25;
	mov.b64 	%rd5889, {%r3416, %r3415};
	xor.b64  	%rd5890, %rd5888, %rd5889;
	xor.b64  	%rd5891, %rd5869, %rd5815;
	xor.b64  	%rd5892, %rd5869, %rd5842;
	and.b64  	%rd5893, %rd5892, %rd5891;
	xor.b64  	%rd5894, %rd5893, %rd5869;
	add.s64 	%rd5895, %rd5884, %rd5894;
	add.s64 	%rd5896, %rd5895, %rd5890;
	add.s32 	%r3417, %r14351, 6;
	mul.wide.s32 	%rd5897, %r3417, 8;
	add.s64 	%rd5898, %rd5735, %rd5897;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3418,%dummy}, %rd5885;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3419}, %rd5885;
	}
	shf.r.wrap.b32 	%r3420, %r3419, %r3418, 14;
	shf.r.wrap.b32 	%r3421, %r3418, %r3419, 14;
	mov.b64 	%rd5899, {%r3421, %r3420};
	shf.r.wrap.b32 	%r3422, %r3419, %r3418, 18;
	shf.r.wrap.b32 	%r3423, %r3418, %r3419, 18;
	mov.b64 	%rd5900, {%r3423, %r3422};
	xor.b64  	%rd5901, %rd5900, %rd5899;
	shf.l.wrap.b32 	%r3424, %r3418, %r3419, 23;
	shf.l.wrap.b32 	%r3425, %r3419, %r3418, 23;
	mov.b64 	%rd5902, {%r3425, %r3424};
	xor.b64  	%rd5903, %rd5901, %rd5902;
	xor.b64  	%rd5904, %rd5858, %rd5831;
	and.b64  	%rd5905, %rd5885, %rd5904;
	xor.b64  	%rd5906, %rd5905, %rd5831;
	add.s64 	%rd5907, %rd5804, %rd21437;
	ld.const.u64 	%rd5908, [%rd5898];
	add.s64 	%rd5909, %rd5907, %rd5908;
	add.s64 	%rd5910, %rd5909, %rd5906;
	add.s64 	%rd5911, %rd5910, %rd5903;
	add.s64 	%rd5912, %rd5911, %rd5815;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3426,%dummy}, %rd5896;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3427}, %rd5896;
	}
	shf.r.wrap.b32 	%r3428, %r3427, %r3426, 28;
	shf.r.wrap.b32 	%r3429, %r3426, %r3427, 28;
	mov.b64 	%rd5913, {%r3429, %r3428};
	shf.l.wrap.b32 	%r3430, %r3426, %r3427, 30;
	shf.l.wrap.b32 	%r3431, %r3427, %r3426, 30;
	mov.b64 	%rd5914, {%r3431, %r3430};
	xor.b64  	%rd5915, %rd5914, %rd5913;
	shf.l.wrap.b32 	%r3432, %r3426, %r3427, 25;
	shf.l.wrap.b32 	%r3433, %r3427, %r3426, 25;
	mov.b64 	%rd5916, {%r3433, %r3432};
	xor.b64  	%rd5917, %rd5915, %rd5916;
	xor.b64  	%rd5918, %rd5896, %rd5842;
	xor.b64  	%rd5919, %rd5896, %rd5869;
	and.b64  	%rd5920, %rd5919, %rd5918;
	xor.b64  	%rd5921, %rd5920, %rd5896;
	add.s64 	%rd5922, %rd5911, %rd5921;
	add.s64 	%rd5923, %rd5922, %rd5917;
	add.s32 	%r3434, %r14351, 7;
	mul.wide.s32 	%rd5924, %r3434, 8;
	add.s64 	%rd5925, %rd5735, %rd5924;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3435,%dummy}, %rd5912;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3436}, %rd5912;
	}
	shf.r.wrap.b32 	%r3437, %r3436, %r3435, 14;
	shf.r.wrap.b32 	%r3438, %r3435, %r3436, 14;
	mov.b64 	%rd5926, {%r3438, %r3437};
	shf.r.wrap.b32 	%r3439, %r3436, %r3435, 18;
	shf.r.wrap.b32 	%r3440, %r3435, %r3436, 18;
	mov.b64 	%rd5927, {%r3440, %r3439};
	xor.b64  	%rd5928, %rd5927, %rd5926;
	shf.l.wrap.b32 	%r3441, %r3435, %r3436, 23;
	shf.l.wrap.b32 	%r3442, %r3436, %r3435, 23;
	mov.b64 	%rd5929, {%r3442, %r3441};
	xor.b64  	%rd5930, %rd5928, %rd5929;
	xor.b64  	%rd5931, %rd5885, %rd5858;
	and.b64  	%rd5932, %rd5912, %rd5931;
	xor.b64  	%rd5933, %rd5932, %rd5858;
	add.s64 	%rd5934, %rd5831, %rd21438;
	ld.const.u64 	%rd5935, [%rd5925];
	add.s64 	%rd5936, %rd5934, %rd5935;
	add.s64 	%rd5937, %rd5936, %rd5933;
	add.s64 	%rd5938, %rd5937, %rd5930;
	add.s64 	%rd5939, %rd5938, %rd5842;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3443,%dummy}, %rd5923;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3444}, %rd5923;
	}
	shf.r.wrap.b32 	%r3445, %r3444, %r3443, 28;
	shf.r.wrap.b32 	%r3446, %r3443, %r3444, 28;
	mov.b64 	%rd5940, {%r3446, %r3445};
	shf.l.wrap.b32 	%r3447, %r3443, %r3444, 30;
	shf.l.wrap.b32 	%r3448, %r3444, %r3443, 30;
	mov.b64 	%rd5941, {%r3448, %r3447};
	xor.b64  	%rd5942, %rd5941, %rd5940;
	shf.l.wrap.b32 	%r3449, %r3443, %r3444, 25;
	shf.l.wrap.b32 	%r3450, %r3444, %r3443, 25;
	mov.b64 	%rd5943, {%r3450, %r3449};
	xor.b64  	%rd5944, %rd5942, %rd5943;
	xor.b64  	%rd5945, %rd5923, %rd5869;
	xor.b64  	%rd5946, %rd5923, %rd5896;
	and.b64  	%rd5947, %rd5946, %rd5945;
	xor.b64  	%rd5948, %rd5947, %rd5923;
	add.s64 	%rd5949, %rd5938, %rd5948;
	add.s64 	%rd5950, %rd5949, %rd5944;
	add.s32 	%r3451, %r14351, 8;
	mul.wide.s32 	%rd5951, %r3451, 8;
	add.s64 	%rd5952, %rd5735, %rd5951;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3452,%dummy}, %rd5939;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3453}, %rd5939;
	}
	shf.r.wrap.b32 	%r3454, %r3453, %r3452, 14;
	shf.r.wrap.b32 	%r3455, %r3452, %r3453, 14;
	mov.b64 	%rd5953, {%r3455, %r3454};
	shf.r.wrap.b32 	%r3456, %r3453, %r3452, 18;
	shf.r.wrap.b32 	%r3457, %r3452, %r3453, 18;
	mov.b64 	%rd5954, {%r3457, %r3456};
	xor.b64  	%rd5955, %rd5954, %rd5953;
	shf.l.wrap.b32 	%r3458, %r3452, %r3453, 23;
	shf.l.wrap.b32 	%r3459, %r3453, %r3452, 23;
	mov.b64 	%rd5956, {%r3459, %r3458};
	xor.b64  	%rd5957, %rd5955, %rd5956;
	xor.b64  	%rd5958, %rd5912, %rd5885;
	and.b64  	%rd5959, %rd5939, %rd5958;
	xor.b64  	%rd5960, %rd5959, %rd5885;
	add.s64 	%rd5961, %rd5858, %rd21422;
	ld.const.u64 	%rd5962, [%rd5952];
	add.s64 	%rd5963, %rd5961, %rd5962;
	add.s64 	%rd5964, %rd5963, %rd5960;
	add.s64 	%rd5965, %rd5964, %rd5957;
	add.s64 	%rd5966, %rd5965, %rd5869;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3460,%dummy}, %rd5950;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3461}, %rd5950;
	}
	shf.r.wrap.b32 	%r3462, %r3461, %r3460, 28;
	shf.r.wrap.b32 	%r3463, %r3460, %r3461, 28;
	mov.b64 	%rd5967, {%r3463, %r3462};
	shf.l.wrap.b32 	%r3464, %r3460, %r3461, 30;
	shf.l.wrap.b32 	%r3465, %r3461, %r3460, 30;
	mov.b64 	%rd5968, {%r3465, %r3464};
	xor.b64  	%rd5969, %rd5968, %rd5967;
	shf.l.wrap.b32 	%r3466, %r3460, %r3461, 25;
	shf.l.wrap.b32 	%r3467, %r3461, %r3460, 25;
	mov.b64 	%rd5970, {%r3467, %r3466};
	xor.b64  	%rd5971, %rd5969, %rd5970;
	xor.b64  	%rd5972, %rd5950, %rd5896;
	xor.b64  	%rd5973, %rd5950, %rd5923;
	and.b64  	%rd5974, %rd5973, %rd5972;
	xor.b64  	%rd5975, %rd5974, %rd5950;
	add.s64 	%rd5976, %rd5965, %rd5975;
	add.s64 	%rd5977, %rd5976, %rd5971;
	add.s32 	%r3468, %r14351, 9;
	mul.wide.s32 	%rd5978, %r3468, 8;
	add.s64 	%rd5979, %rd5735, %rd5978;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3469,%dummy}, %rd5966;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3470}, %rd5966;
	}
	shf.r.wrap.b32 	%r3471, %r3470, %r3469, 14;
	shf.r.wrap.b32 	%r3472, %r3469, %r3470, 14;
	mov.b64 	%rd5980, {%r3472, %r3471};
	shf.r.wrap.b32 	%r3473, %r3470, %r3469, 18;
	shf.r.wrap.b32 	%r3474, %r3469, %r3470, 18;
	mov.b64 	%rd5981, {%r3474, %r3473};
	xor.b64  	%rd5982, %rd5981, %rd5980;
	shf.l.wrap.b32 	%r3475, %r3469, %r3470, 23;
	shf.l.wrap.b32 	%r3476, %r3470, %r3469, 23;
	mov.b64 	%rd5983, {%r3476, %r3475};
	xor.b64  	%rd5984, %rd5982, %rd5983;
	xor.b64  	%rd5985, %rd5939, %rd5912;
	and.b64  	%rd5986, %rd5966, %rd5985;
	xor.b64  	%rd5987, %rd5986, %rd5912;
	add.s64 	%rd5988, %rd5885, %rd21421;
	ld.const.u64 	%rd5989, [%rd5979];
	add.s64 	%rd5990, %rd5988, %rd5989;
	add.s64 	%rd5991, %rd5990, %rd5987;
	add.s64 	%rd5992, %rd5991, %rd5984;
	add.s64 	%rd5993, %rd5992, %rd5896;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3477,%dummy}, %rd5977;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3478}, %rd5977;
	}
	shf.r.wrap.b32 	%r3479, %r3478, %r3477, 28;
	shf.r.wrap.b32 	%r3480, %r3477, %r3478, 28;
	mov.b64 	%rd5994, {%r3480, %r3479};
	shf.l.wrap.b32 	%r3481, %r3477, %r3478, 30;
	shf.l.wrap.b32 	%r3482, %r3478, %r3477, 30;
	mov.b64 	%rd5995, {%r3482, %r3481};
	xor.b64  	%rd5996, %rd5995, %rd5994;
	shf.l.wrap.b32 	%r3483, %r3477, %r3478, 25;
	shf.l.wrap.b32 	%r3484, %r3478, %r3477, 25;
	mov.b64 	%rd5997, {%r3484, %r3483};
	xor.b64  	%rd5998, %rd5996, %rd5997;
	xor.b64  	%rd5999, %rd5977, %rd5923;
	xor.b64  	%rd6000, %rd5977, %rd5950;
	and.b64  	%rd6001, %rd6000, %rd5999;
	xor.b64  	%rd6002, %rd6001, %rd5977;
	add.s64 	%rd6003, %rd5992, %rd6002;
	add.s64 	%rd6004, %rd6003, %rd5998;
	add.s32 	%r3485, %r14351, 10;
	mul.wide.s32 	%rd6005, %r3485, 8;
	add.s64 	%rd6006, %rd5735, %rd6005;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3486,%dummy}, %rd5993;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3487}, %rd5993;
	}
	shf.r.wrap.b32 	%r3488, %r3487, %r3486, 14;
	shf.r.wrap.b32 	%r3489, %r3486, %r3487, 14;
	mov.b64 	%rd6007, {%r3489, %r3488};
	shf.r.wrap.b32 	%r3490, %r3487, %r3486, 18;
	shf.r.wrap.b32 	%r3491, %r3486, %r3487, 18;
	mov.b64 	%rd6008, {%r3491, %r3490};
	xor.b64  	%rd6009, %rd6008, %rd6007;
	shf.l.wrap.b32 	%r3492, %r3486, %r3487, 23;
	shf.l.wrap.b32 	%r3493, %r3487, %r3486, 23;
	mov.b64 	%rd6010, {%r3493, %r3492};
	xor.b64  	%rd6011, %rd6009, %rd6010;
	xor.b64  	%rd6012, %rd5966, %rd5939;
	and.b64  	%rd6013, %rd5993, %rd6012;
	xor.b64  	%rd6014, %rd6013, %rd5939;
	add.s64 	%rd6015, %rd5912, %rd21420;
	ld.const.u64 	%rd6016, [%rd6006];
	add.s64 	%rd6017, %rd6015, %rd6016;
	add.s64 	%rd6018, %rd6017, %rd6014;
	add.s64 	%rd6019, %rd6018, %rd6011;
	add.s64 	%rd6020, %rd6019, %rd5923;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3494,%dummy}, %rd6004;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3495}, %rd6004;
	}
	shf.r.wrap.b32 	%r3496, %r3495, %r3494, 28;
	shf.r.wrap.b32 	%r3497, %r3494, %r3495, 28;
	mov.b64 	%rd6021, {%r3497, %r3496};
	shf.l.wrap.b32 	%r3498, %r3494, %r3495, 30;
	shf.l.wrap.b32 	%r3499, %r3495, %r3494, 30;
	mov.b64 	%rd6022, {%r3499, %r3498};
	xor.b64  	%rd6023, %rd6022, %rd6021;
	shf.l.wrap.b32 	%r3500, %r3494, %r3495, 25;
	shf.l.wrap.b32 	%r3501, %r3495, %r3494, 25;
	mov.b64 	%rd6024, {%r3501, %r3500};
	xor.b64  	%rd6025, %rd6023, %rd6024;
	xor.b64  	%rd6026, %rd6004, %rd5950;
	xor.b64  	%rd6027, %rd6004, %rd5977;
	and.b64  	%rd6028, %rd6027, %rd6026;
	xor.b64  	%rd6029, %rd6028, %rd6004;
	add.s64 	%rd6030, %rd6019, %rd6029;
	add.s64 	%rd6031, %rd6030, %rd6025;
	add.s32 	%r3502, %r14351, 11;
	mul.wide.s32 	%rd6032, %r3502, 8;
	add.s64 	%rd6033, %rd5735, %rd6032;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3503,%dummy}, %rd6020;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3504}, %rd6020;
	}
	shf.r.wrap.b32 	%r3505, %r3504, %r3503, 14;
	shf.r.wrap.b32 	%r3506, %r3503, %r3504, 14;
	mov.b64 	%rd6034, {%r3506, %r3505};
	shf.r.wrap.b32 	%r3507, %r3504, %r3503, 18;
	shf.r.wrap.b32 	%r3508, %r3503, %r3504, 18;
	mov.b64 	%rd6035, {%r3508, %r3507};
	xor.b64  	%rd6036, %rd6035, %rd6034;
	shf.l.wrap.b32 	%r3509, %r3503, %r3504, 23;
	shf.l.wrap.b32 	%r3510, %r3504, %r3503, 23;
	mov.b64 	%rd6037, {%r3510, %r3509};
	xor.b64  	%rd6038, %rd6036, %rd6037;
	xor.b64  	%rd6039, %rd5993, %rd5966;
	and.b64  	%rd6040, %rd6020, %rd6039;
	xor.b64  	%rd6041, %rd6040, %rd5966;
	add.s64 	%rd6042, %rd5939, %rd21419;
	ld.const.u64 	%rd6043, [%rd6033];
	add.s64 	%rd6044, %rd6042, %rd6043;
	add.s64 	%rd6045, %rd6044, %rd6041;
	add.s64 	%rd6046, %rd6045, %rd6038;
	add.s64 	%rd6047, %rd6046, %rd5950;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3511,%dummy}, %rd6031;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3512}, %rd6031;
	}
	shf.r.wrap.b32 	%r3513, %r3512, %r3511, 28;
	shf.r.wrap.b32 	%r3514, %r3511, %r3512, 28;
	mov.b64 	%rd6048, {%r3514, %r3513};
	shf.l.wrap.b32 	%r3515, %r3511, %r3512, 30;
	shf.l.wrap.b32 	%r3516, %r3512, %r3511, 30;
	mov.b64 	%rd6049, {%r3516, %r3515};
	xor.b64  	%rd6050, %rd6049, %rd6048;
	shf.l.wrap.b32 	%r3517, %r3511, %r3512, 25;
	shf.l.wrap.b32 	%r3518, %r3512, %r3511, 25;
	mov.b64 	%rd6051, {%r3518, %r3517};
	xor.b64  	%rd6052, %rd6050, %rd6051;
	xor.b64  	%rd6053, %rd6031, %rd5977;
	xor.b64  	%rd6054, %rd6031, %rd6004;
	and.b64  	%rd6055, %rd6054, %rd6053;
	xor.b64  	%rd6056, %rd6055, %rd6031;
	add.s64 	%rd6057, %rd6046, %rd6056;
	add.s64 	%rd6058, %rd6057, %rd6052;
	add.s32 	%r3519, %r14351, 12;
	mul.wide.s32 	%rd6059, %r3519, 8;
	add.s64 	%rd6060, %rd5735, %rd6059;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3520,%dummy}, %rd6047;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3521}, %rd6047;
	}
	shf.r.wrap.b32 	%r3522, %r3521, %r3520, 14;
	shf.r.wrap.b32 	%r3523, %r3520, %r3521, 14;
	mov.b64 	%rd6061, {%r3523, %r3522};
	shf.r.wrap.b32 	%r3524, %r3521, %r3520, 18;
	shf.r.wrap.b32 	%r3525, %r3520, %r3521, 18;
	mov.b64 	%rd6062, {%r3525, %r3524};
	xor.b64  	%rd6063, %rd6062, %rd6061;
	shf.l.wrap.b32 	%r3526, %r3520, %r3521, 23;
	shf.l.wrap.b32 	%r3527, %r3521, %r3520, 23;
	mov.b64 	%rd6064, {%r3527, %r3526};
	xor.b64  	%rd6065, %rd6063, %rd6064;
	xor.b64  	%rd6066, %rd6020, %rd5993;
	and.b64  	%rd6067, %rd6047, %rd6066;
	xor.b64  	%rd6068, %rd6067, %rd5993;
	add.s64 	%rd6069, %rd5966, %rd21418;
	ld.const.u64 	%rd6070, [%rd6060];
	add.s64 	%rd6071, %rd6069, %rd6070;
	add.s64 	%rd6072, %rd6071, %rd6068;
	add.s64 	%rd6073, %rd6072, %rd6065;
	add.s64 	%rd21430, %rd6073, %rd5977;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3528,%dummy}, %rd6058;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3529}, %rd6058;
	}
	shf.r.wrap.b32 	%r3530, %r3529, %r3528, 28;
	shf.r.wrap.b32 	%r3531, %r3528, %r3529, 28;
	mov.b64 	%rd6074, {%r3531, %r3530};
	shf.l.wrap.b32 	%r3532, %r3528, %r3529, 30;
	shf.l.wrap.b32 	%r3533, %r3529, %r3528, 30;
	mov.b64 	%rd6075, {%r3533, %r3532};
	xor.b64  	%rd6076, %rd6075, %rd6074;
	shf.l.wrap.b32 	%r3534, %r3528, %r3529, 25;
	shf.l.wrap.b32 	%r3535, %r3529, %r3528, 25;
	mov.b64 	%rd6077, {%r3535, %r3534};
	xor.b64  	%rd6078, %rd6076, %rd6077;
	xor.b64  	%rd6079, %rd6058, %rd6004;
	xor.b64  	%rd6080, %rd6058, %rd6031;
	and.b64  	%rd6081, %rd6080, %rd6079;
	xor.b64  	%rd6082, %rd6081, %rd6058;
	add.s64 	%rd6083, %rd6073, %rd6082;
	add.s64 	%rd21426, %rd6083, %rd6078;
	add.s32 	%r3536, %r14351, 13;
	mul.wide.s32 	%rd6084, %r3536, 8;
	add.s64 	%rd6085, %rd5735, %rd6084;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3537,%dummy}, %rd21430;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3538}, %rd21430;
	}
	shf.r.wrap.b32 	%r3539, %r3538, %r3537, 14;
	shf.r.wrap.b32 	%r3540, %r3537, %r3538, 14;
	mov.b64 	%rd6086, {%r3540, %r3539};
	shf.r.wrap.b32 	%r3541, %r3538, %r3537, 18;
	shf.r.wrap.b32 	%r3542, %r3537, %r3538, 18;
	mov.b64 	%rd6087, {%r3542, %r3541};
	xor.b64  	%rd6088, %rd6087, %rd6086;
	shf.l.wrap.b32 	%r3543, %r3537, %r3538, 23;
	shf.l.wrap.b32 	%r3544, %r3538, %r3537, 23;
	mov.b64 	%rd6089, {%r3544, %r3543};
	xor.b64  	%rd6090, %rd6088, %rd6089;
	xor.b64  	%rd6091, %rd6047, %rd6020;
	and.b64  	%rd6092, %rd21430, %rd6091;
	xor.b64  	%rd6093, %rd6092, %rd6020;
	add.s64 	%rd6094, %rd5993, %rd21417;
	ld.const.u64 	%rd6095, [%rd6085];
	add.s64 	%rd6096, %rd6094, %rd6095;
	add.s64 	%rd6097, %rd6096, %rd6093;
	add.s64 	%rd6098, %rd6097, %rd6090;
	add.s64 	%rd21429, %rd6098, %rd6004;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3545,%dummy}, %rd21426;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3546}, %rd21426;
	}
	shf.r.wrap.b32 	%r3547, %r3546, %r3545, 28;
	shf.r.wrap.b32 	%r3548, %r3545, %r3546, 28;
	mov.b64 	%rd6099, {%r3548, %r3547};
	shf.l.wrap.b32 	%r3549, %r3545, %r3546, 30;
	shf.l.wrap.b32 	%r3550, %r3546, %r3545, 30;
	mov.b64 	%rd6100, {%r3550, %r3549};
	xor.b64  	%rd6101, %rd6100, %rd6099;
	shf.l.wrap.b32 	%r3551, %r3545, %r3546, 25;
	shf.l.wrap.b32 	%r3552, %r3546, %r3545, 25;
	mov.b64 	%rd6102, {%r3552, %r3551};
	xor.b64  	%rd6103, %rd6101, %rd6102;
	xor.b64  	%rd6104, %rd21426, %rd6031;
	xor.b64  	%rd6105, %rd21426, %rd6058;
	and.b64  	%rd6106, %rd6105, %rd6104;
	xor.b64  	%rd6107, %rd6106, %rd21426;
	add.s64 	%rd6108, %rd6098, %rd6107;
	add.s64 	%rd21425, %rd6108, %rd6103;
	add.s32 	%r3553, %r14351, 14;
	mul.wide.s32 	%rd6109, %r3553, 8;
	add.s64 	%rd6110, %rd5735, %rd6109;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3554,%dummy}, %rd21429;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3555}, %rd21429;
	}
	shf.r.wrap.b32 	%r3556, %r3555, %r3554, 14;
	shf.r.wrap.b32 	%r3557, %r3554, %r3555, 14;
	mov.b64 	%rd6111, {%r3557, %r3556};
	shf.r.wrap.b32 	%r3558, %r3555, %r3554, 18;
	shf.r.wrap.b32 	%r3559, %r3554, %r3555, 18;
	mov.b64 	%rd6112, {%r3559, %r3558};
	xor.b64  	%rd6113, %rd6112, %rd6111;
	shf.l.wrap.b32 	%r3560, %r3554, %r3555, 23;
	shf.l.wrap.b32 	%r3561, %r3555, %r3554, 23;
	mov.b64 	%rd6114, {%r3561, %r3560};
	xor.b64  	%rd6115, %rd6113, %rd6114;
	xor.b64  	%rd6116, %rd21430, %rd6047;
	and.b64  	%rd6117, %rd21429, %rd6116;
	xor.b64  	%rd6118, %rd6117, %rd6047;
	add.s64 	%rd6119, %rd6020, %rd21416;
	ld.const.u64 	%rd6120, [%rd6110];
	add.s64 	%rd6121, %rd6119, %rd6120;
	add.s64 	%rd6122, %rd6121, %rd6118;
	add.s64 	%rd6123, %rd6122, %rd6115;
	add.s64 	%rd21428, %rd6123, %rd6031;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3562,%dummy}, %rd21425;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3563}, %rd21425;
	}
	shf.r.wrap.b32 	%r3564, %r3563, %r3562, 28;
	shf.r.wrap.b32 	%r3565, %r3562, %r3563, 28;
	mov.b64 	%rd6124, {%r3565, %r3564};
	shf.l.wrap.b32 	%r3566, %r3562, %r3563, 30;
	shf.l.wrap.b32 	%r3567, %r3563, %r3562, 30;
	mov.b64 	%rd6125, {%r3567, %r3566};
	xor.b64  	%rd6126, %rd6125, %rd6124;
	shf.l.wrap.b32 	%r3568, %r3562, %r3563, 25;
	shf.l.wrap.b32 	%r3569, %r3563, %r3562, 25;
	mov.b64 	%rd6127, {%r3569, %r3568};
	xor.b64  	%rd6128, %rd6126, %rd6127;
	xor.b64  	%rd6129, %rd21425, %rd6058;
	xor.b64  	%rd6130, %rd21425, %rd21426;
	and.b64  	%rd6131, %rd6130, %rd6129;
	xor.b64  	%rd6132, %rd6131, %rd21425;
	add.s64 	%rd6133, %rd6123, %rd6132;
	add.s64 	%rd21424, %rd6133, %rd6128;
	add.s32 	%r3570, %r14351, 15;
	mul.wide.s32 	%rd6134, %r3570, 8;
	add.s64 	%rd6135, %rd5735, %rd6134;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3571,%dummy}, %rd21428;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3572}, %rd21428;
	}
	shf.r.wrap.b32 	%r3573, %r3572, %r3571, 14;
	shf.r.wrap.b32 	%r3574, %r3571, %r3572, 14;
	mov.b64 	%rd6136, {%r3574, %r3573};
	shf.r.wrap.b32 	%r3575, %r3572, %r3571, 18;
	shf.r.wrap.b32 	%r3576, %r3571, %r3572, 18;
	mov.b64 	%rd6137, {%r3576, %r3575};
	xor.b64  	%rd6138, %rd6137, %rd6136;
	shf.l.wrap.b32 	%r3577, %r3571, %r3572, 23;
	shf.l.wrap.b32 	%r3578, %r3572, %r3571, 23;
	mov.b64 	%rd6139, {%r3578, %r3577};
	xor.b64  	%rd6140, %rd6138, %rd6139;
	xor.b64  	%rd6141, %rd21429, %rd21430;
	and.b64  	%rd6142, %rd21428, %rd6141;
	xor.b64  	%rd6143, %rd6142, %rd21430;
	add.s64 	%rd6144, %rd6047, %rd21415;
	ld.const.u64 	%rd6145, [%rd6135];
	add.s64 	%rd6146, %rd6144, %rd6145;
	add.s64 	%rd6147, %rd6146, %rd6143;
	add.s64 	%rd6148, %rd6147, %rd6140;
	add.s64 	%rd21427, %rd6148, %rd6058;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3579,%dummy}, %rd21424;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3580}, %rd21424;
	}
	shf.r.wrap.b32 	%r3581, %r3580, %r3579, 28;
	shf.r.wrap.b32 	%r3582, %r3579, %r3580, 28;
	mov.b64 	%rd6149, {%r3582, %r3581};
	shf.l.wrap.b32 	%r3583, %r3579, %r3580, 30;
	shf.l.wrap.b32 	%r3584, %r3580, %r3579, 30;
	mov.b64 	%rd6150, {%r3584, %r3583};
	xor.b64  	%rd6151, %rd6150, %rd6149;
	shf.l.wrap.b32 	%r3585, %r3579, %r3580, 25;
	shf.l.wrap.b32 	%r3586, %r3580, %r3579, 25;
	mov.b64 	%rd6152, {%r3586, %r3585};
	xor.b64  	%rd6153, %rd6151, %rd6152;
	xor.b64  	%rd6154, %rd21424, %rd21426;
	xor.b64  	%rd6155, %rd21424, %rd21425;
	and.b64  	%rd6156, %rd6155, %rd6154;
	xor.b64  	%rd6157, %rd6156, %rd21424;
	add.s64 	%rd6158, %rd6148, %rd6157;
	add.s64 	%rd21423, %rd6158, %rd6153;
	add.s32 	%r14351, %r14351, 16;
	setp.lt.s32	%p61, %r14351, 80;
	@%p61 bra 	BB3_94;

	add.s64 	%rd21462, %rd325, %rd21423;
	st.local.u64 	[%rd1], %rd21462;
	add.s64 	%rd21461, %rd327, %rd21424;
	st.local.u64 	[%rd1+8], %rd21461;
	add.s64 	%rd21460, %rd326, %rd21425;
	st.local.u64 	[%rd1+16], %rd21460;
	add.s64 	%rd21459, %rd324, %rd21426;
	st.local.u64 	[%rd1+24], %rd21459;
	add.s64 	%rd21458, %rd319, %rd21427;
	st.local.u64 	[%rd1+32], %rd21458;
	add.s64 	%rd21457, %rd321, %rd21428;
	st.local.u64 	[%rd1+40], %rd21457;
	add.s64 	%rd21456, %rd320, %rd21429;
	st.local.u64 	[%rd1+48], %rd21456;
	add.s64 	%rd21455, %rd322, %rd21430;
	st.local.u64 	[%rd1+56], %rd21455;
	mov.u64 	%rd21463, 0;
	st.local.u64 	[%rd1+64], %rd21463;
	st.local.u64 	[%rd1+72], %rd21463;
	st.local.u64 	[%rd1+80], %rd21463;
	st.local.u64 	[%rd1+88], %rd21463;
	st.local.u64 	[%rd1+96], %rd21463;
	st.local.u64 	[%rd1+104], %rd21463;
	st.local.u64 	[%rd1+112], %rd21463;
	st.local.u64 	[%rd1+120], %rd21463;
	st.local.u64 	[%rd1+128], %rd21463;
	st.local.u64 	[%rd1+136], %rd21463;
	st.local.u64 	[%rd1+144], %rd21463;
	st.local.u64 	[%rd1+152], %rd21463;
	st.local.u64 	[%rd1+160], %rd21463;
	st.local.u64 	[%rd1+168], %rd21463;
	st.local.u64 	[%rd1+176], %rd21463;
	st.local.u64 	[%rd1+184], %rd21463;
	mov.u64 	%rd21464, %rd21463;
	mov.u64 	%rd21465, %rd21463;
	mov.u64 	%rd21466, %rd21463;
	mov.u64 	%rd21467, %rd21463;
	mov.u64 	%rd21468, %rd21463;
	mov.u64 	%rd21469, %rd21463;
	mov.u64 	%rd21470, %rd21463;
	mov.u64 	%rd21471, %rd21463;
	mov.u64 	%rd21472, %rd21463;
	mov.u64 	%rd21473, %rd21463;
	mov.u64 	%rd21474, %rd21463;
	mov.u64 	%rd21475, %rd21463;
	mov.u64 	%rd21476, %rd21463;
	mov.u64 	%rd21477, %rd21463;
	bra.uni 	BB3_96;

BB3_92:
	ld.local.u64 	%rd21476, [%rd1+72];
	ld.local.u64 	%rd21475, [%rd1+80];
	ld.local.u64 	%rd21474, [%rd1+88];
	ld.local.u64 	%rd21473, [%rd1+96];
	ld.local.u64 	%rd21472, [%rd1+104];
	ld.local.u64 	%rd21471, [%rd1+112];
	ld.local.u64 	%rd21470, [%rd1+120];
	ld.local.u64 	%rd21469, [%rd1+128];
	ld.local.u64 	%rd21468, [%rd1+136];
	ld.local.u64 	%rd21467, [%rd1+144];
	ld.local.u64 	%rd21466, [%rd1+152];
	ld.local.u64 	%rd21465, [%rd1+160];
	ld.local.u64 	%rd21464, [%rd1+168];
	ld.local.u64 	%rd21463, [%rd1+176];
	ld.local.u64 	%rd21462, [%rd1];
	ld.local.u64 	%rd21461, [%rd1+8];
	ld.local.u64 	%rd21460, [%rd1+16];
	ld.local.u64 	%rd21459, [%rd1+24];
	ld.local.u64 	%rd21458, [%rd1+32];
	ld.local.u64 	%rd21457, [%rd1+40];
	ld.local.u64 	%rd21456, [%rd1+48];
	ld.local.u64 	%rd21455, [%rd1+56];
	ld.const.u64 	%rd21454, [k_sha512];
	ld.const.u64 	%rd21453, [k_sha512+8];
	ld.const.u64 	%rd21452, [k_sha512+16];
	ld.const.u64 	%rd21451, [k_sha512+24];
	ld.const.u64 	%rd21450, [k_sha512+32];
	ld.const.u64 	%rd21449, [k_sha512+40];
	ld.const.u64 	%rd21448, [k_sha512+48];
	ld.const.u64 	%rd21447, [k_sha512+56];
	ld.const.u64 	%rd21446, [k_sha512+64];
	ld.const.u64 	%rd21445, [k_sha512+72];
	ld.const.u64 	%rd21444, [k_sha512+80];
	ld.const.u64 	%rd21443, [k_sha512+88];
	ld.const.u64 	%rd21442, [k_sha512+96];
	ld.const.u64 	%rd21441, [k_sha512+104];
	ld.const.u64 	%rd21440, [k_sha512+112];
	ld.const.u64 	%rd21439, [k_sha512+120];

BB3_96:
	add.u64 	%rd446, %SPL, 240;
	ld.local.u32 	%r3588, [%rd1+192];
	shl.b32 	%r3589, %r3588, 3;
	cvt.s64.s32	%rd6175, %r3589;
	st.local.u64 	[%rd1+184], %rd6175;
	shr.u64 	%rd6176, %rd21477, 32;
	shr.u64 	%rd6177, %rd21476, 32;
	shr.u64 	%rd6178, %rd21475, 32;
	shr.u64 	%rd6179, %rd21474, 32;
	shr.u64 	%rd6180, %rd21473, 32;
	shr.u64 	%rd6181, %rd21472, 32;
	shr.u64 	%rd6182, %rd21471, 32;
	shr.u64 	%rd6183, %rd21470, 32;
	shr.u64 	%rd6184, %rd21469, 32;
	shr.u64 	%rd6185, %rd21468, 32;
	shr.u64 	%rd6186, %rd21467, 32;
	shr.u64 	%rd6187, %rd21466, 32;
	shr.u64 	%rd6188, %rd21465, 32;
	shr.u64 	%rd6189, %rd21464, 32;
	shr.u64 	%rd6190, %rd21463, 32;
	shr.u64 	%rd6191, %rd6175, 32;
	bfi.b64 	%rd21494, %rd6176, %rd21477, 32, 32;
	bfi.b64 	%rd21495, %rd6177, %rd21476, 32, 32;
	bfi.b64 	%rd21496, %rd6178, %rd21475, 32, 32;
	bfi.b64 	%rd21497, %rd6179, %rd21474, 32, 32;
	bfi.b64 	%rd21498, %rd6180, %rd21473, 32, 32;
	bfi.b64 	%rd21499, %rd6181, %rd21472, 32, 32;
	bfi.b64 	%rd21500, %rd6182, %rd21471, 32, 32;
	bfi.b64 	%rd21501, %rd6183, %rd21470, 32, 32;
	bfi.b64 	%rd21485, %rd6184, %rd21469, 32, 32;
	bfi.b64 	%rd21484, %rd6185, %rd21468, 32, 32;
	bfi.b64 	%rd21483, %rd6186, %rd21467, 32, 32;
	bfi.b64 	%rd21482, %rd6187, %rd21466, 32, 32;
	bfi.b64 	%rd21481, %rd6188, %rd21465, 32, 32;
	bfi.b64 	%rd21480, %rd6189, %rd21464, 32, 32;
	bfi.b64 	%rd21479, %rd6190, %rd21463, 32, 32;
	cvt.u32.u64	%r3590, %rd6191;
	mov.b64	%rd21478, {%r3589, %r3590};
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3591,%dummy}, %rd21458;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3592}, %rd21458;
	}
	shf.r.wrap.b32 	%r3593, %r3592, %r3591, 18;
	shf.r.wrap.b32 	%r3594, %r3591, %r3592, 18;
	mov.b64 	%rd6192, {%r3594, %r3593};
	shf.r.wrap.b32 	%r3595, %r3592, %r3591, 14;
	shf.r.wrap.b32 	%r3596, %r3591, %r3592, 14;
	mov.b64 	%rd6193, {%r3596, %r3595};
	xor.b64  	%rd6194, %rd6192, %rd6193;
	shf.l.wrap.b32 	%r3597, %r3591, %r3592, 23;
	shf.l.wrap.b32 	%r3598, %r3592, %r3591, 23;
	mov.b64 	%rd6195, {%r3598, %r3597};
	xor.b64  	%rd6196, %rd6194, %rd6195;
	xor.b64  	%rd6197, %rd21456, %rd21457;
	and.b64  	%rd6198, %rd6197, %rd21458;
	xor.b64  	%rd6199, %rd6198, %rd21456;
	add.s64 	%rd6200, %rd21455, %rd21494;
	add.s64 	%rd6201, %rd6200, %rd21454;
	add.s64 	%rd6202, %rd6201, %rd6199;
	add.s64 	%rd6203, %rd6202, %rd6196;
	add.s64 	%rd6204, %rd6203, %rd21459;
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3599}, %rd21462;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3600,%dummy}, %rd21462;
	}
	shf.l.wrap.b32 	%r3601, %r3600, %r3599, 30;
	shf.l.wrap.b32 	%r3602, %r3599, %r3600, 30;
	mov.b64 	%rd6205, {%r3602, %r3601};
	shf.r.wrap.b32 	%r3603, %r3599, %r3600, 28;
	shf.r.wrap.b32 	%r3604, %r3600, %r3599, 28;
	mov.b64 	%rd6206, {%r3604, %r3603};
	xor.b64  	%rd6207, %rd6205, %rd6206;
	shf.l.wrap.b32 	%r3605, %r3600, %r3599, 25;
	shf.l.wrap.b32 	%r3606, %r3599, %r3600, 25;
	mov.b64 	%rd6208, {%r3606, %r3605};
	xor.b64  	%rd6209, %rd6207, %rd6208;
	xor.b64  	%rd6210, %rd21461, %rd21462;
	xor.b64  	%rd6211, %rd21460, %rd21462;
	and.b64  	%rd6212, %rd6211, %rd6210;
	xor.b64  	%rd6213, %rd6212, %rd21462;
	add.s64 	%rd6214, %rd6203, %rd6213;
	add.s64 	%rd6215, %rd6214, %rd6209;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3607,%dummy}, %rd6204;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3608}, %rd6204;
	}
	shf.r.wrap.b32 	%r3609, %r3608, %r3607, 14;
	shf.r.wrap.b32 	%r3610, %r3607, %r3608, 14;
	mov.b64 	%rd6216, {%r3610, %r3609};
	shf.r.wrap.b32 	%r3611, %r3608, %r3607, 18;
	shf.r.wrap.b32 	%r3612, %r3607, %r3608, 18;
	mov.b64 	%rd6217, {%r3612, %r3611};
	xor.b64  	%rd6218, %rd6217, %rd6216;
	shf.l.wrap.b32 	%r3613, %r3607, %r3608, 23;
	shf.l.wrap.b32 	%r3614, %r3608, %r3607, 23;
	mov.b64 	%rd6219, {%r3614, %r3613};
	xor.b64  	%rd6220, %rd6218, %rd6219;
	xor.b64  	%rd6221, %rd21457, %rd21458;
	and.b64  	%rd6222, %rd6204, %rd6221;
	xor.b64  	%rd6223, %rd6222, %rd21457;
	add.s64 	%rd6224, %rd21456, %rd21495;
	add.s64 	%rd6225, %rd6224, %rd21453;
	add.s64 	%rd6226, %rd6225, %rd6223;
	add.s64 	%rd6227, %rd6226, %rd6220;
	add.s64 	%rd6228, %rd6227, %rd21460;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3615,%dummy}, %rd6215;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3616}, %rd6215;
	}
	shf.r.wrap.b32 	%r3617, %r3616, %r3615, 28;
	shf.r.wrap.b32 	%r3618, %r3615, %r3616, 28;
	mov.b64 	%rd6229, {%r3618, %r3617};
	shf.l.wrap.b32 	%r3619, %r3615, %r3616, 30;
	shf.l.wrap.b32 	%r3620, %r3616, %r3615, 30;
	mov.b64 	%rd6230, {%r3620, %r3619};
	xor.b64  	%rd6231, %rd6230, %rd6229;
	shf.l.wrap.b32 	%r3621, %r3615, %r3616, 25;
	shf.l.wrap.b32 	%r3622, %r3616, %r3615, 25;
	mov.b64 	%rd6232, {%r3622, %r3621};
	xor.b64  	%rd6233, %rd6231, %rd6232;
	xor.b64  	%rd6234, %rd6215, %rd21461;
	xor.b64  	%rd6235, %rd6215, %rd21462;
	and.b64  	%rd6236, %rd6235, %rd6234;
	xor.b64  	%rd6237, %rd6236, %rd6215;
	add.s64 	%rd6238, %rd6227, %rd6237;
	add.s64 	%rd6239, %rd6238, %rd6233;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3623,%dummy}, %rd6228;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3624}, %rd6228;
	}
	shf.r.wrap.b32 	%r3625, %r3624, %r3623, 14;
	shf.r.wrap.b32 	%r3626, %r3623, %r3624, 14;
	mov.b64 	%rd6240, {%r3626, %r3625};
	shf.r.wrap.b32 	%r3627, %r3624, %r3623, 18;
	shf.r.wrap.b32 	%r3628, %r3623, %r3624, 18;
	mov.b64 	%rd6241, {%r3628, %r3627};
	xor.b64  	%rd6242, %rd6241, %rd6240;
	shf.l.wrap.b32 	%r3629, %r3623, %r3624, 23;
	shf.l.wrap.b32 	%r3630, %r3624, %r3623, 23;
	mov.b64 	%rd6243, {%r3630, %r3629};
	xor.b64  	%rd6244, %rd6242, %rd6243;
	xor.b64  	%rd6245, %rd6204, %rd21458;
	and.b64  	%rd6246, %rd6228, %rd6245;
	xor.b64  	%rd6247, %rd6246, %rd21458;
	add.s64 	%rd6248, %rd21457, %rd21496;
	add.s64 	%rd6249, %rd6248, %rd21452;
	add.s64 	%rd6250, %rd6249, %rd6247;
	add.s64 	%rd6251, %rd6250, %rd6244;
	add.s64 	%rd6252, %rd6251, %rd21461;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3631,%dummy}, %rd6239;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3632}, %rd6239;
	}
	shf.r.wrap.b32 	%r3633, %r3632, %r3631, 28;
	shf.r.wrap.b32 	%r3634, %r3631, %r3632, 28;
	mov.b64 	%rd6253, {%r3634, %r3633};
	shf.l.wrap.b32 	%r3635, %r3631, %r3632, 30;
	shf.l.wrap.b32 	%r3636, %r3632, %r3631, 30;
	mov.b64 	%rd6254, {%r3636, %r3635};
	xor.b64  	%rd6255, %rd6254, %rd6253;
	shf.l.wrap.b32 	%r3637, %r3631, %r3632, 25;
	shf.l.wrap.b32 	%r3638, %r3632, %r3631, 25;
	mov.b64 	%rd6256, {%r3638, %r3637};
	xor.b64  	%rd6257, %rd6255, %rd6256;
	xor.b64  	%rd6258, %rd6239, %rd21462;
	xor.b64  	%rd6259, %rd6239, %rd6215;
	and.b64  	%rd6260, %rd6259, %rd6258;
	xor.b64  	%rd6261, %rd6260, %rd6239;
	add.s64 	%rd6262, %rd6251, %rd6261;
	add.s64 	%rd6263, %rd6262, %rd6257;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3639,%dummy}, %rd6252;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3640}, %rd6252;
	}
	shf.r.wrap.b32 	%r3641, %r3640, %r3639, 14;
	shf.r.wrap.b32 	%r3642, %r3639, %r3640, 14;
	mov.b64 	%rd6264, {%r3642, %r3641};
	shf.r.wrap.b32 	%r3643, %r3640, %r3639, 18;
	shf.r.wrap.b32 	%r3644, %r3639, %r3640, 18;
	mov.b64 	%rd6265, {%r3644, %r3643};
	xor.b64  	%rd6266, %rd6265, %rd6264;
	shf.l.wrap.b32 	%r3645, %r3639, %r3640, 23;
	shf.l.wrap.b32 	%r3646, %r3640, %r3639, 23;
	mov.b64 	%rd6267, {%r3646, %r3645};
	xor.b64  	%rd6268, %rd6266, %rd6267;
	xor.b64  	%rd6269, %rd6228, %rd6204;
	and.b64  	%rd6270, %rd6252, %rd6269;
	xor.b64  	%rd6271, %rd6270, %rd6204;
	add.s64 	%rd6272, %rd21458, %rd21497;
	add.s64 	%rd6273, %rd6272, %rd21451;
	add.s64 	%rd6274, %rd6273, %rd6271;
	add.s64 	%rd6275, %rd6274, %rd6268;
	add.s64 	%rd6276, %rd6275, %rd21462;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3647,%dummy}, %rd6263;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3648}, %rd6263;
	}
	shf.r.wrap.b32 	%r3649, %r3648, %r3647, 28;
	shf.r.wrap.b32 	%r3650, %r3647, %r3648, 28;
	mov.b64 	%rd6277, {%r3650, %r3649};
	shf.l.wrap.b32 	%r3651, %r3647, %r3648, 30;
	shf.l.wrap.b32 	%r3652, %r3648, %r3647, 30;
	mov.b64 	%rd6278, {%r3652, %r3651};
	xor.b64  	%rd6279, %rd6278, %rd6277;
	shf.l.wrap.b32 	%r3653, %r3647, %r3648, 25;
	shf.l.wrap.b32 	%r3654, %r3648, %r3647, 25;
	mov.b64 	%rd6280, {%r3654, %r3653};
	xor.b64  	%rd6281, %rd6279, %rd6280;
	xor.b64  	%rd6282, %rd6263, %rd6215;
	xor.b64  	%rd6283, %rd6263, %rd6239;
	and.b64  	%rd6284, %rd6283, %rd6282;
	xor.b64  	%rd6285, %rd6284, %rd6263;
	add.s64 	%rd6286, %rd6275, %rd6285;
	add.s64 	%rd6287, %rd6286, %rd6281;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3655,%dummy}, %rd6276;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3656}, %rd6276;
	}
	shf.r.wrap.b32 	%r3657, %r3656, %r3655, 14;
	shf.r.wrap.b32 	%r3658, %r3655, %r3656, 14;
	mov.b64 	%rd6288, {%r3658, %r3657};
	shf.r.wrap.b32 	%r3659, %r3656, %r3655, 18;
	shf.r.wrap.b32 	%r3660, %r3655, %r3656, 18;
	mov.b64 	%rd6289, {%r3660, %r3659};
	xor.b64  	%rd6290, %rd6289, %rd6288;
	shf.l.wrap.b32 	%r3661, %r3655, %r3656, 23;
	shf.l.wrap.b32 	%r3662, %r3656, %r3655, 23;
	mov.b64 	%rd6291, {%r3662, %r3661};
	xor.b64  	%rd6292, %rd6290, %rd6291;
	xor.b64  	%rd6293, %rd6252, %rd6228;
	and.b64  	%rd6294, %rd6276, %rd6293;
	xor.b64  	%rd6295, %rd6294, %rd6228;
	add.s64 	%rd6296, %rd6204, %rd21498;
	add.s64 	%rd6297, %rd6296, %rd21450;
	add.s64 	%rd6298, %rd6297, %rd6295;
	add.s64 	%rd6299, %rd6298, %rd6292;
	add.s64 	%rd6300, %rd6299, %rd6215;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3663,%dummy}, %rd6287;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3664}, %rd6287;
	}
	shf.r.wrap.b32 	%r3665, %r3664, %r3663, 28;
	shf.r.wrap.b32 	%r3666, %r3663, %r3664, 28;
	mov.b64 	%rd6301, {%r3666, %r3665};
	shf.l.wrap.b32 	%r3667, %r3663, %r3664, 30;
	shf.l.wrap.b32 	%r3668, %r3664, %r3663, 30;
	mov.b64 	%rd6302, {%r3668, %r3667};
	xor.b64  	%rd6303, %rd6302, %rd6301;
	shf.l.wrap.b32 	%r3669, %r3663, %r3664, 25;
	shf.l.wrap.b32 	%r3670, %r3664, %r3663, 25;
	mov.b64 	%rd6304, {%r3670, %r3669};
	xor.b64  	%rd6305, %rd6303, %rd6304;
	xor.b64  	%rd6306, %rd6287, %rd6239;
	xor.b64  	%rd6307, %rd6287, %rd6263;
	and.b64  	%rd6308, %rd6307, %rd6306;
	xor.b64  	%rd6309, %rd6308, %rd6287;
	add.s64 	%rd6310, %rd6299, %rd6309;
	add.s64 	%rd6311, %rd6310, %rd6305;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3671,%dummy}, %rd6300;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3672}, %rd6300;
	}
	shf.r.wrap.b32 	%r3673, %r3672, %r3671, 14;
	shf.r.wrap.b32 	%r3674, %r3671, %r3672, 14;
	mov.b64 	%rd6312, {%r3674, %r3673};
	shf.r.wrap.b32 	%r3675, %r3672, %r3671, 18;
	shf.r.wrap.b32 	%r3676, %r3671, %r3672, 18;
	mov.b64 	%rd6313, {%r3676, %r3675};
	xor.b64  	%rd6314, %rd6313, %rd6312;
	shf.l.wrap.b32 	%r3677, %r3671, %r3672, 23;
	shf.l.wrap.b32 	%r3678, %r3672, %r3671, 23;
	mov.b64 	%rd6315, {%r3678, %r3677};
	xor.b64  	%rd6316, %rd6314, %rd6315;
	xor.b64  	%rd6317, %rd6276, %rd6252;
	and.b64  	%rd6318, %rd6300, %rd6317;
	xor.b64  	%rd6319, %rd6318, %rd6252;
	add.s64 	%rd6320, %rd6228, %rd21499;
	add.s64 	%rd6321, %rd6320, %rd21449;
	add.s64 	%rd6322, %rd6321, %rd6319;
	add.s64 	%rd6323, %rd6322, %rd6316;
	add.s64 	%rd6324, %rd6323, %rd6239;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3679,%dummy}, %rd6311;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3680}, %rd6311;
	}
	shf.r.wrap.b32 	%r3681, %r3680, %r3679, 28;
	shf.r.wrap.b32 	%r3682, %r3679, %r3680, 28;
	mov.b64 	%rd6325, {%r3682, %r3681};
	shf.l.wrap.b32 	%r3683, %r3679, %r3680, 30;
	shf.l.wrap.b32 	%r3684, %r3680, %r3679, 30;
	mov.b64 	%rd6326, {%r3684, %r3683};
	xor.b64  	%rd6327, %rd6326, %rd6325;
	shf.l.wrap.b32 	%r3685, %r3679, %r3680, 25;
	shf.l.wrap.b32 	%r3686, %r3680, %r3679, 25;
	mov.b64 	%rd6328, {%r3686, %r3685};
	xor.b64  	%rd6329, %rd6327, %rd6328;
	xor.b64  	%rd6330, %rd6311, %rd6263;
	xor.b64  	%rd6331, %rd6311, %rd6287;
	and.b64  	%rd6332, %rd6331, %rd6330;
	xor.b64  	%rd6333, %rd6332, %rd6311;
	add.s64 	%rd6334, %rd6323, %rd6333;
	add.s64 	%rd6335, %rd6334, %rd6329;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3687,%dummy}, %rd6324;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3688}, %rd6324;
	}
	shf.r.wrap.b32 	%r3689, %r3688, %r3687, 14;
	shf.r.wrap.b32 	%r3690, %r3687, %r3688, 14;
	mov.b64 	%rd6336, {%r3690, %r3689};
	shf.r.wrap.b32 	%r3691, %r3688, %r3687, 18;
	shf.r.wrap.b32 	%r3692, %r3687, %r3688, 18;
	mov.b64 	%rd6337, {%r3692, %r3691};
	xor.b64  	%rd6338, %rd6337, %rd6336;
	shf.l.wrap.b32 	%r3693, %r3687, %r3688, 23;
	shf.l.wrap.b32 	%r3694, %r3688, %r3687, 23;
	mov.b64 	%rd6339, {%r3694, %r3693};
	xor.b64  	%rd6340, %rd6338, %rd6339;
	xor.b64  	%rd6341, %rd6300, %rd6276;
	and.b64  	%rd6342, %rd6324, %rd6341;
	xor.b64  	%rd6343, %rd6342, %rd6276;
	add.s64 	%rd6344, %rd6252, %rd21500;
	add.s64 	%rd6345, %rd6344, %rd21448;
	add.s64 	%rd6346, %rd6345, %rd6343;
	add.s64 	%rd6347, %rd6346, %rd6340;
	add.s64 	%rd6348, %rd6347, %rd6263;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3695,%dummy}, %rd6335;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3696}, %rd6335;
	}
	shf.r.wrap.b32 	%r3697, %r3696, %r3695, 28;
	shf.r.wrap.b32 	%r3698, %r3695, %r3696, 28;
	mov.b64 	%rd6349, {%r3698, %r3697};
	shf.l.wrap.b32 	%r3699, %r3695, %r3696, 30;
	shf.l.wrap.b32 	%r3700, %r3696, %r3695, 30;
	mov.b64 	%rd6350, {%r3700, %r3699};
	xor.b64  	%rd6351, %rd6350, %rd6349;
	shf.l.wrap.b32 	%r3701, %r3695, %r3696, 25;
	shf.l.wrap.b32 	%r3702, %r3696, %r3695, 25;
	mov.b64 	%rd6352, {%r3702, %r3701};
	xor.b64  	%rd6353, %rd6351, %rd6352;
	xor.b64  	%rd6354, %rd6335, %rd6287;
	xor.b64  	%rd6355, %rd6335, %rd6311;
	and.b64  	%rd6356, %rd6355, %rd6354;
	xor.b64  	%rd6357, %rd6356, %rd6335;
	add.s64 	%rd6358, %rd6347, %rd6357;
	add.s64 	%rd6359, %rd6358, %rd6353;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3703,%dummy}, %rd6348;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3704}, %rd6348;
	}
	shf.r.wrap.b32 	%r3705, %r3704, %r3703, 14;
	shf.r.wrap.b32 	%r3706, %r3703, %r3704, 14;
	mov.b64 	%rd6360, {%r3706, %r3705};
	shf.r.wrap.b32 	%r3707, %r3704, %r3703, 18;
	shf.r.wrap.b32 	%r3708, %r3703, %r3704, 18;
	mov.b64 	%rd6361, {%r3708, %r3707};
	xor.b64  	%rd6362, %rd6361, %rd6360;
	shf.l.wrap.b32 	%r3709, %r3703, %r3704, 23;
	shf.l.wrap.b32 	%r3710, %r3704, %r3703, 23;
	mov.b64 	%rd6363, {%r3710, %r3709};
	xor.b64  	%rd6364, %rd6362, %rd6363;
	xor.b64  	%rd6365, %rd6324, %rd6300;
	and.b64  	%rd6366, %rd6348, %rd6365;
	xor.b64  	%rd6367, %rd6366, %rd6300;
	add.s64 	%rd6368, %rd6276, %rd21501;
	add.s64 	%rd6369, %rd6368, %rd21447;
	add.s64 	%rd6370, %rd6369, %rd6367;
	add.s64 	%rd6371, %rd6370, %rd6364;
	add.s64 	%rd6372, %rd6371, %rd6287;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3711,%dummy}, %rd6359;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3712}, %rd6359;
	}
	shf.r.wrap.b32 	%r3713, %r3712, %r3711, 28;
	shf.r.wrap.b32 	%r3714, %r3711, %r3712, 28;
	mov.b64 	%rd6373, {%r3714, %r3713};
	shf.l.wrap.b32 	%r3715, %r3711, %r3712, 30;
	shf.l.wrap.b32 	%r3716, %r3712, %r3711, 30;
	mov.b64 	%rd6374, {%r3716, %r3715};
	xor.b64  	%rd6375, %rd6374, %rd6373;
	shf.l.wrap.b32 	%r3717, %r3711, %r3712, 25;
	shf.l.wrap.b32 	%r3718, %r3712, %r3711, 25;
	mov.b64 	%rd6376, {%r3718, %r3717};
	xor.b64  	%rd6377, %rd6375, %rd6376;
	xor.b64  	%rd6378, %rd6359, %rd6311;
	xor.b64  	%rd6379, %rd6359, %rd6335;
	and.b64  	%rd6380, %rd6379, %rd6378;
	xor.b64  	%rd6381, %rd6380, %rd6359;
	add.s64 	%rd6382, %rd6371, %rd6381;
	add.s64 	%rd6383, %rd6382, %rd6377;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3719,%dummy}, %rd6372;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3720}, %rd6372;
	}
	shf.r.wrap.b32 	%r3721, %r3720, %r3719, 14;
	shf.r.wrap.b32 	%r3722, %r3719, %r3720, 14;
	mov.b64 	%rd6384, {%r3722, %r3721};
	shf.r.wrap.b32 	%r3723, %r3720, %r3719, 18;
	shf.r.wrap.b32 	%r3724, %r3719, %r3720, 18;
	mov.b64 	%rd6385, {%r3724, %r3723};
	xor.b64  	%rd6386, %rd6385, %rd6384;
	shf.l.wrap.b32 	%r3725, %r3719, %r3720, 23;
	shf.l.wrap.b32 	%r3726, %r3720, %r3719, 23;
	mov.b64 	%rd6387, {%r3726, %r3725};
	xor.b64  	%rd6388, %rd6386, %rd6387;
	xor.b64  	%rd6389, %rd6348, %rd6324;
	and.b64  	%rd6390, %rd6372, %rd6389;
	xor.b64  	%rd6391, %rd6390, %rd6324;
	add.s64 	%rd6392, %rd6300, %rd21485;
	add.s64 	%rd6393, %rd6392, %rd21446;
	add.s64 	%rd6394, %rd6393, %rd6391;
	add.s64 	%rd6395, %rd6394, %rd6388;
	add.s64 	%rd6396, %rd6395, %rd6311;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3727,%dummy}, %rd6383;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3728}, %rd6383;
	}
	shf.r.wrap.b32 	%r3729, %r3728, %r3727, 28;
	shf.r.wrap.b32 	%r3730, %r3727, %r3728, 28;
	mov.b64 	%rd6397, {%r3730, %r3729};
	shf.l.wrap.b32 	%r3731, %r3727, %r3728, 30;
	shf.l.wrap.b32 	%r3732, %r3728, %r3727, 30;
	mov.b64 	%rd6398, {%r3732, %r3731};
	xor.b64  	%rd6399, %rd6398, %rd6397;
	shf.l.wrap.b32 	%r3733, %r3727, %r3728, 25;
	shf.l.wrap.b32 	%r3734, %r3728, %r3727, 25;
	mov.b64 	%rd6400, {%r3734, %r3733};
	xor.b64  	%rd6401, %rd6399, %rd6400;
	xor.b64  	%rd6402, %rd6383, %rd6335;
	xor.b64  	%rd6403, %rd6383, %rd6359;
	and.b64  	%rd6404, %rd6403, %rd6402;
	xor.b64  	%rd6405, %rd6404, %rd6383;
	add.s64 	%rd6406, %rd6395, %rd6405;
	add.s64 	%rd6407, %rd6406, %rd6401;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3735,%dummy}, %rd6396;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3736}, %rd6396;
	}
	shf.r.wrap.b32 	%r3737, %r3736, %r3735, 14;
	shf.r.wrap.b32 	%r3738, %r3735, %r3736, 14;
	mov.b64 	%rd6408, {%r3738, %r3737};
	shf.r.wrap.b32 	%r3739, %r3736, %r3735, 18;
	shf.r.wrap.b32 	%r3740, %r3735, %r3736, 18;
	mov.b64 	%rd6409, {%r3740, %r3739};
	xor.b64  	%rd6410, %rd6409, %rd6408;
	shf.l.wrap.b32 	%r3741, %r3735, %r3736, 23;
	shf.l.wrap.b32 	%r3742, %r3736, %r3735, 23;
	mov.b64 	%rd6411, {%r3742, %r3741};
	xor.b64  	%rd6412, %rd6410, %rd6411;
	xor.b64  	%rd6413, %rd6372, %rd6348;
	and.b64  	%rd6414, %rd6396, %rd6413;
	xor.b64  	%rd6415, %rd6414, %rd6348;
	add.s64 	%rd6416, %rd6324, %rd21484;
	add.s64 	%rd6417, %rd6416, %rd21445;
	add.s64 	%rd6418, %rd6417, %rd6415;
	add.s64 	%rd6419, %rd6418, %rd6412;
	add.s64 	%rd6420, %rd6419, %rd6335;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3743,%dummy}, %rd6407;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3744}, %rd6407;
	}
	shf.r.wrap.b32 	%r3745, %r3744, %r3743, 28;
	shf.r.wrap.b32 	%r3746, %r3743, %r3744, 28;
	mov.b64 	%rd6421, {%r3746, %r3745};
	shf.l.wrap.b32 	%r3747, %r3743, %r3744, 30;
	shf.l.wrap.b32 	%r3748, %r3744, %r3743, 30;
	mov.b64 	%rd6422, {%r3748, %r3747};
	xor.b64  	%rd6423, %rd6422, %rd6421;
	shf.l.wrap.b32 	%r3749, %r3743, %r3744, 25;
	shf.l.wrap.b32 	%r3750, %r3744, %r3743, 25;
	mov.b64 	%rd6424, {%r3750, %r3749};
	xor.b64  	%rd6425, %rd6423, %rd6424;
	xor.b64  	%rd6426, %rd6407, %rd6359;
	xor.b64  	%rd6427, %rd6407, %rd6383;
	and.b64  	%rd6428, %rd6427, %rd6426;
	xor.b64  	%rd6429, %rd6428, %rd6407;
	add.s64 	%rd6430, %rd6419, %rd6429;
	add.s64 	%rd6431, %rd6430, %rd6425;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3751,%dummy}, %rd6420;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3752}, %rd6420;
	}
	shf.r.wrap.b32 	%r3753, %r3752, %r3751, 14;
	shf.r.wrap.b32 	%r3754, %r3751, %r3752, 14;
	mov.b64 	%rd6432, {%r3754, %r3753};
	shf.r.wrap.b32 	%r3755, %r3752, %r3751, 18;
	shf.r.wrap.b32 	%r3756, %r3751, %r3752, 18;
	mov.b64 	%rd6433, {%r3756, %r3755};
	xor.b64  	%rd6434, %rd6433, %rd6432;
	shf.l.wrap.b32 	%r3757, %r3751, %r3752, 23;
	shf.l.wrap.b32 	%r3758, %r3752, %r3751, 23;
	mov.b64 	%rd6435, {%r3758, %r3757};
	xor.b64  	%rd6436, %rd6434, %rd6435;
	xor.b64  	%rd6437, %rd6396, %rd6372;
	and.b64  	%rd6438, %rd6420, %rd6437;
	xor.b64  	%rd6439, %rd6438, %rd6372;
	add.s64 	%rd6440, %rd6348, %rd21483;
	add.s64 	%rd6441, %rd6440, %rd21444;
	add.s64 	%rd6442, %rd6441, %rd6439;
	add.s64 	%rd6443, %rd6442, %rd6436;
	add.s64 	%rd6444, %rd6443, %rd6359;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3759,%dummy}, %rd6431;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3760}, %rd6431;
	}
	shf.r.wrap.b32 	%r3761, %r3760, %r3759, 28;
	shf.r.wrap.b32 	%r3762, %r3759, %r3760, 28;
	mov.b64 	%rd6445, {%r3762, %r3761};
	shf.l.wrap.b32 	%r3763, %r3759, %r3760, 30;
	shf.l.wrap.b32 	%r3764, %r3760, %r3759, 30;
	mov.b64 	%rd6446, {%r3764, %r3763};
	xor.b64  	%rd6447, %rd6446, %rd6445;
	shf.l.wrap.b32 	%r3765, %r3759, %r3760, 25;
	shf.l.wrap.b32 	%r3766, %r3760, %r3759, 25;
	mov.b64 	%rd6448, {%r3766, %r3765};
	xor.b64  	%rd6449, %rd6447, %rd6448;
	xor.b64  	%rd6450, %rd6431, %rd6383;
	xor.b64  	%rd6451, %rd6431, %rd6407;
	and.b64  	%rd6452, %rd6451, %rd6450;
	xor.b64  	%rd6453, %rd6452, %rd6431;
	add.s64 	%rd6454, %rd6443, %rd6453;
	add.s64 	%rd6455, %rd6454, %rd6449;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3767,%dummy}, %rd6444;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3768}, %rd6444;
	}
	shf.r.wrap.b32 	%r3769, %r3768, %r3767, 14;
	shf.r.wrap.b32 	%r3770, %r3767, %r3768, 14;
	mov.b64 	%rd6456, {%r3770, %r3769};
	shf.r.wrap.b32 	%r3771, %r3768, %r3767, 18;
	shf.r.wrap.b32 	%r3772, %r3767, %r3768, 18;
	mov.b64 	%rd6457, {%r3772, %r3771};
	xor.b64  	%rd6458, %rd6457, %rd6456;
	shf.l.wrap.b32 	%r3773, %r3767, %r3768, 23;
	shf.l.wrap.b32 	%r3774, %r3768, %r3767, 23;
	mov.b64 	%rd6459, {%r3774, %r3773};
	xor.b64  	%rd6460, %rd6458, %rd6459;
	xor.b64  	%rd6461, %rd6420, %rd6396;
	and.b64  	%rd6462, %rd6444, %rd6461;
	xor.b64  	%rd6463, %rd6462, %rd6396;
	add.s64 	%rd6464, %rd6372, %rd21482;
	add.s64 	%rd6465, %rd6464, %rd21443;
	add.s64 	%rd6466, %rd6465, %rd6463;
	add.s64 	%rd6467, %rd6466, %rd6460;
	add.s64 	%rd6468, %rd6467, %rd6383;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3775,%dummy}, %rd6455;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3776}, %rd6455;
	}
	shf.r.wrap.b32 	%r3777, %r3776, %r3775, 28;
	shf.r.wrap.b32 	%r3778, %r3775, %r3776, 28;
	mov.b64 	%rd6469, {%r3778, %r3777};
	shf.l.wrap.b32 	%r3779, %r3775, %r3776, 30;
	shf.l.wrap.b32 	%r3780, %r3776, %r3775, 30;
	mov.b64 	%rd6470, {%r3780, %r3779};
	xor.b64  	%rd6471, %rd6470, %rd6469;
	shf.l.wrap.b32 	%r3781, %r3775, %r3776, 25;
	shf.l.wrap.b32 	%r3782, %r3776, %r3775, 25;
	mov.b64 	%rd6472, {%r3782, %r3781};
	xor.b64  	%rd6473, %rd6471, %rd6472;
	xor.b64  	%rd6474, %rd6455, %rd6407;
	xor.b64  	%rd6475, %rd6455, %rd6431;
	and.b64  	%rd6476, %rd6475, %rd6474;
	xor.b64  	%rd6477, %rd6476, %rd6455;
	add.s64 	%rd6478, %rd6467, %rd6477;
	add.s64 	%rd6479, %rd6478, %rd6473;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3783,%dummy}, %rd6468;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3784}, %rd6468;
	}
	shf.r.wrap.b32 	%r3785, %r3784, %r3783, 14;
	shf.r.wrap.b32 	%r3786, %r3783, %r3784, 14;
	mov.b64 	%rd6480, {%r3786, %r3785};
	shf.r.wrap.b32 	%r3787, %r3784, %r3783, 18;
	shf.r.wrap.b32 	%r3788, %r3783, %r3784, 18;
	mov.b64 	%rd6481, {%r3788, %r3787};
	xor.b64  	%rd6482, %rd6481, %rd6480;
	shf.l.wrap.b32 	%r3789, %r3783, %r3784, 23;
	shf.l.wrap.b32 	%r3790, %r3784, %r3783, 23;
	mov.b64 	%rd6483, {%r3790, %r3789};
	xor.b64  	%rd6484, %rd6482, %rd6483;
	xor.b64  	%rd6485, %rd6444, %rd6420;
	and.b64  	%rd6486, %rd6468, %rd6485;
	xor.b64  	%rd6487, %rd6486, %rd6420;
	add.s64 	%rd6488, %rd6396, %rd21481;
	add.s64 	%rd6489, %rd6488, %rd21442;
	add.s64 	%rd6490, %rd6489, %rd6487;
	add.s64 	%rd6491, %rd6490, %rd6484;
	add.s64 	%rd21493, %rd6491, %rd6407;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3791,%dummy}, %rd6479;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3792}, %rd6479;
	}
	shf.r.wrap.b32 	%r3793, %r3792, %r3791, 28;
	shf.r.wrap.b32 	%r3794, %r3791, %r3792, 28;
	mov.b64 	%rd6492, {%r3794, %r3793};
	shf.l.wrap.b32 	%r3795, %r3791, %r3792, 30;
	shf.l.wrap.b32 	%r3796, %r3792, %r3791, 30;
	mov.b64 	%rd6493, {%r3796, %r3795};
	xor.b64  	%rd6494, %rd6493, %rd6492;
	shf.l.wrap.b32 	%r3797, %r3791, %r3792, 25;
	shf.l.wrap.b32 	%r3798, %r3792, %r3791, 25;
	mov.b64 	%rd6495, {%r3798, %r3797};
	xor.b64  	%rd6496, %rd6494, %rd6495;
	xor.b64  	%rd6497, %rd6479, %rd6431;
	xor.b64  	%rd6498, %rd6479, %rd6455;
	and.b64  	%rd6499, %rd6498, %rd6497;
	xor.b64  	%rd6500, %rd6499, %rd6479;
	add.s64 	%rd6501, %rd6491, %rd6500;
	add.s64 	%rd21489, %rd6501, %rd6496;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3799,%dummy}, %rd21493;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3800}, %rd21493;
	}
	shf.r.wrap.b32 	%r3801, %r3800, %r3799, 14;
	shf.r.wrap.b32 	%r3802, %r3799, %r3800, 14;
	mov.b64 	%rd6502, {%r3802, %r3801};
	shf.r.wrap.b32 	%r3803, %r3800, %r3799, 18;
	shf.r.wrap.b32 	%r3804, %r3799, %r3800, 18;
	mov.b64 	%rd6503, {%r3804, %r3803};
	xor.b64  	%rd6504, %rd6503, %rd6502;
	shf.l.wrap.b32 	%r3805, %r3799, %r3800, 23;
	shf.l.wrap.b32 	%r3806, %r3800, %r3799, 23;
	mov.b64 	%rd6505, {%r3806, %r3805};
	xor.b64  	%rd6506, %rd6504, %rd6505;
	xor.b64  	%rd6507, %rd6468, %rd6444;
	and.b64  	%rd6508, %rd21493, %rd6507;
	xor.b64  	%rd6509, %rd6508, %rd6444;
	add.s64 	%rd6510, %rd6420, %rd21480;
	add.s64 	%rd6511, %rd6510, %rd21441;
	add.s64 	%rd6512, %rd6511, %rd6509;
	add.s64 	%rd6513, %rd6512, %rd6506;
	add.s64 	%rd21492, %rd6513, %rd6431;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3807,%dummy}, %rd21489;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3808}, %rd21489;
	}
	shf.r.wrap.b32 	%r3809, %r3808, %r3807, 28;
	shf.r.wrap.b32 	%r3810, %r3807, %r3808, 28;
	mov.b64 	%rd6514, {%r3810, %r3809};
	shf.l.wrap.b32 	%r3811, %r3807, %r3808, 30;
	shf.l.wrap.b32 	%r3812, %r3808, %r3807, 30;
	mov.b64 	%rd6515, {%r3812, %r3811};
	xor.b64  	%rd6516, %rd6515, %rd6514;
	shf.l.wrap.b32 	%r3813, %r3807, %r3808, 25;
	shf.l.wrap.b32 	%r3814, %r3808, %r3807, 25;
	mov.b64 	%rd6517, {%r3814, %r3813};
	xor.b64  	%rd6518, %rd6516, %rd6517;
	xor.b64  	%rd6519, %rd21489, %rd6455;
	xor.b64  	%rd6520, %rd21489, %rd6479;
	and.b64  	%rd6521, %rd6520, %rd6519;
	xor.b64  	%rd6522, %rd6521, %rd21489;
	add.s64 	%rd6523, %rd6513, %rd6522;
	add.s64 	%rd21488, %rd6523, %rd6518;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3815,%dummy}, %rd21492;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3816}, %rd21492;
	}
	shf.r.wrap.b32 	%r3817, %r3816, %r3815, 14;
	shf.r.wrap.b32 	%r3818, %r3815, %r3816, 14;
	mov.b64 	%rd6524, {%r3818, %r3817};
	shf.r.wrap.b32 	%r3819, %r3816, %r3815, 18;
	shf.r.wrap.b32 	%r3820, %r3815, %r3816, 18;
	mov.b64 	%rd6525, {%r3820, %r3819};
	xor.b64  	%rd6526, %rd6525, %rd6524;
	shf.l.wrap.b32 	%r3821, %r3815, %r3816, 23;
	shf.l.wrap.b32 	%r3822, %r3816, %r3815, 23;
	mov.b64 	%rd6527, {%r3822, %r3821};
	xor.b64  	%rd6528, %rd6526, %rd6527;
	xor.b64  	%rd6529, %rd21493, %rd6468;
	and.b64  	%rd6530, %rd21492, %rd6529;
	xor.b64  	%rd6531, %rd6530, %rd6468;
	add.s64 	%rd6532, %rd6444, %rd21479;
	add.s64 	%rd6533, %rd6532, %rd21440;
	add.s64 	%rd6534, %rd6533, %rd6531;
	add.s64 	%rd6535, %rd6534, %rd6528;
	add.s64 	%rd21491, %rd6535, %rd6455;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3823,%dummy}, %rd21488;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3824}, %rd21488;
	}
	shf.r.wrap.b32 	%r3825, %r3824, %r3823, 28;
	shf.r.wrap.b32 	%r3826, %r3823, %r3824, 28;
	mov.b64 	%rd6536, {%r3826, %r3825};
	shf.l.wrap.b32 	%r3827, %r3823, %r3824, 30;
	shf.l.wrap.b32 	%r3828, %r3824, %r3823, 30;
	mov.b64 	%rd6537, {%r3828, %r3827};
	xor.b64  	%rd6538, %rd6537, %rd6536;
	shf.l.wrap.b32 	%r3829, %r3823, %r3824, 25;
	shf.l.wrap.b32 	%r3830, %r3824, %r3823, 25;
	mov.b64 	%rd6539, {%r3830, %r3829};
	xor.b64  	%rd6540, %rd6538, %rd6539;
	xor.b64  	%rd6541, %rd21488, %rd6479;
	xor.b64  	%rd6542, %rd21488, %rd21489;
	and.b64  	%rd6543, %rd6542, %rd6541;
	xor.b64  	%rd6544, %rd6543, %rd21488;
	add.s64 	%rd6545, %rd6535, %rd6544;
	add.s64 	%rd21487, %rd6545, %rd6540;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3831,%dummy}, %rd21491;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3832}, %rd21491;
	}
	shf.r.wrap.b32 	%r3833, %r3832, %r3831, 14;
	shf.r.wrap.b32 	%r3834, %r3831, %r3832, 14;
	mov.b64 	%rd6546, {%r3834, %r3833};
	shf.r.wrap.b32 	%r3835, %r3832, %r3831, 18;
	shf.r.wrap.b32 	%r3836, %r3831, %r3832, 18;
	mov.b64 	%rd6547, {%r3836, %r3835};
	xor.b64  	%rd6548, %rd6547, %rd6546;
	shf.l.wrap.b32 	%r3837, %r3831, %r3832, 23;
	shf.l.wrap.b32 	%r3838, %r3832, %r3831, 23;
	mov.b64 	%rd6549, {%r3838, %r3837};
	xor.b64  	%rd6550, %rd6548, %rd6549;
	xor.b64  	%rd6551, %rd21492, %rd21493;
	and.b64  	%rd6552, %rd21491, %rd6551;
	xor.b64  	%rd6553, %rd6552, %rd21493;
	add.s64 	%rd6554, %rd6468, %rd21478;
	add.s64 	%rd6555, %rd6554, %rd21439;
	add.s64 	%rd6556, %rd6555, %rd6553;
	add.s64 	%rd6557, %rd6556, %rd6550;
	add.s64 	%rd21490, %rd6557, %rd6479;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3839,%dummy}, %rd21487;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3840}, %rd21487;
	}
	shf.r.wrap.b32 	%r3841, %r3840, %r3839, 28;
	shf.r.wrap.b32 	%r3842, %r3839, %r3840, 28;
	mov.b64 	%rd6558, {%r3842, %r3841};
	shf.l.wrap.b32 	%r3843, %r3839, %r3840, 30;
	shf.l.wrap.b32 	%r3844, %r3840, %r3839, 30;
	mov.b64 	%rd6559, {%r3844, %r3843};
	xor.b64  	%rd6560, %rd6559, %rd6558;
	shf.l.wrap.b32 	%r3845, %r3839, %r3840, 25;
	shf.l.wrap.b32 	%r3846, %r3840, %r3839, 25;
	mov.b64 	%rd6561, {%r3846, %r3845};
	xor.b64  	%rd6562, %rd6560, %rd6561;
	xor.b64  	%rd6563, %rd21487, %rd21489;
	xor.b64  	%rd6564, %rd21487, %rd21488;
	and.b64  	%rd6565, %rd6564, %rd6563;
	xor.b64  	%rd6566, %rd6565, %rd21487;
	add.s64 	%rd6567, %rd6557, %rd6566;
	add.s64 	%rd21486, %rd6567, %rd6562;
	mov.u32 	%r14352, 16;

BB3_97:
	shr.u64 	%rd6568, %rd21479, 6;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3847,%dummy}, %rd21479;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3848}, %rd21479;
	}
	shf.r.wrap.b32 	%r3849, %r3848, %r3847, 19;
	shf.r.wrap.b32 	%r3850, %r3847, %r3848, 19;
	mov.b64 	%rd6569, {%r3850, %r3849};
	xor.b64  	%rd6570, %rd6569, %rd6568;
	shf.l.wrap.b32 	%r3851, %r3847, %r3848, 3;
	shf.l.wrap.b32 	%r3852, %r3848, %r3847, 3;
	mov.b64 	%rd6571, {%r3852, %r3851};
	xor.b64  	%rd6572, %rd6570, %rd6571;
	shr.u64 	%rd6573, %rd21495, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3853,%dummy}, %rd21495;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3854}, %rd21495;
	}
	shf.r.wrap.b32 	%r3855, %r3854, %r3853, 1;
	shf.r.wrap.b32 	%r3856, %r3853, %r3854, 1;
	mov.b64 	%rd6574, {%r3856, %r3855};
	xor.b64  	%rd6575, %rd6574, %rd6573;
	shf.r.wrap.b32 	%r3857, %r3854, %r3853, 8;
	shf.r.wrap.b32 	%r3858, %r3853, %r3854, 8;
	mov.b64 	%rd6576, {%r3858, %r3857};
	xor.b64  	%rd6577, %rd6575, %rd6576;
	add.s64 	%rd6578, %rd21484, %rd21494;
	add.s64 	%rd6579, %rd6578, %rd6572;
	add.s64 	%rd21494, %rd6579, %rd6577;
	shr.u64 	%rd6580, %rd21478, 6;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3859,%dummy}, %rd21478;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3860}, %rd21478;
	}
	shf.r.wrap.b32 	%r3861, %r3860, %r3859, 19;
	shf.r.wrap.b32 	%r3862, %r3859, %r3860, 19;
	mov.b64 	%rd6581, {%r3862, %r3861};
	xor.b64  	%rd6582, %rd6581, %rd6580;
	shf.l.wrap.b32 	%r3863, %r3859, %r3860, 3;
	shf.l.wrap.b32 	%r3864, %r3860, %r3859, 3;
	mov.b64 	%rd6583, {%r3864, %r3863};
	xor.b64  	%rd6584, %rd6582, %rd6583;
	shr.u64 	%rd6585, %rd21496, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3865,%dummy}, %rd21496;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3866}, %rd21496;
	}
	shf.r.wrap.b32 	%r3867, %r3866, %r3865, 1;
	shf.r.wrap.b32 	%r3868, %r3865, %r3866, 1;
	mov.b64 	%rd6586, {%r3868, %r3867};
	xor.b64  	%rd6587, %rd6586, %rd6585;
	shf.r.wrap.b32 	%r3869, %r3866, %r3865, 8;
	shf.r.wrap.b32 	%r3870, %r3865, %r3866, 8;
	mov.b64 	%rd6588, {%r3870, %r3869};
	xor.b64  	%rd6589, %rd6587, %rd6588;
	add.s64 	%rd6590, %rd21483, %rd21495;
	add.s64 	%rd6591, %rd6590, %rd6584;
	add.s64 	%rd21495, %rd6591, %rd6589;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3871,%dummy}, %rd21494;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3872}, %rd21494;
	}
	shf.r.wrap.b32 	%r3873, %r3872, %r3871, 19;
	shf.r.wrap.b32 	%r3874, %r3871, %r3872, 19;
	mov.b64 	%rd6592, {%r3874, %r3873};
	shf.l.wrap.b32 	%r3875, %r3871, %r3872, 3;
	shf.l.wrap.b32 	%r3876, %r3872, %r3871, 3;
	mov.b64 	%rd6593, {%r3876, %r3875};
	shr.u64 	%rd6594, %rd21494, 6;
	xor.b64  	%rd6595, %rd6592, %rd6594;
	xor.b64  	%rd6596, %rd6595, %rd6593;
	shr.u64 	%rd6597, %rd21497, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3877,%dummy}, %rd21497;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3878}, %rd21497;
	}
	shf.r.wrap.b32 	%r3879, %r3878, %r3877, 1;
	shf.r.wrap.b32 	%r3880, %r3877, %r3878, 1;
	mov.b64 	%rd6598, {%r3880, %r3879};
	xor.b64  	%rd6599, %rd6598, %rd6597;
	shf.r.wrap.b32 	%r3881, %r3878, %r3877, 8;
	shf.r.wrap.b32 	%r3882, %r3877, %r3878, 8;
	mov.b64 	%rd6600, {%r3882, %r3881};
	xor.b64  	%rd6601, %rd6599, %rd6600;
	add.s64 	%rd6602, %rd21482, %rd21496;
	add.s64 	%rd6603, %rd6602, %rd6596;
	add.s64 	%rd21496, %rd6603, %rd6601;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3883,%dummy}, %rd21495;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3884}, %rd21495;
	}
	shf.r.wrap.b32 	%r3885, %r3884, %r3883, 19;
	shf.r.wrap.b32 	%r3886, %r3883, %r3884, 19;
	mov.b64 	%rd6604, {%r3886, %r3885};
	shf.l.wrap.b32 	%r3887, %r3883, %r3884, 3;
	shf.l.wrap.b32 	%r3888, %r3884, %r3883, 3;
	mov.b64 	%rd6605, {%r3888, %r3887};
	shr.u64 	%rd6606, %rd21495, 6;
	xor.b64  	%rd6607, %rd6604, %rd6606;
	xor.b64  	%rd6608, %rd6607, %rd6605;
	shr.u64 	%rd6609, %rd21498, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3889,%dummy}, %rd21498;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3890}, %rd21498;
	}
	shf.r.wrap.b32 	%r3891, %r3890, %r3889, 1;
	shf.r.wrap.b32 	%r3892, %r3889, %r3890, 1;
	mov.b64 	%rd6610, {%r3892, %r3891};
	xor.b64  	%rd6611, %rd6610, %rd6609;
	shf.r.wrap.b32 	%r3893, %r3890, %r3889, 8;
	shf.r.wrap.b32 	%r3894, %r3889, %r3890, 8;
	mov.b64 	%rd6612, {%r3894, %r3893};
	xor.b64  	%rd6613, %rd6611, %rd6612;
	add.s64 	%rd6614, %rd21481, %rd21497;
	add.s64 	%rd6615, %rd6614, %rd6608;
	add.s64 	%rd21497, %rd6615, %rd6613;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3895,%dummy}, %rd21496;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3896}, %rd21496;
	}
	shf.r.wrap.b32 	%r3897, %r3896, %r3895, 19;
	shf.r.wrap.b32 	%r3898, %r3895, %r3896, 19;
	mov.b64 	%rd6616, {%r3898, %r3897};
	shf.l.wrap.b32 	%r3899, %r3895, %r3896, 3;
	shf.l.wrap.b32 	%r3900, %r3896, %r3895, 3;
	mov.b64 	%rd6617, {%r3900, %r3899};
	shr.u64 	%rd6618, %rd21496, 6;
	xor.b64  	%rd6619, %rd6616, %rd6618;
	xor.b64  	%rd6620, %rd6619, %rd6617;
	shr.u64 	%rd6621, %rd21499, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3901,%dummy}, %rd21499;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3902}, %rd21499;
	}
	shf.r.wrap.b32 	%r3903, %r3902, %r3901, 1;
	shf.r.wrap.b32 	%r3904, %r3901, %r3902, 1;
	mov.b64 	%rd6622, {%r3904, %r3903};
	xor.b64  	%rd6623, %rd6622, %rd6621;
	shf.r.wrap.b32 	%r3905, %r3902, %r3901, 8;
	shf.r.wrap.b32 	%r3906, %r3901, %r3902, 8;
	mov.b64 	%rd6624, {%r3906, %r3905};
	xor.b64  	%rd6625, %rd6623, %rd6624;
	add.s64 	%rd6626, %rd21480, %rd21498;
	add.s64 	%rd6627, %rd6626, %rd6620;
	add.s64 	%rd21498, %rd6627, %rd6625;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3907,%dummy}, %rd21497;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3908}, %rd21497;
	}
	shf.r.wrap.b32 	%r3909, %r3908, %r3907, 19;
	shf.r.wrap.b32 	%r3910, %r3907, %r3908, 19;
	mov.b64 	%rd6628, {%r3910, %r3909};
	shf.l.wrap.b32 	%r3911, %r3907, %r3908, 3;
	shf.l.wrap.b32 	%r3912, %r3908, %r3907, 3;
	mov.b64 	%rd6629, {%r3912, %r3911};
	shr.u64 	%rd6630, %rd21497, 6;
	xor.b64  	%rd6631, %rd6628, %rd6630;
	xor.b64  	%rd6632, %rd6631, %rd6629;
	shr.u64 	%rd6633, %rd21500, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3913,%dummy}, %rd21500;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3914}, %rd21500;
	}
	shf.r.wrap.b32 	%r3915, %r3914, %r3913, 1;
	shf.r.wrap.b32 	%r3916, %r3913, %r3914, 1;
	mov.b64 	%rd6634, {%r3916, %r3915};
	xor.b64  	%rd6635, %rd6634, %rd6633;
	shf.r.wrap.b32 	%r3917, %r3914, %r3913, 8;
	shf.r.wrap.b32 	%r3918, %r3913, %r3914, 8;
	mov.b64 	%rd6636, {%r3918, %r3917};
	xor.b64  	%rd6637, %rd6635, %rd6636;
	add.s64 	%rd6638, %rd21479, %rd21499;
	add.s64 	%rd6639, %rd6638, %rd6632;
	add.s64 	%rd21499, %rd6639, %rd6637;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3919,%dummy}, %rd21498;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3920}, %rd21498;
	}
	shf.r.wrap.b32 	%r3921, %r3920, %r3919, 19;
	shf.r.wrap.b32 	%r3922, %r3919, %r3920, 19;
	mov.b64 	%rd6640, {%r3922, %r3921};
	shf.l.wrap.b32 	%r3923, %r3919, %r3920, 3;
	shf.l.wrap.b32 	%r3924, %r3920, %r3919, 3;
	mov.b64 	%rd6641, {%r3924, %r3923};
	shr.u64 	%rd6642, %rd21498, 6;
	xor.b64  	%rd6643, %rd6640, %rd6642;
	xor.b64  	%rd6644, %rd6643, %rd6641;
	shr.u64 	%rd6645, %rd21501, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3925,%dummy}, %rd21501;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3926}, %rd21501;
	}
	shf.r.wrap.b32 	%r3927, %r3926, %r3925, 1;
	shf.r.wrap.b32 	%r3928, %r3925, %r3926, 1;
	mov.b64 	%rd6646, {%r3928, %r3927};
	xor.b64  	%rd6647, %rd6646, %rd6645;
	shf.r.wrap.b32 	%r3929, %r3926, %r3925, 8;
	shf.r.wrap.b32 	%r3930, %r3925, %r3926, 8;
	mov.b64 	%rd6648, {%r3930, %r3929};
	xor.b64  	%rd6649, %rd6647, %rd6648;
	add.s64 	%rd6650, %rd21478, %rd21500;
	add.s64 	%rd6651, %rd6650, %rd6644;
	add.s64 	%rd21500, %rd6651, %rd6649;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3931,%dummy}, %rd21499;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3932}, %rd21499;
	}
	shf.r.wrap.b32 	%r3933, %r3932, %r3931, 19;
	shf.r.wrap.b32 	%r3934, %r3931, %r3932, 19;
	mov.b64 	%rd6652, {%r3934, %r3933};
	shf.l.wrap.b32 	%r3935, %r3931, %r3932, 3;
	shf.l.wrap.b32 	%r3936, %r3932, %r3931, 3;
	mov.b64 	%rd6653, {%r3936, %r3935};
	shr.u64 	%rd6654, %rd21499, 6;
	xor.b64  	%rd6655, %rd6652, %rd6654;
	xor.b64  	%rd6656, %rd6655, %rd6653;
	shr.u64 	%rd6657, %rd21485, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3937,%dummy}, %rd21485;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3938}, %rd21485;
	}
	shf.r.wrap.b32 	%r3939, %r3938, %r3937, 1;
	shf.r.wrap.b32 	%r3940, %r3937, %r3938, 1;
	mov.b64 	%rd6658, {%r3940, %r3939};
	xor.b64  	%rd6659, %rd6658, %rd6657;
	shf.r.wrap.b32 	%r3941, %r3938, %r3937, 8;
	shf.r.wrap.b32 	%r3942, %r3937, %r3938, 8;
	mov.b64 	%rd6660, {%r3942, %r3941};
	xor.b64  	%rd6661, %rd6659, %rd6660;
	add.s64 	%rd6662, %rd21494, %rd21501;
	add.s64 	%rd6663, %rd6662, %rd6656;
	add.s64 	%rd21501, %rd6663, %rd6661;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3943,%dummy}, %rd21500;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3944}, %rd21500;
	}
	shf.r.wrap.b32 	%r3945, %r3944, %r3943, 19;
	shf.r.wrap.b32 	%r3946, %r3943, %r3944, 19;
	mov.b64 	%rd6664, {%r3946, %r3945};
	shf.l.wrap.b32 	%r3947, %r3943, %r3944, 3;
	shf.l.wrap.b32 	%r3948, %r3944, %r3943, 3;
	mov.b64 	%rd6665, {%r3948, %r3947};
	shr.u64 	%rd6666, %rd21500, 6;
	xor.b64  	%rd6667, %rd6664, %rd6666;
	xor.b64  	%rd6668, %rd6667, %rd6665;
	shr.u64 	%rd6669, %rd21484, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3949,%dummy}, %rd21484;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3950}, %rd21484;
	}
	shf.r.wrap.b32 	%r3951, %r3950, %r3949, 1;
	shf.r.wrap.b32 	%r3952, %r3949, %r3950, 1;
	mov.b64 	%rd6670, {%r3952, %r3951};
	xor.b64  	%rd6671, %rd6670, %rd6669;
	shf.r.wrap.b32 	%r3953, %r3950, %r3949, 8;
	shf.r.wrap.b32 	%r3954, %r3949, %r3950, 8;
	mov.b64 	%rd6672, {%r3954, %r3953};
	xor.b64  	%rd6673, %rd6671, %rd6672;
	add.s64 	%rd6674, %rd21495, %rd21485;
	add.s64 	%rd6675, %rd6674, %rd6668;
	add.s64 	%rd21485, %rd6675, %rd6673;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3955,%dummy}, %rd21501;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3956}, %rd21501;
	}
	shf.r.wrap.b32 	%r3957, %r3956, %r3955, 19;
	shf.r.wrap.b32 	%r3958, %r3955, %r3956, 19;
	mov.b64 	%rd6676, {%r3958, %r3957};
	shf.l.wrap.b32 	%r3959, %r3955, %r3956, 3;
	shf.l.wrap.b32 	%r3960, %r3956, %r3955, 3;
	mov.b64 	%rd6677, {%r3960, %r3959};
	shr.u64 	%rd6678, %rd21501, 6;
	xor.b64  	%rd6679, %rd6676, %rd6678;
	xor.b64  	%rd6680, %rd6679, %rd6677;
	shr.u64 	%rd6681, %rd21483, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3961,%dummy}, %rd21483;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3962}, %rd21483;
	}
	shf.r.wrap.b32 	%r3963, %r3962, %r3961, 1;
	shf.r.wrap.b32 	%r3964, %r3961, %r3962, 1;
	mov.b64 	%rd6682, {%r3964, %r3963};
	xor.b64  	%rd6683, %rd6682, %rd6681;
	shf.r.wrap.b32 	%r3965, %r3962, %r3961, 8;
	shf.r.wrap.b32 	%r3966, %r3961, %r3962, 8;
	mov.b64 	%rd6684, {%r3966, %r3965};
	xor.b64  	%rd6685, %rd6683, %rd6684;
	add.s64 	%rd6686, %rd21496, %rd21484;
	add.s64 	%rd6687, %rd6686, %rd6680;
	add.s64 	%rd21484, %rd6687, %rd6685;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3967,%dummy}, %rd21485;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3968}, %rd21485;
	}
	shf.r.wrap.b32 	%r3969, %r3968, %r3967, 19;
	shf.r.wrap.b32 	%r3970, %r3967, %r3968, 19;
	mov.b64 	%rd6688, {%r3970, %r3969};
	shf.l.wrap.b32 	%r3971, %r3967, %r3968, 3;
	shf.l.wrap.b32 	%r3972, %r3968, %r3967, 3;
	mov.b64 	%rd6689, {%r3972, %r3971};
	shr.u64 	%rd6690, %rd21485, 6;
	xor.b64  	%rd6691, %rd6688, %rd6690;
	xor.b64  	%rd6692, %rd6691, %rd6689;
	shr.u64 	%rd6693, %rd21482, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3973,%dummy}, %rd21482;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3974}, %rd21482;
	}
	shf.r.wrap.b32 	%r3975, %r3974, %r3973, 1;
	shf.r.wrap.b32 	%r3976, %r3973, %r3974, 1;
	mov.b64 	%rd6694, {%r3976, %r3975};
	xor.b64  	%rd6695, %rd6694, %rd6693;
	shf.r.wrap.b32 	%r3977, %r3974, %r3973, 8;
	shf.r.wrap.b32 	%r3978, %r3973, %r3974, 8;
	mov.b64 	%rd6696, {%r3978, %r3977};
	xor.b64  	%rd6697, %rd6695, %rd6696;
	add.s64 	%rd6698, %rd21497, %rd21483;
	add.s64 	%rd6699, %rd6698, %rd6692;
	add.s64 	%rd21483, %rd6699, %rd6697;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3979,%dummy}, %rd21484;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3980}, %rd21484;
	}
	shf.r.wrap.b32 	%r3981, %r3980, %r3979, 19;
	shf.r.wrap.b32 	%r3982, %r3979, %r3980, 19;
	mov.b64 	%rd6700, {%r3982, %r3981};
	shf.l.wrap.b32 	%r3983, %r3979, %r3980, 3;
	shf.l.wrap.b32 	%r3984, %r3980, %r3979, 3;
	mov.b64 	%rd6701, {%r3984, %r3983};
	shr.u64 	%rd6702, %rd21484, 6;
	xor.b64  	%rd6703, %rd6700, %rd6702;
	xor.b64  	%rd6704, %rd6703, %rd6701;
	shr.u64 	%rd6705, %rd21481, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3985,%dummy}, %rd21481;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3986}, %rd21481;
	}
	shf.r.wrap.b32 	%r3987, %r3986, %r3985, 1;
	shf.r.wrap.b32 	%r3988, %r3985, %r3986, 1;
	mov.b64 	%rd6706, {%r3988, %r3987};
	xor.b64  	%rd6707, %rd6706, %rd6705;
	shf.r.wrap.b32 	%r3989, %r3986, %r3985, 8;
	shf.r.wrap.b32 	%r3990, %r3985, %r3986, 8;
	mov.b64 	%rd6708, {%r3990, %r3989};
	xor.b64  	%rd6709, %rd6707, %rd6708;
	add.s64 	%rd6710, %rd21498, %rd21482;
	add.s64 	%rd6711, %rd6710, %rd6704;
	add.s64 	%rd21482, %rd6711, %rd6709;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3991,%dummy}, %rd21483;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3992}, %rd21483;
	}
	shf.r.wrap.b32 	%r3993, %r3992, %r3991, 19;
	shf.r.wrap.b32 	%r3994, %r3991, %r3992, 19;
	mov.b64 	%rd6712, {%r3994, %r3993};
	shf.l.wrap.b32 	%r3995, %r3991, %r3992, 3;
	shf.l.wrap.b32 	%r3996, %r3992, %r3991, 3;
	mov.b64 	%rd6713, {%r3996, %r3995};
	shr.u64 	%rd6714, %rd21483, 6;
	xor.b64  	%rd6715, %rd6712, %rd6714;
	xor.b64  	%rd6716, %rd6715, %rd6713;
	shr.u64 	%rd6717, %rd21480, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r3997,%dummy}, %rd21480;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r3998}, %rd21480;
	}
	shf.r.wrap.b32 	%r3999, %r3998, %r3997, 1;
	shf.r.wrap.b32 	%r4000, %r3997, %r3998, 1;
	mov.b64 	%rd6718, {%r4000, %r3999};
	xor.b64  	%rd6719, %rd6718, %rd6717;
	shf.r.wrap.b32 	%r4001, %r3998, %r3997, 8;
	shf.r.wrap.b32 	%r4002, %r3997, %r3998, 8;
	mov.b64 	%rd6720, {%r4002, %r4001};
	xor.b64  	%rd6721, %rd6719, %rd6720;
	add.s64 	%rd6722, %rd21499, %rd21481;
	add.s64 	%rd6723, %rd6722, %rd6716;
	add.s64 	%rd21481, %rd6723, %rd6721;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4003,%dummy}, %rd21482;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4004}, %rd21482;
	}
	shf.r.wrap.b32 	%r4005, %r4004, %r4003, 19;
	shf.r.wrap.b32 	%r4006, %r4003, %r4004, 19;
	mov.b64 	%rd6724, {%r4006, %r4005};
	shf.l.wrap.b32 	%r4007, %r4003, %r4004, 3;
	shf.l.wrap.b32 	%r4008, %r4004, %r4003, 3;
	mov.b64 	%rd6725, {%r4008, %r4007};
	shr.u64 	%rd6726, %rd21482, 6;
	xor.b64  	%rd6727, %rd6724, %rd6726;
	xor.b64  	%rd6728, %rd6727, %rd6725;
	shr.u64 	%rd6729, %rd21479, 7;
	shf.r.wrap.b32 	%r4009, %r3848, %r3847, 1;
	shf.r.wrap.b32 	%r4010, %r3847, %r3848, 1;
	mov.b64 	%rd6730, {%r4010, %r4009};
	xor.b64  	%rd6731, %rd6730, %rd6729;
	shf.r.wrap.b32 	%r4011, %r3848, %r3847, 8;
	shf.r.wrap.b32 	%r4012, %r3847, %r3848, 8;
	mov.b64 	%rd6732, {%r4012, %r4011};
	xor.b64  	%rd6733, %rd6731, %rd6732;
	add.s64 	%rd6734, %rd21500, %rd21480;
	add.s64 	%rd6735, %rd6734, %rd6728;
	add.s64 	%rd21480, %rd6735, %rd6733;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4013,%dummy}, %rd21481;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4014}, %rd21481;
	}
	shf.r.wrap.b32 	%r4015, %r4014, %r4013, 19;
	shf.r.wrap.b32 	%r4016, %r4013, %r4014, 19;
	mov.b64 	%rd6736, {%r4016, %r4015};
	shf.l.wrap.b32 	%r4017, %r4013, %r4014, 3;
	shf.l.wrap.b32 	%r4018, %r4014, %r4013, 3;
	mov.b64 	%rd6737, {%r4018, %r4017};
	shr.u64 	%rd6738, %rd21481, 6;
	xor.b64  	%rd6739, %rd6736, %rd6738;
	xor.b64  	%rd6740, %rd6739, %rd6737;
	shr.u64 	%rd6741, %rd21478, 7;
	shf.r.wrap.b32 	%r4019, %r3860, %r3859, 1;
	shf.r.wrap.b32 	%r4020, %r3859, %r3860, 1;
	mov.b64 	%rd6742, {%r4020, %r4019};
	xor.b64  	%rd6743, %rd6742, %rd6741;
	shf.r.wrap.b32 	%r4021, %r3860, %r3859, 8;
	shf.r.wrap.b32 	%r4022, %r3859, %r3860, 8;
	mov.b64 	%rd6744, {%r4022, %r4021};
	xor.b64  	%rd6745, %rd6743, %rd6744;
	add.s64 	%rd6746, %rd21501, %rd21479;
	add.s64 	%rd6747, %rd6746, %rd6740;
	add.s64 	%rd21479, %rd6747, %rd6745;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4023,%dummy}, %rd21480;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4024}, %rd21480;
	}
	shf.r.wrap.b32 	%r4025, %r4024, %r4023, 19;
	shf.r.wrap.b32 	%r4026, %r4023, %r4024, 19;
	mov.b64 	%rd6748, {%r4026, %r4025};
	shf.l.wrap.b32 	%r4027, %r4023, %r4024, 3;
	shf.l.wrap.b32 	%r4028, %r4024, %r4023, 3;
	mov.b64 	%rd6749, {%r4028, %r4027};
	shr.u64 	%rd6750, %rd21480, 6;
	xor.b64  	%rd6751, %rd6748, %rd6750;
	xor.b64  	%rd6752, %rd6751, %rd6749;
	shf.r.wrap.b32 	%r4029, %r3872, %r3871, 1;
	shf.r.wrap.b32 	%r4030, %r3871, %r3872, 1;
	mov.b64 	%rd6753, {%r4030, %r4029};
	shf.r.wrap.b32 	%r4031, %r3872, %r3871, 8;
	shf.r.wrap.b32 	%r4032, %r3871, %r3872, 8;
	mov.b64 	%rd6754, {%r4032, %r4031};
	shr.u64 	%rd6755, %rd21494, 7;
	xor.b64  	%rd6756, %rd6753, %rd6755;
	xor.b64  	%rd6757, %rd6756, %rd6754;
	add.s64 	%rd6758, %rd21485, %rd21478;
	add.s64 	%rd6759, %rd6758, %rd6752;
	add.s64 	%rd21478, %rd6759, %rd6757;
	mul.wide.s32 	%rd6760, %r14352, 8;
	mov.u64 	%rd6761, k_sha512;
	add.s64 	%rd6762, %rd6761, %rd6760;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4033,%dummy}, %rd21490;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4034}, %rd21490;
	}
	shf.r.wrap.b32 	%r4035, %r4034, %r4033, 18;
	shf.r.wrap.b32 	%r4036, %r4033, %r4034, 18;
	mov.b64 	%rd6763, {%r4036, %r4035};
	shf.r.wrap.b32 	%r4037, %r4034, %r4033, 14;
	shf.r.wrap.b32 	%r4038, %r4033, %r4034, 14;
	mov.b64 	%rd6764, {%r4038, %r4037};
	xor.b64  	%rd6765, %rd6763, %rd6764;
	shf.l.wrap.b32 	%r4039, %r4033, %r4034, 23;
	shf.l.wrap.b32 	%r4040, %r4034, %r4033, 23;
	mov.b64 	%rd6766, {%r4040, %r4039};
	xor.b64  	%rd6767, %rd6765, %rd6766;
	xor.b64  	%rd6768, %rd21491, %rd21492;
	and.b64  	%rd6769, %rd6768, %rd21490;
	xor.b64  	%rd6770, %rd6769, %rd21492;
	add.s64 	%rd6771, %rd6770, %rd21493;
	add.s64 	%rd6772, %rd6771, %rd21494;
	ld.const.u64 	%rd6773, [%rd6762];
	add.s64 	%rd6774, %rd6772, %rd6773;
	add.s64 	%rd6775, %rd6774, %rd6767;
	add.s64 	%rd6776, %rd6775, %rd21489;
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4041}, %rd21486;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4042,%dummy}, %rd21486;
	}
	shf.l.wrap.b32 	%r4043, %r4042, %r4041, 30;
	shf.l.wrap.b32 	%r4044, %r4041, %r4042, 30;
	mov.b64 	%rd6777, {%r4044, %r4043};
	shf.r.wrap.b32 	%r4045, %r4041, %r4042, 28;
	shf.r.wrap.b32 	%r4046, %r4042, %r4041, 28;
	mov.b64 	%rd6778, {%r4046, %r4045};
	xor.b64  	%rd6779, %rd6777, %rd6778;
	shf.l.wrap.b32 	%r4047, %r4042, %r4041, 25;
	shf.l.wrap.b32 	%r4048, %r4041, %r4042, 25;
	mov.b64 	%rd6780, {%r4048, %r4047};
	xor.b64  	%rd6781, %rd6779, %rd6780;
	xor.b64  	%rd6782, %rd21486, %rd21487;
	xor.b64  	%rd6783, %rd21486, %rd21488;
	and.b64  	%rd6784, %rd6782, %rd6783;
	xor.b64  	%rd6785, %rd6784, %rd21486;
	add.s64 	%rd6786, %rd6775, %rd6785;
	add.s64 	%rd6787, %rd6786, %rd6781;
	add.s32 	%r4049, %r14352, 1;
	mul.wide.s32 	%rd6788, %r4049, 8;
	add.s64 	%rd6789, %rd6761, %rd6788;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4050,%dummy}, %rd6776;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4051}, %rd6776;
	}
	shf.r.wrap.b32 	%r4052, %r4051, %r4050, 14;
	shf.r.wrap.b32 	%r4053, %r4050, %r4051, 14;
	mov.b64 	%rd6790, {%r4053, %r4052};
	shf.r.wrap.b32 	%r4054, %r4051, %r4050, 18;
	shf.r.wrap.b32 	%r4055, %r4050, %r4051, 18;
	mov.b64 	%rd6791, {%r4055, %r4054};
	xor.b64  	%rd6792, %rd6791, %rd6790;
	shf.l.wrap.b32 	%r4056, %r4050, %r4051, 23;
	shf.l.wrap.b32 	%r4057, %r4051, %r4050, 23;
	mov.b64 	%rd6793, {%r4057, %r4056};
	xor.b64  	%rd6794, %rd6792, %rd6793;
	xor.b64  	%rd6795, %rd21490, %rd21491;
	and.b64  	%rd6796, %rd6776, %rd6795;
	xor.b64  	%rd6797, %rd6796, %rd21491;
	add.s64 	%rd6798, %rd21495, %rd21492;
	ld.const.u64 	%rd6799, [%rd6789];
	add.s64 	%rd6800, %rd6798, %rd6799;
	add.s64 	%rd6801, %rd6800, %rd6797;
	add.s64 	%rd6802, %rd6801, %rd6794;
	add.s64 	%rd6803, %rd6802, %rd21488;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4058,%dummy}, %rd6787;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4059}, %rd6787;
	}
	shf.r.wrap.b32 	%r4060, %r4059, %r4058, 28;
	shf.r.wrap.b32 	%r4061, %r4058, %r4059, 28;
	mov.b64 	%rd6804, {%r4061, %r4060};
	shf.l.wrap.b32 	%r4062, %r4058, %r4059, 30;
	shf.l.wrap.b32 	%r4063, %r4059, %r4058, 30;
	mov.b64 	%rd6805, {%r4063, %r4062};
	xor.b64  	%rd6806, %rd6805, %rd6804;
	shf.l.wrap.b32 	%r4064, %r4058, %r4059, 25;
	shf.l.wrap.b32 	%r4065, %r4059, %r4058, 25;
	mov.b64 	%rd6807, {%r4065, %r4064};
	xor.b64  	%rd6808, %rd6806, %rd6807;
	xor.b64  	%rd6809, %rd6787, %rd21487;
	xor.b64  	%rd6810, %rd6787, %rd21486;
	and.b64  	%rd6811, %rd6810, %rd6809;
	xor.b64  	%rd6812, %rd6811, %rd6787;
	add.s64 	%rd6813, %rd6802, %rd6812;
	add.s64 	%rd6814, %rd6813, %rd6808;
	add.s32 	%r4066, %r14352, 2;
	mul.wide.s32 	%rd6815, %r4066, 8;
	add.s64 	%rd6816, %rd6761, %rd6815;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4067,%dummy}, %rd6803;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4068}, %rd6803;
	}
	shf.r.wrap.b32 	%r4069, %r4068, %r4067, 14;
	shf.r.wrap.b32 	%r4070, %r4067, %r4068, 14;
	mov.b64 	%rd6817, {%r4070, %r4069};
	shf.r.wrap.b32 	%r4071, %r4068, %r4067, 18;
	shf.r.wrap.b32 	%r4072, %r4067, %r4068, 18;
	mov.b64 	%rd6818, {%r4072, %r4071};
	xor.b64  	%rd6819, %rd6818, %rd6817;
	shf.l.wrap.b32 	%r4073, %r4067, %r4068, 23;
	shf.l.wrap.b32 	%r4074, %r4068, %r4067, 23;
	mov.b64 	%rd6820, {%r4074, %r4073};
	xor.b64  	%rd6821, %rd6819, %rd6820;
	xor.b64  	%rd6822, %rd6776, %rd21490;
	and.b64  	%rd6823, %rd6803, %rd6822;
	xor.b64  	%rd6824, %rd6823, %rd21490;
	add.s64 	%rd6825, %rd21496, %rd21491;
	ld.const.u64 	%rd6826, [%rd6816];
	add.s64 	%rd6827, %rd6825, %rd6826;
	add.s64 	%rd6828, %rd6827, %rd6824;
	add.s64 	%rd6829, %rd6828, %rd6821;
	add.s64 	%rd6830, %rd6829, %rd21487;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4075,%dummy}, %rd6814;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4076}, %rd6814;
	}
	shf.r.wrap.b32 	%r4077, %r4076, %r4075, 28;
	shf.r.wrap.b32 	%r4078, %r4075, %r4076, 28;
	mov.b64 	%rd6831, {%r4078, %r4077};
	shf.l.wrap.b32 	%r4079, %r4075, %r4076, 30;
	shf.l.wrap.b32 	%r4080, %r4076, %r4075, 30;
	mov.b64 	%rd6832, {%r4080, %r4079};
	xor.b64  	%rd6833, %rd6832, %rd6831;
	shf.l.wrap.b32 	%r4081, %r4075, %r4076, 25;
	shf.l.wrap.b32 	%r4082, %r4076, %r4075, 25;
	mov.b64 	%rd6834, {%r4082, %r4081};
	xor.b64  	%rd6835, %rd6833, %rd6834;
	xor.b64  	%rd6836, %rd6814, %rd21486;
	xor.b64  	%rd6837, %rd6814, %rd6787;
	and.b64  	%rd6838, %rd6837, %rd6836;
	xor.b64  	%rd6839, %rd6838, %rd6814;
	add.s64 	%rd6840, %rd6829, %rd6839;
	add.s64 	%rd6841, %rd6840, %rd6835;
	add.s32 	%r4083, %r14352, 3;
	mul.wide.s32 	%rd6842, %r4083, 8;
	add.s64 	%rd6843, %rd6761, %rd6842;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4084,%dummy}, %rd6830;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4085}, %rd6830;
	}
	shf.r.wrap.b32 	%r4086, %r4085, %r4084, 14;
	shf.r.wrap.b32 	%r4087, %r4084, %r4085, 14;
	mov.b64 	%rd6844, {%r4087, %r4086};
	shf.r.wrap.b32 	%r4088, %r4085, %r4084, 18;
	shf.r.wrap.b32 	%r4089, %r4084, %r4085, 18;
	mov.b64 	%rd6845, {%r4089, %r4088};
	xor.b64  	%rd6846, %rd6845, %rd6844;
	shf.l.wrap.b32 	%r4090, %r4084, %r4085, 23;
	shf.l.wrap.b32 	%r4091, %r4085, %r4084, 23;
	mov.b64 	%rd6847, {%r4091, %r4090};
	xor.b64  	%rd6848, %rd6846, %rd6847;
	xor.b64  	%rd6849, %rd6803, %rd6776;
	and.b64  	%rd6850, %rd6830, %rd6849;
	xor.b64  	%rd6851, %rd6850, %rd6776;
	add.s64 	%rd6852, %rd21497, %rd21490;
	ld.const.u64 	%rd6853, [%rd6843];
	add.s64 	%rd6854, %rd6852, %rd6853;
	add.s64 	%rd6855, %rd6854, %rd6851;
	add.s64 	%rd6856, %rd6855, %rd6848;
	add.s64 	%rd6857, %rd6856, %rd21486;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4092,%dummy}, %rd6841;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4093}, %rd6841;
	}
	shf.r.wrap.b32 	%r4094, %r4093, %r4092, 28;
	shf.r.wrap.b32 	%r4095, %r4092, %r4093, 28;
	mov.b64 	%rd6858, {%r4095, %r4094};
	shf.l.wrap.b32 	%r4096, %r4092, %r4093, 30;
	shf.l.wrap.b32 	%r4097, %r4093, %r4092, 30;
	mov.b64 	%rd6859, {%r4097, %r4096};
	xor.b64  	%rd6860, %rd6859, %rd6858;
	shf.l.wrap.b32 	%r4098, %r4092, %r4093, 25;
	shf.l.wrap.b32 	%r4099, %r4093, %r4092, 25;
	mov.b64 	%rd6861, {%r4099, %r4098};
	xor.b64  	%rd6862, %rd6860, %rd6861;
	xor.b64  	%rd6863, %rd6841, %rd6787;
	xor.b64  	%rd6864, %rd6841, %rd6814;
	and.b64  	%rd6865, %rd6864, %rd6863;
	xor.b64  	%rd6866, %rd6865, %rd6841;
	add.s64 	%rd6867, %rd6856, %rd6866;
	add.s64 	%rd6868, %rd6867, %rd6862;
	add.s32 	%r4100, %r14352, 4;
	mul.wide.s32 	%rd6869, %r4100, 8;
	add.s64 	%rd6870, %rd6761, %rd6869;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4101,%dummy}, %rd6857;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4102}, %rd6857;
	}
	shf.r.wrap.b32 	%r4103, %r4102, %r4101, 14;
	shf.r.wrap.b32 	%r4104, %r4101, %r4102, 14;
	mov.b64 	%rd6871, {%r4104, %r4103};
	shf.r.wrap.b32 	%r4105, %r4102, %r4101, 18;
	shf.r.wrap.b32 	%r4106, %r4101, %r4102, 18;
	mov.b64 	%rd6872, {%r4106, %r4105};
	xor.b64  	%rd6873, %rd6872, %rd6871;
	shf.l.wrap.b32 	%r4107, %r4101, %r4102, 23;
	shf.l.wrap.b32 	%r4108, %r4102, %r4101, 23;
	mov.b64 	%rd6874, {%r4108, %r4107};
	xor.b64  	%rd6875, %rd6873, %rd6874;
	xor.b64  	%rd6876, %rd6830, %rd6803;
	and.b64  	%rd6877, %rd6857, %rd6876;
	xor.b64  	%rd6878, %rd6877, %rd6803;
	add.s64 	%rd6879, %rd6776, %rd21498;
	ld.const.u64 	%rd6880, [%rd6870];
	add.s64 	%rd6881, %rd6879, %rd6880;
	add.s64 	%rd6882, %rd6881, %rd6878;
	add.s64 	%rd6883, %rd6882, %rd6875;
	add.s64 	%rd6884, %rd6883, %rd6787;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4109,%dummy}, %rd6868;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4110}, %rd6868;
	}
	shf.r.wrap.b32 	%r4111, %r4110, %r4109, 28;
	shf.r.wrap.b32 	%r4112, %r4109, %r4110, 28;
	mov.b64 	%rd6885, {%r4112, %r4111};
	shf.l.wrap.b32 	%r4113, %r4109, %r4110, 30;
	shf.l.wrap.b32 	%r4114, %r4110, %r4109, 30;
	mov.b64 	%rd6886, {%r4114, %r4113};
	xor.b64  	%rd6887, %rd6886, %rd6885;
	shf.l.wrap.b32 	%r4115, %r4109, %r4110, 25;
	shf.l.wrap.b32 	%r4116, %r4110, %r4109, 25;
	mov.b64 	%rd6888, {%r4116, %r4115};
	xor.b64  	%rd6889, %rd6887, %rd6888;
	xor.b64  	%rd6890, %rd6868, %rd6814;
	xor.b64  	%rd6891, %rd6868, %rd6841;
	and.b64  	%rd6892, %rd6891, %rd6890;
	xor.b64  	%rd6893, %rd6892, %rd6868;
	add.s64 	%rd6894, %rd6883, %rd6893;
	add.s64 	%rd6895, %rd6894, %rd6889;
	add.s32 	%r4117, %r14352, 5;
	mul.wide.s32 	%rd6896, %r4117, 8;
	add.s64 	%rd6897, %rd6761, %rd6896;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4118,%dummy}, %rd6884;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4119}, %rd6884;
	}
	shf.r.wrap.b32 	%r4120, %r4119, %r4118, 14;
	shf.r.wrap.b32 	%r4121, %r4118, %r4119, 14;
	mov.b64 	%rd6898, {%r4121, %r4120};
	shf.r.wrap.b32 	%r4122, %r4119, %r4118, 18;
	shf.r.wrap.b32 	%r4123, %r4118, %r4119, 18;
	mov.b64 	%rd6899, {%r4123, %r4122};
	xor.b64  	%rd6900, %rd6899, %rd6898;
	shf.l.wrap.b32 	%r4124, %r4118, %r4119, 23;
	shf.l.wrap.b32 	%r4125, %r4119, %r4118, 23;
	mov.b64 	%rd6901, {%r4125, %r4124};
	xor.b64  	%rd6902, %rd6900, %rd6901;
	xor.b64  	%rd6903, %rd6857, %rd6830;
	and.b64  	%rd6904, %rd6884, %rd6903;
	xor.b64  	%rd6905, %rd6904, %rd6830;
	add.s64 	%rd6906, %rd6803, %rd21499;
	ld.const.u64 	%rd6907, [%rd6897];
	add.s64 	%rd6908, %rd6906, %rd6907;
	add.s64 	%rd6909, %rd6908, %rd6905;
	add.s64 	%rd6910, %rd6909, %rd6902;
	add.s64 	%rd6911, %rd6910, %rd6814;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4126,%dummy}, %rd6895;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4127}, %rd6895;
	}
	shf.r.wrap.b32 	%r4128, %r4127, %r4126, 28;
	shf.r.wrap.b32 	%r4129, %r4126, %r4127, 28;
	mov.b64 	%rd6912, {%r4129, %r4128};
	shf.l.wrap.b32 	%r4130, %r4126, %r4127, 30;
	shf.l.wrap.b32 	%r4131, %r4127, %r4126, 30;
	mov.b64 	%rd6913, {%r4131, %r4130};
	xor.b64  	%rd6914, %rd6913, %rd6912;
	shf.l.wrap.b32 	%r4132, %r4126, %r4127, 25;
	shf.l.wrap.b32 	%r4133, %r4127, %r4126, 25;
	mov.b64 	%rd6915, {%r4133, %r4132};
	xor.b64  	%rd6916, %rd6914, %rd6915;
	xor.b64  	%rd6917, %rd6895, %rd6841;
	xor.b64  	%rd6918, %rd6895, %rd6868;
	and.b64  	%rd6919, %rd6918, %rd6917;
	xor.b64  	%rd6920, %rd6919, %rd6895;
	add.s64 	%rd6921, %rd6910, %rd6920;
	add.s64 	%rd6922, %rd6921, %rd6916;
	add.s32 	%r4134, %r14352, 6;
	mul.wide.s32 	%rd6923, %r4134, 8;
	add.s64 	%rd6924, %rd6761, %rd6923;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4135,%dummy}, %rd6911;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4136}, %rd6911;
	}
	shf.r.wrap.b32 	%r4137, %r4136, %r4135, 14;
	shf.r.wrap.b32 	%r4138, %r4135, %r4136, 14;
	mov.b64 	%rd6925, {%r4138, %r4137};
	shf.r.wrap.b32 	%r4139, %r4136, %r4135, 18;
	shf.r.wrap.b32 	%r4140, %r4135, %r4136, 18;
	mov.b64 	%rd6926, {%r4140, %r4139};
	xor.b64  	%rd6927, %rd6926, %rd6925;
	shf.l.wrap.b32 	%r4141, %r4135, %r4136, 23;
	shf.l.wrap.b32 	%r4142, %r4136, %r4135, 23;
	mov.b64 	%rd6928, {%r4142, %r4141};
	xor.b64  	%rd6929, %rd6927, %rd6928;
	xor.b64  	%rd6930, %rd6884, %rd6857;
	and.b64  	%rd6931, %rd6911, %rd6930;
	xor.b64  	%rd6932, %rd6931, %rd6857;
	add.s64 	%rd6933, %rd6830, %rd21500;
	ld.const.u64 	%rd6934, [%rd6924];
	add.s64 	%rd6935, %rd6933, %rd6934;
	add.s64 	%rd6936, %rd6935, %rd6932;
	add.s64 	%rd6937, %rd6936, %rd6929;
	add.s64 	%rd6938, %rd6937, %rd6841;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4143,%dummy}, %rd6922;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4144}, %rd6922;
	}
	shf.r.wrap.b32 	%r4145, %r4144, %r4143, 28;
	shf.r.wrap.b32 	%r4146, %r4143, %r4144, 28;
	mov.b64 	%rd6939, {%r4146, %r4145};
	shf.l.wrap.b32 	%r4147, %r4143, %r4144, 30;
	shf.l.wrap.b32 	%r4148, %r4144, %r4143, 30;
	mov.b64 	%rd6940, {%r4148, %r4147};
	xor.b64  	%rd6941, %rd6940, %rd6939;
	shf.l.wrap.b32 	%r4149, %r4143, %r4144, 25;
	shf.l.wrap.b32 	%r4150, %r4144, %r4143, 25;
	mov.b64 	%rd6942, {%r4150, %r4149};
	xor.b64  	%rd6943, %rd6941, %rd6942;
	xor.b64  	%rd6944, %rd6922, %rd6868;
	xor.b64  	%rd6945, %rd6922, %rd6895;
	and.b64  	%rd6946, %rd6945, %rd6944;
	xor.b64  	%rd6947, %rd6946, %rd6922;
	add.s64 	%rd6948, %rd6937, %rd6947;
	add.s64 	%rd6949, %rd6948, %rd6943;
	add.s32 	%r4151, %r14352, 7;
	mul.wide.s32 	%rd6950, %r4151, 8;
	add.s64 	%rd6951, %rd6761, %rd6950;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4152,%dummy}, %rd6938;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4153}, %rd6938;
	}
	shf.r.wrap.b32 	%r4154, %r4153, %r4152, 14;
	shf.r.wrap.b32 	%r4155, %r4152, %r4153, 14;
	mov.b64 	%rd6952, {%r4155, %r4154};
	shf.r.wrap.b32 	%r4156, %r4153, %r4152, 18;
	shf.r.wrap.b32 	%r4157, %r4152, %r4153, 18;
	mov.b64 	%rd6953, {%r4157, %r4156};
	xor.b64  	%rd6954, %rd6953, %rd6952;
	shf.l.wrap.b32 	%r4158, %r4152, %r4153, 23;
	shf.l.wrap.b32 	%r4159, %r4153, %r4152, 23;
	mov.b64 	%rd6955, {%r4159, %r4158};
	xor.b64  	%rd6956, %rd6954, %rd6955;
	xor.b64  	%rd6957, %rd6911, %rd6884;
	and.b64  	%rd6958, %rd6938, %rd6957;
	xor.b64  	%rd6959, %rd6958, %rd6884;
	add.s64 	%rd6960, %rd6857, %rd21501;
	ld.const.u64 	%rd6961, [%rd6951];
	add.s64 	%rd6962, %rd6960, %rd6961;
	add.s64 	%rd6963, %rd6962, %rd6959;
	add.s64 	%rd6964, %rd6963, %rd6956;
	add.s64 	%rd6965, %rd6964, %rd6868;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4160,%dummy}, %rd6949;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4161}, %rd6949;
	}
	shf.r.wrap.b32 	%r4162, %r4161, %r4160, 28;
	shf.r.wrap.b32 	%r4163, %r4160, %r4161, 28;
	mov.b64 	%rd6966, {%r4163, %r4162};
	shf.l.wrap.b32 	%r4164, %r4160, %r4161, 30;
	shf.l.wrap.b32 	%r4165, %r4161, %r4160, 30;
	mov.b64 	%rd6967, {%r4165, %r4164};
	xor.b64  	%rd6968, %rd6967, %rd6966;
	shf.l.wrap.b32 	%r4166, %r4160, %r4161, 25;
	shf.l.wrap.b32 	%r4167, %r4161, %r4160, 25;
	mov.b64 	%rd6969, {%r4167, %r4166};
	xor.b64  	%rd6970, %rd6968, %rd6969;
	xor.b64  	%rd6971, %rd6949, %rd6895;
	xor.b64  	%rd6972, %rd6949, %rd6922;
	and.b64  	%rd6973, %rd6972, %rd6971;
	xor.b64  	%rd6974, %rd6973, %rd6949;
	add.s64 	%rd6975, %rd6964, %rd6974;
	add.s64 	%rd6976, %rd6975, %rd6970;
	add.s32 	%r4168, %r14352, 8;
	mul.wide.s32 	%rd6977, %r4168, 8;
	add.s64 	%rd6978, %rd6761, %rd6977;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4169,%dummy}, %rd6965;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4170}, %rd6965;
	}
	shf.r.wrap.b32 	%r4171, %r4170, %r4169, 14;
	shf.r.wrap.b32 	%r4172, %r4169, %r4170, 14;
	mov.b64 	%rd6979, {%r4172, %r4171};
	shf.r.wrap.b32 	%r4173, %r4170, %r4169, 18;
	shf.r.wrap.b32 	%r4174, %r4169, %r4170, 18;
	mov.b64 	%rd6980, {%r4174, %r4173};
	xor.b64  	%rd6981, %rd6980, %rd6979;
	shf.l.wrap.b32 	%r4175, %r4169, %r4170, 23;
	shf.l.wrap.b32 	%r4176, %r4170, %r4169, 23;
	mov.b64 	%rd6982, {%r4176, %r4175};
	xor.b64  	%rd6983, %rd6981, %rd6982;
	xor.b64  	%rd6984, %rd6938, %rd6911;
	and.b64  	%rd6985, %rd6965, %rd6984;
	xor.b64  	%rd6986, %rd6985, %rd6911;
	add.s64 	%rd6987, %rd6884, %rd21485;
	ld.const.u64 	%rd6988, [%rd6978];
	add.s64 	%rd6989, %rd6987, %rd6988;
	add.s64 	%rd6990, %rd6989, %rd6986;
	add.s64 	%rd6991, %rd6990, %rd6983;
	add.s64 	%rd6992, %rd6991, %rd6895;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4177,%dummy}, %rd6976;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4178}, %rd6976;
	}
	shf.r.wrap.b32 	%r4179, %r4178, %r4177, 28;
	shf.r.wrap.b32 	%r4180, %r4177, %r4178, 28;
	mov.b64 	%rd6993, {%r4180, %r4179};
	shf.l.wrap.b32 	%r4181, %r4177, %r4178, 30;
	shf.l.wrap.b32 	%r4182, %r4178, %r4177, 30;
	mov.b64 	%rd6994, {%r4182, %r4181};
	xor.b64  	%rd6995, %rd6994, %rd6993;
	shf.l.wrap.b32 	%r4183, %r4177, %r4178, 25;
	shf.l.wrap.b32 	%r4184, %r4178, %r4177, 25;
	mov.b64 	%rd6996, {%r4184, %r4183};
	xor.b64  	%rd6997, %rd6995, %rd6996;
	xor.b64  	%rd6998, %rd6976, %rd6922;
	xor.b64  	%rd6999, %rd6976, %rd6949;
	and.b64  	%rd7000, %rd6999, %rd6998;
	xor.b64  	%rd7001, %rd7000, %rd6976;
	add.s64 	%rd7002, %rd6991, %rd7001;
	add.s64 	%rd7003, %rd7002, %rd6997;
	add.s32 	%r4185, %r14352, 9;
	mul.wide.s32 	%rd7004, %r4185, 8;
	add.s64 	%rd7005, %rd6761, %rd7004;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4186,%dummy}, %rd6992;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4187}, %rd6992;
	}
	shf.r.wrap.b32 	%r4188, %r4187, %r4186, 14;
	shf.r.wrap.b32 	%r4189, %r4186, %r4187, 14;
	mov.b64 	%rd7006, {%r4189, %r4188};
	shf.r.wrap.b32 	%r4190, %r4187, %r4186, 18;
	shf.r.wrap.b32 	%r4191, %r4186, %r4187, 18;
	mov.b64 	%rd7007, {%r4191, %r4190};
	xor.b64  	%rd7008, %rd7007, %rd7006;
	shf.l.wrap.b32 	%r4192, %r4186, %r4187, 23;
	shf.l.wrap.b32 	%r4193, %r4187, %r4186, 23;
	mov.b64 	%rd7009, {%r4193, %r4192};
	xor.b64  	%rd7010, %rd7008, %rd7009;
	xor.b64  	%rd7011, %rd6965, %rd6938;
	and.b64  	%rd7012, %rd6992, %rd7011;
	xor.b64  	%rd7013, %rd7012, %rd6938;
	add.s64 	%rd7014, %rd6911, %rd21484;
	ld.const.u64 	%rd7015, [%rd7005];
	add.s64 	%rd7016, %rd7014, %rd7015;
	add.s64 	%rd7017, %rd7016, %rd7013;
	add.s64 	%rd7018, %rd7017, %rd7010;
	add.s64 	%rd7019, %rd7018, %rd6922;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4194,%dummy}, %rd7003;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4195}, %rd7003;
	}
	shf.r.wrap.b32 	%r4196, %r4195, %r4194, 28;
	shf.r.wrap.b32 	%r4197, %r4194, %r4195, 28;
	mov.b64 	%rd7020, {%r4197, %r4196};
	shf.l.wrap.b32 	%r4198, %r4194, %r4195, 30;
	shf.l.wrap.b32 	%r4199, %r4195, %r4194, 30;
	mov.b64 	%rd7021, {%r4199, %r4198};
	xor.b64  	%rd7022, %rd7021, %rd7020;
	shf.l.wrap.b32 	%r4200, %r4194, %r4195, 25;
	shf.l.wrap.b32 	%r4201, %r4195, %r4194, 25;
	mov.b64 	%rd7023, {%r4201, %r4200};
	xor.b64  	%rd7024, %rd7022, %rd7023;
	xor.b64  	%rd7025, %rd7003, %rd6949;
	xor.b64  	%rd7026, %rd7003, %rd6976;
	and.b64  	%rd7027, %rd7026, %rd7025;
	xor.b64  	%rd7028, %rd7027, %rd7003;
	add.s64 	%rd7029, %rd7018, %rd7028;
	add.s64 	%rd7030, %rd7029, %rd7024;
	add.s32 	%r4202, %r14352, 10;
	mul.wide.s32 	%rd7031, %r4202, 8;
	add.s64 	%rd7032, %rd6761, %rd7031;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4203,%dummy}, %rd7019;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4204}, %rd7019;
	}
	shf.r.wrap.b32 	%r4205, %r4204, %r4203, 14;
	shf.r.wrap.b32 	%r4206, %r4203, %r4204, 14;
	mov.b64 	%rd7033, {%r4206, %r4205};
	shf.r.wrap.b32 	%r4207, %r4204, %r4203, 18;
	shf.r.wrap.b32 	%r4208, %r4203, %r4204, 18;
	mov.b64 	%rd7034, {%r4208, %r4207};
	xor.b64  	%rd7035, %rd7034, %rd7033;
	shf.l.wrap.b32 	%r4209, %r4203, %r4204, 23;
	shf.l.wrap.b32 	%r4210, %r4204, %r4203, 23;
	mov.b64 	%rd7036, {%r4210, %r4209};
	xor.b64  	%rd7037, %rd7035, %rd7036;
	xor.b64  	%rd7038, %rd6992, %rd6965;
	and.b64  	%rd7039, %rd7019, %rd7038;
	xor.b64  	%rd7040, %rd7039, %rd6965;
	add.s64 	%rd7041, %rd6938, %rd21483;
	ld.const.u64 	%rd7042, [%rd7032];
	add.s64 	%rd7043, %rd7041, %rd7042;
	add.s64 	%rd7044, %rd7043, %rd7040;
	add.s64 	%rd7045, %rd7044, %rd7037;
	add.s64 	%rd7046, %rd7045, %rd6949;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4211,%dummy}, %rd7030;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4212}, %rd7030;
	}
	shf.r.wrap.b32 	%r4213, %r4212, %r4211, 28;
	shf.r.wrap.b32 	%r4214, %r4211, %r4212, 28;
	mov.b64 	%rd7047, {%r4214, %r4213};
	shf.l.wrap.b32 	%r4215, %r4211, %r4212, 30;
	shf.l.wrap.b32 	%r4216, %r4212, %r4211, 30;
	mov.b64 	%rd7048, {%r4216, %r4215};
	xor.b64  	%rd7049, %rd7048, %rd7047;
	shf.l.wrap.b32 	%r4217, %r4211, %r4212, 25;
	shf.l.wrap.b32 	%r4218, %r4212, %r4211, 25;
	mov.b64 	%rd7050, {%r4218, %r4217};
	xor.b64  	%rd7051, %rd7049, %rd7050;
	xor.b64  	%rd7052, %rd7030, %rd6976;
	xor.b64  	%rd7053, %rd7030, %rd7003;
	and.b64  	%rd7054, %rd7053, %rd7052;
	xor.b64  	%rd7055, %rd7054, %rd7030;
	add.s64 	%rd7056, %rd7045, %rd7055;
	add.s64 	%rd7057, %rd7056, %rd7051;
	add.s32 	%r4219, %r14352, 11;
	mul.wide.s32 	%rd7058, %r4219, 8;
	add.s64 	%rd7059, %rd6761, %rd7058;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4220,%dummy}, %rd7046;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4221}, %rd7046;
	}
	shf.r.wrap.b32 	%r4222, %r4221, %r4220, 14;
	shf.r.wrap.b32 	%r4223, %r4220, %r4221, 14;
	mov.b64 	%rd7060, {%r4223, %r4222};
	shf.r.wrap.b32 	%r4224, %r4221, %r4220, 18;
	shf.r.wrap.b32 	%r4225, %r4220, %r4221, 18;
	mov.b64 	%rd7061, {%r4225, %r4224};
	xor.b64  	%rd7062, %rd7061, %rd7060;
	shf.l.wrap.b32 	%r4226, %r4220, %r4221, 23;
	shf.l.wrap.b32 	%r4227, %r4221, %r4220, 23;
	mov.b64 	%rd7063, {%r4227, %r4226};
	xor.b64  	%rd7064, %rd7062, %rd7063;
	xor.b64  	%rd7065, %rd7019, %rd6992;
	and.b64  	%rd7066, %rd7046, %rd7065;
	xor.b64  	%rd7067, %rd7066, %rd6992;
	add.s64 	%rd7068, %rd6965, %rd21482;
	ld.const.u64 	%rd7069, [%rd7059];
	add.s64 	%rd7070, %rd7068, %rd7069;
	add.s64 	%rd7071, %rd7070, %rd7067;
	add.s64 	%rd7072, %rd7071, %rd7064;
	add.s64 	%rd7073, %rd7072, %rd6976;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4228,%dummy}, %rd7057;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4229}, %rd7057;
	}
	shf.r.wrap.b32 	%r4230, %r4229, %r4228, 28;
	shf.r.wrap.b32 	%r4231, %r4228, %r4229, 28;
	mov.b64 	%rd7074, {%r4231, %r4230};
	shf.l.wrap.b32 	%r4232, %r4228, %r4229, 30;
	shf.l.wrap.b32 	%r4233, %r4229, %r4228, 30;
	mov.b64 	%rd7075, {%r4233, %r4232};
	xor.b64  	%rd7076, %rd7075, %rd7074;
	shf.l.wrap.b32 	%r4234, %r4228, %r4229, 25;
	shf.l.wrap.b32 	%r4235, %r4229, %r4228, 25;
	mov.b64 	%rd7077, {%r4235, %r4234};
	xor.b64  	%rd7078, %rd7076, %rd7077;
	xor.b64  	%rd7079, %rd7057, %rd7003;
	xor.b64  	%rd7080, %rd7057, %rd7030;
	and.b64  	%rd7081, %rd7080, %rd7079;
	xor.b64  	%rd7082, %rd7081, %rd7057;
	add.s64 	%rd7083, %rd7072, %rd7082;
	add.s64 	%rd7084, %rd7083, %rd7078;
	add.s32 	%r4236, %r14352, 12;
	mul.wide.s32 	%rd7085, %r4236, 8;
	add.s64 	%rd7086, %rd6761, %rd7085;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4237,%dummy}, %rd7073;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4238}, %rd7073;
	}
	shf.r.wrap.b32 	%r4239, %r4238, %r4237, 14;
	shf.r.wrap.b32 	%r4240, %r4237, %r4238, 14;
	mov.b64 	%rd7087, {%r4240, %r4239};
	shf.r.wrap.b32 	%r4241, %r4238, %r4237, 18;
	shf.r.wrap.b32 	%r4242, %r4237, %r4238, 18;
	mov.b64 	%rd7088, {%r4242, %r4241};
	xor.b64  	%rd7089, %rd7088, %rd7087;
	shf.l.wrap.b32 	%r4243, %r4237, %r4238, 23;
	shf.l.wrap.b32 	%r4244, %r4238, %r4237, 23;
	mov.b64 	%rd7090, {%r4244, %r4243};
	xor.b64  	%rd7091, %rd7089, %rd7090;
	xor.b64  	%rd7092, %rd7046, %rd7019;
	and.b64  	%rd7093, %rd7073, %rd7092;
	xor.b64  	%rd7094, %rd7093, %rd7019;
	add.s64 	%rd7095, %rd6992, %rd21481;
	ld.const.u64 	%rd7096, [%rd7086];
	add.s64 	%rd7097, %rd7095, %rd7096;
	add.s64 	%rd7098, %rd7097, %rd7094;
	add.s64 	%rd7099, %rd7098, %rd7091;
	add.s64 	%rd21493, %rd7099, %rd7003;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4245,%dummy}, %rd7084;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4246}, %rd7084;
	}
	shf.r.wrap.b32 	%r4247, %r4246, %r4245, 28;
	shf.r.wrap.b32 	%r4248, %r4245, %r4246, 28;
	mov.b64 	%rd7100, {%r4248, %r4247};
	shf.l.wrap.b32 	%r4249, %r4245, %r4246, 30;
	shf.l.wrap.b32 	%r4250, %r4246, %r4245, 30;
	mov.b64 	%rd7101, {%r4250, %r4249};
	xor.b64  	%rd7102, %rd7101, %rd7100;
	shf.l.wrap.b32 	%r4251, %r4245, %r4246, 25;
	shf.l.wrap.b32 	%r4252, %r4246, %r4245, 25;
	mov.b64 	%rd7103, {%r4252, %r4251};
	xor.b64  	%rd7104, %rd7102, %rd7103;
	xor.b64  	%rd7105, %rd7084, %rd7030;
	xor.b64  	%rd7106, %rd7084, %rd7057;
	and.b64  	%rd7107, %rd7106, %rd7105;
	xor.b64  	%rd7108, %rd7107, %rd7084;
	add.s64 	%rd7109, %rd7099, %rd7108;
	add.s64 	%rd21489, %rd7109, %rd7104;
	add.s32 	%r4253, %r14352, 13;
	mul.wide.s32 	%rd7110, %r4253, 8;
	add.s64 	%rd7111, %rd6761, %rd7110;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4254,%dummy}, %rd21493;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4255}, %rd21493;
	}
	shf.r.wrap.b32 	%r4256, %r4255, %r4254, 14;
	shf.r.wrap.b32 	%r4257, %r4254, %r4255, 14;
	mov.b64 	%rd7112, {%r4257, %r4256};
	shf.r.wrap.b32 	%r4258, %r4255, %r4254, 18;
	shf.r.wrap.b32 	%r4259, %r4254, %r4255, 18;
	mov.b64 	%rd7113, {%r4259, %r4258};
	xor.b64  	%rd7114, %rd7113, %rd7112;
	shf.l.wrap.b32 	%r4260, %r4254, %r4255, 23;
	shf.l.wrap.b32 	%r4261, %r4255, %r4254, 23;
	mov.b64 	%rd7115, {%r4261, %r4260};
	xor.b64  	%rd7116, %rd7114, %rd7115;
	xor.b64  	%rd7117, %rd7073, %rd7046;
	and.b64  	%rd7118, %rd21493, %rd7117;
	xor.b64  	%rd7119, %rd7118, %rd7046;
	add.s64 	%rd7120, %rd7019, %rd21480;
	ld.const.u64 	%rd7121, [%rd7111];
	add.s64 	%rd7122, %rd7120, %rd7121;
	add.s64 	%rd7123, %rd7122, %rd7119;
	add.s64 	%rd7124, %rd7123, %rd7116;
	add.s64 	%rd21492, %rd7124, %rd7030;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4262,%dummy}, %rd21489;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4263}, %rd21489;
	}
	shf.r.wrap.b32 	%r4264, %r4263, %r4262, 28;
	shf.r.wrap.b32 	%r4265, %r4262, %r4263, 28;
	mov.b64 	%rd7125, {%r4265, %r4264};
	shf.l.wrap.b32 	%r4266, %r4262, %r4263, 30;
	shf.l.wrap.b32 	%r4267, %r4263, %r4262, 30;
	mov.b64 	%rd7126, {%r4267, %r4266};
	xor.b64  	%rd7127, %rd7126, %rd7125;
	shf.l.wrap.b32 	%r4268, %r4262, %r4263, 25;
	shf.l.wrap.b32 	%r4269, %r4263, %r4262, 25;
	mov.b64 	%rd7128, {%r4269, %r4268};
	xor.b64  	%rd7129, %rd7127, %rd7128;
	xor.b64  	%rd7130, %rd21489, %rd7057;
	xor.b64  	%rd7131, %rd21489, %rd7084;
	and.b64  	%rd7132, %rd7131, %rd7130;
	xor.b64  	%rd7133, %rd7132, %rd21489;
	add.s64 	%rd7134, %rd7124, %rd7133;
	add.s64 	%rd21488, %rd7134, %rd7129;
	add.s32 	%r4270, %r14352, 14;
	mul.wide.s32 	%rd7135, %r4270, 8;
	add.s64 	%rd7136, %rd6761, %rd7135;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4271,%dummy}, %rd21492;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4272}, %rd21492;
	}
	shf.r.wrap.b32 	%r4273, %r4272, %r4271, 14;
	shf.r.wrap.b32 	%r4274, %r4271, %r4272, 14;
	mov.b64 	%rd7137, {%r4274, %r4273};
	shf.r.wrap.b32 	%r4275, %r4272, %r4271, 18;
	shf.r.wrap.b32 	%r4276, %r4271, %r4272, 18;
	mov.b64 	%rd7138, {%r4276, %r4275};
	xor.b64  	%rd7139, %rd7138, %rd7137;
	shf.l.wrap.b32 	%r4277, %r4271, %r4272, 23;
	shf.l.wrap.b32 	%r4278, %r4272, %r4271, 23;
	mov.b64 	%rd7140, {%r4278, %r4277};
	xor.b64  	%rd7141, %rd7139, %rd7140;
	xor.b64  	%rd7142, %rd21493, %rd7073;
	and.b64  	%rd7143, %rd21492, %rd7142;
	xor.b64  	%rd7144, %rd7143, %rd7073;
	add.s64 	%rd7145, %rd7046, %rd21479;
	ld.const.u64 	%rd7146, [%rd7136];
	add.s64 	%rd7147, %rd7145, %rd7146;
	add.s64 	%rd7148, %rd7147, %rd7144;
	add.s64 	%rd7149, %rd7148, %rd7141;
	add.s64 	%rd21491, %rd7149, %rd7057;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4279,%dummy}, %rd21488;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4280}, %rd21488;
	}
	shf.r.wrap.b32 	%r4281, %r4280, %r4279, 28;
	shf.r.wrap.b32 	%r4282, %r4279, %r4280, 28;
	mov.b64 	%rd7150, {%r4282, %r4281};
	shf.l.wrap.b32 	%r4283, %r4279, %r4280, 30;
	shf.l.wrap.b32 	%r4284, %r4280, %r4279, 30;
	mov.b64 	%rd7151, {%r4284, %r4283};
	xor.b64  	%rd7152, %rd7151, %rd7150;
	shf.l.wrap.b32 	%r4285, %r4279, %r4280, 25;
	shf.l.wrap.b32 	%r4286, %r4280, %r4279, 25;
	mov.b64 	%rd7153, {%r4286, %r4285};
	xor.b64  	%rd7154, %rd7152, %rd7153;
	xor.b64  	%rd7155, %rd21488, %rd7084;
	xor.b64  	%rd7156, %rd21488, %rd21489;
	and.b64  	%rd7157, %rd7156, %rd7155;
	xor.b64  	%rd7158, %rd7157, %rd21488;
	add.s64 	%rd7159, %rd7149, %rd7158;
	add.s64 	%rd21487, %rd7159, %rd7154;
	add.s32 	%r4287, %r14352, 15;
	mul.wide.s32 	%rd7160, %r4287, 8;
	add.s64 	%rd7161, %rd6761, %rd7160;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4288,%dummy}, %rd21491;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4289}, %rd21491;
	}
	shf.r.wrap.b32 	%r4290, %r4289, %r4288, 14;
	shf.r.wrap.b32 	%r4291, %r4288, %r4289, 14;
	mov.b64 	%rd7162, {%r4291, %r4290};
	shf.r.wrap.b32 	%r4292, %r4289, %r4288, 18;
	shf.r.wrap.b32 	%r4293, %r4288, %r4289, 18;
	mov.b64 	%rd7163, {%r4293, %r4292};
	xor.b64  	%rd7164, %rd7163, %rd7162;
	shf.l.wrap.b32 	%r4294, %r4288, %r4289, 23;
	shf.l.wrap.b32 	%r4295, %r4289, %r4288, 23;
	mov.b64 	%rd7165, {%r4295, %r4294};
	xor.b64  	%rd7166, %rd7164, %rd7165;
	xor.b64  	%rd7167, %rd21492, %rd21493;
	and.b64  	%rd7168, %rd21491, %rd7167;
	xor.b64  	%rd7169, %rd7168, %rd21493;
	add.s64 	%rd7170, %rd7073, %rd21478;
	ld.const.u64 	%rd7171, [%rd7161];
	add.s64 	%rd7172, %rd7170, %rd7171;
	add.s64 	%rd7173, %rd7172, %rd7169;
	add.s64 	%rd7174, %rd7173, %rd7166;
	add.s64 	%rd21490, %rd7174, %rd7084;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4296,%dummy}, %rd21487;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4297}, %rd21487;
	}
	shf.r.wrap.b32 	%r4298, %r4297, %r4296, 28;
	shf.r.wrap.b32 	%r4299, %r4296, %r4297, 28;
	mov.b64 	%rd7175, {%r4299, %r4298};
	shf.l.wrap.b32 	%r4300, %r4296, %r4297, 30;
	shf.l.wrap.b32 	%r4301, %r4297, %r4296, 30;
	mov.b64 	%rd7176, {%r4301, %r4300};
	xor.b64  	%rd7177, %rd7176, %rd7175;
	shf.l.wrap.b32 	%r4302, %r4296, %r4297, 25;
	shf.l.wrap.b32 	%r4303, %r4297, %r4296, 25;
	mov.b64 	%rd7178, {%r4303, %r4302};
	xor.b64  	%rd7179, %rd7177, %rd7178;
	xor.b64  	%rd7180, %rd21487, %rd21489;
	xor.b64  	%rd7181, %rd21487, %rd21488;
	and.b64  	%rd7182, %rd7181, %rd7180;
	xor.b64  	%rd7183, %rd7182, %rd21487;
	add.s64 	%rd7184, %rd7174, %rd7183;
	add.s64 	%rd21486, %rd7184, %rd7179;
	add.s32 	%r14352, %r14352, 16;
	setp.lt.s32	%p62, %r14352, 80;
	@%p62 bra 	BB3_97;

	add.s64 	%rd519, %rd21462, %rd21486;
	add.s64 	%rd520, %rd21461, %rd21487;
	st.local.v2.u64 	[%rd446], {%rd519, %rd520};
	add.s64 	%rd521, %rd21460, %rd21488;
	add.s64 	%rd522, %rd21459, %rd21489;
	st.local.v2.u64 	[%rd446+16], {%rd521, %rd522};
	add.s64 	%rd523, %rd21458, %rd21490;
	add.s64 	%rd524, %rd21457, %rd21491;
	st.local.v2.u64 	[%rd446+32], {%rd523, %rd524};
	add.s64 	%rd525, %rd21456, %rd21492;
	add.s64 	%rd526, %rd21455, %rd21493;
	st.local.v2.u64 	[%rd446+48], {%rd525, %rd526};
	st.local.u64 	[%rd1], %rd1809;
	st.local.u64 	[%rd1+8], %rd1810;
	st.local.u64 	[%rd1+16], %rd1811;
	st.local.u64 	[%rd1+24], %rd1812;
	st.local.u64 	[%rd1+32], %rd1813;
	st.local.u64 	[%rd1+40], %rd1814;
	st.local.u64 	[%rd1+48], %rd1815;
	st.local.u64 	[%rd1+56], %rd1816;
	st.local.u32 	[%rd1+192], %r2;
	@%p2 bra 	BB3_110;
	bra.uni 	BB3_99;

BB3_110:
	setp.lt.s32	%p72, %r2, 1;
	@%p72 bra 	BB3_120;

	cvta.to.local.u64 	%rd612, %rd1805;
	and.b32  	%r149, %r2, 3;
	setp.eq.s32	%p73, %r149, 0;
	mov.u32 	%r14361, 0;
	@%p73 bra 	BB3_117;

	setp.eq.s32	%p74, %r149, 1;
	mov.u32 	%r14359, 0;
	@%p74 bra 	BB3_116;

	setp.eq.s32	%p75, %r149, 2;
	mov.u32 	%r14358, 0;
	@%p75 bra 	BB3_115;

	ld.local.u8 	%rs107, [%rd612+7];
	st.local.u8 	[%rd179+7], %rs107;
	mov.u32 	%r14358, 1;

BB3_115:
	xor.b32  	%r5072, %r14358, 7;
	cvt.u64.u32	%rd8297, %r5072;
	add.s64 	%rd8298, %rd612, %rd8297;
	ld.local.u8 	%rs108, [%rd8298];
	add.s64 	%rd8299, %rd179, %rd8297;
	st.local.u8 	[%rd8299], %rs108;
	add.s32 	%r14359, %r14358, 1;

BB3_116:
	xor.b32  	%r5073, %r14359, 7;
	cvt.s64.s32	%rd8300, %r5073;
	add.s64 	%rd8301, %rd612, %rd8300;
	ld.local.u8 	%rs109, [%rd8301];
	add.s64 	%rd8302, %rd179, %rd8300;
	st.local.u8 	[%rd8302], %rs109;
	add.s32 	%r14361, %r14359, 1;

BB3_117:
	setp.lt.u32	%p76, %r2, 4;
	@%p76 bra 	BB3_120;

	mov.u32 	%r14362, %r14361;

BB3_119:
	xor.b32  	%r5074, %r14362, 7;
	cvt.s64.s32	%rd8303, %r5074;
	add.s64 	%rd8304, %rd612, %rd8303;
	ld.local.u8 	%rs110, [%rd8304];
	xor.b32  	%r5075, %r14361, 7;
	cvt.s64.s32	%rd8305, %r5075;
	add.s64 	%rd8306, %rd179, %rd8305;
	st.local.u8 	[%rd8306], %rs110;
	add.s32 	%r5076, %r14362, 1;
	xor.b32  	%r5077, %r5076, 7;
	cvt.s64.s32	%rd8307, %r5077;
	add.s64 	%rd8308, %rd612, %rd8307;
	ld.local.u8 	%rs111, [%rd8308];
	add.s32 	%r5078, %r14361, 1;
	xor.b32  	%r5079, %r5078, 7;
	cvt.s64.s32	%rd8309, %r5079;
	add.s64 	%rd8310, %rd179, %rd8309;
	st.local.u8 	[%rd8310], %rs111;
	add.s32 	%r5080, %r14362, 2;
	xor.b32  	%r5081, %r5080, 7;
	cvt.s64.s32	%rd8311, %r5081;
	add.s64 	%rd8312, %rd612, %rd8311;
	ld.local.u8 	%rs112, [%rd8312];
	add.s32 	%r5082, %r14361, 2;
	xor.b32  	%r5083, %r5082, 7;
	cvt.s64.s32	%rd8313, %r5083;
	add.s64 	%rd8314, %rd179, %rd8313;
	st.local.u8 	[%rd8314], %rs112;
	add.s32 	%r5084, %r14362, 3;
	xor.b32  	%r5085, %r5084, 7;
	cvt.s64.s32	%rd8315, %r5085;
	add.s64 	%rd8316, %rd612, %rd8315;
	ld.local.u8 	%rs113, [%rd8316];
	add.s32 	%r5086, %r14361, 3;
	xor.b32  	%r5087, %r5086, 7;
	cvt.s64.s32	%rd8317, %r5087;
	add.s64 	%rd8318, %rd179, %rd8317;
	st.local.u8 	[%rd8318], %rs113;
	add.s32 	%r14362, %r14362, 4;
	setp.lt.s32	%p77, %r14362, %r2;
	add.s32 	%r14361, %r14361, 4;
	@%p77 bra 	BB3_119;
	bra.uni 	BB3_120;

BB3_99:
	cvta.to.local.u64 	%rd527, %rd1805;
	mov.u32 	%r14353, 0;
	mov.u64 	%rd21502, %rd527;
	mov.u64 	%rd21503, %rd1;

BB3_100:
	ld.local.u8 	%rs85, [%rd21502+7];
	st.local.u8 	[%rd21503+71], %rs85;
	add.s32 	%r4305, %r14353, 1;
	xor.b32  	%r4306, %r4305, 7;
	cvt.s64.s32	%rd7196, %r4306;
	add.s64 	%rd7197, %rd527, %rd7196;
	ld.local.u8 	%rs86, [%rd7197];
	add.s64 	%rd7198, %rd179, %rd7196;
	st.local.u8 	[%rd7198], %rs86;
	add.s32 	%r4307, %r14353, 2;
	xor.b32  	%r4308, %r4307, 7;
	cvt.s64.s32	%rd7199, %r4308;
	add.s64 	%rd7200, %rd527, %rd7199;
	ld.local.u8 	%rs87, [%rd7200];
	add.s64 	%rd7201, %rd179, %rd7199;
	st.local.u8 	[%rd7201], %rs87;
	add.s32 	%r4309, %r14353, 3;
	xor.b32  	%r4310, %r4309, 7;
	cvt.s64.s32	%rd7202, %r4310;
	add.s64 	%rd7203, %rd527, %rd7202;
	ld.local.u8 	%rs88, [%rd7203];
	add.s64 	%rd7204, %rd179, %rd7202;
	st.local.u8 	[%rd7204], %rs88;
	add.s32 	%r4311, %r14353, 4;
	xor.b32  	%r4312, %r4311, 7;
	cvt.s64.s32	%rd7205, %r4312;
	add.s64 	%rd7206, %rd527, %rd7205;
	ld.local.u8 	%rs89, [%rd7206];
	add.s64 	%rd7207, %rd179, %rd7205;
	st.local.u8 	[%rd7207], %rs89;
	add.s32 	%r4313, %r14353, 5;
	xor.b32  	%r4314, %r4313, 7;
	cvt.s64.s32	%rd7208, %r4314;
	add.s64 	%rd7209, %rd527, %rd7208;
	ld.local.u8 	%rs90, [%rd7209];
	add.s64 	%rd7210, %rd179, %rd7208;
	st.local.u8 	[%rd7210], %rs90;
	add.s32 	%r4315, %r14353, 6;
	xor.b32  	%r4316, %r4315, 7;
	cvt.s64.s32	%rd7211, %r4316;
	add.s64 	%rd7212, %rd527, %rd7211;
	ld.local.u8 	%rs91, [%rd7212];
	add.s64 	%rd7213, %rd179, %rd7211;
	st.local.u8 	[%rd7213], %rs91;
	add.s32 	%r4317, %r14353, 7;
	and.b32  	%r4318, %r4317, -16;
	cvt.s64.s32	%rd7214, %r4318;
	add.s64 	%rd7215, %rd527, %rd7214;
	ld.local.u8 	%rs92, [%rd7215];
	add.s64 	%rd7216, %rd179, %rd7214;
	st.local.u8 	[%rd7216], %rs92;
	ld.local.u8 	%rs93, [%rd21502+15];
	st.local.u8 	[%rd21503+79], %rs93;
	add.s32 	%r4319, %r14353, 9;
	xor.b32  	%r4320, %r4319, 7;
	cvt.s64.s32	%rd7217, %r4320;
	add.s64 	%rd7218, %rd527, %rd7217;
	ld.local.u8 	%rs94, [%rd7218];
	add.s64 	%rd7219, %rd179, %rd7217;
	st.local.u8 	[%rd7219], %rs94;
	add.s32 	%r4321, %r14353, 10;
	xor.b32  	%r4322, %r4321, 7;
	cvt.s64.s32	%rd7220, %r4322;
	add.s64 	%rd7221, %rd527, %rd7220;
	ld.local.u8 	%rs95, [%rd7221];
	add.s64 	%rd7222, %rd179, %rd7220;
	st.local.u8 	[%rd7222], %rs95;
	add.s32 	%r4323, %r14353, 11;
	xor.b32  	%r4324, %r4323, 7;
	cvt.s64.s32	%rd7223, %r4324;
	add.s64 	%rd7224, %rd527, %rd7223;
	ld.local.u8 	%rs96, [%rd7224];
	add.s64 	%rd7225, %rd179, %rd7223;
	st.local.u8 	[%rd7225], %rs96;
	add.s32 	%r4325, %r14353, 12;
	xor.b32  	%r4326, %r4325, 7;
	cvt.s64.s32	%rd7226, %r4326;
	add.s64 	%rd7227, %rd527, %rd7226;
	ld.local.u8 	%rs97, [%rd7227];
	add.s64 	%rd7228, %rd179, %rd7226;
	st.local.u8 	[%rd7228], %rs97;
	add.s32 	%r4327, %r14353, 13;
	xor.b32  	%r4328, %r4327, 7;
	cvt.s64.s32	%rd7229, %r4328;
	add.s64 	%rd7230, %rd527, %rd7229;
	ld.local.u8 	%rs98, [%rd7230];
	add.s64 	%rd7231, %rd179, %rd7229;
	st.local.u8 	[%rd7231], %rs98;
	add.s32 	%r4329, %r14353, 14;
	xor.b32  	%r4330, %r4329, 7;
	cvt.s64.s32	%rd7232, %r4330;
	add.s64 	%rd7233, %rd527, %rd7232;
	ld.local.u8 	%rs99, [%rd7233];
	add.s64 	%rd7234, %rd179, %rd7232;
	st.local.u8 	[%rd7234], %rs99;
	add.s32 	%r4331, %r14353, 15;
	and.b32  	%r4332, %r4331, -8;
	cvt.s64.s32	%rd7235, %r4332;
	add.s64 	%rd7236, %rd527, %rd7235;
	ld.local.u8 	%rs100, [%rd7236];
	add.s64 	%rd7237, %rd179, %rd7235;
	st.local.u8 	[%rd7237], %rs100;
	add.s64 	%rd21503, %rd21503, 16;
	add.s64 	%rd21502, %rd21502, 16;
	add.s32 	%r14353, %r14353, 16;
	setp.ne.s32	%p64, %r14353, 128;
	@%p64 bra 	BB3_100;

	ld.local.u64 	%rd7238, [%rd1+64];
	shr.u64 	%rd7239, %rd7238, 32;
	ld.local.u64 	%rd7240, [%rd1+72];
	shr.u64 	%rd7241, %rd7240, 32;
	ld.local.u64 	%rd7242, [%rd1+80];
	shr.u64 	%rd7243, %rd7242, 32;
	ld.local.u64 	%rd7244, [%rd1+88];
	shr.u64 	%rd7245, %rd7244, 32;
	ld.local.u64 	%rd7246, [%rd1+96];
	shr.u64 	%rd7247, %rd7246, 32;
	ld.local.u64 	%rd7248, [%rd1+104];
	shr.u64 	%rd7249, %rd7248, 32;
	ld.local.u64 	%rd7250, [%rd1+112];
	shr.u64 	%rd7251, %rd7250, 32;
	ld.local.u64 	%rd7252, [%rd1+120];
	shr.u64 	%rd7253, %rd7252, 32;
	ld.local.u64 	%rd7254, [%rd1+128];
	shr.u64 	%rd7255, %rd7254, 32;
	ld.local.u64 	%rd7256, [%rd1+136];
	shr.u64 	%rd7257, %rd7256, 32;
	ld.local.u64 	%rd7258, [%rd1+144];
	shr.u64 	%rd7259, %rd7258, 32;
	ld.local.u64 	%rd7260, [%rd1+152];
	shr.u64 	%rd7261, %rd7260, 32;
	ld.local.u64 	%rd7262, [%rd1+160];
	shr.u64 	%rd7263, %rd7262, 32;
	ld.local.u64 	%rd7264, [%rd1+168];
	shr.u64 	%rd7265, %rd7264, 32;
	ld.local.u64 	%rd7266, [%rd1+176];
	shr.u64 	%rd7267, %rd7266, 32;
	ld.local.u64 	%rd7268, [%rd1+184];
	shr.u64 	%rd7269, %rd7268, 32;
	bfi.b64 	%rd21520, %rd7239, %rd7238, 32, 32;
	bfi.b64 	%rd21521, %rd7241, %rd7240, 32, 32;
	bfi.b64 	%rd21522, %rd7243, %rd7242, 32, 32;
	bfi.b64 	%rd21523, %rd7245, %rd7244, 32, 32;
	bfi.b64 	%rd21524, %rd7247, %rd7246, 32, 32;
	bfi.b64 	%rd21525, %rd7249, %rd7248, 32, 32;
	bfi.b64 	%rd21526, %rd7251, %rd7250, 32, 32;
	bfi.b64 	%rd21527, %rd7253, %rd7252, 32, 32;
	bfi.b64 	%rd21511, %rd7255, %rd7254, 32, 32;
	bfi.b64 	%rd21510, %rd7257, %rd7256, 32, 32;
	bfi.b64 	%rd21509, %rd7259, %rd7258, 32, 32;
	bfi.b64 	%rd21508, %rd7261, %rd7260, 32, 32;
	bfi.b64 	%rd21507, %rd7263, %rd7262, 32, 32;
	bfi.b64 	%rd21506, %rd7265, %rd7264, 32, 32;
	bfi.b64 	%rd21505, %rd7267, %rd7266, 32, 32;
	bfi.b64 	%rd21504, %rd7269, %rd7268, 32, 32;
	ld.local.u64 	%rd548, [%rd1+32];
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4334,%dummy}, %rd548;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4335}, %rd548;
	}
	shf.r.wrap.b32 	%r4336, %r4335, %r4334, 14;
	shf.r.wrap.b32 	%r4337, %r4334, %r4335, 14;
	mov.b64 	%rd7270, {%r4337, %r4336};
	shf.r.wrap.b32 	%r4338, %r4335, %r4334, 18;
	shf.r.wrap.b32 	%r4339, %r4334, %r4335, 18;
	mov.b64 	%rd7271, {%r4339, %r4338};
	xor.b64  	%rd7272, %rd7271, %rd7270;
	shf.l.wrap.b32 	%r4340, %r4334, %r4335, 23;
	shf.l.wrap.b32 	%r4341, %r4335, %r4334, 23;
	mov.b64 	%rd7273, {%r4341, %r4340};
	xor.b64  	%rd7274, %rd7272, %rd7273;
	ld.local.u64 	%rd549, [%rd1+48];
	ld.local.u64 	%rd550, [%rd1+40];
	xor.b64  	%rd7275, %rd549, %rd550;
	and.b64  	%rd7276, %rd7275, %rd548;
	xor.b64  	%rd7277, %rd7276, %rd549;
	ld.local.u64 	%rd551, [%rd1+56];
	add.s64 	%rd7278, %rd551, %rd21520;
	add.s64 	%rd7279, %rd7278, %rd21454;
	add.s64 	%rd7280, %rd7279, %rd7277;
	add.s64 	%rd7281, %rd7280, %rd7274;
	ld.local.u64 	%rd552, [%rd1+24];
	add.s64 	%rd7282, %rd7281, %rd552;
	ld.local.u64 	%rd553, [%rd1];
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4342,%dummy}, %rd553;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4343}, %rd553;
	}
	shf.r.wrap.b32 	%r4344, %r4343, %r4342, 28;
	shf.r.wrap.b32 	%r4345, %r4342, %r4343, 28;
	mov.b64 	%rd7283, {%r4345, %r4344};
	shf.l.wrap.b32 	%r4346, %r4342, %r4343, 30;
	shf.l.wrap.b32 	%r4347, %r4343, %r4342, 30;
	mov.b64 	%rd7284, {%r4347, %r4346};
	xor.b64  	%rd7285, %rd7284, %rd7283;
	shf.l.wrap.b32 	%r4348, %r4342, %r4343, 25;
	shf.l.wrap.b32 	%r4349, %r4343, %r4342, 25;
	mov.b64 	%rd7286, {%r4349, %r4348};
	xor.b64  	%rd7287, %rd7285, %rd7286;
	ld.local.u64 	%rd554, [%rd1+16];
	xor.b64  	%rd7288, %rd554, %rd553;
	ld.local.u64 	%rd555, [%rd1+8];
	xor.b64  	%rd7289, %rd555, %rd553;
	and.b64  	%rd7290, %rd7288, %rd7289;
	xor.b64  	%rd7291, %rd7290, %rd553;
	add.s64 	%rd7292, %rd7281, %rd7291;
	add.s64 	%rd7293, %rd7292, %rd7287;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4350,%dummy}, %rd7282;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4351}, %rd7282;
	}
	shf.r.wrap.b32 	%r4352, %r4351, %r4350, 14;
	shf.r.wrap.b32 	%r4353, %r4350, %r4351, 14;
	mov.b64 	%rd7294, {%r4353, %r4352};
	shf.r.wrap.b32 	%r4354, %r4351, %r4350, 18;
	shf.r.wrap.b32 	%r4355, %r4350, %r4351, 18;
	mov.b64 	%rd7295, {%r4355, %r4354};
	xor.b64  	%rd7296, %rd7295, %rd7294;
	shf.l.wrap.b32 	%r4356, %r4350, %r4351, 23;
	shf.l.wrap.b32 	%r4357, %r4351, %r4350, 23;
	mov.b64 	%rd7297, {%r4357, %r4356};
	xor.b64  	%rd7298, %rd7296, %rd7297;
	xor.b64  	%rd7299, %rd550, %rd548;
	and.b64  	%rd7300, %rd7282, %rd7299;
	xor.b64  	%rd7301, %rd7300, %rd550;
	add.s64 	%rd7302, %rd549, %rd21521;
	add.s64 	%rd7303, %rd7302, %rd21453;
	add.s64 	%rd7304, %rd7303, %rd7301;
	add.s64 	%rd7305, %rd7304, %rd7298;
	add.s64 	%rd7306, %rd7305, %rd554;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4358,%dummy}, %rd7293;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4359}, %rd7293;
	}
	shf.r.wrap.b32 	%r4360, %r4359, %r4358, 28;
	shf.r.wrap.b32 	%r4361, %r4358, %r4359, 28;
	mov.b64 	%rd7307, {%r4361, %r4360};
	shf.l.wrap.b32 	%r4362, %r4358, %r4359, 30;
	shf.l.wrap.b32 	%r4363, %r4359, %r4358, 30;
	mov.b64 	%rd7308, {%r4363, %r4362};
	xor.b64  	%rd7309, %rd7308, %rd7307;
	shf.l.wrap.b32 	%r4364, %r4358, %r4359, 25;
	shf.l.wrap.b32 	%r4365, %r4359, %r4358, 25;
	mov.b64 	%rd7310, {%r4365, %r4364};
	xor.b64  	%rd7311, %rd7309, %rd7310;
	xor.b64  	%rd7312, %rd7293, %rd555;
	xor.b64  	%rd7313, %rd7293, %rd553;
	and.b64  	%rd7314, %rd7313, %rd7312;
	xor.b64  	%rd7315, %rd7314, %rd7293;
	add.s64 	%rd7316, %rd7305, %rd7315;
	add.s64 	%rd7317, %rd7316, %rd7311;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4366,%dummy}, %rd7306;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4367}, %rd7306;
	}
	shf.r.wrap.b32 	%r4368, %r4367, %r4366, 14;
	shf.r.wrap.b32 	%r4369, %r4366, %r4367, 14;
	mov.b64 	%rd7318, {%r4369, %r4368};
	shf.r.wrap.b32 	%r4370, %r4367, %r4366, 18;
	shf.r.wrap.b32 	%r4371, %r4366, %r4367, 18;
	mov.b64 	%rd7319, {%r4371, %r4370};
	xor.b64  	%rd7320, %rd7319, %rd7318;
	shf.l.wrap.b32 	%r4372, %r4366, %r4367, 23;
	shf.l.wrap.b32 	%r4373, %r4367, %r4366, 23;
	mov.b64 	%rd7321, {%r4373, %r4372};
	xor.b64  	%rd7322, %rd7320, %rd7321;
	xor.b64  	%rd7323, %rd7282, %rd548;
	and.b64  	%rd7324, %rd7306, %rd7323;
	xor.b64  	%rd7325, %rd7324, %rd548;
	add.s64 	%rd7326, %rd550, %rd21522;
	add.s64 	%rd7327, %rd7326, %rd21452;
	add.s64 	%rd7328, %rd7327, %rd7325;
	add.s64 	%rd7329, %rd7328, %rd7322;
	add.s64 	%rd7330, %rd7329, %rd555;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4374,%dummy}, %rd7317;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4375}, %rd7317;
	}
	shf.r.wrap.b32 	%r4376, %r4375, %r4374, 28;
	shf.r.wrap.b32 	%r4377, %r4374, %r4375, 28;
	mov.b64 	%rd7331, {%r4377, %r4376};
	shf.l.wrap.b32 	%r4378, %r4374, %r4375, 30;
	shf.l.wrap.b32 	%r4379, %r4375, %r4374, 30;
	mov.b64 	%rd7332, {%r4379, %r4378};
	xor.b64  	%rd7333, %rd7332, %rd7331;
	shf.l.wrap.b32 	%r4380, %r4374, %r4375, 25;
	shf.l.wrap.b32 	%r4381, %r4375, %r4374, 25;
	mov.b64 	%rd7334, {%r4381, %r4380};
	xor.b64  	%rd7335, %rd7333, %rd7334;
	xor.b64  	%rd7336, %rd7317, %rd553;
	xor.b64  	%rd7337, %rd7317, %rd7293;
	and.b64  	%rd7338, %rd7337, %rd7336;
	xor.b64  	%rd7339, %rd7338, %rd7317;
	add.s64 	%rd7340, %rd7329, %rd7339;
	add.s64 	%rd7341, %rd7340, %rd7335;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4382,%dummy}, %rd7330;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4383}, %rd7330;
	}
	shf.r.wrap.b32 	%r4384, %r4383, %r4382, 14;
	shf.r.wrap.b32 	%r4385, %r4382, %r4383, 14;
	mov.b64 	%rd7342, {%r4385, %r4384};
	shf.r.wrap.b32 	%r4386, %r4383, %r4382, 18;
	shf.r.wrap.b32 	%r4387, %r4382, %r4383, 18;
	mov.b64 	%rd7343, {%r4387, %r4386};
	xor.b64  	%rd7344, %rd7343, %rd7342;
	shf.l.wrap.b32 	%r4388, %r4382, %r4383, 23;
	shf.l.wrap.b32 	%r4389, %r4383, %r4382, 23;
	mov.b64 	%rd7345, {%r4389, %r4388};
	xor.b64  	%rd7346, %rd7344, %rd7345;
	xor.b64  	%rd7347, %rd7306, %rd7282;
	and.b64  	%rd7348, %rd7330, %rd7347;
	xor.b64  	%rd7349, %rd7348, %rd7282;
	add.s64 	%rd7350, %rd548, %rd21523;
	add.s64 	%rd7351, %rd7350, %rd21451;
	add.s64 	%rd7352, %rd7351, %rd7349;
	add.s64 	%rd7353, %rd7352, %rd7346;
	add.s64 	%rd7354, %rd7353, %rd553;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4390,%dummy}, %rd7341;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4391}, %rd7341;
	}
	shf.r.wrap.b32 	%r4392, %r4391, %r4390, 28;
	shf.r.wrap.b32 	%r4393, %r4390, %r4391, 28;
	mov.b64 	%rd7355, {%r4393, %r4392};
	shf.l.wrap.b32 	%r4394, %r4390, %r4391, 30;
	shf.l.wrap.b32 	%r4395, %r4391, %r4390, 30;
	mov.b64 	%rd7356, {%r4395, %r4394};
	xor.b64  	%rd7357, %rd7356, %rd7355;
	shf.l.wrap.b32 	%r4396, %r4390, %r4391, 25;
	shf.l.wrap.b32 	%r4397, %r4391, %r4390, 25;
	mov.b64 	%rd7358, {%r4397, %r4396};
	xor.b64  	%rd7359, %rd7357, %rd7358;
	xor.b64  	%rd7360, %rd7341, %rd7293;
	xor.b64  	%rd7361, %rd7341, %rd7317;
	and.b64  	%rd7362, %rd7361, %rd7360;
	xor.b64  	%rd7363, %rd7362, %rd7341;
	add.s64 	%rd7364, %rd7353, %rd7363;
	add.s64 	%rd7365, %rd7364, %rd7359;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4398,%dummy}, %rd7354;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4399}, %rd7354;
	}
	shf.r.wrap.b32 	%r4400, %r4399, %r4398, 14;
	shf.r.wrap.b32 	%r4401, %r4398, %r4399, 14;
	mov.b64 	%rd7366, {%r4401, %r4400};
	shf.r.wrap.b32 	%r4402, %r4399, %r4398, 18;
	shf.r.wrap.b32 	%r4403, %r4398, %r4399, 18;
	mov.b64 	%rd7367, {%r4403, %r4402};
	xor.b64  	%rd7368, %rd7367, %rd7366;
	shf.l.wrap.b32 	%r4404, %r4398, %r4399, 23;
	shf.l.wrap.b32 	%r4405, %r4399, %r4398, 23;
	mov.b64 	%rd7369, {%r4405, %r4404};
	xor.b64  	%rd7370, %rd7368, %rd7369;
	xor.b64  	%rd7371, %rd7330, %rd7306;
	and.b64  	%rd7372, %rd7354, %rd7371;
	xor.b64  	%rd7373, %rd7372, %rd7306;
	add.s64 	%rd7374, %rd7282, %rd21524;
	add.s64 	%rd7375, %rd7374, %rd21450;
	add.s64 	%rd7376, %rd7375, %rd7373;
	add.s64 	%rd7377, %rd7376, %rd7370;
	add.s64 	%rd7378, %rd7377, %rd7293;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4406,%dummy}, %rd7365;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4407}, %rd7365;
	}
	shf.r.wrap.b32 	%r4408, %r4407, %r4406, 28;
	shf.r.wrap.b32 	%r4409, %r4406, %r4407, 28;
	mov.b64 	%rd7379, {%r4409, %r4408};
	shf.l.wrap.b32 	%r4410, %r4406, %r4407, 30;
	shf.l.wrap.b32 	%r4411, %r4407, %r4406, 30;
	mov.b64 	%rd7380, {%r4411, %r4410};
	xor.b64  	%rd7381, %rd7380, %rd7379;
	shf.l.wrap.b32 	%r4412, %r4406, %r4407, 25;
	shf.l.wrap.b32 	%r4413, %r4407, %r4406, 25;
	mov.b64 	%rd7382, {%r4413, %r4412};
	xor.b64  	%rd7383, %rd7381, %rd7382;
	xor.b64  	%rd7384, %rd7365, %rd7317;
	xor.b64  	%rd7385, %rd7365, %rd7341;
	and.b64  	%rd7386, %rd7385, %rd7384;
	xor.b64  	%rd7387, %rd7386, %rd7365;
	add.s64 	%rd7388, %rd7377, %rd7387;
	add.s64 	%rd7389, %rd7388, %rd7383;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4414,%dummy}, %rd7378;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4415}, %rd7378;
	}
	shf.r.wrap.b32 	%r4416, %r4415, %r4414, 14;
	shf.r.wrap.b32 	%r4417, %r4414, %r4415, 14;
	mov.b64 	%rd7390, {%r4417, %r4416};
	shf.r.wrap.b32 	%r4418, %r4415, %r4414, 18;
	shf.r.wrap.b32 	%r4419, %r4414, %r4415, 18;
	mov.b64 	%rd7391, {%r4419, %r4418};
	xor.b64  	%rd7392, %rd7391, %rd7390;
	shf.l.wrap.b32 	%r4420, %r4414, %r4415, 23;
	shf.l.wrap.b32 	%r4421, %r4415, %r4414, 23;
	mov.b64 	%rd7393, {%r4421, %r4420};
	xor.b64  	%rd7394, %rd7392, %rd7393;
	xor.b64  	%rd7395, %rd7354, %rd7330;
	and.b64  	%rd7396, %rd7378, %rd7395;
	xor.b64  	%rd7397, %rd7396, %rd7330;
	add.s64 	%rd7398, %rd7306, %rd21525;
	add.s64 	%rd7399, %rd7398, %rd21449;
	add.s64 	%rd7400, %rd7399, %rd7397;
	add.s64 	%rd7401, %rd7400, %rd7394;
	add.s64 	%rd7402, %rd7401, %rd7317;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4422,%dummy}, %rd7389;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4423}, %rd7389;
	}
	shf.r.wrap.b32 	%r4424, %r4423, %r4422, 28;
	shf.r.wrap.b32 	%r4425, %r4422, %r4423, 28;
	mov.b64 	%rd7403, {%r4425, %r4424};
	shf.l.wrap.b32 	%r4426, %r4422, %r4423, 30;
	shf.l.wrap.b32 	%r4427, %r4423, %r4422, 30;
	mov.b64 	%rd7404, {%r4427, %r4426};
	xor.b64  	%rd7405, %rd7404, %rd7403;
	shf.l.wrap.b32 	%r4428, %r4422, %r4423, 25;
	shf.l.wrap.b32 	%r4429, %r4423, %r4422, 25;
	mov.b64 	%rd7406, {%r4429, %r4428};
	xor.b64  	%rd7407, %rd7405, %rd7406;
	xor.b64  	%rd7408, %rd7389, %rd7341;
	xor.b64  	%rd7409, %rd7389, %rd7365;
	and.b64  	%rd7410, %rd7409, %rd7408;
	xor.b64  	%rd7411, %rd7410, %rd7389;
	add.s64 	%rd7412, %rd7401, %rd7411;
	add.s64 	%rd7413, %rd7412, %rd7407;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4430,%dummy}, %rd7402;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4431}, %rd7402;
	}
	shf.r.wrap.b32 	%r4432, %r4431, %r4430, 14;
	shf.r.wrap.b32 	%r4433, %r4430, %r4431, 14;
	mov.b64 	%rd7414, {%r4433, %r4432};
	shf.r.wrap.b32 	%r4434, %r4431, %r4430, 18;
	shf.r.wrap.b32 	%r4435, %r4430, %r4431, 18;
	mov.b64 	%rd7415, {%r4435, %r4434};
	xor.b64  	%rd7416, %rd7415, %rd7414;
	shf.l.wrap.b32 	%r4436, %r4430, %r4431, 23;
	shf.l.wrap.b32 	%r4437, %r4431, %r4430, 23;
	mov.b64 	%rd7417, {%r4437, %r4436};
	xor.b64  	%rd7418, %rd7416, %rd7417;
	xor.b64  	%rd7419, %rd7378, %rd7354;
	and.b64  	%rd7420, %rd7402, %rd7419;
	xor.b64  	%rd7421, %rd7420, %rd7354;
	add.s64 	%rd7422, %rd7330, %rd21526;
	add.s64 	%rd7423, %rd7422, %rd21448;
	add.s64 	%rd7424, %rd7423, %rd7421;
	add.s64 	%rd7425, %rd7424, %rd7418;
	add.s64 	%rd7426, %rd7425, %rd7341;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4438,%dummy}, %rd7413;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4439}, %rd7413;
	}
	shf.r.wrap.b32 	%r4440, %r4439, %r4438, 28;
	shf.r.wrap.b32 	%r4441, %r4438, %r4439, 28;
	mov.b64 	%rd7427, {%r4441, %r4440};
	shf.l.wrap.b32 	%r4442, %r4438, %r4439, 30;
	shf.l.wrap.b32 	%r4443, %r4439, %r4438, 30;
	mov.b64 	%rd7428, {%r4443, %r4442};
	xor.b64  	%rd7429, %rd7428, %rd7427;
	shf.l.wrap.b32 	%r4444, %r4438, %r4439, 25;
	shf.l.wrap.b32 	%r4445, %r4439, %r4438, 25;
	mov.b64 	%rd7430, {%r4445, %r4444};
	xor.b64  	%rd7431, %rd7429, %rd7430;
	xor.b64  	%rd7432, %rd7413, %rd7365;
	xor.b64  	%rd7433, %rd7413, %rd7389;
	and.b64  	%rd7434, %rd7433, %rd7432;
	xor.b64  	%rd7435, %rd7434, %rd7413;
	add.s64 	%rd7436, %rd7425, %rd7435;
	add.s64 	%rd7437, %rd7436, %rd7431;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4446,%dummy}, %rd7426;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4447}, %rd7426;
	}
	shf.r.wrap.b32 	%r4448, %r4447, %r4446, 14;
	shf.r.wrap.b32 	%r4449, %r4446, %r4447, 14;
	mov.b64 	%rd7438, {%r4449, %r4448};
	shf.r.wrap.b32 	%r4450, %r4447, %r4446, 18;
	shf.r.wrap.b32 	%r4451, %r4446, %r4447, 18;
	mov.b64 	%rd7439, {%r4451, %r4450};
	xor.b64  	%rd7440, %rd7439, %rd7438;
	shf.l.wrap.b32 	%r4452, %r4446, %r4447, 23;
	shf.l.wrap.b32 	%r4453, %r4447, %r4446, 23;
	mov.b64 	%rd7441, {%r4453, %r4452};
	xor.b64  	%rd7442, %rd7440, %rd7441;
	xor.b64  	%rd7443, %rd7402, %rd7378;
	and.b64  	%rd7444, %rd7426, %rd7443;
	xor.b64  	%rd7445, %rd7444, %rd7378;
	add.s64 	%rd7446, %rd7354, %rd21527;
	add.s64 	%rd7447, %rd7446, %rd21447;
	add.s64 	%rd7448, %rd7447, %rd7445;
	add.s64 	%rd7449, %rd7448, %rd7442;
	add.s64 	%rd7450, %rd7449, %rd7365;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4454,%dummy}, %rd7437;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4455}, %rd7437;
	}
	shf.r.wrap.b32 	%r4456, %r4455, %r4454, 28;
	shf.r.wrap.b32 	%r4457, %r4454, %r4455, 28;
	mov.b64 	%rd7451, {%r4457, %r4456};
	shf.l.wrap.b32 	%r4458, %r4454, %r4455, 30;
	shf.l.wrap.b32 	%r4459, %r4455, %r4454, 30;
	mov.b64 	%rd7452, {%r4459, %r4458};
	xor.b64  	%rd7453, %rd7452, %rd7451;
	shf.l.wrap.b32 	%r4460, %r4454, %r4455, 25;
	shf.l.wrap.b32 	%r4461, %r4455, %r4454, 25;
	mov.b64 	%rd7454, {%r4461, %r4460};
	xor.b64  	%rd7455, %rd7453, %rd7454;
	xor.b64  	%rd7456, %rd7437, %rd7389;
	xor.b64  	%rd7457, %rd7437, %rd7413;
	and.b64  	%rd7458, %rd7457, %rd7456;
	xor.b64  	%rd7459, %rd7458, %rd7437;
	add.s64 	%rd7460, %rd7449, %rd7459;
	add.s64 	%rd7461, %rd7460, %rd7455;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4462,%dummy}, %rd7450;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4463}, %rd7450;
	}
	shf.r.wrap.b32 	%r4464, %r4463, %r4462, 14;
	shf.r.wrap.b32 	%r4465, %r4462, %r4463, 14;
	mov.b64 	%rd7462, {%r4465, %r4464};
	shf.r.wrap.b32 	%r4466, %r4463, %r4462, 18;
	shf.r.wrap.b32 	%r4467, %r4462, %r4463, 18;
	mov.b64 	%rd7463, {%r4467, %r4466};
	xor.b64  	%rd7464, %rd7463, %rd7462;
	shf.l.wrap.b32 	%r4468, %r4462, %r4463, 23;
	shf.l.wrap.b32 	%r4469, %r4463, %r4462, 23;
	mov.b64 	%rd7465, {%r4469, %r4468};
	xor.b64  	%rd7466, %rd7464, %rd7465;
	xor.b64  	%rd7467, %rd7426, %rd7402;
	and.b64  	%rd7468, %rd7450, %rd7467;
	xor.b64  	%rd7469, %rd7468, %rd7402;
	add.s64 	%rd7470, %rd7378, %rd21511;
	add.s64 	%rd7471, %rd7470, %rd21446;
	add.s64 	%rd7472, %rd7471, %rd7469;
	add.s64 	%rd7473, %rd7472, %rd7466;
	add.s64 	%rd7474, %rd7473, %rd7389;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4470,%dummy}, %rd7461;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4471}, %rd7461;
	}
	shf.r.wrap.b32 	%r4472, %r4471, %r4470, 28;
	shf.r.wrap.b32 	%r4473, %r4470, %r4471, 28;
	mov.b64 	%rd7475, {%r4473, %r4472};
	shf.l.wrap.b32 	%r4474, %r4470, %r4471, 30;
	shf.l.wrap.b32 	%r4475, %r4471, %r4470, 30;
	mov.b64 	%rd7476, {%r4475, %r4474};
	xor.b64  	%rd7477, %rd7476, %rd7475;
	shf.l.wrap.b32 	%r4476, %r4470, %r4471, 25;
	shf.l.wrap.b32 	%r4477, %r4471, %r4470, 25;
	mov.b64 	%rd7478, {%r4477, %r4476};
	xor.b64  	%rd7479, %rd7477, %rd7478;
	xor.b64  	%rd7480, %rd7461, %rd7413;
	xor.b64  	%rd7481, %rd7461, %rd7437;
	and.b64  	%rd7482, %rd7481, %rd7480;
	xor.b64  	%rd7483, %rd7482, %rd7461;
	add.s64 	%rd7484, %rd7473, %rd7483;
	add.s64 	%rd7485, %rd7484, %rd7479;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4478,%dummy}, %rd7474;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4479}, %rd7474;
	}
	shf.r.wrap.b32 	%r4480, %r4479, %r4478, 14;
	shf.r.wrap.b32 	%r4481, %r4478, %r4479, 14;
	mov.b64 	%rd7486, {%r4481, %r4480};
	shf.r.wrap.b32 	%r4482, %r4479, %r4478, 18;
	shf.r.wrap.b32 	%r4483, %r4478, %r4479, 18;
	mov.b64 	%rd7487, {%r4483, %r4482};
	xor.b64  	%rd7488, %rd7487, %rd7486;
	shf.l.wrap.b32 	%r4484, %r4478, %r4479, 23;
	shf.l.wrap.b32 	%r4485, %r4479, %r4478, 23;
	mov.b64 	%rd7489, {%r4485, %r4484};
	xor.b64  	%rd7490, %rd7488, %rd7489;
	xor.b64  	%rd7491, %rd7450, %rd7426;
	and.b64  	%rd7492, %rd7474, %rd7491;
	xor.b64  	%rd7493, %rd7492, %rd7426;
	add.s64 	%rd7494, %rd7402, %rd21510;
	add.s64 	%rd7495, %rd7494, %rd21445;
	add.s64 	%rd7496, %rd7495, %rd7493;
	add.s64 	%rd7497, %rd7496, %rd7490;
	add.s64 	%rd7498, %rd7497, %rd7413;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4486,%dummy}, %rd7485;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4487}, %rd7485;
	}
	shf.r.wrap.b32 	%r4488, %r4487, %r4486, 28;
	shf.r.wrap.b32 	%r4489, %r4486, %r4487, 28;
	mov.b64 	%rd7499, {%r4489, %r4488};
	shf.l.wrap.b32 	%r4490, %r4486, %r4487, 30;
	shf.l.wrap.b32 	%r4491, %r4487, %r4486, 30;
	mov.b64 	%rd7500, {%r4491, %r4490};
	xor.b64  	%rd7501, %rd7500, %rd7499;
	shf.l.wrap.b32 	%r4492, %r4486, %r4487, 25;
	shf.l.wrap.b32 	%r4493, %r4487, %r4486, 25;
	mov.b64 	%rd7502, {%r4493, %r4492};
	xor.b64  	%rd7503, %rd7501, %rd7502;
	xor.b64  	%rd7504, %rd7485, %rd7437;
	xor.b64  	%rd7505, %rd7485, %rd7461;
	and.b64  	%rd7506, %rd7505, %rd7504;
	xor.b64  	%rd7507, %rd7506, %rd7485;
	add.s64 	%rd7508, %rd7497, %rd7507;
	add.s64 	%rd7509, %rd7508, %rd7503;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4494,%dummy}, %rd7498;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4495}, %rd7498;
	}
	shf.r.wrap.b32 	%r4496, %r4495, %r4494, 14;
	shf.r.wrap.b32 	%r4497, %r4494, %r4495, 14;
	mov.b64 	%rd7510, {%r4497, %r4496};
	shf.r.wrap.b32 	%r4498, %r4495, %r4494, 18;
	shf.r.wrap.b32 	%r4499, %r4494, %r4495, 18;
	mov.b64 	%rd7511, {%r4499, %r4498};
	xor.b64  	%rd7512, %rd7511, %rd7510;
	shf.l.wrap.b32 	%r4500, %r4494, %r4495, 23;
	shf.l.wrap.b32 	%r4501, %r4495, %r4494, 23;
	mov.b64 	%rd7513, {%r4501, %r4500};
	xor.b64  	%rd7514, %rd7512, %rd7513;
	xor.b64  	%rd7515, %rd7474, %rd7450;
	and.b64  	%rd7516, %rd7498, %rd7515;
	xor.b64  	%rd7517, %rd7516, %rd7450;
	add.s64 	%rd7518, %rd7426, %rd21509;
	add.s64 	%rd7519, %rd7518, %rd21444;
	add.s64 	%rd7520, %rd7519, %rd7517;
	add.s64 	%rd7521, %rd7520, %rd7514;
	add.s64 	%rd7522, %rd7521, %rd7437;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4502,%dummy}, %rd7509;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4503}, %rd7509;
	}
	shf.r.wrap.b32 	%r4504, %r4503, %r4502, 28;
	shf.r.wrap.b32 	%r4505, %r4502, %r4503, 28;
	mov.b64 	%rd7523, {%r4505, %r4504};
	shf.l.wrap.b32 	%r4506, %r4502, %r4503, 30;
	shf.l.wrap.b32 	%r4507, %r4503, %r4502, 30;
	mov.b64 	%rd7524, {%r4507, %r4506};
	xor.b64  	%rd7525, %rd7524, %rd7523;
	shf.l.wrap.b32 	%r4508, %r4502, %r4503, 25;
	shf.l.wrap.b32 	%r4509, %r4503, %r4502, 25;
	mov.b64 	%rd7526, {%r4509, %r4508};
	xor.b64  	%rd7527, %rd7525, %rd7526;
	xor.b64  	%rd7528, %rd7509, %rd7461;
	xor.b64  	%rd7529, %rd7509, %rd7485;
	and.b64  	%rd7530, %rd7529, %rd7528;
	xor.b64  	%rd7531, %rd7530, %rd7509;
	add.s64 	%rd7532, %rd7521, %rd7531;
	add.s64 	%rd7533, %rd7532, %rd7527;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4510,%dummy}, %rd7522;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4511}, %rd7522;
	}
	shf.r.wrap.b32 	%r4512, %r4511, %r4510, 14;
	shf.r.wrap.b32 	%r4513, %r4510, %r4511, 14;
	mov.b64 	%rd7534, {%r4513, %r4512};
	shf.r.wrap.b32 	%r4514, %r4511, %r4510, 18;
	shf.r.wrap.b32 	%r4515, %r4510, %r4511, 18;
	mov.b64 	%rd7535, {%r4515, %r4514};
	xor.b64  	%rd7536, %rd7535, %rd7534;
	shf.l.wrap.b32 	%r4516, %r4510, %r4511, 23;
	shf.l.wrap.b32 	%r4517, %r4511, %r4510, 23;
	mov.b64 	%rd7537, {%r4517, %r4516};
	xor.b64  	%rd7538, %rd7536, %rd7537;
	xor.b64  	%rd7539, %rd7498, %rd7474;
	and.b64  	%rd7540, %rd7522, %rd7539;
	xor.b64  	%rd7541, %rd7540, %rd7474;
	add.s64 	%rd7542, %rd7450, %rd21508;
	add.s64 	%rd7543, %rd7542, %rd21443;
	add.s64 	%rd7544, %rd7543, %rd7541;
	add.s64 	%rd7545, %rd7544, %rd7538;
	add.s64 	%rd7546, %rd7545, %rd7461;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4518,%dummy}, %rd7533;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4519}, %rd7533;
	}
	shf.r.wrap.b32 	%r4520, %r4519, %r4518, 28;
	shf.r.wrap.b32 	%r4521, %r4518, %r4519, 28;
	mov.b64 	%rd7547, {%r4521, %r4520};
	shf.l.wrap.b32 	%r4522, %r4518, %r4519, 30;
	shf.l.wrap.b32 	%r4523, %r4519, %r4518, 30;
	mov.b64 	%rd7548, {%r4523, %r4522};
	xor.b64  	%rd7549, %rd7548, %rd7547;
	shf.l.wrap.b32 	%r4524, %r4518, %r4519, 25;
	shf.l.wrap.b32 	%r4525, %r4519, %r4518, 25;
	mov.b64 	%rd7550, {%r4525, %r4524};
	xor.b64  	%rd7551, %rd7549, %rd7550;
	xor.b64  	%rd7552, %rd7533, %rd7485;
	xor.b64  	%rd7553, %rd7533, %rd7509;
	and.b64  	%rd7554, %rd7553, %rd7552;
	xor.b64  	%rd7555, %rd7554, %rd7533;
	add.s64 	%rd7556, %rd7545, %rd7555;
	add.s64 	%rd7557, %rd7556, %rd7551;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4526,%dummy}, %rd7546;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4527}, %rd7546;
	}
	shf.r.wrap.b32 	%r4528, %r4527, %r4526, 14;
	shf.r.wrap.b32 	%r4529, %r4526, %r4527, 14;
	mov.b64 	%rd7558, {%r4529, %r4528};
	shf.r.wrap.b32 	%r4530, %r4527, %r4526, 18;
	shf.r.wrap.b32 	%r4531, %r4526, %r4527, 18;
	mov.b64 	%rd7559, {%r4531, %r4530};
	xor.b64  	%rd7560, %rd7559, %rd7558;
	shf.l.wrap.b32 	%r4532, %r4526, %r4527, 23;
	shf.l.wrap.b32 	%r4533, %r4527, %r4526, 23;
	mov.b64 	%rd7561, {%r4533, %r4532};
	xor.b64  	%rd7562, %rd7560, %rd7561;
	xor.b64  	%rd7563, %rd7522, %rd7498;
	and.b64  	%rd7564, %rd7546, %rd7563;
	xor.b64  	%rd7565, %rd7564, %rd7498;
	add.s64 	%rd7566, %rd7474, %rd21507;
	add.s64 	%rd7567, %rd7566, %rd21442;
	add.s64 	%rd7568, %rd7567, %rd7565;
	add.s64 	%rd7569, %rd7568, %rd7562;
	add.s64 	%rd21519, %rd7569, %rd7485;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4534,%dummy}, %rd7557;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4535}, %rd7557;
	}
	shf.r.wrap.b32 	%r4536, %r4535, %r4534, 28;
	shf.r.wrap.b32 	%r4537, %r4534, %r4535, 28;
	mov.b64 	%rd7570, {%r4537, %r4536};
	shf.l.wrap.b32 	%r4538, %r4534, %r4535, 30;
	shf.l.wrap.b32 	%r4539, %r4535, %r4534, 30;
	mov.b64 	%rd7571, {%r4539, %r4538};
	xor.b64  	%rd7572, %rd7571, %rd7570;
	shf.l.wrap.b32 	%r4540, %r4534, %r4535, 25;
	shf.l.wrap.b32 	%r4541, %r4535, %r4534, 25;
	mov.b64 	%rd7573, {%r4541, %r4540};
	xor.b64  	%rd7574, %rd7572, %rd7573;
	xor.b64  	%rd7575, %rd7557, %rd7509;
	xor.b64  	%rd7576, %rd7557, %rd7533;
	and.b64  	%rd7577, %rd7576, %rd7575;
	xor.b64  	%rd7578, %rd7577, %rd7557;
	add.s64 	%rd7579, %rd7569, %rd7578;
	add.s64 	%rd21515, %rd7579, %rd7574;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4542,%dummy}, %rd21519;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4543}, %rd21519;
	}
	shf.r.wrap.b32 	%r4544, %r4543, %r4542, 14;
	shf.r.wrap.b32 	%r4545, %r4542, %r4543, 14;
	mov.b64 	%rd7580, {%r4545, %r4544};
	shf.r.wrap.b32 	%r4546, %r4543, %r4542, 18;
	shf.r.wrap.b32 	%r4547, %r4542, %r4543, 18;
	mov.b64 	%rd7581, {%r4547, %r4546};
	xor.b64  	%rd7582, %rd7581, %rd7580;
	shf.l.wrap.b32 	%r4548, %r4542, %r4543, 23;
	shf.l.wrap.b32 	%r4549, %r4543, %r4542, 23;
	mov.b64 	%rd7583, {%r4549, %r4548};
	xor.b64  	%rd7584, %rd7582, %rd7583;
	xor.b64  	%rd7585, %rd7546, %rd7522;
	and.b64  	%rd7586, %rd21519, %rd7585;
	xor.b64  	%rd7587, %rd7586, %rd7522;
	add.s64 	%rd7588, %rd7498, %rd21506;
	add.s64 	%rd7589, %rd7588, %rd21441;
	add.s64 	%rd7590, %rd7589, %rd7587;
	add.s64 	%rd7591, %rd7590, %rd7584;
	add.s64 	%rd21518, %rd7591, %rd7509;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4550,%dummy}, %rd21515;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4551}, %rd21515;
	}
	shf.r.wrap.b32 	%r4552, %r4551, %r4550, 28;
	shf.r.wrap.b32 	%r4553, %r4550, %r4551, 28;
	mov.b64 	%rd7592, {%r4553, %r4552};
	shf.l.wrap.b32 	%r4554, %r4550, %r4551, 30;
	shf.l.wrap.b32 	%r4555, %r4551, %r4550, 30;
	mov.b64 	%rd7593, {%r4555, %r4554};
	xor.b64  	%rd7594, %rd7593, %rd7592;
	shf.l.wrap.b32 	%r4556, %r4550, %r4551, 25;
	shf.l.wrap.b32 	%r4557, %r4551, %r4550, 25;
	mov.b64 	%rd7595, {%r4557, %r4556};
	xor.b64  	%rd7596, %rd7594, %rd7595;
	xor.b64  	%rd7597, %rd21515, %rd7533;
	xor.b64  	%rd7598, %rd21515, %rd7557;
	and.b64  	%rd7599, %rd7598, %rd7597;
	xor.b64  	%rd7600, %rd7599, %rd21515;
	add.s64 	%rd7601, %rd7591, %rd7600;
	add.s64 	%rd21514, %rd7601, %rd7596;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4558,%dummy}, %rd21518;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4559}, %rd21518;
	}
	shf.r.wrap.b32 	%r4560, %r4559, %r4558, 14;
	shf.r.wrap.b32 	%r4561, %r4558, %r4559, 14;
	mov.b64 	%rd7602, {%r4561, %r4560};
	shf.r.wrap.b32 	%r4562, %r4559, %r4558, 18;
	shf.r.wrap.b32 	%r4563, %r4558, %r4559, 18;
	mov.b64 	%rd7603, {%r4563, %r4562};
	xor.b64  	%rd7604, %rd7603, %rd7602;
	shf.l.wrap.b32 	%r4564, %r4558, %r4559, 23;
	shf.l.wrap.b32 	%r4565, %r4559, %r4558, 23;
	mov.b64 	%rd7605, {%r4565, %r4564};
	xor.b64  	%rd7606, %rd7604, %rd7605;
	xor.b64  	%rd7607, %rd21519, %rd7546;
	and.b64  	%rd7608, %rd21518, %rd7607;
	xor.b64  	%rd7609, %rd7608, %rd7546;
	add.s64 	%rd7610, %rd7522, %rd21505;
	add.s64 	%rd7611, %rd7610, %rd21440;
	add.s64 	%rd7612, %rd7611, %rd7609;
	add.s64 	%rd7613, %rd7612, %rd7606;
	add.s64 	%rd21517, %rd7613, %rd7533;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4566,%dummy}, %rd21514;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4567}, %rd21514;
	}
	shf.r.wrap.b32 	%r4568, %r4567, %r4566, 28;
	shf.r.wrap.b32 	%r4569, %r4566, %r4567, 28;
	mov.b64 	%rd7614, {%r4569, %r4568};
	shf.l.wrap.b32 	%r4570, %r4566, %r4567, 30;
	shf.l.wrap.b32 	%r4571, %r4567, %r4566, 30;
	mov.b64 	%rd7615, {%r4571, %r4570};
	xor.b64  	%rd7616, %rd7615, %rd7614;
	shf.l.wrap.b32 	%r4572, %r4566, %r4567, 25;
	shf.l.wrap.b32 	%r4573, %r4567, %r4566, 25;
	mov.b64 	%rd7617, {%r4573, %r4572};
	xor.b64  	%rd7618, %rd7616, %rd7617;
	xor.b64  	%rd7619, %rd21514, %rd7557;
	xor.b64  	%rd7620, %rd21514, %rd21515;
	and.b64  	%rd7621, %rd7620, %rd7619;
	xor.b64  	%rd7622, %rd7621, %rd21514;
	add.s64 	%rd7623, %rd7613, %rd7622;
	add.s64 	%rd21513, %rd7623, %rd7618;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4574,%dummy}, %rd21517;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4575}, %rd21517;
	}
	shf.r.wrap.b32 	%r4576, %r4575, %r4574, 14;
	shf.r.wrap.b32 	%r4577, %r4574, %r4575, 14;
	mov.b64 	%rd7624, {%r4577, %r4576};
	shf.r.wrap.b32 	%r4578, %r4575, %r4574, 18;
	shf.r.wrap.b32 	%r4579, %r4574, %r4575, 18;
	mov.b64 	%rd7625, {%r4579, %r4578};
	xor.b64  	%rd7626, %rd7625, %rd7624;
	shf.l.wrap.b32 	%r4580, %r4574, %r4575, 23;
	shf.l.wrap.b32 	%r4581, %r4575, %r4574, 23;
	mov.b64 	%rd7627, {%r4581, %r4580};
	xor.b64  	%rd7628, %rd7626, %rd7627;
	xor.b64  	%rd7629, %rd21518, %rd21519;
	and.b64  	%rd7630, %rd21517, %rd7629;
	xor.b64  	%rd7631, %rd7630, %rd21519;
	add.s64 	%rd7632, %rd7546, %rd21504;
	add.s64 	%rd7633, %rd7632, %rd21439;
	add.s64 	%rd7634, %rd7633, %rd7631;
	add.s64 	%rd7635, %rd7634, %rd7628;
	add.s64 	%rd21516, %rd7635, %rd7557;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4582,%dummy}, %rd21513;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4583}, %rd21513;
	}
	shf.r.wrap.b32 	%r4584, %r4583, %r4582, 28;
	shf.r.wrap.b32 	%r4585, %r4582, %r4583, 28;
	mov.b64 	%rd7636, {%r4585, %r4584};
	shf.l.wrap.b32 	%r4586, %r4582, %r4583, 30;
	shf.l.wrap.b32 	%r4587, %r4583, %r4582, 30;
	mov.b64 	%rd7637, {%r4587, %r4586};
	xor.b64  	%rd7638, %rd7637, %rd7636;
	shf.l.wrap.b32 	%r4588, %r4582, %r4583, 25;
	shf.l.wrap.b32 	%r4589, %r4583, %r4582, 25;
	mov.b64 	%rd7639, {%r4589, %r4588};
	xor.b64  	%rd7640, %rd7638, %rd7639;
	xor.b64  	%rd7641, %rd21513, %rd21515;
	xor.b64  	%rd7642, %rd21513, %rd21514;
	and.b64  	%rd7643, %rd7642, %rd7641;
	xor.b64  	%rd7644, %rd7643, %rd21513;
	add.s64 	%rd7645, %rd7635, %rd7644;
	add.s64 	%rd21512, %rd7645, %rd7640;
	mov.u32 	%r14354, 16;

BB3_102:
	shr.u64 	%rd7646, %rd21505, 6;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4590,%dummy}, %rd21505;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4591}, %rd21505;
	}
	shf.r.wrap.b32 	%r4592, %r4591, %r4590, 19;
	shf.r.wrap.b32 	%r4593, %r4590, %r4591, 19;
	mov.b64 	%rd7647, {%r4593, %r4592};
	xor.b64  	%rd7648, %rd7647, %rd7646;
	shf.l.wrap.b32 	%r4594, %r4590, %r4591, 3;
	shf.l.wrap.b32 	%r4595, %r4591, %r4590, 3;
	mov.b64 	%rd7649, {%r4595, %r4594};
	xor.b64  	%rd7650, %rd7648, %rd7649;
	shr.u64 	%rd7651, %rd21521, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4596,%dummy}, %rd21521;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4597}, %rd21521;
	}
	shf.r.wrap.b32 	%r4598, %r4597, %r4596, 1;
	shf.r.wrap.b32 	%r4599, %r4596, %r4597, 1;
	mov.b64 	%rd7652, {%r4599, %r4598};
	xor.b64  	%rd7653, %rd7652, %rd7651;
	shf.r.wrap.b32 	%r4600, %r4597, %r4596, 8;
	shf.r.wrap.b32 	%r4601, %r4596, %r4597, 8;
	mov.b64 	%rd7654, {%r4601, %r4600};
	xor.b64  	%rd7655, %rd7653, %rd7654;
	add.s64 	%rd7656, %rd21510, %rd21520;
	add.s64 	%rd7657, %rd7656, %rd7650;
	add.s64 	%rd21520, %rd7657, %rd7655;
	shr.u64 	%rd7658, %rd21504, 6;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4602,%dummy}, %rd21504;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4603}, %rd21504;
	}
	shf.r.wrap.b32 	%r4604, %r4603, %r4602, 19;
	shf.r.wrap.b32 	%r4605, %r4602, %r4603, 19;
	mov.b64 	%rd7659, {%r4605, %r4604};
	xor.b64  	%rd7660, %rd7659, %rd7658;
	shf.l.wrap.b32 	%r4606, %r4602, %r4603, 3;
	shf.l.wrap.b32 	%r4607, %r4603, %r4602, 3;
	mov.b64 	%rd7661, {%r4607, %r4606};
	xor.b64  	%rd7662, %rd7660, %rd7661;
	shr.u64 	%rd7663, %rd21522, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4608,%dummy}, %rd21522;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4609}, %rd21522;
	}
	shf.r.wrap.b32 	%r4610, %r4609, %r4608, 1;
	shf.r.wrap.b32 	%r4611, %r4608, %r4609, 1;
	mov.b64 	%rd7664, {%r4611, %r4610};
	xor.b64  	%rd7665, %rd7664, %rd7663;
	shf.r.wrap.b32 	%r4612, %r4609, %r4608, 8;
	shf.r.wrap.b32 	%r4613, %r4608, %r4609, 8;
	mov.b64 	%rd7666, {%r4613, %r4612};
	xor.b64  	%rd7667, %rd7665, %rd7666;
	add.s64 	%rd7668, %rd21509, %rd21521;
	add.s64 	%rd7669, %rd7668, %rd7662;
	add.s64 	%rd21521, %rd7669, %rd7667;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4614,%dummy}, %rd21520;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4615}, %rd21520;
	}
	shf.r.wrap.b32 	%r4616, %r4615, %r4614, 19;
	shf.r.wrap.b32 	%r4617, %r4614, %r4615, 19;
	mov.b64 	%rd7670, {%r4617, %r4616};
	shf.l.wrap.b32 	%r4618, %r4614, %r4615, 3;
	shf.l.wrap.b32 	%r4619, %r4615, %r4614, 3;
	mov.b64 	%rd7671, {%r4619, %r4618};
	shr.u64 	%rd7672, %rd21520, 6;
	xor.b64  	%rd7673, %rd7670, %rd7672;
	xor.b64  	%rd7674, %rd7673, %rd7671;
	shr.u64 	%rd7675, %rd21523, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4620,%dummy}, %rd21523;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4621}, %rd21523;
	}
	shf.r.wrap.b32 	%r4622, %r4621, %r4620, 1;
	shf.r.wrap.b32 	%r4623, %r4620, %r4621, 1;
	mov.b64 	%rd7676, {%r4623, %r4622};
	xor.b64  	%rd7677, %rd7676, %rd7675;
	shf.r.wrap.b32 	%r4624, %r4621, %r4620, 8;
	shf.r.wrap.b32 	%r4625, %r4620, %r4621, 8;
	mov.b64 	%rd7678, {%r4625, %r4624};
	xor.b64  	%rd7679, %rd7677, %rd7678;
	add.s64 	%rd7680, %rd21508, %rd21522;
	add.s64 	%rd7681, %rd7680, %rd7674;
	add.s64 	%rd21522, %rd7681, %rd7679;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4626,%dummy}, %rd21521;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4627}, %rd21521;
	}
	shf.r.wrap.b32 	%r4628, %r4627, %r4626, 19;
	shf.r.wrap.b32 	%r4629, %r4626, %r4627, 19;
	mov.b64 	%rd7682, {%r4629, %r4628};
	shf.l.wrap.b32 	%r4630, %r4626, %r4627, 3;
	shf.l.wrap.b32 	%r4631, %r4627, %r4626, 3;
	mov.b64 	%rd7683, {%r4631, %r4630};
	shr.u64 	%rd7684, %rd21521, 6;
	xor.b64  	%rd7685, %rd7682, %rd7684;
	xor.b64  	%rd7686, %rd7685, %rd7683;
	shr.u64 	%rd7687, %rd21524, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4632,%dummy}, %rd21524;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4633}, %rd21524;
	}
	shf.r.wrap.b32 	%r4634, %r4633, %r4632, 1;
	shf.r.wrap.b32 	%r4635, %r4632, %r4633, 1;
	mov.b64 	%rd7688, {%r4635, %r4634};
	xor.b64  	%rd7689, %rd7688, %rd7687;
	shf.r.wrap.b32 	%r4636, %r4633, %r4632, 8;
	shf.r.wrap.b32 	%r4637, %r4632, %r4633, 8;
	mov.b64 	%rd7690, {%r4637, %r4636};
	xor.b64  	%rd7691, %rd7689, %rd7690;
	add.s64 	%rd7692, %rd21507, %rd21523;
	add.s64 	%rd7693, %rd7692, %rd7686;
	add.s64 	%rd21523, %rd7693, %rd7691;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4638,%dummy}, %rd21522;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4639}, %rd21522;
	}
	shf.r.wrap.b32 	%r4640, %r4639, %r4638, 19;
	shf.r.wrap.b32 	%r4641, %r4638, %r4639, 19;
	mov.b64 	%rd7694, {%r4641, %r4640};
	shf.l.wrap.b32 	%r4642, %r4638, %r4639, 3;
	shf.l.wrap.b32 	%r4643, %r4639, %r4638, 3;
	mov.b64 	%rd7695, {%r4643, %r4642};
	shr.u64 	%rd7696, %rd21522, 6;
	xor.b64  	%rd7697, %rd7694, %rd7696;
	xor.b64  	%rd7698, %rd7697, %rd7695;
	shr.u64 	%rd7699, %rd21525, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4644,%dummy}, %rd21525;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4645}, %rd21525;
	}
	shf.r.wrap.b32 	%r4646, %r4645, %r4644, 1;
	shf.r.wrap.b32 	%r4647, %r4644, %r4645, 1;
	mov.b64 	%rd7700, {%r4647, %r4646};
	xor.b64  	%rd7701, %rd7700, %rd7699;
	shf.r.wrap.b32 	%r4648, %r4645, %r4644, 8;
	shf.r.wrap.b32 	%r4649, %r4644, %r4645, 8;
	mov.b64 	%rd7702, {%r4649, %r4648};
	xor.b64  	%rd7703, %rd7701, %rd7702;
	add.s64 	%rd7704, %rd21506, %rd21524;
	add.s64 	%rd7705, %rd7704, %rd7698;
	add.s64 	%rd21524, %rd7705, %rd7703;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4650,%dummy}, %rd21523;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4651}, %rd21523;
	}
	shf.r.wrap.b32 	%r4652, %r4651, %r4650, 19;
	shf.r.wrap.b32 	%r4653, %r4650, %r4651, 19;
	mov.b64 	%rd7706, {%r4653, %r4652};
	shf.l.wrap.b32 	%r4654, %r4650, %r4651, 3;
	shf.l.wrap.b32 	%r4655, %r4651, %r4650, 3;
	mov.b64 	%rd7707, {%r4655, %r4654};
	shr.u64 	%rd7708, %rd21523, 6;
	xor.b64  	%rd7709, %rd7706, %rd7708;
	xor.b64  	%rd7710, %rd7709, %rd7707;
	shr.u64 	%rd7711, %rd21526, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4656,%dummy}, %rd21526;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4657}, %rd21526;
	}
	shf.r.wrap.b32 	%r4658, %r4657, %r4656, 1;
	shf.r.wrap.b32 	%r4659, %r4656, %r4657, 1;
	mov.b64 	%rd7712, {%r4659, %r4658};
	xor.b64  	%rd7713, %rd7712, %rd7711;
	shf.r.wrap.b32 	%r4660, %r4657, %r4656, 8;
	shf.r.wrap.b32 	%r4661, %r4656, %r4657, 8;
	mov.b64 	%rd7714, {%r4661, %r4660};
	xor.b64  	%rd7715, %rd7713, %rd7714;
	add.s64 	%rd7716, %rd21505, %rd21525;
	add.s64 	%rd7717, %rd7716, %rd7710;
	add.s64 	%rd21525, %rd7717, %rd7715;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4662,%dummy}, %rd21524;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4663}, %rd21524;
	}
	shf.r.wrap.b32 	%r4664, %r4663, %r4662, 19;
	shf.r.wrap.b32 	%r4665, %r4662, %r4663, 19;
	mov.b64 	%rd7718, {%r4665, %r4664};
	shf.l.wrap.b32 	%r4666, %r4662, %r4663, 3;
	shf.l.wrap.b32 	%r4667, %r4663, %r4662, 3;
	mov.b64 	%rd7719, {%r4667, %r4666};
	shr.u64 	%rd7720, %rd21524, 6;
	xor.b64  	%rd7721, %rd7718, %rd7720;
	xor.b64  	%rd7722, %rd7721, %rd7719;
	shr.u64 	%rd7723, %rd21527, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4668,%dummy}, %rd21527;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4669}, %rd21527;
	}
	shf.r.wrap.b32 	%r4670, %r4669, %r4668, 1;
	shf.r.wrap.b32 	%r4671, %r4668, %r4669, 1;
	mov.b64 	%rd7724, {%r4671, %r4670};
	xor.b64  	%rd7725, %rd7724, %rd7723;
	shf.r.wrap.b32 	%r4672, %r4669, %r4668, 8;
	shf.r.wrap.b32 	%r4673, %r4668, %r4669, 8;
	mov.b64 	%rd7726, {%r4673, %r4672};
	xor.b64  	%rd7727, %rd7725, %rd7726;
	add.s64 	%rd7728, %rd21504, %rd21526;
	add.s64 	%rd7729, %rd7728, %rd7722;
	add.s64 	%rd21526, %rd7729, %rd7727;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4674,%dummy}, %rd21525;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4675}, %rd21525;
	}
	shf.r.wrap.b32 	%r4676, %r4675, %r4674, 19;
	shf.r.wrap.b32 	%r4677, %r4674, %r4675, 19;
	mov.b64 	%rd7730, {%r4677, %r4676};
	shf.l.wrap.b32 	%r4678, %r4674, %r4675, 3;
	shf.l.wrap.b32 	%r4679, %r4675, %r4674, 3;
	mov.b64 	%rd7731, {%r4679, %r4678};
	shr.u64 	%rd7732, %rd21525, 6;
	xor.b64  	%rd7733, %rd7730, %rd7732;
	xor.b64  	%rd7734, %rd7733, %rd7731;
	shr.u64 	%rd7735, %rd21511, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4680,%dummy}, %rd21511;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4681}, %rd21511;
	}
	shf.r.wrap.b32 	%r4682, %r4681, %r4680, 1;
	shf.r.wrap.b32 	%r4683, %r4680, %r4681, 1;
	mov.b64 	%rd7736, {%r4683, %r4682};
	xor.b64  	%rd7737, %rd7736, %rd7735;
	shf.r.wrap.b32 	%r4684, %r4681, %r4680, 8;
	shf.r.wrap.b32 	%r4685, %r4680, %r4681, 8;
	mov.b64 	%rd7738, {%r4685, %r4684};
	xor.b64  	%rd7739, %rd7737, %rd7738;
	add.s64 	%rd7740, %rd21520, %rd21527;
	add.s64 	%rd7741, %rd7740, %rd7734;
	add.s64 	%rd21527, %rd7741, %rd7739;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4686,%dummy}, %rd21526;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4687}, %rd21526;
	}
	shf.r.wrap.b32 	%r4688, %r4687, %r4686, 19;
	shf.r.wrap.b32 	%r4689, %r4686, %r4687, 19;
	mov.b64 	%rd7742, {%r4689, %r4688};
	shf.l.wrap.b32 	%r4690, %r4686, %r4687, 3;
	shf.l.wrap.b32 	%r4691, %r4687, %r4686, 3;
	mov.b64 	%rd7743, {%r4691, %r4690};
	shr.u64 	%rd7744, %rd21526, 6;
	xor.b64  	%rd7745, %rd7742, %rd7744;
	xor.b64  	%rd7746, %rd7745, %rd7743;
	shr.u64 	%rd7747, %rd21510, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4692,%dummy}, %rd21510;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4693}, %rd21510;
	}
	shf.r.wrap.b32 	%r4694, %r4693, %r4692, 1;
	shf.r.wrap.b32 	%r4695, %r4692, %r4693, 1;
	mov.b64 	%rd7748, {%r4695, %r4694};
	xor.b64  	%rd7749, %rd7748, %rd7747;
	shf.r.wrap.b32 	%r4696, %r4693, %r4692, 8;
	shf.r.wrap.b32 	%r4697, %r4692, %r4693, 8;
	mov.b64 	%rd7750, {%r4697, %r4696};
	xor.b64  	%rd7751, %rd7749, %rd7750;
	add.s64 	%rd7752, %rd21521, %rd21511;
	add.s64 	%rd7753, %rd7752, %rd7746;
	add.s64 	%rd21511, %rd7753, %rd7751;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4698,%dummy}, %rd21527;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4699}, %rd21527;
	}
	shf.r.wrap.b32 	%r4700, %r4699, %r4698, 19;
	shf.r.wrap.b32 	%r4701, %r4698, %r4699, 19;
	mov.b64 	%rd7754, {%r4701, %r4700};
	shf.l.wrap.b32 	%r4702, %r4698, %r4699, 3;
	shf.l.wrap.b32 	%r4703, %r4699, %r4698, 3;
	mov.b64 	%rd7755, {%r4703, %r4702};
	shr.u64 	%rd7756, %rd21527, 6;
	xor.b64  	%rd7757, %rd7754, %rd7756;
	xor.b64  	%rd7758, %rd7757, %rd7755;
	shr.u64 	%rd7759, %rd21509, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4704,%dummy}, %rd21509;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4705}, %rd21509;
	}
	shf.r.wrap.b32 	%r4706, %r4705, %r4704, 1;
	shf.r.wrap.b32 	%r4707, %r4704, %r4705, 1;
	mov.b64 	%rd7760, {%r4707, %r4706};
	xor.b64  	%rd7761, %rd7760, %rd7759;
	shf.r.wrap.b32 	%r4708, %r4705, %r4704, 8;
	shf.r.wrap.b32 	%r4709, %r4704, %r4705, 8;
	mov.b64 	%rd7762, {%r4709, %r4708};
	xor.b64  	%rd7763, %rd7761, %rd7762;
	add.s64 	%rd7764, %rd21522, %rd21510;
	add.s64 	%rd7765, %rd7764, %rd7758;
	add.s64 	%rd21510, %rd7765, %rd7763;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4710,%dummy}, %rd21511;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4711}, %rd21511;
	}
	shf.r.wrap.b32 	%r4712, %r4711, %r4710, 19;
	shf.r.wrap.b32 	%r4713, %r4710, %r4711, 19;
	mov.b64 	%rd7766, {%r4713, %r4712};
	shf.l.wrap.b32 	%r4714, %r4710, %r4711, 3;
	shf.l.wrap.b32 	%r4715, %r4711, %r4710, 3;
	mov.b64 	%rd7767, {%r4715, %r4714};
	shr.u64 	%rd7768, %rd21511, 6;
	xor.b64  	%rd7769, %rd7766, %rd7768;
	xor.b64  	%rd7770, %rd7769, %rd7767;
	shr.u64 	%rd7771, %rd21508, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4716,%dummy}, %rd21508;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4717}, %rd21508;
	}
	shf.r.wrap.b32 	%r4718, %r4717, %r4716, 1;
	shf.r.wrap.b32 	%r4719, %r4716, %r4717, 1;
	mov.b64 	%rd7772, {%r4719, %r4718};
	xor.b64  	%rd7773, %rd7772, %rd7771;
	shf.r.wrap.b32 	%r4720, %r4717, %r4716, 8;
	shf.r.wrap.b32 	%r4721, %r4716, %r4717, 8;
	mov.b64 	%rd7774, {%r4721, %r4720};
	xor.b64  	%rd7775, %rd7773, %rd7774;
	add.s64 	%rd7776, %rd21523, %rd21509;
	add.s64 	%rd7777, %rd7776, %rd7770;
	add.s64 	%rd21509, %rd7777, %rd7775;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4722,%dummy}, %rd21510;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4723}, %rd21510;
	}
	shf.r.wrap.b32 	%r4724, %r4723, %r4722, 19;
	shf.r.wrap.b32 	%r4725, %r4722, %r4723, 19;
	mov.b64 	%rd7778, {%r4725, %r4724};
	shf.l.wrap.b32 	%r4726, %r4722, %r4723, 3;
	shf.l.wrap.b32 	%r4727, %r4723, %r4722, 3;
	mov.b64 	%rd7779, {%r4727, %r4726};
	shr.u64 	%rd7780, %rd21510, 6;
	xor.b64  	%rd7781, %rd7778, %rd7780;
	xor.b64  	%rd7782, %rd7781, %rd7779;
	shr.u64 	%rd7783, %rd21507, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4728,%dummy}, %rd21507;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4729}, %rd21507;
	}
	shf.r.wrap.b32 	%r4730, %r4729, %r4728, 1;
	shf.r.wrap.b32 	%r4731, %r4728, %r4729, 1;
	mov.b64 	%rd7784, {%r4731, %r4730};
	xor.b64  	%rd7785, %rd7784, %rd7783;
	shf.r.wrap.b32 	%r4732, %r4729, %r4728, 8;
	shf.r.wrap.b32 	%r4733, %r4728, %r4729, 8;
	mov.b64 	%rd7786, {%r4733, %r4732};
	xor.b64  	%rd7787, %rd7785, %rd7786;
	add.s64 	%rd7788, %rd21524, %rd21508;
	add.s64 	%rd7789, %rd7788, %rd7782;
	add.s64 	%rd21508, %rd7789, %rd7787;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4734,%dummy}, %rd21509;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4735}, %rd21509;
	}
	shf.r.wrap.b32 	%r4736, %r4735, %r4734, 19;
	shf.r.wrap.b32 	%r4737, %r4734, %r4735, 19;
	mov.b64 	%rd7790, {%r4737, %r4736};
	shf.l.wrap.b32 	%r4738, %r4734, %r4735, 3;
	shf.l.wrap.b32 	%r4739, %r4735, %r4734, 3;
	mov.b64 	%rd7791, {%r4739, %r4738};
	shr.u64 	%rd7792, %rd21509, 6;
	xor.b64  	%rd7793, %rd7790, %rd7792;
	xor.b64  	%rd7794, %rd7793, %rd7791;
	shr.u64 	%rd7795, %rd21506, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4740,%dummy}, %rd21506;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4741}, %rd21506;
	}
	shf.r.wrap.b32 	%r4742, %r4741, %r4740, 1;
	shf.r.wrap.b32 	%r4743, %r4740, %r4741, 1;
	mov.b64 	%rd7796, {%r4743, %r4742};
	xor.b64  	%rd7797, %rd7796, %rd7795;
	shf.r.wrap.b32 	%r4744, %r4741, %r4740, 8;
	shf.r.wrap.b32 	%r4745, %r4740, %r4741, 8;
	mov.b64 	%rd7798, {%r4745, %r4744};
	xor.b64  	%rd7799, %rd7797, %rd7798;
	add.s64 	%rd7800, %rd21525, %rd21507;
	add.s64 	%rd7801, %rd7800, %rd7794;
	add.s64 	%rd21507, %rd7801, %rd7799;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4746,%dummy}, %rd21508;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4747}, %rd21508;
	}
	shf.r.wrap.b32 	%r4748, %r4747, %r4746, 19;
	shf.r.wrap.b32 	%r4749, %r4746, %r4747, 19;
	mov.b64 	%rd7802, {%r4749, %r4748};
	shf.l.wrap.b32 	%r4750, %r4746, %r4747, 3;
	shf.l.wrap.b32 	%r4751, %r4747, %r4746, 3;
	mov.b64 	%rd7803, {%r4751, %r4750};
	shr.u64 	%rd7804, %rd21508, 6;
	xor.b64  	%rd7805, %rd7802, %rd7804;
	xor.b64  	%rd7806, %rd7805, %rd7803;
	shr.u64 	%rd7807, %rd21505, 7;
	shf.r.wrap.b32 	%r4752, %r4591, %r4590, 1;
	shf.r.wrap.b32 	%r4753, %r4590, %r4591, 1;
	mov.b64 	%rd7808, {%r4753, %r4752};
	xor.b64  	%rd7809, %rd7808, %rd7807;
	shf.r.wrap.b32 	%r4754, %r4591, %r4590, 8;
	shf.r.wrap.b32 	%r4755, %r4590, %r4591, 8;
	mov.b64 	%rd7810, {%r4755, %r4754};
	xor.b64  	%rd7811, %rd7809, %rd7810;
	add.s64 	%rd7812, %rd21526, %rd21506;
	add.s64 	%rd7813, %rd7812, %rd7806;
	add.s64 	%rd21506, %rd7813, %rd7811;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4756,%dummy}, %rd21507;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4757}, %rd21507;
	}
	shf.r.wrap.b32 	%r4758, %r4757, %r4756, 19;
	shf.r.wrap.b32 	%r4759, %r4756, %r4757, 19;
	mov.b64 	%rd7814, {%r4759, %r4758};
	shf.l.wrap.b32 	%r4760, %r4756, %r4757, 3;
	shf.l.wrap.b32 	%r4761, %r4757, %r4756, 3;
	mov.b64 	%rd7815, {%r4761, %r4760};
	shr.u64 	%rd7816, %rd21507, 6;
	xor.b64  	%rd7817, %rd7814, %rd7816;
	xor.b64  	%rd7818, %rd7817, %rd7815;
	shr.u64 	%rd7819, %rd21504, 7;
	shf.r.wrap.b32 	%r4762, %r4603, %r4602, 1;
	shf.r.wrap.b32 	%r4763, %r4602, %r4603, 1;
	mov.b64 	%rd7820, {%r4763, %r4762};
	xor.b64  	%rd7821, %rd7820, %rd7819;
	shf.r.wrap.b32 	%r4764, %r4603, %r4602, 8;
	shf.r.wrap.b32 	%r4765, %r4602, %r4603, 8;
	mov.b64 	%rd7822, {%r4765, %r4764};
	xor.b64  	%rd7823, %rd7821, %rd7822;
	add.s64 	%rd7824, %rd21527, %rd21505;
	add.s64 	%rd7825, %rd7824, %rd7818;
	add.s64 	%rd21505, %rd7825, %rd7823;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4766,%dummy}, %rd21506;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4767}, %rd21506;
	}
	shf.r.wrap.b32 	%r4768, %r4767, %r4766, 19;
	shf.r.wrap.b32 	%r4769, %r4766, %r4767, 19;
	mov.b64 	%rd7826, {%r4769, %r4768};
	shf.l.wrap.b32 	%r4770, %r4766, %r4767, 3;
	shf.l.wrap.b32 	%r4771, %r4767, %r4766, 3;
	mov.b64 	%rd7827, {%r4771, %r4770};
	shr.u64 	%rd7828, %rd21506, 6;
	xor.b64  	%rd7829, %rd7826, %rd7828;
	xor.b64  	%rd7830, %rd7829, %rd7827;
	shf.r.wrap.b32 	%r4772, %r4615, %r4614, 1;
	shf.r.wrap.b32 	%r4773, %r4614, %r4615, 1;
	mov.b64 	%rd7831, {%r4773, %r4772};
	shf.r.wrap.b32 	%r4774, %r4615, %r4614, 8;
	shf.r.wrap.b32 	%r4775, %r4614, %r4615, 8;
	mov.b64 	%rd7832, {%r4775, %r4774};
	shr.u64 	%rd7833, %rd21520, 7;
	xor.b64  	%rd7834, %rd7831, %rd7833;
	xor.b64  	%rd7835, %rd7834, %rd7832;
	add.s64 	%rd7836, %rd21511, %rd21504;
	add.s64 	%rd7837, %rd7836, %rd7830;
	add.s64 	%rd21504, %rd7837, %rd7835;
	mul.wide.s32 	%rd7838, %r14354, 8;
	add.s64 	%rd7840, %rd6761, %rd7838;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4776,%dummy}, %rd21516;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4777}, %rd21516;
	}
	shf.r.wrap.b32 	%r4778, %r4777, %r4776, 18;
	shf.r.wrap.b32 	%r4779, %r4776, %r4777, 18;
	mov.b64 	%rd7841, {%r4779, %r4778};
	shf.r.wrap.b32 	%r4780, %r4777, %r4776, 14;
	shf.r.wrap.b32 	%r4781, %r4776, %r4777, 14;
	mov.b64 	%rd7842, {%r4781, %r4780};
	xor.b64  	%rd7843, %rd7841, %rd7842;
	shf.l.wrap.b32 	%r4782, %r4776, %r4777, 23;
	shf.l.wrap.b32 	%r4783, %r4777, %r4776, 23;
	mov.b64 	%rd7844, {%r4783, %r4782};
	xor.b64  	%rd7845, %rd7843, %rd7844;
	xor.b64  	%rd7846, %rd21517, %rd21518;
	and.b64  	%rd7847, %rd7846, %rd21516;
	xor.b64  	%rd7848, %rd7847, %rd21518;
	add.s64 	%rd7849, %rd7848, %rd21519;
	add.s64 	%rd7850, %rd7849, %rd21520;
	ld.const.u64 	%rd7851, [%rd7840];
	add.s64 	%rd7852, %rd7850, %rd7851;
	add.s64 	%rd7853, %rd7852, %rd7845;
	add.s64 	%rd7854, %rd7853, %rd21515;
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4784}, %rd21512;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4785,%dummy}, %rd21512;
	}
	shf.l.wrap.b32 	%r4786, %r4785, %r4784, 30;
	shf.l.wrap.b32 	%r4787, %r4784, %r4785, 30;
	mov.b64 	%rd7855, {%r4787, %r4786};
	shf.r.wrap.b32 	%r4788, %r4784, %r4785, 28;
	shf.r.wrap.b32 	%r4789, %r4785, %r4784, 28;
	mov.b64 	%rd7856, {%r4789, %r4788};
	xor.b64  	%rd7857, %rd7855, %rd7856;
	shf.l.wrap.b32 	%r4790, %r4785, %r4784, 25;
	shf.l.wrap.b32 	%r4791, %r4784, %r4785, 25;
	mov.b64 	%rd7858, {%r4791, %r4790};
	xor.b64  	%rd7859, %rd7857, %rd7858;
	xor.b64  	%rd7860, %rd21512, %rd21513;
	xor.b64  	%rd7861, %rd21512, %rd21514;
	and.b64  	%rd7862, %rd7860, %rd7861;
	xor.b64  	%rd7863, %rd7862, %rd21512;
	add.s64 	%rd7864, %rd7853, %rd7863;
	add.s64 	%rd7865, %rd7864, %rd7859;
	add.s32 	%r4792, %r14354, 1;
	mul.wide.s32 	%rd7866, %r4792, 8;
	add.s64 	%rd7867, %rd6761, %rd7866;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4793,%dummy}, %rd7854;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4794}, %rd7854;
	}
	shf.r.wrap.b32 	%r4795, %r4794, %r4793, 14;
	shf.r.wrap.b32 	%r4796, %r4793, %r4794, 14;
	mov.b64 	%rd7868, {%r4796, %r4795};
	shf.r.wrap.b32 	%r4797, %r4794, %r4793, 18;
	shf.r.wrap.b32 	%r4798, %r4793, %r4794, 18;
	mov.b64 	%rd7869, {%r4798, %r4797};
	xor.b64  	%rd7870, %rd7869, %rd7868;
	shf.l.wrap.b32 	%r4799, %r4793, %r4794, 23;
	shf.l.wrap.b32 	%r4800, %r4794, %r4793, 23;
	mov.b64 	%rd7871, {%r4800, %r4799};
	xor.b64  	%rd7872, %rd7870, %rd7871;
	xor.b64  	%rd7873, %rd21516, %rd21517;
	and.b64  	%rd7874, %rd7854, %rd7873;
	xor.b64  	%rd7875, %rd7874, %rd21517;
	add.s64 	%rd7876, %rd21521, %rd21518;
	ld.const.u64 	%rd7877, [%rd7867];
	add.s64 	%rd7878, %rd7876, %rd7877;
	add.s64 	%rd7879, %rd7878, %rd7875;
	add.s64 	%rd7880, %rd7879, %rd7872;
	add.s64 	%rd7881, %rd7880, %rd21514;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4801,%dummy}, %rd7865;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4802}, %rd7865;
	}
	shf.r.wrap.b32 	%r4803, %r4802, %r4801, 28;
	shf.r.wrap.b32 	%r4804, %r4801, %r4802, 28;
	mov.b64 	%rd7882, {%r4804, %r4803};
	shf.l.wrap.b32 	%r4805, %r4801, %r4802, 30;
	shf.l.wrap.b32 	%r4806, %r4802, %r4801, 30;
	mov.b64 	%rd7883, {%r4806, %r4805};
	xor.b64  	%rd7884, %rd7883, %rd7882;
	shf.l.wrap.b32 	%r4807, %r4801, %r4802, 25;
	shf.l.wrap.b32 	%r4808, %r4802, %r4801, 25;
	mov.b64 	%rd7885, {%r4808, %r4807};
	xor.b64  	%rd7886, %rd7884, %rd7885;
	xor.b64  	%rd7887, %rd7865, %rd21513;
	xor.b64  	%rd7888, %rd7865, %rd21512;
	and.b64  	%rd7889, %rd7888, %rd7887;
	xor.b64  	%rd7890, %rd7889, %rd7865;
	add.s64 	%rd7891, %rd7880, %rd7890;
	add.s64 	%rd7892, %rd7891, %rd7886;
	add.s32 	%r4809, %r14354, 2;
	mul.wide.s32 	%rd7893, %r4809, 8;
	add.s64 	%rd7894, %rd6761, %rd7893;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4810,%dummy}, %rd7881;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4811}, %rd7881;
	}
	shf.r.wrap.b32 	%r4812, %r4811, %r4810, 14;
	shf.r.wrap.b32 	%r4813, %r4810, %r4811, 14;
	mov.b64 	%rd7895, {%r4813, %r4812};
	shf.r.wrap.b32 	%r4814, %r4811, %r4810, 18;
	shf.r.wrap.b32 	%r4815, %r4810, %r4811, 18;
	mov.b64 	%rd7896, {%r4815, %r4814};
	xor.b64  	%rd7897, %rd7896, %rd7895;
	shf.l.wrap.b32 	%r4816, %r4810, %r4811, 23;
	shf.l.wrap.b32 	%r4817, %r4811, %r4810, 23;
	mov.b64 	%rd7898, {%r4817, %r4816};
	xor.b64  	%rd7899, %rd7897, %rd7898;
	xor.b64  	%rd7900, %rd7854, %rd21516;
	and.b64  	%rd7901, %rd7881, %rd7900;
	xor.b64  	%rd7902, %rd7901, %rd21516;
	add.s64 	%rd7903, %rd21522, %rd21517;
	ld.const.u64 	%rd7904, [%rd7894];
	add.s64 	%rd7905, %rd7903, %rd7904;
	add.s64 	%rd7906, %rd7905, %rd7902;
	add.s64 	%rd7907, %rd7906, %rd7899;
	add.s64 	%rd7908, %rd7907, %rd21513;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4818,%dummy}, %rd7892;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4819}, %rd7892;
	}
	shf.r.wrap.b32 	%r4820, %r4819, %r4818, 28;
	shf.r.wrap.b32 	%r4821, %r4818, %r4819, 28;
	mov.b64 	%rd7909, {%r4821, %r4820};
	shf.l.wrap.b32 	%r4822, %r4818, %r4819, 30;
	shf.l.wrap.b32 	%r4823, %r4819, %r4818, 30;
	mov.b64 	%rd7910, {%r4823, %r4822};
	xor.b64  	%rd7911, %rd7910, %rd7909;
	shf.l.wrap.b32 	%r4824, %r4818, %r4819, 25;
	shf.l.wrap.b32 	%r4825, %r4819, %r4818, 25;
	mov.b64 	%rd7912, {%r4825, %r4824};
	xor.b64  	%rd7913, %rd7911, %rd7912;
	xor.b64  	%rd7914, %rd7892, %rd21512;
	xor.b64  	%rd7915, %rd7892, %rd7865;
	and.b64  	%rd7916, %rd7915, %rd7914;
	xor.b64  	%rd7917, %rd7916, %rd7892;
	add.s64 	%rd7918, %rd7907, %rd7917;
	add.s64 	%rd7919, %rd7918, %rd7913;
	add.s32 	%r4826, %r14354, 3;
	mul.wide.s32 	%rd7920, %r4826, 8;
	add.s64 	%rd7921, %rd6761, %rd7920;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4827,%dummy}, %rd7908;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4828}, %rd7908;
	}
	shf.r.wrap.b32 	%r4829, %r4828, %r4827, 14;
	shf.r.wrap.b32 	%r4830, %r4827, %r4828, 14;
	mov.b64 	%rd7922, {%r4830, %r4829};
	shf.r.wrap.b32 	%r4831, %r4828, %r4827, 18;
	shf.r.wrap.b32 	%r4832, %r4827, %r4828, 18;
	mov.b64 	%rd7923, {%r4832, %r4831};
	xor.b64  	%rd7924, %rd7923, %rd7922;
	shf.l.wrap.b32 	%r4833, %r4827, %r4828, 23;
	shf.l.wrap.b32 	%r4834, %r4828, %r4827, 23;
	mov.b64 	%rd7925, {%r4834, %r4833};
	xor.b64  	%rd7926, %rd7924, %rd7925;
	xor.b64  	%rd7927, %rd7881, %rd7854;
	and.b64  	%rd7928, %rd7908, %rd7927;
	xor.b64  	%rd7929, %rd7928, %rd7854;
	add.s64 	%rd7930, %rd21523, %rd21516;
	ld.const.u64 	%rd7931, [%rd7921];
	add.s64 	%rd7932, %rd7930, %rd7931;
	add.s64 	%rd7933, %rd7932, %rd7929;
	add.s64 	%rd7934, %rd7933, %rd7926;
	add.s64 	%rd7935, %rd7934, %rd21512;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4835,%dummy}, %rd7919;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4836}, %rd7919;
	}
	shf.r.wrap.b32 	%r4837, %r4836, %r4835, 28;
	shf.r.wrap.b32 	%r4838, %r4835, %r4836, 28;
	mov.b64 	%rd7936, {%r4838, %r4837};
	shf.l.wrap.b32 	%r4839, %r4835, %r4836, 30;
	shf.l.wrap.b32 	%r4840, %r4836, %r4835, 30;
	mov.b64 	%rd7937, {%r4840, %r4839};
	xor.b64  	%rd7938, %rd7937, %rd7936;
	shf.l.wrap.b32 	%r4841, %r4835, %r4836, 25;
	shf.l.wrap.b32 	%r4842, %r4836, %r4835, 25;
	mov.b64 	%rd7939, {%r4842, %r4841};
	xor.b64  	%rd7940, %rd7938, %rd7939;
	xor.b64  	%rd7941, %rd7919, %rd7865;
	xor.b64  	%rd7942, %rd7919, %rd7892;
	and.b64  	%rd7943, %rd7942, %rd7941;
	xor.b64  	%rd7944, %rd7943, %rd7919;
	add.s64 	%rd7945, %rd7934, %rd7944;
	add.s64 	%rd7946, %rd7945, %rd7940;
	add.s32 	%r4843, %r14354, 4;
	mul.wide.s32 	%rd7947, %r4843, 8;
	add.s64 	%rd7948, %rd6761, %rd7947;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4844,%dummy}, %rd7935;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4845}, %rd7935;
	}
	shf.r.wrap.b32 	%r4846, %r4845, %r4844, 14;
	shf.r.wrap.b32 	%r4847, %r4844, %r4845, 14;
	mov.b64 	%rd7949, {%r4847, %r4846};
	shf.r.wrap.b32 	%r4848, %r4845, %r4844, 18;
	shf.r.wrap.b32 	%r4849, %r4844, %r4845, 18;
	mov.b64 	%rd7950, {%r4849, %r4848};
	xor.b64  	%rd7951, %rd7950, %rd7949;
	shf.l.wrap.b32 	%r4850, %r4844, %r4845, 23;
	shf.l.wrap.b32 	%r4851, %r4845, %r4844, 23;
	mov.b64 	%rd7952, {%r4851, %r4850};
	xor.b64  	%rd7953, %rd7951, %rd7952;
	xor.b64  	%rd7954, %rd7908, %rd7881;
	and.b64  	%rd7955, %rd7935, %rd7954;
	xor.b64  	%rd7956, %rd7955, %rd7881;
	add.s64 	%rd7957, %rd7854, %rd21524;
	ld.const.u64 	%rd7958, [%rd7948];
	add.s64 	%rd7959, %rd7957, %rd7958;
	add.s64 	%rd7960, %rd7959, %rd7956;
	add.s64 	%rd7961, %rd7960, %rd7953;
	add.s64 	%rd7962, %rd7961, %rd7865;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4852,%dummy}, %rd7946;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4853}, %rd7946;
	}
	shf.r.wrap.b32 	%r4854, %r4853, %r4852, 28;
	shf.r.wrap.b32 	%r4855, %r4852, %r4853, 28;
	mov.b64 	%rd7963, {%r4855, %r4854};
	shf.l.wrap.b32 	%r4856, %r4852, %r4853, 30;
	shf.l.wrap.b32 	%r4857, %r4853, %r4852, 30;
	mov.b64 	%rd7964, {%r4857, %r4856};
	xor.b64  	%rd7965, %rd7964, %rd7963;
	shf.l.wrap.b32 	%r4858, %r4852, %r4853, 25;
	shf.l.wrap.b32 	%r4859, %r4853, %r4852, 25;
	mov.b64 	%rd7966, {%r4859, %r4858};
	xor.b64  	%rd7967, %rd7965, %rd7966;
	xor.b64  	%rd7968, %rd7946, %rd7892;
	xor.b64  	%rd7969, %rd7946, %rd7919;
	and.b64  	%rd7970, %rd7969, %rd7968;
	xor.b64  	%rd7971, %rd7970, %rd7946;
	add.s64 	%rd7972, %rd7961, %rd7971;
	add.s64 	%rd7973, %rd7972, %rd7967;
	add.s32 	%r4860, %r14354, 5;
	mul.wide.s32 	%rd7974, %r4860, 8;
	add.s64 	%rd7975, %rd6761, %rd7974;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4861,%dummy}, %rd7962;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4862}, %rd7962;
	}
	shf.r.wrap.b32 	%r4863, %r4862, %r4861, 14;
	shf.r.wrap.b32 	%r4864, %r4861, %r4862, 14;
	mov.b64 	%rd7976, {%r4864, %r4863};
	shf.r.wrap.b32 	%r4865, %r4862, %r4861, 18;
	shf.r.wrap.b32 	%r4866, %r4861, %r4862, 18;
	mov.b64 	%rd7977, {%r4866, %r4865};
	xor.b64  	%rd7978, %rd7977, %rd7976;
	shf.l.wrap.b32 	%r4867, %r4861, %r4862, 23;
	shf.l.wrap.b32 	%r4868, %r4862, %r4861, 23;
	mov.b64 	%rd7979, {%r4868, %r4867};
	xor.b64  	%rd7980, %rd7978, %rd7979;
	xor.b64  	%rd7981, %rd7935, %rd7908;
	and.b64  	%rd7982, %rd7962, %rd7981;
	xor.b64  	%rd7983, %rd7982, %rd7908;
	add.s64 	%rd7984, %rd7881, %rd21525;
	ld.const.u64 	%rd7985, [%rd7975];
	add.s64 	%rd7986, %rd7984, %rd7985;
	add.s64 	%rd7987, %rd7986, %rd7983;
	add.s64 	%rd7988, %rd7987, %rd7980;
	add.s64 	%rd7989, %rd7988, %rd7892;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4869,%dummy}, %rd7973;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4870}, %rd7973;
	}
	shf.r.wrap.b32 	%r4871, %r4870, %r4869, 28;
	shf.r.wrap.b32 	%r4872, %r4869, %r4870, 28;
	mov.b64 	%rd7990, {%r4872, %r4871};
	shf.l.wrap.b32 	%r4873, %r4869, %r4870, 30;
	shf.l.wrap.b32 	%r4874, %r4870, %r4869, 30;
	mov.b64 	%rd7991, {%r4874, %r4873};
	xor.b64  	%rd7992, %rd7991, %rd7990;
	shf.l.wrap.b32 	%r4875, %r4869, %r4870, 25;
	shf.l.wrap.b32 	%r4876, %r4870, %r4869, 25;
	mov.b64 	%rd7993, {%r4876, %r4875};
	xor.b64  	%rd7994, %rd7992, %rd7993;
	xor.b64  	%rd7995, %rd7973, %rd7919;
	xor.b64  	%rd7996, %rd7973, %rd7946;
	and.b64  	%rd7997, %rd7996, %rd7995;
	xor.b64  	%rd7998, %rd7997, %rd7973;
	add.s64 	%rd7999, %rd7988, %rd7998;
	add.s64 	%rd8000, %rd7999, %rd7994;
	add.s32 	%r4877, %r14354, 6;
	mul.wide.s32 	%rd8001, %r4877, 8;
	add.s64 	%rd8002, %rd6761, %rd8001;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4878,%dummy}, %rd7989;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4879}, %rd7989;
	}
	shf.r.wrap.b32 	%r4880, %r4879, %r4878, 14;
	shf.r.wrap.b32 	%r4881, %r4878, %r4879, 14;
	mov.b64 	%rd8003, {%r4881, %r4880};
	shf.r.wrap.b32 	%r4882, %r4879, %r4878, 18;
	shf.r.wrap.b32 	%r4883, %r4878, %r4879, 18;
	mov.b64 	%rd8004, {%r4883, %r4882};
	xor.b64  	%rd8005, %rd8004, %rd8003;
	shf.l.wrap.b32 	%r4884, %r4878, %r4879, 23;
	shf.l.wrap.b32 	%r4885, %r4879, %r4878, 23;
	mov.b64 	%rd8006, {%r4885, %r4884};
	xor.b64  	%rd8007, %rd8005, %rd8006;
	xor.b64  	%rd8008, %rd7962, %rd7935;
	and.b64  	%rd8009, %rd7989, %rd8008;
	xor.b64  	%rd8010, %rd8009, %rd7935;
	add.s64 	%rd8011, %rd7908, %rd21526;
	ld.const.u64 	%rd8012, [%rd8002];
	add.s64 	%rd8013, %rd8011, %rd8012;
	add.s64 	%rd8014, %rd8013, %rd8010;
	add.s64 	%rd8015, %rd8014, %rd8007;
	add.s64 	%rd8016, %rd8015, %rd7919;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4886,%dummy}, %rd8000;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4887}, %rd8000;
	}
	shf.r.wrap.b32 	%r4888, %r4887, %r4886, 28;
	shf.r.wrap.b32 	%r4889, %r4886, %r4887, 28;
	mov.b64 	%rd8017, {%r4889, %r4888};
	shf.l.wrap.b32 	%r4890, %r4886, %r4887, 30;
	shf.l.wrap.b32 	%r4891, %r4887, %r4886, 30;
	mov.b64 	%rd8018, {%r4891, %r4890};
	xor.b64  	%rd8019, %rd8018, %rd8017;
	shf.l.wrap.b32 	%r4892, %r4886, %r4887, 25;
	shf.l.wrap.b32 	%r4893, %r4887, %r4886, 25;
	mov.b64 	%rd8020, {%r4893, %r4892};
	xor.b64  	%rd8021, %rd8019, %rd8020;
	xor.b64  	%rd8022, %rd8000, %rd7946;
	xor.b64  	%rd8023, %rd8000, %rd7973;
	and.b64  	%rd8024, %rd8023, %rd8022;
	xor.b64  	%rd8025, %rd8024, %rd8000;
	add.s64 	%rd8026, %rd8015, %rd8025;
	add.s64 	%rd8027, %rd8026, %rd8021;
	add.s32 	%r4894, %r14354, 7;
	mul.wide.s32 	%rd8028, %r4894, 8;
	add.s64 	%rd8029, %rd6761, %rd8028;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4895,%dummy}, %rd8016;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4896}, %rd8016;
	}
	shf.r.wrap.b32 	%r4897, %r4896, %r4895, 14;
	shf.r.wrap.b32 	%r4898, %r4895, %r4896, 14;
	mov.b64 	%rd8030, {%r4898, %r4897};
	shf.r.wrap.b32 	%r4899, %r4896, %r4895, 18;
	shf.r.wrap.b32 	%r4900, %r4895, %r4896, 18;
	mov.b64 	%rd8031, {%r4900, %r4899};
	xor.b64  	%rd8032, %rd8031, %rd8030;
	shf.l.wrap.b32 	%r4901, %r4895, %r4896, 23;
	shf.l.wrap.b32 	%r4902, %r4896, %r4895, 23;
	mov.b64 	%rd8033, {%r4902, %r4901};
	xor.b64  	%rd8034, %rd8032, %rd8033;
	xor.b64  	%rd8035, %rd7989, %rd7962;
	and.b64  	%rd8036, %rd8016, %rd8035;
	xor.b64  	%rd8037, %rd8036, %rd7962;
	add.s64 	%rd8038, %rd7935, %rd21527;
	ld.const.u64 	%rd8039, [%rd8029];
	add.s64 	%rd8040, %rd8038, %rd8039;
	add.s64 	%rd8041, %rd8040, %rd8037;
	add.s64 	%rd8042, %rd8041, %rd8034;
	add.s64 	%rd8043, %rd8042, %rd7946;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4903,%dummy}, %rd8027;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4904}, %rd8027;
	}
	shf.r.wrap.b32 	%r4905, %r4904, %r4903, 28;
	shf.r.wrap.b32 	%r4906, %r4903, %r4904, 28;
	mov.b64 	%rd8044, {%r4906, %r4905};
	shf.l.wrap.b32 	%r4907, %r4903, %r4904, 30;
	shf.l.wrap.b32 	%r4908, %r4904, %r4903, 30;
	mov.b64 	%rd8045, {%r4908, %r4907};
	xor.b64  	%rd8046, %rd8045, %rd8044;
	shf.l.wrap.b32 	%r4909, %r4903, %r4904, 25;
	shf.l.wrap.b32 	%r4910, %r4904, %r4903, 25;
	mov.b64 	%rd8047, {%r4910, %r4909};
	xor.b64  	%rd8048, %rd8046, %rd8047;
	xor.b64  	%rd8049, %rd8027, %rd7973;
	xor.b64  	%rd8050, %rd8027, %rd8000;
	and.b64  	%rd8051, %rd8050, %rd8049;
	xor.b64  	%rd8052, %rd8051, %rd8027;
	add.s64 	%rd8053, %rd8042, %rd8052;
	add.s64 	%rd8054, %rd8053, %rd8048;
	add.s32 	%r4911, %r14354, 8;
	mul.wide.s32 	%rd8055, %r4911, 8;
	add.s64 	%rd8056, %rd6761, %rd8055;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4912,%dummy}, %rd8043;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4913}, %rd8043;
	}
	shf.r.wrap.b32 	%r4914, %r4913, %r4912, 14;
	shf.r.wrap.b32 	%r4915, %r4912, %r4913, 14;
	mov.b64 	%rd8057, {%r4915, %r4914};
	shf.r.wrap.b32 	%r4916, %r4913, %r4912, 18;
	shf.r.wrap.b32 	%r4917, %r4912, %r4913, 18;
	mov.b64 	%rd8058, {%r4917, %r4916};
	xor.b64  	%rd8059, %rd8058, %rd8057;
	shf.l.wrap.b32 	%r4918, %r4912, %r4913, 23;
	shf.l.wrap.b32 	%r4919, %r4913, %r4912, 23;
	mov.b64 	%rd8060, {%r4919, %r4918};
	xor.b64  	%rd8061, %rd8059, %rd8060;
	xor.b64  	%rd8062, %rd8016, %rd7989;
	and.b64  	%rd8063, %rd8043, %rd8062;
	xor.b64  	%rd8064, %rd8063, %rd7989;
	add.s64 	%rd8065, %rd7962, %rd21511;
	ld.const.u64 	%rd8066, [%rd8056];
	add.s64 	%rd8067, %rd8065, %rd8066;
	add.s64 	%rd8068, %rd8067, %rd8064;
	add.s64 	%rd8069, %rd8068, %rd8061;
	add.s64 	%rd8070, %rd8069, %rd7973;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4920,%dummy}, %rd8054;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4921}, %rd8054;
	}
	shf.r.wrap.b32 	%r4922, %r4921, %r4920, 28;
	shf.r.wrap.b32 	%r4923, %r4920, %r4921, 28;
	mov.b64 	%rd8071, {%r4923, %r4922};
	shf.l.wrap.b32 	%r4924, %r4920, %r4921, 30;
	shf.l.wrap.b32 	%r4925, %r4921, %r4920, 30;
	mov.b64 	%rd8072, {%r4925, %r4924};
	xor.b64  	%rd8073, %rd8072, %rd8071;
	shf.l.wrap.b32 	%r4926, %r4920, %r4921, 25;
	shf.l.wrap.b32 	%r4927, %r4921, %r4920, 25;
	mov.b64 	%rd8074, {%r4927, %r4926};
	xor.b64  	%rd8075, %rd8073, %rd8074;
	xor.b64  	%rd8076, %rd8054, %rd8000;
	xor.b64  	%rd8077, %rd8054, %rd8027;
	and.b64  	%rd8078, %rd8077, %rd8076;
	xor.b64  	%rd8079, %rd8078, %rd8054;
	add.s64 	%rd8080, %rd8069, %rd8079;
	add.s64 	%rd8081, %rd8080, %rd8075;
	add.s32 	%r4928, %r14354, 9;
	mul.wide.s32 	%rd8082, %r4928, 8;
	add.s64 	%rd8083, %rd6761, %rd8082;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4929,%dummy}, %rd8070;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4930}, %rd8070;
	}
	shf.r.wrap.b32 	%r4931, %r4930, %r4929, 14;
	shf.r.wrap.b32 	%r4932, %r4929, %r4930, 14;
	mov.b64 	%rd8084, {%r4932, %r4931};
	shf.r.wrap.b32 	%r4933, %r4930, %r4929, 18;
	shf.r.wrap.b32 	%r4934, %r4929, %r4930, 18;
	mov.b64 	%rd8085, {%r4934, %r4933};
	xor.b64  	%rd8086, %rd8085, %rd8084;
	shf.l.wrap.b32 	%r4935, %r4929, %r4930, 23;
	shf.l.wrap.b32 	%r4936, %r4930, %r4929, 23;
	mov.b64 	%rd8087, {%r4936, %r4935};
	xor.b64  	%rd8088, %rd8086, %rd8087;
	xor.b64  	%rd8089, %rd8043, %rd8016;
	and.b64  	%rd8090, %rd8070, %rd8089;
	xor.b64  	%rd8091, %rd8090, %rd8016;
	add.s64 	%rd8092, %rd7989, %rd21510;
	ld.const.u64 	%rd8093, [%rd8083];
	add.s64 	%rd8094, %rd8092, %rd8093;
	add.s64 	%rd8095, %rd8094, %rd8091;
	add.s64 	%rd8096, %rd8095, %rd8088;
	add.s64 	%rd8097, %rd8096, %rd8000;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4937,%dummy}, %rd8081;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4938}, %rd8081;
	}
	shf.r.wrap.b32 	%r4939, %r4938, %r4937, 28;
	shf.r.wrap.b32 	%r4940, %r4937, %r4938, 28;
	mov.b64 	%rd8098, {%r4940, %r4939};
	shf.l.wrap.b32 	%r4941, %r4937, %r4938, 30;
	shf.l.wrap.b32 	%r4942, %r4938, %r4937, 30;
	mov.b64 	%rd8099, {%r4942, %r4941};
	xor.b64  	%rd8100, %rd8099, %rd8098;
	shf.l.wrap.b32 	%r4943, %r4937, %r4938, 25;
	shf.l.wrap.b32 	%r4944, %r4938, %r4937, 25;
	mov.b64 	%rd8101, {%r4944, %r4943};
	xor.b64  	%rd8102, %rd8100, %rd8101;
	xor.b64  	%rd8103, %rd8081, %rd8027;
	xor.b64  	%rd8104, %rd8081, %rd8054;
	and.b64  	%rd8105, %rd8104, %rd8103;
	xor.b64  	%rd8106, %rd8105, %rd8081;
	add.s64 	%rd8107, %rd8096, %rd8106;
	add.s64 	%rd8108, %rd8107, %rd8102;
	add.s32 	%r4945, %r14354, 10;
	mul.wide.s32 	%rd8109, %r4945, 8;
	add.s64 	%rd8110, %rd6761, %rd8109;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4946,%dummy}, %rd8097;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4947}, %rd8097;
	}
	shf.r.wrap.b32 	%r4948, %r4947, %r4946, 14;
	shf.r.wrap.b32 	%r4949, %r4946, %r4947, 14;
	mov.b64 	%rd8111, {%r4949, %r4948};
	shf.r.wrap.b32 	%r4950, %r4947, %r4946, 18;
	shf.r.wrap.b32 	%r4951, %r4946, %r4947, 18;
	mov.b64 	%rd8112, {%r4951, %r4950};
	xor.b64  	%rd8113, %rd8112, %rd8111;
	shf.l.wrap.b32 	%r4952, %r4946, %r4947, 23;
	shf.l.wrap.b32 	%r4953, %r4947, %r4946, 23;
	mov.b64 	%rd8114, {%r4953, %r4952};
	xor.b64  	%rd8115, %rd8113, %rd8114;
	xor.b64  	%rd8116, %rd8070, %rd8043;
	and.b64  	%rd8117, %rd8097, %rd8116;
	xor.b64  	%rd8118, %rd8117, %rd8043;
	add.s64 	%rd8119, %rd8016, %rd21509;
	ld.const.u64 	%rd8120, [%rd8110];
	add.s64 	%rd8121, %rd8119, %rd8120;
	add.s64 	%rd8122, %rd8121, %rd8118;
	add.s64 	%rd8123, %rd8122, %rd8115;
	add.s64 	%rd8124, %rd8123, %rd8027;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4954,%dummy}, %rd8108;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4955}, %rd8108;
	}
	shf.r.wrap.b32 	%r4956, %r4955, %r4954, 28;
	shf.r.wrap.b32 	%r4957, %r4954, %r4955, 28;
	mov.b64 	%rd8125, {%r4957, %r4956};
	shf.l.wrap.b32 	%r4958, %r4954, %r4955, 30;
	shf.l.wrap.b32 	%r4959, %r4955, %r4954, 30;
	mov.b64 	%rd8126, {%r4959, %r4958};
	xor.b64  	%rd8127, %rd8126, %rd8125;
	shf.l.wrap.b32 	%r4960, %r4954, %r4955, 25;
	shf.l.wrap.b32 	%r4961, %r4955, %r4954, 25;
	mov.b64 	%rd8128, {%r4961, %r4960};
	xor.b64  	%rd8129, %rd8127, %rd8128;
	xor.b64  	%rd8130, %rd8108, %rd8054;
	xor.b64  	%rd8131, %rd8108, %rd8081;
	and.b64  	%rd8132, %rd8131, %rd8130;
	xor.b64  	%rd8133, %rd8132, %rd8108;
	add.s64 	%rd8134, %rd8123, %rd8133;
	add.s64 	%rd8135, %rd8134, %rd8129;
	add.s32 	%r4962, %r14354, 11;
	mul.wide.s32 	%rd8136, %r4962, 8;
	add.s64 	%rd8137, %rd6761, %rd8136;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4963,%dummy}, %rd8124;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4964}, %rd8124;
	}
	shf.r.wrap.b32 	%r4965, %r4964, %r4963, 14;
	shf.r.wrap.b32 	%r4966, %r4963, %r4964, 14;
	mov.b64 	%rd8138, {%r4966, %r4965};
	shf.r.wrap.b32 	%r4967, %r4964, %r4963, 18;
	shf.r.wrap.b32 	%r4968, %r4963, %r4964, 18;
	mov.b64 	%rd8139, {%r4968, %r4967};
	xor.b64  	%rd8140, %rd8139, %rd8138;
	shf.l.wrap.b32 	%r4969, %r4963, %r4964, 23;
	shf.l.wrap.b32 	%r4970, %r4964, %r4963, 23;
	mov.b64 	%rd8141, {%r4970, %r4969};
	xor.b64  	%rd8142, %rd8140, %rd8141;
	xor.b64  	%rd8143, %rd8097, %rd8070;
	and.b64  	%rd8144, %rd8124, %rd8143;
	xor.b64  	%rd8145, %rd8144, %rd8070;
	add.s64 	%rd8146, %rd8043, %rd21508;
	ld.const.u64 	%rd8147, [%rd8137];
	add.s64 	%rd8148, %rd8146, %rd8147;
	add.s64 	%rd8149, %rd8148, %rd8145;
	add.s64 	%rd8150, %rd8149, %rd8142;
	add.s64 	%rd8151, %rd8150, %rd8054;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4971,%dummy}, %rd8135;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4972}, %rd8135;
	}
	shf.r.wrap.b32 	%r4973, %r4972, %r4971, 28;
	shf.r.wrap.b32 	%r4974, %r4971, %r4972, 28;
	mov.b64 	%rd8152, {%r4974, %r4973};
	shf.l.wrap.b32 	%r4975, %r4971, %r4972, 30;
	shf.l.wrap.b32 	%r4976, %r4972, %r4971, 30;
	mov.b64 	%rd8153, {%r4976, %r4975};
	xor.b64  	%rd8154, %rd8153, %rd8152;
	shf.l.wrap.b32 	%r4977, %r4971, %r4972, 25;
	shf.l.wrap.b32 	%r4978, %r4972, %r4971, 25;
	mov.b64 	%rd8155, {%r4978, %r4977};
	xor.b64  	%rd8156, %rd8154, %rd8155;
	xor.b64  	%rd8157, %rd8135, %rd8081;
	xor.b64  	%rd8158, %rd8135, %rd8108;
	and.b64  	%rd8159, %rd8158, %rd8157;
	xor.b64  	%rd8160, %rd8159, %rd8135;
	add.s64 	%rd8161, %rd8150, %rd8160;
	add.s64 	%rd8162, %rd8161, %rd8156;
	add.s32 	%r4979, %r14354, 12;
	mul.wide.s32 	%rd8163, %r4979, 8;
	add.s64 	%rd8164, %rd6761, %rd8163;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4980,%dummy}, %rd8151;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4981}, %rd8151;
	}
	shf.r.wrap.b32 	%r4982, %r4981, %r4980, 14;
	shf.r.wrap.b32 	%r4983, %r4980, %r4981, 14;
	mov.b64 	%rd8165, {%r4983, %r4982};
	shf.r.wrap.b32 	%r4984, %r4981, %r4980, 18;
	shf.r.wrap.b32 	%r4985, %r4980, %r4981, 18;
	mov.b64 	%rd8166, {%r4985, %r4984};
	xor.b64  	%rd8167, %rd8166, %rd8165;
	shf.l.wrap.b32 	%r4986, %r4980, %r4981, 23;
	shf.l.wrap.b32 	%r4987, %r4981, %r4980, 23;
	mov.b64 	%rd8168, {%r4987, %r4986};
	xor.b64  	%rd8169, %rd8167, %rd8168;
	xor.b64  	%rd8170, %rd8124, %rd8097;
	and.b64  	%rd8171, %rd8151, %rd8170;
	xor.b64  	%rd8172, %rd8171, %rd8097;
	add.s64 	%rd8173, %rd8070, %rd21507;
	ld.const.u64 	%rd8174, [%rd8164];
	add.s64 	%rd8175, %rd8173, %rd8174;
	add.s64 	%rd8176, %rd8175, %rd8172;
	add.s64 	%rd8177, %rd8176, %rd8169;
	add.s64 	%rd21519, %rd8177, %rd8081;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4988,%dummy}, %rd8162;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4989}, %rd8162;
	}
	shf.r.wrap.b32 	%r4990, %r4989, %r4988, 28;
	shf.r.wrap.b32 	%r4991, %r4988, %r4989, 28;
	mov.b64 	%rd8178, {%r4991, %r4990};
	shf.l.wrap.b32 	%r4992, %r4988, %r4989, 30;
	shf.l.wrap.b32 	%r4993, %r4989, %r4988, 30;
	mov.b64 	%rd8179, {%r4993, %r4992};
	xor.b64  	%rd8180, %rd8179, %rd8178;
	shf.l.wrap.b32 	%r4994, %r4988, %r4989, 25;
	shf.l.wrap.b32 	%r4995, %r4989, %r4988, 25;
	mov.b64 	%rd8181, {%r4995, %r4994};
	xor.b64  	%rd8182, %rd8180, %rd8181;
	xor.b64  	%rd8183, %rd8162, %rd8108;
	xor.b64  	%rd8184, %rd8162, %rd8135;
	and.b64  	%rd8185, %rd8184, %rd8183;
	xor.b64  	%rd8186, %rd8185, %rd8162;
	add.s64 	%rd8187, %rd8177, %rd8186;
	add.s64 	%rd21515, %rd8187, %rd8182;
	add.s32 	%r4996, %r14354, 13;
	mul.wide.s32 	%rd8188, %r4996, 8;
	add.s64 	%rd8189, %rd6761, %rd8188;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r4997,%dummy}, %rd21519;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r4998}, %rd21519;
	}
	shf.r.wrap.b32 	%r4999, %r4998, %r4997, 14;
	shf.r.wrap.b32 	%r5000, %r4997, %r4998, 14;
	mov.b64 	%rd8190, {%r5000, %r4999};
	shf.r.wrap.b32 	%r5001, %r4998, %r4997, 18;
	shf.r.wrap.b32 	%r5002, %r4997, %r4998, 18;
	mov.b64 	%rd8191, {%r5002, %r5001};
	xor.b64  	%rd8192, %rd8191, %rd8190;
	shf.l.wrap.b32 	%r5003, %r4997, %r4998, 23;
	shf.l.wrap.b32 	%r5004, %r4998, %r4997, 23;
	mov.b64 	%rd8193, {%r5004, %r5003};
	xor.b64  	%rd8194, %rd8192, %rd8193;
	xor.b64  	%rd8195, %rd8151, %rd8124;
	and.b64  	%rd8196, %rd21519, %rd8195;
	xor.b64  	%rd8197, %rd8196, %rd8124;
	add.s64 	%rd8198, %rd8097, %rd21506;
	ld.const.u64 	%rd8199, [%rd8189];
	add.s64 	%rd8200, %rd8198, %rd8199;
	add.s64 	%rd8201, %rd8200, %rd8197;
	add.s64 	%rd8202, %rd8201, %rd8194;
	add.s64 	%rd21518, %rd8202, %rd8108;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5005,%dummy}, %rd21515;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5006}, %rd21515;
	}
	shf.r.wrap.b32 	%r5007, %r5006, %r5005, 28;
	shf.r.wrap.b32 	%r5008, %r5005, %r5006, 28;
	mov.b64 	%rd8203, {%r5008, %r5007};
	shf.l.wrap.b32 	%r5009, %r5005, %r5006, 30;
	shf.l.wrap.b32 	%r5010, %r5006, %r5005, 30;
	mov.b64 	%rd8204, {%r5010, %r5009};
	xor.b64  	%rd8205, %rd8204, %rd8203;
	shf.l.wrap.b32 	%r5011, %r5005, %r5006, 25;
	shf.l.wrap.b32 	%r5012, %r5006, %r5005, 25;
	mov.b64 	%rd8206, {%r5012, %r5011};
	xor.b64  	%rd8207, %rd8205, %rd8206;
	xor.b64  	%rd8208, %rd21515, %rd8135;
	xor.b64  	%rd8209, %rd21515, %rd8162;
	and.b64  	%rd8210, %rd8209, %rd8208;
	xor.b64  	%rd8211, %rd8210, %rd21515;
	add.s64 	%rd8212, %rd8202, %rd8211;
	add.s64 	%rd21514, %rd8212, %rd8207;
	add.s32 	%r5013, %r14354, 14;
	mul.wide.s32 	%rd8213, %r5013, 8;
	add.s64 	%rd8214, %rd6761, %rd8213;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5014,%dummy}, %rd21518;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5015}, %rd21518;
	}
	shf.r.wrap.b32 	%r5016, %r5015, %r5014, 14;
	shf.r.wrap.b32 	%r5017, %r5014, %r5015, 14;
	mov.b64 	%rd8215, {%r5017, %r5016};
	shf.r.wrap.b32 	%r5018, %r5015, %r5014, 18;
	shf.r.wrap.b32 	%r5019, %r5014, %r5015, 18;
	mov.b64 	%rd8216, {%r5019, %r5018};
	xor.b64  	%rd8217, %rd8216, %rd8215;
	shf.l.wrap.b32 	%r5020, %r5014, %r5015, 23;
	shf.l.wrap.b32 	%r5021, %r5015, %r5014, 23;
	mov.b64 	%rd8218, {%r5021, %r5020};
	xor.b64  	%rd8219, %rd8217, %rd8218;
	xor.b64  	%rd8220, %rd21519, %rd8151;
	and.b64  	%rd8221, %rd21518, %rd8220;
	xor.b64  	%rd8222, %rd8221, %rd8151;
	add.s64 	%rd8223, %rd8124, %rd21505;
	ld.const.u64 	%rd8224, [%rd8214];
	add.s64 	%rd8225, %rd8223, %rd8224;
	add.s64 	%rd8226, %rd8225, %rd8222;
	add.s64 	%rd8227, %rd8226, %rd8219;
	add.s64 	%rd21517, %rd8227, %rd8135;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5022,%dummy}, %rd21514;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5023}, %rd21514;
	}
	shf.r.wrap.b32 	%r5024, %r5023, %r5022, 28;
	shf.r.wrap.b32 	%r5025, %r5022, %r5023, 28;
	mov.b64 	%rd8228, {%r5025, %r5024};
	shf.l.wrap.b32 	%r5026, %r5022, %r5023, 30;
	shf.l.wrap.b32 	%r5027, %r5023, %r5022, 30;
	mov.b64 	%rd8229, {%r5027, %r5026};
	xor.b64  	%rd8230, %rd8229, %rd8228;
	shf.l.wrap.b32 	%r5028, %r5022, %r5023, 25;
	shf.l.wrap.b32 	%r5029, %r5023, %r5022, 25;
	mov.b64 	%rd8231, {%r5029, %r5028};
	xor.b64  	%rd8232, %rd8230, %rd8231;
	xor.b64  	%rd8233, %rd21514, %rd8162;
	xor.b64  	%rd8234, %rd21514, %rd21515;
	and.b64  	%rd8235, %rd8234, %rd8233;
	xor.b64  	%rd8236, %rd8235, %rd21514;
	add.s64 	%rd8237, %rd8227, %rd8236;
	add.s64 	%rd21513, %rd8237, %rd8232;
	add.s32 	%r5030, %r14354, 15;
	mul.wide.s32 	%rd8238, %r5030, 8;
	add.s64 	%rd8239, %rd6761, %rd8238;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5031,%dummy}, %rd21517;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5032}, %rd21517;
	}
	shf.r.wrap.b32 	%r5033, %r5032, %r5031, 14;
	shf.r.wrap.b32 	%r5034, %r5031, %r5032, 14;
	mov.b64 	%rd8240, {%r5034, %r5033};
	shf.r.wrap.b32 	%r5035, %r5032, %r5031, 18;
	shf.r.wrap.b32 	%r5036, %r5031, %r5032, 18;
	mov.b64 	%rd8241, {%r5036, %r5035};
	xor.b64  	%rd8242, %rd8241, %rd8240;
	shf.l.wrap.b32 	%r5037, %r5031, %r5032, 23;
	shf.l.wrap.b32 	%r5038, %r5032, %r5031, 23;
	mov.b64 	%rd8243, {%r5038, %r5037};
	xor.b64  	%rd8244, %rd8242, %rd8243;
	xor.b64  	%rd8245, %rd21518, %rd21519;
	and.b64  	%rd8246, %rd21517, %rd8245;
	xor.b64  	%rd8247, %rd8246, %rd21519;
	add.s64 	%rd8248, %rd8151, %rd21504;
	ld.const.u64 	%rd8249, [%rd8239];
	add.s64 	%rd8250, %rd8248, %rd8249;
	add.s64 	%rd8251, %rd8250, %rd8247;
	add.s64 	%rd8252, %rd8251, %rd8244;
	add.s64 	%rd21516, %rd8252, %rd8162;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5039,%dummy}, %rd21513;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5040}, %rd21513;
	}
	shf.r.wrap.b32 	%r5041, %r5040, %r5039, 28;
	shf.r.wrap.b32 	%r5042, %r5039, %r5040, 28;
	mov.b64 	%rd8253, {%r5042, %r5041};
	shf.l.wrap.b32 	%r5043, %r5039, %r5040, 30;
	shf.l.wrap.b32 	%r5044, %r5040, %r5039, 30;
	mov.b64 	%rd8254, {%r5044, %r5043};
	xor.b64  	%rd8255, %rd8254, %rd8253;
	shf.l.wrap.b32 	%r5045, %r5039, %r5040, 25;
	shf.l.wrap.b32 	%r5046, %r5040, %r5039, 25;
	mov.b64 	%rd8256, {%r5046, %r5045};
	xor.b64  	%rd8257, %rd8255, %rd8256;
	xor.b64  	%rd8258, %rd21513, %rd21515;
	xor.b64  	%rd8259, %rd21513, %rd21514;
	and.b64  	%rd8260, %rd8259, %rd8258;
	xor.b64  	%rd8261, %rd8260, %rd21513;
	add.s64 	%rd8262, %rd8252, %rd8261;
	add.s64 	%rd21512, %rd8262, %rd8257;
	add.s32 	%r14354, %r14354, 16;
	setp.lt.s32	%p65, %r14354, 80;
	@%p65 bra 	BB3_102;

	add.s64 	%rd8263, %rd553, %rd21512;
	st.local.u64 	[%rd1], %rd8263;
	add.s64 	%rd8264, %rd555, %rd21513;
	st.local.u64 	[%rd1+8], %rd8264;
	add.s64 	%rd8265, %rd554, %rd21514;
	st.local.u64 	[%rd1+16], %rd8265;
	add.s64 	%rd8266, %rd552, %rd21515;
	st.local.u64 	[%rd1+24], %rd8266;
	add.s64 	%rd8267, %rd548, %rd21516;
	st.local.u64 	[%rd1+32], %rd8267;
	add.s64 	%rd8268, %rd550, %rd21517;
	st.local.u64 	[%rd1+40], %rd8268;
	add.s64 	%rd8269, %rd549, %rd21518;
	st.local.u64 	[%rd1+48], %rd8269;
	add.s64 	%rd8270, %rd551, %rd21519;
	st.local.u64 	[%rd1+56], %rd8270;
	add.s32 	%r141, %r2, -128;
	setp.lt.s32	%p66, %r141, 1;
	@%p66 bra 	BB3_120;

	and.b32  	%r142, %r141, 3;
	setp.eq.s32	%p67, %r142, 0;
	mov.u32 	%r14357, 0;
	@%p67 bra 	BB3_108;

	setp.eq.s32	%p68, %r142, 1;
	mov.u32 	%r14355, 0;
	@%p68 bra 	BB3_107;

	setp.ne.s32	%p69, %r142, 2;
	selp.u64	%rd8271, 1, 0, %p69;
	selp.b64	%rd8272, 134, 135, %p69;
	add.s64 	%rd8273, %rd527, %rd8272;
	ld.local.u8 	%rs101, [%rd8273];
	xor.b64  	%rd8274, %rd8271, 7;
	add.s64 	%rd8275, %rd179, %rd8274;
	st.local.u8 	[%rd8275], %rs101;
	selp.b32	%r14355, 2, 1, %p69;

BB3_107:
	add.s32 	%r5049, %r14355, 128;
	xor.b32  	%r5050, %r5049, 7;
	cvt.u64.u32	%rd8276, %r5050;
	add.s64 	%rd8277, %rd527, %rd8276;
	ld.local.u8 	%rs102, [%rd8277];
	xor.b32  	%r5051, %r14355, 7;
	cvt.s64.s32	%rd8278, %r5051;
	add.s64 	%rd8279, %rd179, %rd8278;
	st.local.u8 	[%rd8279], %rs102;
	add.s32 	%r14357, %r14355, 1;

BB3_108:
	setp.lt.u32	%p70, %r141, 4;
	@%p70 bra 	BB3_120;

BB3_109:
	add.s32 	%r5052, %r14357, 128;
	xor.b32  	%r5053, %r5052, 7;
	cvt.s64.s32	%rd8280, %r5053;
	add.s64 	%rd8281, %rd527, %rd8280;
	ld.local.u8 	%rs103, [%rd8281];
	xor.b32  	%r5054, %r14357, 7;
	cvt.s64.s32	%rd8282, %r5054;
	add.s64 	%rd8283, %rd179, %rd8282;
	st.local.u8 	[%rd8283], %rs103;
	add.s32 	%r5055, %r14357, 129;
	xor.b32  	%r5056, %r5055, 7;
	cvt.s64.s32	%rd8284, %r5056;
	add.s64 	%rd8285, %rd527, %rd8284;
	ld.local.u8 	%rs104, [%rd8285];
	add.s32 	%r5057, %r14357, 1;
	xor.b32  	%r5058, %r5057, 7;
	cvt.s64.s32	%rd8286, %r5058;
	add.s64 	%rd8287, %rd179, %rd8286;
	st.local.u8 	[%rd8287], %rs104;
	add.s32 	%r5059, %r14357, 130;
	xor.b32  	%r5060, %r5059, 7;
	cvt.s64.s32	%rd8288, %r5060;
	add.s64 	%rd8289, %rd527, %rd8288;
	ld.local.u8 	%rs105, [%rd8289];
	add.s32 	%r5061, %r14357, 2;
	xor.b32  	%r5062, %r5061, 7;
	cvt.s64.s32	%rd8290, %r5062;
	add.s64 	%rd8291, %rd179, %rd8290;
	st.local.u8 	[%rd8291], %rs105;
	add.s32 	%r5063, %r14357, 131;
	xor.b32  	%r5064, %r5063, 7;
	cvt.s64.s32	%rd8292, %r5064;
	add.s64 	%rd8293, %rd527, %rd8292;
	ld.local.u8 	%rs106, [%rd8293];
	add.s32 	%r5065, %r14357, 3;
	xor.b32  	%r5066, %r5065, 7;
	cvt.s64.s32	%rd8294, %r5066;
	add.s64 	%rd8295, %rd179, %rd8294;
	st.local.u8 	[%rd8295], %rs106;
	add.s32 	%r14357, %r14357, 4;
	setp.lt.s32	%p71, %r14357, %r141;
	@%p71 bra 	BB3_109;

BB3_120:
	ld.local.u32 	%r5088, [%rd1+192];
	and.b32  	%r161, %r5088, 127;
	add.s32 	%r5089, %r5088, %r3;
	st.local.u32 	[%rd1+192], %r5089;
	add.s32 	%r162, %r161, %r3;
	setp.lt.s32	%p78, %r162, 128;
	@%p78 bra 	BB3_141;
	bra.uni 	BB3_121;

BB3_141:
	setp.lt.s32	%p91, %r3, 1;
	@%p91 bra 	BB3_150;

	and.b32  	%r5858, %r3, 3;
	mov.u32 	%r14377, 0;
	setp.eq.s32	%p92, %r5858, 0;
	@%p92 bra 	BB3_148;

	setp.eq.s32	%p93, %r5858, 1;
	@%p93 bra 	BB3_147;

	setp.eq.s32	%p94, %r5858, 2;
	@%p94 bra 	BB3_146;

	ld.local.u8 	%rs128, [%rd1808+7];
	xor.b32  	%r5860, %r161, 7;
	cvt.u64.u32	%rd9406, %r5860;
	add.s64 	%rd9407, %rd179, %rd9406;
	st.local.u8 	[%rd9407], %rs128;
	add.s32 	%r161, %r161, 1;
	mov.u32 	%r14377, 1;

BB3_146:
	xor.b32  	%r5861, %r14377, 7;
	cvt.u64.u32	%rd9408, %r5861;
	add.s64 	%rd9409, %rd1808, %rd9408;
	ld.local.u8 	%rs129, [%rd9409];
	xor.b32  	%r5862, %r161, 7;
	cvt.s64.s32	%rd9410, %r5862;
	add.s64 	%rd9411, %rd179, %rd9410;
	st.local.u8 	[%rd9411], %rs129;
	add.s32 	%r161, %r161, 1;
	add.s32 	%r14377, %r14377, 1;

BB3_147:
	xor.b32  	%r5863, %r14377, 7;
	cvt.s64.s32	%rd9412, %r5863;
	add.s64 	%rd9413, %rd1808, %rd9412;
	ld.local.u8 	%rs130, [%rd9413];
	xor.b32  	%r5864, %r161, 7;
	cvt.s64.s32	%rd9414, %r5864;
	add.s64 	%rd9415, %rd179, %rd9414;
	st.local.u8 	[%rd9415], %rs130;
	add.s32 	%r161, %r161, 1;
	add.s32 	%r14377, %r14377, 1;

BB3_148:
	setp.lt.u32	%p95, %r3, 4;
	@%p95 bra 	BB3_150;

BB3_149:
	xor.b32  	%r5865, %r14377, 7;
	cvt.s64.s32	%rd9416, %r5865;
	add.s64 	%rd9417, %rd1808, %rd9416;
	ld.local.u8 	%rs131, [%rd9417];
	xor.b32  	%r5866, %r161, 7;
	cvt.s64.s32	%rd9418, %r5866;
	add.s64 	%rd9419, %rd179, %rd9418;
	st.local.u8 	[%rd9419], %rs131;
	add.s32 	%r5867, %r14377, 1;
	xor.b32  	%r5868, %r5867, 7;
	cvt.s64.s32	%rd9420, %r5868;
	add.s64 	%rd9421, %rd1808, %rd9420;
	ld.local.u8 	%rs132, [%rd9421];
	add.s32 	%r5869, %r161, 1;
	xor.b32  	%r5870, %r5869, 7;
	cvt.s64.s32	%rd9422, %r5870;
	add.s64 	%rd9423, %rd179, %rd9422;
	st.local.u8 	[%rd9423], %rs132;
	add.s32 	%r5871, %r14377, 2;
	xor.b32  	%r5872, %r5871, 7;
	cvt.s64.s32	%rd9424, %r5872;
	add.s64 	%rd9425, %rd1808, %rd9424;
	ld.local.u8 	%rs133, [%rd9425];
	add.s32 	%r5873, %r161, 2;
	xor.b32  	%r5874, %r5873, 7;
	cvt.s64.s32	%rd9426, %r5874;
	add.s64 	%rd9427, %rd179, %rd9426;
	st.local.u8 	[%rd9427], %rs133;
	add.s32 	%r5875, %r14377, 3;
	xor.b32  	%r5876, %r5875, 7;
	cvt.s64.s32	%rd9428, %r5876;
	add.s64 	%rd9429, %rd1808, %rd9428;
	ld.local.u8 	%rs134, [%rd9429];
	add.s32 	%r5877, %r161, 3;
	xor.b32  	%r5878, %r5877, 7;
	cvt.s64.s32	%rd9430, %r5878;
	add.s64 	%rd9431, %rd179, %rd9430;
	st.local.u8 	[%rd9431], %rs134;
	add.s32 	%r14377, %r14377, 4;
	setp.lt.s32	%p96, %r14377, %r3;
	add.s32 	%r161, %r161, 4;
	@%p96 bra 	BB3_149;
	bra.uni 	BB3_150;

BB3_121:
	sub.s32 	%r163, %r2861, %r161;
	mov.u32 	%r5092, 1;
	max.u32 	%r164, %r163, %r5092;
	and.b32  	%r165, %r164, 3;
	setp.eq.s32	%p79, %r165, 0;
	mov.u32 	%r14369, 0;
	@%p79 bra 	BB3_128;

	setp.eq.s32	%p80, %r165, 1;
	mov.u32 	%r14365, 0;
	@%p80 bra 	BB3_127;

	setp.eq.s32	%p81, %r165, 2;
	mov.u32 	%r5094, 0;
	@%p81 bra 	BB3_124;
	bra.uni 	BB3_125;

BB3_124:
	mov.u32 	%r5092, %r5094;
	bra.uni 	BB3_126;

BB3_125:
	ld.local.u8 	%rs114, [%rd1808+7];
	xor.b32  	%r5096, %r161, 7;
	cvt.u64.u32	%rd8320, %r5096;
	add.s64 	%rd8321, %rd179, %rd8320;
	st.local.u8 	[%rd8321], %rs114;
	add.s32 	%r161, %r161, 1;

BB3_126:
	xor.b32  	%r5097, %r5092, 7;
	cvt.u64.u32	%rd8322, %r5097;
	add.s64 	%rd8323, %rd1808, %rd8322;
	ld.local.u8 	%rs115, [%rd8323];
	xor.b32  	%r5098, %r161, 7;
	cvt.s64.s32	%rd8324, %r5098;
	add.s64 	%rd8325, %rd179, %rd8324;
	st.local.u8 	[%rd8325], %rs115;
	add.s32 	%r161, %r161, 1;
	add.s32 	%r14365, %r5092, 1;

BB3_127:
	xor.b32  	%r5099, %r14365, 7;
	cvt.s64.s32	%rd8326, %r5099;
	add.s64 	%rd8327, %rd1808, %rd8326;
	ld.local.u8 	%rs116, [%rd8327];
	xor.b32  	%r5100, %r161, 7;
	cvt.s64.s32	%rd8328, %r5100;
	add.s64 	%rd8329, %rd179, %rd8328;
	st.local.u8 	[%rd8329], %rs116;
	add.s32 	%r161, %r161, 1;
	add.s32 	%r14369, %r14365, 1;

BB3_128:
	setp.lt.u32	%p82, %r164, 4;
	@%p82 bra 	BB3_130;

BB3_129:
	xor.b32  	%r5101, %r14369, 7;
	cvt.s64.s32	%rd8330, %r5101;
	add.s64 	%rd8331, %rd1808, %rd8330;
	ld.local.u8 	%rs117, [%rd8331];
	xor.b32  	%r5102, %r161, 7;
	cvt.s64.s32	%rd8332, %r5102;
	add.s64 	%rd8333, %rd179, %rd8332;
	st.local.u8 	[%rd8333], %rs117;
	add.s32 	%r5103, %r14369, 1;
	xor.b32  	%r5104, %r5103, 7;
	cvt.s64.s32	%rd8334, %r5104;
	add.s64 	%rd8335, %rd1808, %rd8334;
	ld.local.u8 	%rs118, [%rd8335];
	add.s32 	%r5105, %r161, 1;
	xor.b32  	%r5106, %r5105, 7;
	cvt.s64.s32	%rd8336, %r5106;
	add.s64 	%rd8337, %rd179, %rd8336;
	st.local.u8 	[%rd8337], %rs118;
	add.s32 	%r5107, %r14369, 2;
	xor.b32  	%r5108, %r5107, 7;
	cvt.s64.s32	%rd8338, %r5108;
	add.s64 	%rd8339, %rd1808, %rd8338;
	ld.local.u8 	%rs119, [%rd8339];
	add.s32 	%r5109, %r161, 2;
	xor.b32  	%r5110, %r5109, 7;
	cvt.s64.s32	%rd8340, %r5110;
	add.s64 	%rd8341, %rd179, %rd8340;
	st.local.u8 	[%rd8341], %rs119;
	add.s32 	%r5111, %r14369, 3;
	xor.b32  	%r5112, %r5111, 7;
	cvt.s64.s32	%rd8342, %r5112;
	add.s64 	%rd8343, %rd1808, %rd8342;
	ld.local.u8 	%rs120, [%rd8343];
	add.s32 	%r5113, %r161, 3;
	xor.b32  	%r5114, %r5113, 7;
	cvt.s64.s32	%rd8344, %r5114;
	add.s64 	%rd8345, %rd179, %rd8344;
	st.local.u8 	[%rd8345], %rs120;
	add.s32 	%r14369, %r14369, 4;
	setp.lt.s32	%p83, %r14369, %r163;
	add.s32 	%r161, %r161, 4;
	@%p83 bra 	BB3_129;

BB3_130:
	ld.local.u64 	%rd8346, [%rd1+64];
	shr.u64 	%rd8347, %rd8346, 32;
	ld.local.u64 	%rd8348, [%rd1+72];
	shr.u64 	%rd8349, %rd8348, 32;
	ld.local.u64 	%rd8350, [%rd1+80];
	shr.u64 	%rd8351, %rd8350, 32;
	ld.local.u64 	%rd8352, [%rd1+88];
	shr.u64 	%rd8353, %rd8352, 32;
	ld.local.u64 	%rd8354, [%rd1+96];
	shr.u64 	%rd8355, %rd8354, 32;
	ld.local.u64 	%rd8356, [%rd1+104];
	shr.u64 	%rd8357, %rd8356, 32;
	ld.local.u64 	%rd8358, [%rd1+112];
	shr.u64 	%rd8359, %rd8358, 32;
	ld.local.u64 	%rd8360, [%rd1+120];
	shr.u64 	%rd8361, %rd8360, 32;
	ld.local.u64 	%rd8362, [%rd1+128];
	shr.u64 	%rd8363, %rd8362, 32;
	ld.local.u64 	%rd8364, [%rd1+136];
	shr.u64 	%rd8365, %rd8364, 32;
	ld.local.u64 	%rd8366, [%rd1+144];
	shr.u64 	%rd8367, %rd8366, 32;
	ld.local.u64 	%rd8368, [%rd1+152];
	shr.u64 	%rd8369, %rd8368, 32;
	ld.local.u64 	%rd8370, [%rd1+160];
	shr.u64 	%rd8371, %rd8370, 32;
	ld.local.u64 	%rd8372, [%rd1+168];
	shr.u64 	%rd8373, %rd8372, 32;
	ld.local.u64 	%rd8374, [%rd1+176];
	shr.u64 	%rd8375, %rd8374, 32;
	ld.local.u64 	%rd8376, [%rd1+184];
	shr.u64 	%rd8377, %rd8376, 32;
	bfi.b64 	%rd21544, %rd8347, %rd8346, 32, 32;
	bfi.b64 	%rd21545, %rd8349, %rd8348, 32, 32;
	bfi.b64 	%rd21546, %rd8351, %rd8350, 32, 32;
	bfi.b64 	%rd21547, %rd8353, %rd8352, 32, 32;
	bfi.b64 	%rd21548, %rd8355, %rd8354, 32, 32;
	bfi.b64 	%rd21549, %rd8357, %rd8356, 32, 32;
	bfi.b64 	%rd21550, %rd8359, %rd8358, 32, 32;
	bfi.b64 	%rd21551, %rd8361, %rd8360, 32, 32;
	bfi.b64 	%rd21535, %rd8363, %rd8362, 32, 32;
	bfi.b64 	%rd21534, %rd8365, %rd8364, 32, 32;
	bfi.b64 	%rd21533, %rd8367, %rd8366, 32, 32;
	bfi.b64 	%rd21532, %rd8369, %rd8368, 32, 32;
	bfi.b64 	%rd21531, %rd8371, %rd8370, 32, 32;
	bfi.b64 	%rd21530, %rd8373, %rd8372, 32, 32;
	bfi.b64 	%rd21529, %rd8375, %rd8374, 32, 32;
	bfi.b64 	%rd21528, %rd8377, %rd8376, 32, 32;
	ld.local.u64 	%rd630, [%rd1+32];
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5116,%dummy}, %rd630;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5117}, %rd630;
	}
	shf.r.wrap.b32 	%r5118, %r5117, %r5116, 14;
	shf.r.wrap.b32 	%r5119, %r5116, %r5117, 14;
	mov.b64 	%rd8378, {%r5119, %r5118};
	shf.r.wrap.b32 	%r5120, %r5117, %r5116, 18;
	shf.r.wrap.b32 	%r5121, %r5116, %r5117, 18;
	mov.b64 	%rd8379, {%r5121, %r5120};
	xor.b64  	%rd8380, %rd8379, %rd8378;
	shf.l.wrap.b32 	%r5122, %r5116, %r5117, 23;
	shf.l.wrap.b32 	%r5123, %r5117, %r5116, 23;
	mov.b64 	%rd8381, {%r5123, %r5122};
	xor.b64  	%rd8382, %rd8380, %rd8381;
	ld.local.u64 	%rd631, [%rd1+48];
	ld.local.u64 	%rd632, [%rd1+40];
	xor.b64  	%rd8383, %rd631, %rd632;
	and.b64  	%rd8384, %rd8383, %rd630;
	xor.b64  	%rd8385, %rd8384, %rd631;
	ld.local.u64 	%rd633, [%rd1+56];
	add.s64 	%rd8386, %rd633, %rd21544;
	add.s64 	%rd8387, %rd8386, %rd21454;
	add.s64 	%rd8388, %rd8387, %rd8385;
	add.s64 	%rd8389, %rd8388, %rd8382;
	ld.local.u64 	%rd634, [%rd1+24];
	add.s64 	%rd8390, %rd8389, %rd634;
	ld.local.u64 	%rd635, [%rd1];
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5124,%dummy}, %rd635;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5125}, %rd635;
	}
	shf.r.wrap.b32 	%r5126, %r5125, %r5124, 28;
	shf.r.wrap.b32 	%r5127, %r5124, %r5125, 28;
	mov.b64 	%rd8391, {%r5127, %r5126};
	shf.l.wrap.b32 	%r5128, %r5124, %r5125, 30;
	shf.l.wrap.b32 	%r5129, %r5125, %r5124, 30;
	mov.b64 	%rd8392, {%r5129, %r5128};
	xor.b64  	%rd8393, %rd8392, %rd8391;
	shf.l.wrap.b32 	%r5130, %r5124, %r5125, 25;
	shf.l.wrap.b32 	%r5131, %r5125, %r5124, 25;
	mov.b64 	%rd8394, {%r5131, %r5130};
	xor.b64  	%rd8395, %rd8393, %rd8394;
	ld.local.u64 	%rd636, [%rd1+16];
	xor.b64  	%rd8396, %rd636, %rd635;
	ld.local.u64 	%rd637, [%rd1+8];
	xor.b64  	%rd8397, %rd637, %rd635;
	and.b64  	%rd8398, %rd8396, %rd8397;
	xor.b64  	%rd8399, %rd8398, %rd635;
	add.s64 	%rd8400, %rd8389, %rd8399;
	add.s64 	%rd8401, %rd8400, %rd8395;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5132,%dummy}, %rd8390;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5133}, %rd8390;
	}
	shf.r.wrap.b32 	%r5134, %r5133, %r5132, 14;
	shf.r.wrap.b32 	%r5135, %r5132, %r5133, 14;
	mov.b64 	%rd8402, {%r5135, %r5134};
	shf.r.wrap.b32 	%r5136, %r5133, %r5132, 18;
	shf.r.wrap.b32 	%r5137, %r5132, %r5133, 18;
	mov.b64 	%rd8403, {%r5137, %r5136};
	xor.b64  	%rd8404, %rd8403, %rd8402;
	shf.l.wrap.b32 	%r5138, %r5132, %r5133, 23;
	shf.l.wrap.b32 	%r5139, %r5133, %r5132, 23;
	mov.b64 	%rd8405, {%r5139, %r5138};
	xor.b64  	%rd8406, %rd8404, %rd8405;
	xor.b64  	%rd8407, %rd632, %rd630;
	and.b64  	%rd8408, %rd8390, %rd8407;
	xor.b64  	%rd8409, %rd8408, %rd632;
	add.s64 	%rd8410, %rd631, %rd21545;
	add.s64 	%rd8411, %rd8410, %rd21453;
	add.s64 	%rd8412, %rd8411, %rd8409;
	add.s64 	%rd8413, %rd8412, %rd8406;
	add.s64 	%rd8414, %rd8413, %rd636;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5140,%dummy}, %rd8401;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5141}, %rd8401;
	}
	shf.r.wrap.b32 	%r5142, %r5141, %r5140, 28;
	shf.r.wrap.b32 	%r5143, %r5140, %r5141, 28;
	mov.b64 	%rd8415, {%r5143, %r5142};
	shf.l.wrap.b32 	%r5144, %r5140, %r5141, 30;
	shf.l.wrap.b32 	%r5145, %r5141, %r5140, 30;
	mov.b64 	%rd8416, {%r5145, %r5144};
	xor.b64  	%rd8417, %rd8416, %rd8415;
	shf.l.wrap.b32 	%r5146, %r5140, %r5141, 25;
	shf.l.wrap.b32 	%r5147, %r5141, %r5140, 25;
	mov.b64 	%rd8418, {%r5147, %r5146};
	xor.b64  	%rd8419, %rd8417, %rd8418;
	xor.b64  	%rd8420, %rd8401, %rd637;
	xor.b64  	%rd8421, %rd8401, %rd635;
	and.b64  	%rd8422, %rd8421, %rd8420;
	xor.b64  	%rd8423, %rd8422, %rd8401;
	add.s64 	%rd8424, %rd8413, %rd8423;
	add.s64 	%rd8425, %rd8424, %rd8419;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5148,%dummy}, %rd8414;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5149}, %rd8414;
	}
	shf.r.wrap.b32 	%r5150, %r5149, %r5148, 14;
	shf.r.wrap.b32 	%r5151, %r5148, %r5149, 14;
	mov.b64 	%rd8426, {%r5151, %r5150};
	shf.r.wrap.b32 	%r5152, %r5149, %r5148, 18;
	shf.r.wrap.b32 	%r5153, %r5148, %r5149, 18;
	mov.b64 	%rd8427, {%r5153, %r5152};
	xor.b64  	%rd8428, %rd8427, %rd8426;
	shf.l.wrap.b32 	%r5154, %r5148, %r5149, 23;
	shf.l.wrap.b32 	%r5155, %r5149, %r5148, 23;
	mov.b64 	%rd8429, {%r5155, %r5154};
	xor.b64  	%rd8430, %rd8428, %rd8429;
	xor.b64  	%rd8431, %rd8390, %rd630;
	and.b64  	%rd8432, %rd8414, %rd8431;
	xor.b64  	%rd8433, %rd8432, %rd630;
	add.s64 	%rd8434, %rd632, %rd21546;
	add.s64 	%rd8435, %rd8434, %rd21452;
	add.s64 	%rd8436, %rd8435, %rd8433;
	add.s64 	%rd8437, %rd8436, %rd8430;
	add.s64 	%rd8438, %rd8437, %rd637;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5156,%dummy}, %rd8425;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5157}, %rd8425;
	}
	shf.r.wrap.b32 	%r5158, %r5157, %r5156, 28;
	shf.r.wrap.b32 	%r5159, %r5156, %r5157, 28;
	mov.b64 	%rd8439, {%r5159, %r5158};
	shf.l.wrap.b32 	%r5160, %r5156, %r5157, 30;
	shf.l.wrap.b32 	%r5161, %r5157, %r5156, 30;
	mov.b64 	%rd8440, {%r5161, %r5160};
	xor.b64  	%rd8441, %rd8440, %rd8439;
	shf.l.wrap.b32 	%r5162, %r5156, %r5157, 25;
	shf.l.wrap.b32 	%r5163, %r5157, %r5156, 25;
	mov.b64 	%rd8442, {%r5163, %r5162};
	xor.b64  	%rd8443, %rd8441, %rd8442;
	xor.b64  	%rd8444, %rd8425, %rd635;
	xor.b64  	%rd8445, %rd8425, %rd8401;
	and.b64  	%rd8446, %rd8445, %rd8444;
	xor.b64  	%rd8447, %rd8446, %rd8425;
	add.s64 	%rd8448, %rd8437, %rd8447;
	add.s64 	%rd8449, %rd8448, %rd8443;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5164,%dummy}, %rd8438;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5165}, %rd8438;
	}
	shf.r.wrap.b32 	%r5166, %r5165, %r5164, 14;
	shf.r.wrap.b32 	%r5167, %r5164, %r5165, 14;
	mov.b64 	%rd8450, {%r5167, %r5166};
	shf.r.wrap.b32 	%r5168, %r5165, %r5164, 18;
	shf.r.wrap.b32 	%r5169, %r5164, %r5165, 18;
	mov.b64 	%rd8451, {%r5169, %r5168};
	xor.b64  	%rd8452, %rd8451, %rd8450;
	shf.l.wrap.b32 	%r5170, %r5164, %r5165, 23;
	shf.l.wrap.b32 	%r5171, %r5165, %r5164, 23;
	mov.b64 	%rd8453, {%r5171, %r5170};
	xor.b64  	%rd8454, %rd8452, %rd8453;
	xor.b64  	%rd8455, %rd8414, %rd8390;
	and.b64  	%rd8456, %rd8438, %rd8455;
	xor.b64  	%rd8457, %rd8456, %rd8390;
	add.s64 	%rd8458, %rd630, %rd21547;
	add.s64 	%rd8459, %rd8458, %rd21451;
	add.s64 	%rd8460, %rd8459, %rd8457;
	add.s64 	%rd8461, %rd8460, %rd8454;
	add.s64 	%rd8462, %rd8461, %rd635;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5172,%dummy}, %rd8449;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5173}, %rd8449;
	}
	shf.r.wrap.b32 	%r5174, %r5173, %r5172, 28;
	shf.r.wrap.b32 	%r5175, %r5172, %r5173, 28;
	mov.b64 	%rd8463, {%r5175, %r5174};
	shf.l.wrap.b32 	%r5176, %r5172, %r5173, 30;
	shf.l.wrap.b32 	%r5177, %r5173, %r5172, 30;
	mov.b64 	%rd8464, {%r5177, %r5176};
	xor.b64  	%rd8465, %rd8464, %rd8463;
	shf.l.wrap.b32 	%r5178, %r5172, %r5173, 25;
	shf.l.wrap.b32 	%r5179, %r5173, %r5172, 25;
	mov.b64 	%rd8466, {%r5179, %r5178};
	xor.b64  	%rd8467, %rd8465, %rd8466;
	xor.b64  	%rd8468, %rd8449, %rd8401;
	xor.b64  	%rd8469, %rd8449, %rd8425;
	and.b64  	%rd8470, %rd8469, %rd8468;
	xor.b64  	%rd8471, %rd8470, %rd8449;
	add.s64 	%rd8472, %rd8461, %rd8471;
	add.s64 	%rd8473, %rd8472, %rd8467;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5180,%dummy}, %rd8462;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5181}, %rd8462;
	}
	shf.r.wrap.b32 	%r5182, %r5181, %r5180, 14;
	shf.r.wrap.b32 	%r5183, %r5180, %r5181, 14;
	mov.b64 	%rd8474, {%r5183, %r5182};
	shf.r.wrap.b32 	%r5184, %r5181, %r5180, 18;
	shf.r.wrap.b32 	%r5185, %r5180, %r5181, 18;
	mov.b64 	%rd8475, {%r5185, %r5184};
	xor.b64  	%rd8476, %rd8475, %rd8474;
	shf.l.wrap.b32 	%r5186, %r5180, %r5181, 23;
	shf.l.wrap.b32 	%r5187, %r5181, %r5180, 23;
	mov.b64 	%rd8477, {%r5187, %r5186};
	xor.b64  	%rd8478, %rd8476, %rd8477;
	xor.b64  	%rd8479, %rd8438, %rd8414;
	and.b64  	%rd8480, %rd8462, %rd8479;
	xor.b64  	%rd8481, %rd8480, %rd8414;
	add.s64 	%rd8482, %rd8390, %rd21548;
	add.s64 	%rd8483, %rd8482, %rd21450;
	add.s64 	%rd8484, %rd8483, %rd8481;
	add.s64 	%rd8485, %rd8484, %rd8478;
	add.s64 	%rd8486, %rd8485, %rd8401;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5188,%dummy}, %rd8473;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5189}, %rd8473;
	}
	shf.r.wrap.b32 	%r5190, %r5189, %r5188, 28;
	shf.r.wrap.b32 	%r5191, %r5188, %r5189, 28;
	mov.b64 	%rd8487, {%r5191, %r5190};
	shf.l.wrap.b32 	%r5192, %r5188, %r5189, 30;
	shf.l.wrap.b32 	%r5193, %r5189, %r5188, 30;
	mov.b64 	%rd8488, {%r5193, %r5192};
	xor.b64  	%rd8489, %rd8488, %rd8487;
	shf.l.wrap.b32 	%r5194, %r5188, %r5189, 25;
	shf.l.wrap.b32 	%r5195, %r5189, %r5188, 25;
	mov.b64 	%rd8490, {%r5195, %r5194};
	xor.b64  	%rd8491, %rd8489, %rd8490;
	xor.b64  	%rd8492, %rd8473, %rd8425;
	xor.b64  	%rd8493, %rd8473, %rd8449;
	and.b64  	%rd8494, %rd8493, %rd8492;
	xor.b64  	%rd8495, %rd8494, %rd8473;
	add.s64 	%rd8496, %rd8485, %rd8495;
	add.s64 	%rd8497, %rd8496, %rd8491;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5196,%dummy}, %rd8486;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5197}, %rd8486;
	}
	shf.r.wrap.b32 	%r5198, %r5197, %r5196, 14;
	shf.r.wrap.b32 	%r5199, %r5196, %r5197, 14;
	mov.b64 	%rd8498, {%r5199, %r5198};
	shf.r.wrap.b32 	%r5200, %r5197, %r5196, 18;
	shf.r.wrap.b32 	%r5201, %r5196, %r5197, 18;
	mov.b64 	%rd8499, {%r5201, %r5200};
	xor.b64  	%rd8500, %rd8499, %rd8498;
	shf.l.wrap.b32 	%r5202, %r5196, %r5197, 23;
	shf.l.wrap.b32 	%r5203, %r5197, %r5196, 23;
	mov.b64 	%rd8501, {%r5203, %r5202};
	xor.b64  	%rd8502, %rd8500, %rd8501;
	xor.b64  	%rd8503, %rd8462, %rd8438;
	and.b64  	%rd8504, %rd8486, %rd8503;
	xor.b64  	%rd8505, %rd8504, %rd8438;
	add.s64 	%rd8506, %rd8414, %rd21549;
	add.s64 	%rd8507, %rd8506, %rd21449;
	add.s64 	%rd8508, %rd8507, %rd8505;
	add.s64 	%rd8509, %rd8508, %rd8502;
	add.s64 	%rd8510, %rd8509, %rd8425;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5204,%dummy}, %rd8497;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5205}, %rd8497;
	}
	shf.r.wrap.b32 	%r5206, %r5205, %r5204, 28;
	shf.r.wrap.b32 	%r5207, %r5204, %r5205, 28;
	mov.b64 	%rd8511, {%r5207, %r5206};
	shf.l.wrap.b32 	%r5208, %r5204, %r5205, 30;
	shf.l.wrap.b32 	%r5209, %r5205, %r5204, 30;
	mov.b64 	%rd8512, {%r5209, %r5208};
	xor.b64  	%rd8513, %rd8512, %rd8511;
	shf.l.wrap.b32 	%r5210, %r5204, %r5205, 25;
	shf.l.wrap.b32 	%r5211, %r5205, %r5204, 25;
	mov.b64 	%rd8514, {%r5211, %r5210};
	xor.b64  	%rd8515, %rd8513, %rd8514;
	xor.b64  	%rd8516, %rd8497, %rd8449;
	xor.b64  	%rd8517, %rd8497, %rd8473;
	and.b64  	%rd8518, %rd8517, %rd8516;
	xor.b64  	%rd8519, %rd8518, %rd8497;
	add.s64 	%rd8520, %rd8509, %rd8519;
	add.s64 	%rd8521, %rd8520, %rd8515;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5212,%dummy}, %rd8510;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5213}, %rd8510;
	}
	shf.r.wrap.b32 	%r5214, %r5213, %r5212, 14;
	shf.r.wrap.b32 	%r5215, %r5212, %r5213, 14;
	mov.b64 	%rd8522, {%r5215, %r5214};
	shf.r.wrap.b32 	%r5216, %r5213, %r5212, 18;
	shf.r.wrap.b32 	%r5217, %r5212, %r5213, 18;
	mov.b64 	%rd8523, {%r5217, %r5216};
	xor.b64  	%rd8524, %rd8523, %rd8522;
	shf.l.wrap.b32 	%r5218, %r5212, %r5213, 23;
	shf.l.wrap.b32 	%r5219, %r5213, %r5212, 23;
	mov.b64 	%rd8525, {%r5219, %r5218};
	xor.b64  	%rd8526, %rd8524, %rd8525;
	xor.b64  	%rd8527, %rd8486, %rd8462;
	and.b64  	%rd8528, %rd8510, %rd8527;
	xor.b64  	%rd8529, %rd8528, %rd8462;
	add.s64 	%rd8530, %rd8438, %rd21550;
	add.s64 	%rd8531, %rd8530, %rd21448;
	add.s64 	%rd8532, %rd8531, %rd8529;
	add.s64 	%rd8533, %rd8532, %rd8526;
	add.s64 	%rd8534, %rd8533, %rd8449;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5220,%dummy}, %rd8521;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5221}, %rd8521;
	}
	shf.r.wrap.b32 	%r5222, %r5221, %r5220, 28;
	shf.r.wrap.b32 	%r5223, %r5220, %r5221, 28;
	mov.b64 	%rd8535, {%r5223, %r5222};
	shf.l.wrap.b32 	%r5224, %r5220, %r5221, 30;
	shf.l.wrap.b32 	%r5225, %r5221, %r5220, 30;
	mov.b64 	%rd8536, {%r5225, %r5224};
	xor.b64  	%rd8537, %rd8536, %rd8535;
	shf.l.wrap.b32 	%r5226, %r5220, %r5221, 25;
	shf.l.wrap.b32 	%r5227, %r5221, %r5220, 25;
	mov.b64 	%rd8538, {%r5227, %r5226};
	xor.b64  	%rd8539, %rd8537, %rd8538;
	xor.b64  	%rd8540, %rd8521, %rd8473;
	xor.b64  	%rd8541, %rd8521, %rd8497;
	and.b64  	%rd8542, %rd8541, %rd8540;
	xor.b64  	%rd8543, %rd8542, %rd8521;
	add.s64 	%rd8544, %rd8533, %rd8543;
	add.s64 	%rd8545, %rd8544, %rd8539;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5228,%dummy}, %rd8534;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5229}, %rd8534;
	}
	shf.r.wrap.b32 	%r5230, %r5229, %r5228, 14;
	shf.r.wrap.b32 	%r5231, %r5228, %r5229, 14;
	mov.b64 	%rd8546, {%r5231, %r5230};
	shf.r.wrap.b32 	%r5232, %r5229, %r5228, 18;
	shf.r.wrap.b32 	%r5233, %r5228, %r5229, 18;
	mov.b64 	%rd8547, {%r5233, %r5232};
	xor.b64  	%rd8548, %rd8547, %rd8546;
	shf.l.wrap.b32 	%r5234, %r5228, %r5229, 23;
	shf.l.wrap.b32 	%r5235, %r5229, %r5228, 23;
	mov.b64 	%rd8549, {%r5235, %r5234};
	xor.b64  	%rd8550, %rd8548, %rd8549;
	xor.b64  	%rd8551, %rd8510, %rd8486;
	and.b64  	%rd8552, %rd8534, %rd8551;
	xor.b64  	%rd8553, %rd8552, %rd8486;
	add.s64 	%rd8554, %rd8462, %rd21551;
	add.s64 	%rd8555, %rd8554, %rd21447;
	add.s64 	%rd8556, %rd8555, %rd8553;
	add.s64 	%rd8557, %rd8556, %rd8550;
	add.s64 	%rd8558, %rd8557, %rd8473;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5236,%dummy}, %rd8545;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5237}, %rd8545;
	}
	shf.r.wrap.b32 	%r5238, %r5237, %r5236, 28;
	shf.r.wrap.b32 	%r5239, %r5236, %r5237, 28;
	mov.b64 	%rd8559, {%r5239, %r5238};
	shf.l.wrap.b32 	%r5240, %r5236, %r5237, 30;
	shf.l.wrap.b32 	%r5241, %r5237, %r5236, 30;
	mov.b64 	%rd8560, {%r5241, %r5240};
	xor.b64  	%rd8561, %rd8560, %rd8559;
	shf.l.wrap.b32 	%r5242, %r5236, %r5237, 25;
	shf.l.wrap.b32 	%r5243, %r5237, %r5236, 25;
	mov.b64 	%rd8562, {%r5243, %r5242};
	xor.b64  	%rd8563, %rd8561, %rd8562;
	xor.b64  	%rd8564, %rd8545, %rd8497;
	xor.b64  	%rd8565, %rd8545, %rd8521;
	and.b64  	%rd8566, %rd8565, %rd8564;
	xor.b64  	%rd8567, %rd8566, %rd8545;
	add.s64 	%rd8568, %rd8557, %rd8567;
	add.s64 	%rd8569, %rd8568, %rd8563;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5244,%dummy}, %rd8558;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5245}, %rd8558;
	}
	shf.r.wrap.b32 	%r5246, %r5245, %r5244, 14;
	shf.r.wrap.b32 	%r5247, %r5244, %r5245, 14;
	mov.b64 	%rd8570, {%r5247, %r5246};
	shf.r.wrap.b32 	%r5248, %r5245, %r5244, 18;
	shf.r.wrap.b32 	%r5249, %r5244, %r5245, 18;
	mov.b64 	%rd8571, {%r5249, %r5248};
	xor.b64  	%rd8572, %rd8571, %rd8570;
	shf.l.wrap.b32 	%r5250, %r5244, %r5245, 23;
	shf.l.wrap.b32 	%r5251, %r5245, %r5244, 23;
	mov.b64 	%rd8573, {%r5251, %r5250};
	xor.b64  	%rd8574, %rd8572, %rd8573;
	xor.b64  	%rd8575, %rd8534, %rd8510;
	and.b64  	%rd8576, %rd8558, %rd8575;
	xor.b64  	%rd8577, %rd8576, %rd8510;
	add.s64 	%rd8578, %rd8486, %rd21535;
	add.s64 	%rd8579, %rd8578, %rd21446;
	add.s64 	%rd8580, %rd8579, %rd8577;
	add.s64 	%rd8581, %rd8580, %rd8574;
	add.s64 	%rd8582, %rd8581, %rd8497;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5252,%dummy}, %rd8569;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5253}, %rd8569;
	}
	shf.r.wrap.b32 	%r5254, %r5253, %r5252, 28;
	shf.r.wrap.b32 	%r5255, %r5252, %r5253, 28;
	mov.b64 	%rd8583, {%r5255, %r5254};
	shf.l.wrap.b32 	%r5256, %r5252, %r5253, 30;
	shf.l.wrap.b32 	%r5257, %r5253, %r5252, 30;
	mov.b64 	%rd8584, {%r5257, %r5256};
	xor.b64  	%rd8585, %rd8584, %rd8583;
	shf.l.wrap.b32 	%r5258, %r5252, %r5253, 25;
	shf.l.wrap.b32 	%r5259, %r5253, %r5252, 25;
	mov.b64 	%rd8586, {%r5259, %r5258};
	xor.b64  	%rd8587, %rd8585, %rd8586;
	xor.b64  	%rd8588, %rd8569, %rd8521;
	xor.b64  	%rd8589, %rd8569, %rd8545;
	and.b64  	%rd8590, %rd8589, %rd8588;
	xor.b64  	%rd8591, %rd8590, %rd8569;
	add.s64 	%rd8592, %rd8581, %rd8591;
	add.s64 	%rd8593, %rd8592, %rd8587;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5260,%dummy}, %rd8582;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5261}, %rd8582;
	}
	shf.r.wrap.b32 	%r5262, %r5261, %r5260, 14;
	shf.r.wrap.b32 	%r5263, %r5260, %r5261, 14;
	mov.b64 	%rd8594, {%r5263, %r5262};
	shf.r.wrap.b32 	%r5264, %r5261, %r5260, 18;
	shf.r.wrap.b32 	%r5265, %r5260, %r5261, 18;
	mov.b64 	%rd8595, {%r5265, %r5264};
	xor.b64  	%rd8596, %rd8595, %rd8594;
	shf.l.wrap.b32 	%r5266, %r5260, %r5261, 23;
	shf.l.wrap.b32 	%r5267, %r5261, %r5260, 23;
	mov.b64 	%rd8597, {%r5267, %r5266};
	xor.b64  	%rd8598, %rd8596, %rd8597;
	xor.b64  	%rd8599, %rd8558, %rd8534;
	and.b64  	%rd8600, %rd8582, %rd8599;
	xor.b64  	%rd8601, %rd8600, %rd8534;
	add.s64 	%rd8602, %rd8510, %rd21534;
	add.s64 	%rd8603, %rd8602, %rd21445;
	add.s64 	%rd8604, %rd8603, %rd8601;
	add.s64 	%rd8605, %rd8604, %rd8598;
	add.s64 	%rd8606, %rd8605, %rd8521;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5268,%dummy}, %rd8593;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5269}, %rd8593;
	}
	shf.r.wrap.b32 	%r5270, %r5269, %r5268, 28;
	shf.r.wrap.b32 	%r5271, %r5268, %r5269, 28;
	mov.b64 	%rd8607, {%r5271, %r5270};
	shf.l.wrap.b32 	%r5272, %r5268, %r5269, 30;
	shf.l.wrap.b32 	%r5273, %r5269, %r5268, 30;
	mov.b64 	%rd8608, {%r5273, %r5272};
	xor.b64  	%rd8609, %rd8608, %rd8607;
	shf.l.wrap.b32 	%r5274, %r5268, %r5269, 25;
	shf.l.wrap.b32 	%r5275, %r5269, %r5268, 25;
	mov.b64 	%rd8610, {%r5275, %r5274};
	xor.b64  	%rd8611, %rd8609, %rd8610;
	xor.b64  	%rd8612, %rd8593, %rd8545;
	xor.b64  	%rd8613, %rd8593, %rd8569;
	and.b64  	%rd8614, %rd8613, %rd8612;
	xor.b64  	%rd8615, %rd8614, %rd8593;
	add.s64 	%rd8616, %rd8605, %rd8615;
	add.s64 	%rd8617, %rd8616, %rd8611;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5276,%dummy}, %rd8606;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5277}, %rd8606;
	}
	shf.r.wrap.b32 	%r5278, %r5277, %r5276, 14;
	shf.r.wrap.b32 	%r5279, %r5276, %r5277, 14;
	mov.b64 	%rd8618, {%r5279, %r5278};
	shf.r.wrap.b32 	%r5280, %r5277, %r5276, 18;
	shf.r.wrap.b32 	%r5281, %r5276, %r5277, 18;
	mov.b64 	%rd8619, {%r5281, %r5280};
	xor.b64  	%rd8620, %rd8619, %rd8618;
	shf.l.wrap.b32 	%r5282, %r5276, %r5277, 23;
	shf.l.wrap.b32 	%r5283, %r5277, %r5276, 23;
	mov.b64 	%rd8621, {%r5283, %r5282};
	xor.b64  	%rd8622, %rd8620, %rd8621;
	xor.b64  	%rd8623, %rd8582, %rd8558;
	and.b64  	%rd8624, %rd8606, %rd8623;
	xor.b64  	%rd8625, %rd8624, %rd8558;
	add.s64 	%rd8626, %rd8534, %rd21533;
	add.s64 	%rd8627, %rd8626, %rd21444;
	add.s64 	%rd8628, %rd8627, %rd8625;
	add.s64 	%rd8629, %rd8628, %rd8622;
	add.s64 	%rd8630, %rd8629, %rd8545;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5284,%dummy}, %rd8617;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5285}, %rd8617;
	}
	shf.r.wrap.b32 	%r5286, %r5285, %r5284, 28;
	shf.r.wrap.b32 	%r5287, %r5284, %r5285, 28;
	mov.b64 	%rd8631, {%r5287, %r5286};
	shf.l.wrap.b32 	%r5288, %r5284, %r5285, 30;
	shf.l.wrap.b32 	%r5289, %r5285, %r5284, 30;
	mov.b64 	%rd8632, {%r5289, %r5288};
	xor.b64  	%rd8633, %rd8632, %rd8631;
	shf.l.wrap.b32 	%r5290, %r5284, %r5285, 25;
	shf.l.wrap.b32 	%r5291, %r5285, %r5284, 25;
	mov.b64 	%rd8634, {%r5291, %r5290};
	xor.b64  	%rd8635, %rd8633, %rd8634;
	xor.b64  	%rd8636, %rd8617, %rd8569;
	xor.b64  	%rd8637, %rd8617, %rd8593;
	and.b64  	%rd8638, %rd8637, %rd8636;
	xor.b64  	%rd8639, %rd8638, %rd8617;
	add.s64 	%rd8640, %rd8629, %rd8639;
	add.s64 	%rd8641, %rd8640, %rd8635;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5292,%dummy}, %rd8630;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5293}, %rd8630;
	}
	shf.r.wrap.b32 	%r5294, %r5293, %r5292, 14;
	shf.r.wrap.b32 	%r5295, %r5292, %r5293, 14;
	mov.b64 	%rd8642, {%r5295, %r5294};
	shf.r.wrap.b32 	%r5296, %r5293, %r5292, 18;
	shf.r.wrap.b32 	%r5297, %r5292, %r5293, 18;
	mov.b64 	%rd8643, {%r5297, %r5296};
	xor.b64  	%rd8644, %rd8643, %rd8642;
	shf.l.wrap.b32 	%r5298, %r5292, %r5293, 23;
	shf.l.wrap.b32 	%r5299, %r5293, %r5292, 23;
	mov.b64 	%rd8645, {%r5299, %r5298};
	xor.b64  	%rd8646, %rd8644, %rd8645;
	xor.b64  	%rd8647, %rd8606, %rd8582;
	and.b64  	%rd8648, %rd8630, %rd8647;
	xor.b64  	%rd8649, %rd8648, %rd8582;
	add.s64 	%rd8650, %rd8558, %rd21532;
	add.s64 	%rd8651, %rd8650, %rd21443;
	add.s64 	%rd8652, %rd8651, %rd8649;
	add.s64 	%rd8653, %rd8652, %rd8646;
	add.s64 	%rd8654, %rd8653, %rd8569;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5300,%dummy}, %rd8641;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5301}, %rd8641;
	}
	shf.r.wrap.b32 	%r5302, %r5301, %r5300, 28;
	shf.r.wrap.b32 	%r5303, %r5300, %r5301, 28;
	mov.b64 	%rd8655, {%r5303, %r5302};
	shf.l.wrap.b32 	%r5304, %r5300, %r5301, 30;
	shf.l.wrap.b32 	%r5305, %r5301, %r5300, 30;
	mov.b64 	%rd8656, {%r5305, %r5304};
	xor.b64  	%rd8657, %rd8656, %rd8655;
	shf.l.wrap.b32 	%r5306, %r5300, %r5301, 25;
	shf.l.wrap.b32 	%r5307, %r5301, %r5300, 25;
	mov.b64 	%rd8658, {%r5307, %r5306};
	xor.b64  	%rd8659, %rd8657, %rd8658;
	xor.b64  	%rd8660, %rd8641, %rd8593;
	xor.b64  	%rd8661, %rd8641, %rd8617;
	and.b64  	%rd8662, %rd8661, %rd8660;
	xor.b64  	%rd8663, %rd8662, %rd8641;
	add.s64 	%rd8664, %rd8653, %rd8663;
	add.s64 	%rd8665, %rd8664, %rd8659;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5308,%dummy}, %rd8654;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5309}, %rd8654;
	}
	shf.r.wrap.b32 	%r5310, %r5309, %r5308, 14;
	shf.r.wrap.b32 	%r5311, %r5308, %r5309, 14;
	mov.b64 	%rd8666, {%r5311, %r5310};
	shf.r.wrap.b32 	%r5312, %r5309, %r5308, 18;
	shf.r.wrap.b32 	%r5313, %r5308, %r5309, 18;
	mov.b64 	%rd8667, {%r5313, %r5312};
	xor.b64  	%rd8668, %rd8667, %rd8666;
	shf.l.wrap.b32 	%r5314, %r5308, %r5309, 23;
	shf.l.wrap.b32 	%r5315, %r5309, %r5308, 23;
	mov.b64 	%rd8669, {%r5315, %r5314};
	xor.b64  	%rd8670, %rd8668, %rd8669;
	xor.b64  	%rd8671, %rd8630, %rd8606;
	and.b64  	%rd8672, %rd8654, %rd8671;
	xor.b64  	%rd8673, %rd8672, %rd8606;
	add.s64 	%rd8674, %rd8582, %rd21531;
	add.s64 	%rd8675, %rd8674, %rd21442;
	add.s64 	%rd8676, %rd8675, %rd8673;
	add.s64 	%rd8677, %rd8676, %rd8670;
	add.s64 	%rd21543, %rd8677, %rd8593;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5316,%dummy}, %rd8665;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5317}, %rd8665;
	}
	shf.r.wrap.b32 	%r5318, %r5317, %r5316, 28;
	shf.r.wrap.b32 	%r5319, %r5316, %r5317, 28;
	mov.b64 	%rd8678, {%r5319, %r5318};
	shf.l.wrap.b32 	%r5320, %r5316, %r5317, 30;
	shf.l.wrap.b32 	%r5321, %r5317, %r5316, 30;
	mov.b64 	%rd8679, {%r5321, %r5320};
	xor.b64  	%rd8680, %rd8679, %rd8678;
	shf.l.wrap.b32 	%r5322, %r5316, %r5317, 25;
	shf.l.wrap.b32 	%r5323, %r5317, %r5316, 25;
	mov.b64 	%rd8681, {%r5323, %r5322};
	xor.b64  	%rd8682, %rd8680, %rd8681;
	xor.b64  	%rd8683, %rd8665, %rd8617;
	xor.b64  	%rd8684, %rd8665, %rd8641;
	and.b64  	%rd8685, %rd8684, %rd8683;
	xor.b64  	%rd8686, %rd8685, %rd8665;
	add.s64 	%rd8687, %rd8677, %rd8686;
	add.s64 	%rd21539, %rd8687, %rd8682;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5324,%dummy}, %rd21543;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5325}, %rd21543;
	}
	shf.r.wrap.b32 	%r5326, %r5325, %r5324, 14;
	shf.r.wrap.b32 	%r5327, %r5324, %r5325, 14;
	mov.b64 	%rd8688, {%r5327, %r5326};
	shf.r.wrap.b32 	%r5328, %r5325, %r5324, 18;
	shf.r.wrap.b32 	%r5329, %r5324, %r5325, 18;
	mov.b64 	%rd8689, {%r5329, %r5328};
	xor.b64  	%rd8690, %rd8689, %rd8688;
	shf.l.wrap.b32 	%r5330, %r5324, %r5325, 23;
	shf.l.wrap.b32 	%r5331, %r5325, %r5324, 23;
	mov.b64 	%rd8691, {%r5331, %r5330};
	xor.b64  	%rd8692, %rd8690, %rd8691;
	xor.b64  	%rd8693, %rd8654, %rd8630;
	and.b64  	%rd8694, %rd21543, %rd8693;
	xor.b64  	%rd8695, %rd8694, %rd8630;
	add.s64 	%rd8696, %rd8606, %rd21530;
	add.s64 	%rd8697, %rd8696, %rd21441;
	add.s64 	%rd8698, %rd8697, %rd8695;
	add.s64 	%rd8699, %rd8698, %rd8692;
	add.s64 	%rd21542, %rd8699, %rd8617;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5332,%dummy}, %rd21539;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5333}, %rd21539;
	}
	shf.r.wrap.b32 	%r5334, %r5333, %r5332, 28;
	shf.r.wrap.b32 	%r5335, %r5332, %r5333, 28;
	mov.b64 	%rd8700, {%r5335, %r5334};
	shf.l.wrap.b32 	%r5336, %r5332, %r5333, 30;
	shf.l.wrap.b32 	%r5337, %r5333, %r5332, 30;
	mov.b64 	%rd8701, {%r5337, %r5336};
	xor.b64  	%rd8702, %rd8701, %rd8700;
	shf.l.wrap.b32 	%r5338, %r5332, %r5333, 25;
	shf.l.wrap.b32 	%r5339, %r5333, %r5332, 25;
	mov.b64 	%rd8703, {%r5339, %r5338};
	xor.b64  	%rd8704, %rd8702, %rd8703;
	xor.b64  	%rd8705, %rd21539, %rd8641;
	xor.b64  	%rd8706, %rd21539, %rd8665;
	and.b64  	%rd8707, %rd8706, %rd8705;
	xor.b64  	%rd8708, %rd8707, %rd21539;
	add.s64 	%rd8709, %rd8699, %rd8708;
	add.s64 	%rd21538, %rd8709, %rd8704;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5340,%dummy}, %rd21542;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5341}, %rd21542;
	}
	shf.r.wrap.b32 	%r5342, %r5341, %r5340, 14;
	shf.r.wrap.b32 	%r5343, %r5340, %r5341, 14;
	mov.b64 	%rd8710, {%r5343, %r5342};
	shf.r.wrap.b32 	%r5344, %r5341, %r5340, 18;
	shf.r.wrap.b32 	%r5345, %r5340, %r5341, 18;
	mov.b64 	%rd8711, {%r5345, %r5344};
	xor.b64  	%rd8712, %rd8711, %rd8710;
	shf.l.wrap.b32 	%r5346, %r5340, %r5341, 23;
	shf.l.wrap.b32 	%r5347, %r5341, %r5340, 23;
	mov.b64 	%rd8713, {%r5347, %r5346};
	xor.b64  	%rd8714, %rd8712, %rd8713;
	xor.b64  	%rd8715, %rd21543, %rd8654;
	and.b64  	%rd8716, %rd21542, %rd8715;
	xor.b64  	%rd8717, %rd8716, %rd8654;
	add.s64 	%rd8718, %rd8630, %rd21529;
	add.s64 	%rd8719, %rd8718, %rd21440;
	add.s64 	%rd8720, %rd8719, %rd8717;
	add.s64 	%rd8721, %rd8720, %rd8714;
	add.s64 	%rd21541, %rd8721, %rd8641;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5348,%dummy}, %rd21538;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5349}, %rd21538;
	}
	shf.r.wrap.b32 	%r5350, %r5349, %r5348, 28;
	shf.r.wrap.b32 	%r5351, %r5348, %r5349, 28;
	mov.b64 	%rd8722, {%r5351, %r5350};
	shf.l.wrap.b32 	%r5352, %r5348, %r5349, 30;
	shf.l.wrap.b32 	%r5353, %r5349, %r5348, 30;
	mov.b64 	%rd8723, {%r5353, %r5352};
	xor.b64  	%rd8724, %rd8723, %rd8722;
	shf.l.wrap.b32 	%r5354, %r5348, %r5349, 25;
	shf.l.wrap.b32 	%r5355, %r5349, %r5348, 25;
	mov.b64 	%rd8725, {%r5355, %r5354};
	xor.b64  	%rd8726, %rd8724, %rd8725;
	xor.b64  	%rd8727, %rd21538, %rd8665;
	xor.b64  	%rd8728, %rd21538, %rd21539;
	and.b64  	%rd8729, %rd8728, %rd8727;
	xor.b64  	%rd8730, %rd8729, %rd21538;
	add.s64 	%rd8731, %rd8721, %rd8730;
	add.s64 	%rd21537, %rd8731, %rd8726;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5356,%dummy}, %rd21541;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5357}, %rd21541;
	}
	shf.r.wrap.b32 	%r5358, %r5357, %r5356, 14;
	shf.r.wrap.b32 	%r5359, %r5356, %r5357, 14;
	mov.b64 	%rd8732, {%r5359, %r5358};
	shf.r.wrap.b32 	%r5360, %r5357, %r5356, 18;
	shf.r.wrap.b32 	%r5361, %r5356, %r5357, 18;
	mov.b64 	%rd8733, {%r5361, %r5360};
	xor.b64  	%rd8734, %rd8733, %rd8732;
	shf.l.wrap.b32 	%r5362, %r5356, %r5357, 23;
	shf.l.wrap.b32 	%r5363, %r5357, %r5356, 23;
	mov.b64 	%rd8735, {%r5363, %r5362};
	xor.b64  	%rd8736, %rd8734, %rd8735;
	xor.b64  	%rd8737, %rd21542, %rd21543;
	and.b64  	%rd8738, %rd21541, %rd8737;
	xor.b64  	%rd8739, %rd8738, %rd21543;
	add.s64 	%rd8740, %rd8654, %rd21528;
	add.s64 	%rd8741, %rd8740, %rd21439;
	add.s64 	%rd8742, %rd8741, %rd8739;
	add.s64 	%rd8743, %rd8742, %rd8736;
	add.s64 	%rd21540, %rd8743, %rd8665;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5364,%dummy}, %rd21537;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5365}, %rd21537;
	}
	shf.r.wrap.b32 	%r5366, %r5365, %r5364, 28;
	shf.r.wrap.b32 	%r5367, %r5364, %r5365, 28;
	mov.b64 	%rd8744, {%r5367, %r5366};
	shf.l.wrap.b32 	%r5368, %r5364, %r5365, 30;
	shf.l.wrap.b32 	%r5369, %r5365, %r5364, 30;
	mov.b64 	%rd8745, {%r5369, %r5368};
	xor.b64  	%rd8746, %rd8745, %rd8744;
	shf.l.wrap.b32 	%r5370, %r5364, %r5365, 25;
	shf.l.wrap.b32 	%r5371, %r5365, %r5364, 25;
	mov.b64 	%rd8747, {%r5371, %r5370};
	xor.b64  	%rd8748, %rd8746, %rd8747;
	xor.b64  	%rd8749, %rd21537, %rd21539;
	xor.b64  	%rd8750, %rd21537, %rd21538;
	and.b64  	%rd8751, %rd8750, %rd8749;
	xor.b64  	%rd8752, %rd8751, %rd21537;
	add.s64 	%rd8753, %rd8743, %rd8752;
	add.s64 	%rd21536, %rd8753, %rd8748;
	mov.u32 	%r14371, 16;

BB3_131:
	shr.u64 	%rd8754, %rd21529, 6;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5372,%dummy}, %rd21529;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5373}, %rd21529;
	}
	shf.r.wrap.b32 	%r5374, %r5373, %r5372, 19;
	shf.r.wrap.b32 	%r5375, %r5372, %r5373, 19;
	mov.b64 	%rd8755, {%r5375, %r5374};
	xor.b64  	%rd8756, %rd8755, %rd8754;
	shf.l.wrap.b32 	%r5376, %r5372, %r5373, 3;
	shf.l.wrap.b32 	%r5377, %r5373, %r5372, 3;
	mov.b64 	%rd8757, {%r5377, %r5376};
	xor.b64  	%rd8758, %rd8756, %rd8757;
	shr.u64 	%rd8759, %rd21545, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5378,%dummy}, %rd21545;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5379}, %rd21545;
	}
	shf.r.wrap.b32 	%r5380, %r5379, %r5378, 1;
	shf.r.wrap.b32 	%r5381, %r5378, %r5379, 1;
	mov.b64 	%rd8760, {%r5381, %r5380};
	xor.b64  	%rd8761, %rd8760, %rd8759;
	shf.r.wrap.b32 	%r5382, %r5379, %r5378, 8;
	shf.r.wrap.b32 	%r5383, %r5378, %r5379, 8;
	mov.b64 	%rd8762, {%r5383, %r5382};
	xor.b64  	%rd8763, %rd8761, %rd8762;
	add.s64 	%rd8764, %rd21534, %rd21544;
	add.s64 	%rd8765, %rd8764, %rd8758;
	add.s64 	%rd21544, %rd8765, %rd8763;
	shr.u64 	%rd8766, %rd21528, 6;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5384,%dummy}, %rd21528;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5385}, %rd21528;
	}
	shf.r.wrap.b32 	%r5386, %r5385, %r5384, 19;
	shf.r.wrap.b32 	%r5387, %r5384, %r5385, 19;
	mov.b64 	%rd8767, {%r5387, %r5386};
	xor.b64  	%rd8768, %rd8767, %rd8766;
	shf.l.wrap.b32 	%r5388, %r5384, %r5385, 3;
	shf.l.wrap.b32 	%r5389, %r5385, %r5384, 3;
	mov.b64 	%rd8769, {%r5389, %r5388};
	xor.b64  	%rd8770, %rd8768, %rd8769;
	shr.u64 	%rd8771, %rd21546, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5390,%dummy}, %rd21546;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5391}, %rd21546;
	}
	shf.r.wrap.b32 	%r5392, %r5391, %r5390, 1;
	shf.r.wrap.b32 	%r5393, %r5390, %r5391, 1;
	mov.b64 	%rd8772, {%r5393, %r5392};
	xor.b64  	%rd8773, %rd8772, %rd8771;
	shf.r.wrap.b32 	%r5394, %r5391, %r5390, 8;
	shf.r.wrap.b32 	%r5395, %r5390, %r5391, 8;
	mov.b64 	%rd8774, {%r5395, %r5394};
	xor.b64  	%rd8775, %rd8773, %rd8774;
	add.s64 	%rd8776, %rd21533, %rd21545;
	add.s64 	%rd8777, %rd8776, %rd8770;
	add.s64 	%rd21545, %rd8777, %rd8775;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5396,%dummy}, %rd21544;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5397}, %rd21544;
	}
	shf.r.wrap.b32 	%r5398, %r5397, %r5396, 19;
	shf.r.wrap.b32 	%r5399, %r5396, %r5397, 19;
	mov.b64 	%rd8778, {%r5399, %r5398};
	shf.l.wrap.b32 	%r5400, %r5396, %r5397, 3;
	shf.l.wrap.b32 	%r5401, %r5397, %r5396, 3;
	mov.b64 	%rd8779, {%r5401, %r5400};
	shr.u64 	%rd8780, %rd21544, 6;
	xor.b64  	%rd8781, %rd8778, %rd8780;
	xor.b64  	%rd8782, %rd8781, %rd8779;
	shr.u64 	%rd8783, %rd21547, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5402,%dummy}, %rd21547;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5403}, %rd21547;
	}
	shf.r.wrap.b32 	%r5404, %r5403, %r5402, 1;
	shf.r.wrap.b32 	%r5405, %r5402, %r5403, 1;
	mov.b64 	%rd8784, {%r5405, %r5404};
	xor.b64  	%rd8785, %rd8784, %rd8783;
	shf.r.wrap.b32 	%r5406, %r5403, %r5402, 8;
	shf.r.wrap.b32 	%r5407, %r5402, %r5403, 8;
	mov.b64 	%rd8786, {%r5407, %r5406};
	xor.b64  	%rd8787, %rd8785, %rd8786;
	add.s64 	%rd8788, %rd21532, %rd21546;
	add.s64 	%rd8789, %rd8788, %rd8782;
	add.s64 	%rd21546, %rd8789, %rd8787;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5408,%dummy}, %rd21545;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5409}, %rd21545;
	}
	shf.r.wrap.b32 	%r5410, %r5409, %r5408, 19;
	shf.r.wrap.b32 	%r5411, %r5408, %r5409, 19;
	mov.b64 	%rd8790, {%r5411, %r5410};
	shf.l.wrap.b32 	%r5412, %r5408, %r5409, 3;
	shf.l.wrap.b32 	%r5413, %r5409, %r5408, 3;
	mov.b64 	%rd8791, {%r5413, %r5412};
	shr.u64 	%rd8792, %rd21545, 6;
	xor.b64  	%rd8793, %rd8790, %rd8792;
	xor.b64  	%rd8794, %rd8793, %rd8791;
	shr.u64 	%rd8795, %rd21548, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5414,%dummy}, %rd21548;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5415}, %rd21548;
	}
	shf.r.wrap.b32 	%r5416, %r5415, %r5414, 1;
	shf.r.wrap.b32 	%r5417, %r5414, %r5415, 1;
	mov.b64 	%rd8796, {%r5417, %r5416};
	xor.b64  	%rd8797, %rd8796, %rd8795;
	shf.r.wrap.b32 	%r5418, %r5415, %r5414, 8;
	shf.r.wrap.b32 	%r5419, %r5414, %r5415, 8;
	mov.b64 	%rd8798, {%r5419, %r5418};
	xor.b64  	%rd8799, %rd8797, %rd8798;
	add.s64 	%rd8800, %rd21531, %rd21547;
	add.s64 	%rd8801, %rd8800, %rd8794;
	add.s64 	%rd21547, %rd8801, %rd8799;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5420,%dummy}, %rd21546;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5421}, %rd21546;
	}
	shf.r.wrap.b32 	%r5422, %r5421, %r5420, 19;
	shf.r.wrap.b32 	%r5423, %r5420, %r5421, 19;
	mov.b64 	%rd8802, {%r5423, %r5422};
	shf.l.wrap.b32 	%r5424, %r5420, %r5421, 3;
	shf.l.wrap.b32 	%r5425, %r5421, %r5420, 3;
	mov.b64 	%rd8803, {%r5425, %r5424};
	shr.u64 	%rd8804, %rd21546, 6;
	xor.b64  	%rd8805, %rd8802, %rd8804;
	xor.b64  	%rd8806, %rd8805, %rd8803;
	shr.u64 	%rd8807, %rd21549, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5426,%dummy}, %rd21549;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5427}, %rd21549;
	}
	shf.r.wrap.b32 	%r5428, %r5427, %r5426, 1;
	shf.r.wrap.b32 	%r5429, %r5426, %r5427, 1;
	mov.b64 	%rd8808, {%r5429, %r5428};
	xor.b64  	%rd8809, %rd8808, %rd8807;
	shf.r.wrap.b32 	%r5430, %r5427, %r5426, 8;
	shf.r.wrap.b32 	%r5431, %r5426, %r5427, 8;
	mov.b64 	%rd8810, {%r5431, %r5430};
	xor.b64  	%rd8811, %rd8809, %rd8810;
	add.s64 	%rd8812, %rd21530, %rd21548;
	add.s64 	%rd8813, %rd8812, %rd8806;
	add.s64 	%rd21548, %rd8813, %rd8811;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5432,%dummy}, %rd21547;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5433}, %rd21547;
	}
	shf.r.wrap.b32 	%r5434, %r5433, %r5432, 19;
	shf.r.wrap.b32 	%r5435, %r5432, %r5433, 19;
	mov.b64 	%rd8814, {%r5435, %r5434};
	shf.l.wrap.b32 	%r5436, %r5432, %r5433, 3;
	shf.l.wrap.b32 	%r5437, %r5433, %r5432, 3;
	mov.b64 	%rd8815, {%r5437, %r5436};
	shr.u64 	%rd8816, %rd21547, 6;
	xor.b64  	%rd8817, %rd8814, %rd8816;
	xor.b64  	%rd8818, %rd8817, %rd8815;
	shr.u64 	%rd8819, %rd21550, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5438,%dummy}, %rd21550;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5439}, %rd21550;
	}
	shf.r.wrap.b32 	%r5440, %r5439, %r5438, 1;
	shf.r.wrap.b32 	%r5441, %r5438, %r5439, 1;
	mov.b64 	%rd8820, {%r5441, %r5440};
	xor.b64  	%rd8821, %rd8820, %rd8819;
	shf.r.wrap.b32 	%r5442, %r5439, %r5438, 8;
	shf.r.wrap.b32 	%r5443, %r5438, %r5439, 8;
	mov.b64 	%rd8822, {%r5443, %r5442};
	xor.b64  	%rd8823, %rd8821, %rd8822;
	add.s64 	%rd8824, %rd21529, %rd21549;
	add.s64 	%rd8825, %rd8824, %rd8818;
	add.s64 	%rd21549, %rd8825, %rd8823;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5444,%dummy}, %rd21548;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5445}, %rd21548;
	}
	shf.r.wrap.b32 	%r5446, %r5445, %r5444, 19;
	shf.r.wrap.b32 	%r5447, %r5444, %r5445, 19;
	mov.b64 	%rd8826, {%r5447, %r5446};
	shf.l.wrap.b32 	%r5448, %r5444, %r5445, 3;
	shf.l.wrap.b32 	%r5449, %r5445, %r5444, 3;
	mov.b64 	%rd8827, {%r5449, %r5448};
	shr.u64 	%rd8828, %rd21548, 6;
	xor.b64  	%rd8829, %rd8826, %rd8828;
	xor.b64  	%rd8830, %rd8829, %rd8827;
	shr.u64 	%rd8831, %rd21551, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5450,%dummy}, %rd21551;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5451}, %rd21551;
	}
	shf.r.wrap.b32 	%r5452, %r5451, %r5450, 1;
	shf.r.wrap.b32 	%r5453, %r5450, %r5451, 1;
	mov.b64 	%rd8832, {%r5453, %r5452};
	xor.b64  	%rd8833, %rd8832, %rd8831;
	shf.r.wrap.b32 	%r5454, %r5451, %r5450, 8;
	shf.r.wrap.b32 	%r5455, %r5450, %r5451, 8;
	mov.b64 	%rd8834, {%r5455, %r5454};
	xor.b64  	%rd8835, %rd8833, %rd8834;
	add.s64 	%rd8836, %rd21528, %rd21550;
	add.s64 	%rd8837, %rd8836, %rd8830;
	add.s64 	%rd21550, %rd8837, %rd8835;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5456,%dummy}, %rd21549;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5457}, %rd21549;
	}
	shf.r.wrap.b32 	%r5458, %r5457, %r5456, 19;
	shf.r.wrap.b32 	%r5459, %r5456, %r5457, 19;
	mov.b64 	%rd8838, {%r5459, %r5458};
	shf.l.wrap.b32 	%r5460, %r5456, %r5457, 3;
	shf.l.wrap.b32 	%r5461, %r5457, %r5456, 3;
	mov.b64 	%rd8839, {%r5461, %r5460};
	shr.u64 	%rd8840, %rd21549, 6;
	xor.b64  	%rd8841, %rd8838, %rd8840;
	xor.b64  	%rd8842, %rd8841, %rd8839;
	shr.u64 	%rd8843, %rd21535, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5462,%dummy}, %rd21535;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5463}, %rd21535;
	}
	shf.r.wrap.b32 	%r5464, %r5463, %r5462, 1;
	shf.r.wrap.b32 	%r5465, %r5462, %r5463, 1;
	mov.b64 	%rd8844, {%r5465, %r5464};
	xor.b64  	%rd8845, %rd8844, %rd8843;
	shf.r.wrap.b32 	%r5466, %r5463, %r5462, 8;
	shf.r.wrap.b32 	%r5467, %r5462, %r5463, 8;
	mov.b64 	%rd8846, {%r5467, %r5466};
	xor.b64  	%rd8847, %rd8845, %rd8846;
	add.s64 	%rd8848, %rd21544, %rd21551;
	add.s64 	%rd8849, %rd8848, %rd8842;
	add.s64 	%rd21551, %rd8849, %rd8847;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5468,%dummy}, %rd21550;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5469}, %rd21550;
	}
	shf.r.wrap.b32 	%r5470, %r5469, %r5468, 19;
	shf.r.wrap.b32 	%r5471, %r5468, %r5469, 19;
	mov.b64 	%rd8850, {%r5471, %r5470};
	shf.l.wrap.b32 	%r5472, %r5468, %r5469, 3;
	shf.l.wrap.b32 	%r5473, %r5469, %r5468, 3;
	mov.b64 	%rd8851, {%r5473, %r5472};
	shr.u64 	%rd8852, %rd21550, 6;
	xor.b64  	%rd8853, %rd8850, %rd8852;
	xor.b64  	%rd8854, %rd8853, %rd8851;
	shr.u64 	%rd8855, %rd21534, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5474,%dummy}, %rd21534;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5475}, %rd21534;
	}
	shf.r.wrap.b32 	%r5476, %r5475, %r5474, 1;
	shf.r.wrap.b32 	%r5477, %r5474, %r5475, 1;
	mov.b64 	%rd8856, {%r5477, %r5476};
	xor.b64  	%rd8857, %rd8856, %rd8855;
	shf.r.wrap.b32 	%r5478, %r5475, %r5474, 8;
	shf.r.wrap.b32 	%r5479, %r5474, %r5475, 8;
	mov.b64 	%rd8858, {%r5479, %r5478};
	xor.b64  	%rd8859, %rd8857, %rd8858;
	add.s64 	%rd8860, %rd21545, %rd21535;
	add.s64 	%rd8861, %rd8860, %rd8854;
	add.s64 	%rd21535, %rd8861, %rd8859;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5480,%dummy}, %rd21551;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5481}, %rd21551;
	}
	shf.r.wrap.b32 	%r5482, %r5481, %r5480, 19;
	shf.r.wrap.b32 	%r5483, %r5480, %r5481, 19;
	mov.b64 	%rd8862, {%r5483, %r5482};
	shf.l.wrap.b32 	%r5484, %r5480, %r5481, 3;
	shf.l.wrap.b32 	%r5485, %r5481, %r5480, 3;
	mov.b64 	%rd8863, {%r5485, %r5484};
	shr.u64 	%rd8864, %rd21551, 6;
	xor.b64  	%rd8865, %rd8862, %rd8864;
	xor.b64  	%rd8866, %rd8865, %rd8863;
	shr.u64 	%rd8867, %rd21533, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5486,%dummy}, %rd21533;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5487}, %rd21533;
	}
	shf.r.wrap.b32 	%r5488, %r5487, %r5486, 1;
	shf.r.wrap.b32 	%r5489, %r5486, %r5487, 1;
	mov.b64 	%rd8868, {%r5489, %r5488};
	xor.b64  	%rd8869, %rd8868, %rd8867;
	shf.r.wrap.b32 	%r5490, %r5487, %r5486, 8;
	shf.r.wrap.b32 	%r5491, %r5486, %r5487, 8;
	mov.b64 	%rd8870, {%r5491, %r5490};
	xor.b64  	%rd8871, %rd8869, %rd8870;
	add.s64 	%rd8872, %rd21546, %rd21534;
	add.s64 	%rd8873, %rd8872, %rd8866;
	add.s64 	%rd21534, %rd8873, %rd8871;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5492,%dummy}, %rd21535;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5493}, %rd21535;
	}
	shf.r.wrap.b32 	%r5494, %r5493, %r5492, 19;
	shf.r.wrap.b32 	%r5495, %r5492, %r5493, 19;
	mov.b64 	%rd8874, {%r5495, %r5494};
	shf.l.wrap.b32 	%r5496, %r5492, %r5493, 3;
	shf.l.wrap.b32 	%r5497, %r5493, %r5492, 3;
	mov.b64 	%rd8875, {%r5497, %r5496};
	shr.u64 	%rd8876, %rd21535, 6;
	xor.b64  	%rd8877, %rd8874, %rd8876;
	xor.b64  	%rd8878, %rd8877, %rd8875;
	shr.u64 	%rd8879, %rd21532, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5498,%dummy}, %rd21532;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5499}, %rd21532;
	}
	shf.r.wrap.b32 	%r5500, %r5499, %r5498, 1;
	shf.r.wrap.b32 	%r5501, %r5498, %r5499, 1;
	mov.b64 	%rd8880, {%r5501, %r5500};
	xor.b64  	%rd8881, %rd8880, %rd8879;
	shf.r.wrap.b32 	%r5502, %r5499, %r5498, 8;
	shf.r.wrap.b32 	%r5503, %r5498, %r5499, 8;
	mov.b64 	%rd8882, {%r5503, %r5502};
	xor.b64  	%rd8883, %rd8881, %rd8882;
	add.s64 	%rd8884, %rd21547, %rd21533;
	add.s64 	%rd8885, %rd8884, %rd8878;
	add.s64 	%rd21533, %rd8885, %rd8883;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5504,%dummy}, %rd21534;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5505}, %rd21534;
	}
	shf.r.wrap.b32 	%r5506, %r5505, %r5504, 19;
	shf.r.wrap.b32 	%r5507, %r5504, %r5505, 19;
	mov.b64 	%rd8886, {%r5507, %r5506};
	shf.l.wrap.b32 	%r5508, %r5504, %r5505, 3;
	shf.l.wrap.b32 	%r5509, %r5505, %r5504, 3;
	mov.b64 	%rd8887, {%r5509, %r5508};
	shr.u64 	%rd8888, %rd21534, 6;
	xor.b64  	%rd8889, %rd8886, %rd8888;
	xor.b64  	%rd8890, %rd8889, %rd8887;
	shr.u64 	%rd8891, %rd21531, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5510,%dummy}, %rd21531;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5511}, %rd21531;
	}
	shf.r.wrap.b32 	%r5512, %r5511, %r5510, 1;
	shf.r.wrap.b32 	%r5513, %r5510, %r5511, 1;
	mov.b64 	%rd8892, {%r5513, %r5512};
	xor.b64  	%rd8893, %rd8892, %rd8891;
	shf.r.wrap.b32 	%r5514, %r5511, %r5510, 8;
	shf.r.wrap.b32 	%r5515, %r5510, %r5511, 8;
	mov.b64 	%rd8894, {%r5515, %r5514};
	xor.b64  	%rd8895, %rd8893, %rd8894;
	add.s64 	%rd8896, %rd21548, %rd21532;
	add.s64 	%rd8897, %rd8896, %rd8890;
	add.s64 	%rd21532, %rd8897, %rd8895;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5516,%dummy}, %rd21533;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5517}, %rd21533;
	}
	shf.r.wrap.b32 	%r5518, %r5517, %r5516, 19;
	shf.r.wrap.b32 	%r5519, %r5516, %r5517, 19;
	mov.b64 	%rd8898, {%r5519, %r5518};
	shf.l.wrap.b32 	%r5520, %r5516, %r5517, 3;
	shf.l.wrap.b32 	%r5521, %r5517, %r5516, 3;
	mov.b64 	%rd8899, {%r5521, %r5520};
	shr.u64 	%rd8900, %rd21533, 6;
	xor.b64  	%rd8901, %rd8898, %rd8900;
	xor.b64  	%rd8902, %rd8901, %rd8899;
	shr.u64 	%rd8903, %rd21530, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5522,%dummy}, %rd21530;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5523}, %rd21530;
	}
	shf.r.wrap.b32 	%r5524, %r5523, %r5522, 1;
	shf.r.wrap.b32 	%r5525, %r5522, %r5523, 1;
	mov.b64 	%rd8904, {%r5525, %r5524};
	xor.b64  	%rd8905, %rd8904, %rd8903;
	shf.r.wrap.b32 	%r5526, %r5523, %r5522, 8;
	shf.r.wrap.b32 	%r5527, %r5522, %r5523, 8;
	mov.b64 	%rd8906, {%r5527, %r5526};
	xor.b64  	%rd8907, %rd8905, %rd8906;
	add.s64 	%rd8908, %rd21549, %rd21531;
	add.s64 	%rd8909, %rd8908, %rd8902;
	add.s64 	%rd21531, %rd8909, %rd8907;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5528,%dummy}, %rd21532;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5529}, %rd21532;
	}
	shf.r.wrap.b32 	%r5530, %r5529, %r5528, 19;
	shf.r.wrap.b32 	%r5531, %r5528, %r5529, 19;
	mov.b64 	%rd8910, {%r5531, %r5530};
	shf.l.wrap.b32 	%r5532, %r5528, %r5529, 3;
	shf.l.wrap.b32 	%r5533, %r5529, %r5528, 3;
	mov.b64 	%rd8911, {%r5533, %r5532};
	shr.u64 	%rd8912, %rd21532, 6;
	xor.b64  	%rd8913, %rd8910, %rd8912;
	xor.b64  	%rd8914, %rd8913, %rd8911;
	shr.u64 	%rd8915, %rd21529, 7;
	shf.r.wrap.b32 	%r5534, %r5373, %r5372, 1;
	shf.r.wrap.b32 	%r5535, %r5372, %r5373, 1;
	mov.b64 	%rd8916, {%r5535, %r5534};
	xor.b64  	%rd8917, %rd8916, %rd8915;
	shf.r.wrap.b32 	%r5536, %r5373, %r5372, 8;
	shf.r.wrap.b32 	%r5537, %r5372, %r5373, 8;
	mov.b64 	%rd8918, {%r5537, %r5536};
	xor.b64  	%rd8919, %rd8917, %rd8918;
	add.s64 	%rd8920, %rd21550, %rd21530;
	add.s64 	%rd8921, %rd8920, %rd8914;
	add.s64 	%rd21530, %rd8921, %rd8919;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5538,%dummy}, %rd21531;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5539}, %rd21531;
	}
	shf.r.wrap.b32 	%r5540, %r5539, %r5538, 19;
	shf.r.wrap.b32 	%r5541, %r5538, %r5539, 19;
	mov.b64 	%rd8922, {%r5541, %r5540};
	shf.l.wrap.b32 	%r5542, %r5538, %r5539, 3;
	shf.l.wrap.b32 	%r5543, %r5539, %r5538, 3;
	mov.b64 	%rd8923, {%r5543, %r5542};
	shr.u64 	%rd8924, %rd21531, 6;
	xor.b64  	%rd8925, %rd8922, %rd8924;
	xor.b64  	%rd8926, %rd8925, %rd8923;
	shr.u64 	%rd8927, %rd21528, 7;
	shf.r.wrap.b32 	%r5544, %r5385, %r5384, 1;
	shf.r.wrap.b32 	%r5545, %r5384, %r5385, 1;
	mov.b64 	%rd8928, {%r5545, %r5544};
	xor.b64  	%rd8929, %rd8928, %rd8927;
	shf.r.wrap.b32 	%r5546, %r5385, %r5384, 8;
	shf.r.wrap.b32 	%r5547, %r5384, %r5385, 8;
	mov.b64 	%rd8930, {%r5547, %r5546};
	xor.b64  	%rd8931, %rd8929, %rd8930;
	add.s64 	%rd8932, %rd21551, %rd21529;
	add.s64 	%rd8933, %rd8932, %rd8926;
	add.s64 	%rd21529, %rd8933, %rd8931;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5548,%dummy}, %rd21530;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5549}, %rd21530;
	}
	shf.r.wrap.b32 	%r5550, %r5549, %r5548, 19;
	shf.r.wrap.b32 	%r5551, %r5548, %r5549, 19;
	mov.b64 	%rd8934, {%r5551, %r5550};
	shf.l.wrap.b32 	%r5552, %r5548, %r5549, 3;
	shf.l.wrap.b32 	%r5553, %r5549, %r5548, 3;
	mov.b64 	%rd8935, {%r5553, %r5552};
	shr.u64 	%rd8936, %rd21530, 6;
	xor.b64  	%rd8937, %rd8934, %rd8936;
	xor.b64  	%rd8938, %rd8937, %rd8935;
	shf.r.wrap.b32 	%r5554, %r5397, %r5396, 1;
	shf.r.wrap.b32 	%r5555, %r5396, %r5397, 1;
	mov.b64 	%rd8939, {%r5555, %r5554};
	shf.r.wrap.b32 	%r5556, %r5397, %r5396, 8;
	shf.r.wrap.b32 	%r5557, %r5396, %r5397, 8;
	mov.b64 	%rd8940, {%r5557, %r5556};
	shr.u64 	%rd8941, %rd21544, 7;
	xor.b64  	%rd8942, %rd8939, %rd8941;
	xor.b64  	%rd8943, %rd8942, %rd8940;
	add.s64 	%rd8944, %rd21535, %rd21528;
	add.s64 	%rd8945, %rd8944, %rd8938;
	add.s64 	%rd21528, %rd8945, %rd8943;
	mul.wide.s32 	%rd8946, %r14371, 8;
	add.s64 	%rd8948, %rd6761, %rd8946;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5558,%dummy}, %rd21540;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5559}, %rd21540;
	}
	shf.r.wrap.b32 	%r5560, %r5559, %r5558, 18;
	shf.r.wrap.b32 	%r5561, %r5558, %r5559, 18;
	mov.b64 	%rd8949, {%r5561, %r5560};
	shf.r.wrap.b32 	%r5562, %r5559, %r5558, 14;
	shf.r.wrap.b32 	%r5563, %r5558, %r5559, 14;
	mov.b64 	%rd8950, {%r5563, %r5562};
	xor.b64  	%rd8951, %rd8949, %rd8950;
	shf.l.wrap.b32 	%r5564, %r5558, %r5559, 23;
	shf.l.wrap.b32 	%r5565, %r5559, %r5558, 23;
	mov.b64 	%rd8952, {%r5565, %r5564};
	xor.b64  	%rd8953, %rd8951, %rd8952;
	xor.b64  	%rd8954, %rd21541, %rd21542;
	and.b64  	%rd8955, %rd8954, %rd21540;
	xor.b64  	%rd8956, %rd8955, %rd21542;
	add.s64 	%rd8957, %rd8956, %rd21543;
	add.s64 	%rd8958, %rd8957, %rd21544;
	ld.const.u64 	%rd8959, [%rd8948];
	add.s64 	%rd8960, %rd8958, %rd8959;
	add.s64 	%rd8961, %rd8960, %rd8953;
	add.s64 	%rd8962, %rd8961, %rd21539;
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5566}, %rd21536;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5567,%dummy}, %rd21536;
	}
	shf.l.wrap.b32 	%r5568, %r5567, %r5566, 30;
	shf.l.wrap.b32 	%r5569, %r5566, %r5567, 30;
	mov.b64 	%rd8963, {%r5569, %r5568};
	shf.r.wrap.b32 	%r5570, %r5566, %r5567, 28;
	shf.r.wrap.b32 	%r5571, %r5567, %r5566, 28;
	mov.b64 	%rd8964, {%r5571, %r5570};
	xor.b64  	%rd8965, %rd8963, %rd8964;
	shf.l.wrap.b32 	%r5572, %r5567, %r5566, 25;
	shf.l.wrap.b32 	%r5573, %r5566, %r5567, 25;
	mov.b64 	%rd8966, {%r5573, %r5572};
	xor.b64  	%rd8967, %rd8965, %rd8966;
	xor.b64  	%rd8968, %rd21536, %rd21537;
	xor.b64  	%rd8969, %rd21536, %rd21538;
	and.b64  	%rd8970, %rd8968, %rd8969;
	xor.b64  	%rd8971, %rd8970, %rd21536;
	add.s64 	%rd8972, %rd8961, %rd8971;
	add.s64 	%rd8973, %rd8972, %rd8967;
	add.s32 	%r5574, %r14371, 1;
	mul.wide.s32 	%rd8974, %r5574, 8;
	add.s64 	%rd8975, %rd6761, %rd8974;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5575,%dummy}, %rd8962;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5576}, %rd8962;
	}
	shf.r.wrap.b32 	%r5577, %r5576, %r5575, 14;
	shf.r.wrap.b32 	%r5578, %r5575, %r5576, 14;
	mov.b64 	%rd8976, {%r5578, %r5577};
	shf.r.wrap.b32 	%r5579, %r5576, %r5575, 18;
	shf.r.wrap.b32 	%r5580, %r5575, %r5576, 18;
	mov.b64 	%rd8977, {%r5580, %r5579};
	xor.b64  	%rd8978, %rd8977, %rd8976;
	shf.l.wrap.b32 	%r5581, %r5575, %r5576, 23;
	shf.l.wrap.b32 	%r5582, %r5576, %r5575, 23;
	mov.b64 	%rd8979, {%r5582, %r5581};
	xor.b64  	%rd8980, %rd8978, %rd8979;
	xor.b64  	%rd8981, %rd21540, %rd21541;
	and.b64  	%rd8982, %rd8962, %rd8981;
	xor.b64  	%rd8983, %rd8982, %rd21541;
	add.s64 	%rd8984, %rd21545, %rd21542;
	ld.const.u64 	%rd8985, [%rd8975];
	add.s64 	%rd8986, %rd8984, %rd8985;
	add.s64 	%rd8987, %rd8986, %rd8983;
	add.s64 	%rd8988, %rd8987, %rd8980;
	add.s64 	%rd8989, %rd8988, %rd21538;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5583,%dummy}, %rd8973;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5584}, %rd8973;
	}
	shf.r.wrap.b32 	%r5585, %r5584, %r5583, 28;
	shf.r.wrap.b32 	%r5586, %r5583, %r5584, 28;
	mov.b64 	%rd8990, {%r5586, %r5585};
	shf.l.wrap.b32 	%r5587, %r5583, %r5584, 30;
	shf.l.wrap.b32 	%r5588, %r5584, %r5583, 30;
	mov.b64 	%rd8991, {%r5588, %r5587};
	xor.b64  	%rd8992, %rd8991, %rd8990;
	shf.l.wrap.b32 	%r5589, %r5583, %r5584, 25;
	shf.l.wrap.b32 	%r5590, %r5584, %r5583, 25;
	mov.b64 	%rd8993, {%r5590, %r5589};
	xor.b64  	%rd8994, %rd8992, %rd8993;
	xor.b64  	%rd8995, %rd8973, %rd21537;
	xor.b64  	%rd8996, %rd8973, %rd21536;
	and.b64  	%rd8997, %rd8996, %rd8995;
	xor.b64  	%rd8998, %rd8997, %rd8973;
	add.s64 	%rd8999, %rd8988, %rd8998;
	add.s64 	%rd9000, %rd8999, %rd8994;
	add.s32 	%r5591, %r14371, 2;
	mul.wide.s32 	%rd9001, %r5591, 8;
	add.s64 	%rd9002, %rd6761, %rd9001;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5592,%dummy}, %rd8989;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5593}, %rd8989;
	}
	shf.r.wrap.b32 	%r5594, %r5593, %r5592, 14;
	shf.r.wrap.b32 	%r5595, %r5592, %r5593, 14;
	mov.b64 	%rd9003, {%r5595, %r5594};
	shf.r.wrap.b32 	%r5596, %r5593, %r5592, 18;
	shf.r.wrap.b32 	%r5597, %r5592, %r5593, 18;
	mov.b64 	%rd9004, {%r5597, %r5596};
	xor.b64  	%rd9005, %rd9004, %rd9003;
	shf.l.wrap.b32 	%r5598, %r5592, %r5593, 23;
	shf.l.wrap.b32 	%r5599, %r5593, %r5592, 23;
	mov.b64 	%rd9006, {%r5599, %r5598};
	xor.b64  	%rd9007, %rd9005, %rd9006;
	xor.b64  	%rd9008, %rd8962, %rd21540;
	and.b64  	%rd9009, %rd8989, %rd9008;
	xor.b64  	%rd9010, %rd9009, %rd21540;
	add.s64 	%rd9011, %rd21546, %rd21541;
	ld.const.u64 	%rd9012, [%rd9002];
	add.s64 	%rd9013, %rd9011, %rd9012;
	add.s64 	%rd9014, %rd9013, %rd9010;
	add.s64 	%rd9015, %rd9014, %rd9007;
	add.s64 	%rd9016, %rd9015, %rd21537;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5600,%dummy}, %rd9000;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5601}, %rd9000;
	}
	shf.r.wrap.b32 	%r5602, %r5601, %r5600, 28;
	shf.r.wrap.b32 	%r5603, %r5600, %r5601, 28;
	mov.b64 	%rd9017, {%r5603, %r5602};
	shf.l.wrap.b32 	%r5604, %r5600, %r5601, 30;
	shf.l.wrap.b32 	%r5605, %r5601, %r5600, 30;
	mov.b64 	%rd9018, {%r5605, %r5604};
	xor.b64  	%rd9019, %rd9018, %rd9017;
	shf.l.wrap.b32 	%r5606, %r5600, %r5601, 25;
	shf.l.wrap.b32 	%r5607, %r5601, %r5600, 25;
	mov.b64 	%rd9020, {%r5607, %r5606};
	xor.b64  	%rd9021, %rd9019, %rd9020;
	xor.b64  	%rd9022, %rd9000, %rd21536;
	xor.b64  	%rd9023, %rd9000, %rd8973;
	and.b64  	%rd9024, %rd9023, %rd9022;
	xor.b64  	%rd9025, %rd9024, %rd9000;
	add.s64 	%rd9026, %rd9015, %rd9025;
	add.s64 	%rd9027, %rd9026, %rd9021;
	add.s32 	%r5608, %r14371, 3;
	mul.wide.s32 	%rd9028, %r5608, 8;
	add.s64 	%rd9029, %rd6761, %rd9028;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5609,%dummy}, %rd9016;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5610}, %rd9016;
	}
	shf.r.wrap.b32 	%r5611, %r5610, %r5609, 14;
	shf.r.wrap.b32 	%r5612, %r5609, %r5610, 14;
	mov.b64 	%rd9030, {%r5612, %r5611};
	shf.r.wrap.b32 	%r5613, %r5610, %r5609, 18;
	shf.r.wrap.b32 	%r5614, %r5609, %r5610, 18;
	mov.b64 	%rd9031, {%r5614, %r5613};
	xor.b64  	%rd9032, %rd9031, %rd9030;
	shf.l.wrap.b32 	%r5615, %r5609, %r5610, 23;
	shf.l.wrap.b32 	%r5616, %r5610, %r5609, 23;
	mov.b64 	%rd9033, {%r5616, %r5615};
	xor.b64  	%rd9034, %rd9032, %rd9033;
	xor.b64  	%rd9035, %rd8989, %rd8962;
	and.b64  	%rd9036, %rd9016, %rd9035;
	xor.b64  	%rd9037, %rd9036, %rd8962;
	add.s64 	%rd9038, %rd21547, %rd21540;
	ld.const.u64 	%rd9039, [%rd9029];
	add.s64 	%rd9040, %rd9038, %rd9039;
	add.s64 	%rd9041, %rd9040, %rd9037;
	add.s64 	%rd9042, %rd9041, %rd9034;
	add.s64 	%rd9043, %rd9042, %rd21536;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5617,%dummy}, %rd9027;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5618}, %rd9027;
	}
	shf.r.wrap.b32 	%r5619, %r5618, %r5617, 28;
	shf.r.wrap.b32 	%r5620, %r5617, %r5618, 28;
	mov.b64 	%rd9044, {%r5620, %r5619};
	shf.l.wrap.b32 	%r5621, %r5617, %r5618, 30;
	shf.l.wrap.b32 	%r5622, %r5618, %r5617, 30;
	mov.b64 	%rd9045, {%r5622, %r5621};
	xor.b64  	%rd9046, %rd9045, %rd9044;
	shf.l.wrap.b32 	%r5623, %r5617, %r5618, 25;
	shf.l.wrap.b32 	%r5624, %r5618, %r5617, 25;
	mov.b64 	%rd9047, {%r5624, %r5623};
	xor.b64  	%rd9048, %rd9046, %rd9047;
	xor.b64  	%rd9049, %rd9027, %rd8973;
	xor.b64  	%rd9050, %rd9027, %rd9000;
	and.b64  	%rd9051, %rd9050, %rd9049;
	xor.b64  	%rd9052, %rd9051, %rd9027;
	add.s64 	%rd9053, %rd9042, %rd9052;
	add.s64 	%rd9054, %rd9053, %rd9048;
	add.s32 	%r5625, %r14371, 4;
	mul.wide.s32 	%rd9055, %r5625, 8;
	add.s64 	%rd9056, %rd6761, %rd9055;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5626,%dummy}, %rd9043;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5627}, %rd9043;
	}
	shf.r.wrap.b32 	%r5628, %r5627, %r5626, 14;
	shf.r.wrap.b32 	%r5629, %r5626, %r5627, 14;
	mov.b64 	%rd9057, {%r5629, %r5628};
	shf.r.wrap.b32 	%r5630, %r5627, %r5626, 18;
	shf.r.wrap.b32 	%r5631, %r5626, %r5627, 18;
	mov.b64 	%rd9058, {%r5631, %r5630};
	xor.b64  	%rd9059, %rd9058, %rd9057;
	shf.l.wrap.b32 	%r5632, %r5626, %r5627, 23;
	shf.l.wrap.b32 	%r5633, %r5627, %r5626, 23;
	mov.b64 	%rd9060, {%r5633, %r5632};
	xor.b64  	%rd9061, %rd9059, %rd9060;
	xor.b64  	%rd9062, %rd9016, %rd8989;
	and.b64  	%rd9063, %rd9043, %rd9062;
	xor.b64  	%rd9064, %rd9063, %rd8989;
	add.s64 	%rd9065, %rd8962, %rd21548;
	ld.const.u64 	%rd9066, [%rd9056];
	add.s64 	%rd9067, %rd9065, %rd9066;
	add.s64 	%rd9068, %rd9067, %rd9064;
	add.s64 	%rd9069, %rd9068, %rd9061;
	add.s64 	%rd9070, %rd9069, %rd8973;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5634,%dummy}, %rd9054;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5635}, %rd9054;
	}
	shf.r.wrap.b32 	%r5636, %r5635, %r5634, 28;
	shf.r.wrap.b32 	%r5637, %r5634, %r5635, 28;
	mov.b64 	%rd9071, {%r5637, %r5636};
	shf.l.wrap.b32 	%r5638, %r5634, %r5635, 30;
	shf.l.wrap.b32 	%r5639, %r5635, %r5634, 30;
	mov.b64 	%rd9072, {%r5639, %r5638};
	xor.b64  	%rd9073, %rd9072, %rd9071;
	shf.l.wrap.b32 	%r5640, %r5634, %r5635, 25;
	shf.l.wrap.b32 	%r5641, %r5635, %r5634, 25;
	mov.b64 	%rd9074, {%r5641, %r5640};
	xor.b64  	%rd9075, %rd9073, %rd9074;
	xor.b64  	%rd9076, %rd9054, %rd9000;
	xor.b64  	%rd9077, %rd9054, %rd9027;
	and.b64  	%rd9078, %rd9077, %rd9076;
	xor.b64  	%rd9079, %rd9078, %rd9054;
	add.s64 	%rd9080, %rd9069, %rd9079;
	add.s64 	%rd9081, %rd9080, %rd9075;
	add.s32 	%r5642, %r14371, 5;
	mul.wide.s32 	%rd9082, %r5642, 8;
	add.s64 	%rd9083, %rd6761, %rd9082;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5643,%dummy}, %rd9070;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5644}, %rd9070;
	}
	shf.r.wrap.b32 	%r5645, %r5644, %r5643, 14;
	shf.r.wrap.b32 	%r5646, %r5643, %r5644, 14;
	mov.b64 	%rd9084, {%r5646, %r5645};
	shf.r.wrap.b32 	%r5647, %r5644, %r5643, 18;
	shf.r.wrap.b32 	%r5648, %r5643, %r5644, 18;
	mov.b64 	%rd9085, {%r5648, %r5647};
	xor.b64  	%rd9086, %rd9085, %rd9084;
	shf.l.wrap.b32 	%r5649, %r5643, %r5644, 23;
	shf.l.wrap.b32 	%r5650, %r5644, %r5643, 23;
	mov.b64 	%rd9087, {%r5650, %r5649};
	xor.b64  	%rd9088, %rd9086, %rd9087;
	xor.b64  	%rd9089, %rd9043, %rd9016;
	and.b64  	%rd9090, %rd9070, %rd9089;
	xor.b64  	%rd9091, %rd9090, %rd9016;
	add.s64 	%rd9092, %rd8989, %rd21549;
	ld.const.u64 	%rd9093, [%rd9083];
	add.s64 	%rd9094, %rd9092, %rd9093;
	add.s64 	%rd9095, %rd9094, %rd9091;
	add.s64 	%rd9096, %rd9095, %rd9088;
	add.s64 	%rd9097, %rd9096, %rd9000;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5651,%dummy}, %rd9081;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5652}, %rd9081;
	}
	shf.r.wrap.b32 	%r5653, %r5652, %r5651, 28;
	shf.r.wrap.b32 	%r5654, %r5651, %r5652, 28;
	mov.b64 	%rd9098, {%r5654, %r5653};
	shf.l.wrap.b32 	%r5655, %r5651, %r5652, 30;
	shf.l.wrap.b32 	%r5656, %r5652, %r5651, 30;
	mov.b64 	%rd9099, {%r5656, %r5655};
	xor.b64  	%rd9100, %rd9099, %rd9098;
	shf.l.wrap.b32 	%r5657, %r5651, %r5652, 25;
	shf.l.wrap.b32 	%r5658, %r5652, %r5651, 25;
	mov.b64 	%rd9101, {%r5658, %r5657};
	xor.b64  	%rd9102, %rd9100, %rd9101;
	xor.b64  	%rd9103, %rd9081, %rd9027;
	xor.b64  	%rd9104, %rd9081, %rd9054;
	and.b64  	%rd9105, %rd9104, %rd9103;
	xor.b64  	%rd9106, %rd9105, %rd9081;
	add.s64 	%rd9107, %rd9096, %rd9106;
	add.s64 	%rd9108, %rd9107, %rd9102;
	add.s32 	%r5659, %r14371, 6;
	mul.wide.s32 	%rd9109, %r5659, 8;
	add.s64 	%rd9110, %rd6761, %rd9109;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5660,%dummy}, %rd9097;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5661}, %rd9097;
	}
	shf.r.wrap.b32 	%r5662, %r5661, %r5660, 14;
	shf.r.wrap.b32 	%r5663, %r5660, %r5661, 14;
	mov.b64 	%rd9111, {%r5663, %r5662};
	shf.r.wrap.b32 	%r5664, %r5661, %r5660, 18;
	shf.r.wrap.b32 	%r5665, %r5660, %r5661, 18;
	mov.b64 	%rd9112, {%r5665, %r5664};
	xor.b64  	%rd9113, %rd9112, %rd9111;
	shf.l.wrap.b32 	%r5666, %r5660, %r5661, 23;
	shf.l.wrap.b32 	%r5667, %r5661, %r5660, 23;
	mov.b64 	%rd9114, {%r5667, %r5666};
	xor.b64  	%rd9115, %rd9113, %rd9114;
	xor.b64  	%rd9116, %rd9070, %rd9043;
	and.b64  	%rd9117, %rd9097, %rd9116;
	xor.b64  	%rd9118, %rd9117, %rd9043;
	add.s64 	%rd9119, %rd9016, %rd21550;
	ld.const.u64 	%rd9120, [%rd9110];
	add.s64 	%rd9121, %rd9119, %rd9120;
	add.s64 	%rd9122, %rd9121, %rd9118;
	add.s64 	%rd9123, %rd9122, %rd9115;
	add.s64 	%rd9124, %rd9123, %rd9027;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5668,%dummy}, %rd9108;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5669}, %rd9108;
	}
	shf.r.wrap.b32 	%r5670, %r5669, %r5668, 28;
	shf.r.wrap.b32 	%r5671, %r5668, %r5669, 28;
	mov.b64 	%rd9125, {%r5671, %r5670};
	shf.l.wrap.b32 	%r5672, %r5668, %r5669, 30;
	shf.l.wrap.b32 	%r5673, %r5669, %r5668, 30;
	mov.b64 	%rd9126, {%r5673, %r5672};
	xor.b64  	%rd9127, %rd9126, %rd9125;
	shf.l.wrap.b32 	%r5674, %r5668, %r5669, 25;
	shf.l.wrap.b32 	%r5675, %r5669, %r5668, 25;
	mov.b64 	%rd9128, {%r5675, %r5674};
	xor.b64  	%rd9129, %rd9127, %rd9128;
	xor.b64  	%rd9130, %rd9108, %rd9054;
	xor.b64  	%rd9131, %rd9108, %rd9081;
	and.b64  	%rd9132, %rd9131, %rd9130;
	xor.b64  	%rd9133, %rd9132, %rd9108;
	add.s64 	%rd9134, %rd9123, %rd9133;
	add.s64 	%rd9135, %rd9134, %rd9129;
	add.s32 	%r5676, %r14371, 7;
	mul.wide.s32 	%rd9136, %r5676, 8;
	add.s64 	%rd9137, %rd6761, %rd9136;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5677,%dummy}, %rd9124;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5678}, %rd9124;
	}
	shf.r.wrap.b32 	%r5679, %r5678, %r5677, 14;
	shf.r.wrap.b32 	%r5680, %r5677, %r5678, 14;
	mov.b64 	%rd9138, {%r5680, %r5679};
	shf.r.wrap.b32 	%r5681, %r5678, %r5677, 18;
	shf.r.wrap.b32 	%r5682, %r5677, %r5678, 18;
	mov.b64 	%rd9139, {%r5682, %r5681};
	xor.b64  	%rd9140, %rd9139, %rd9138;
	shf.l.wrap.b32 	%r5683, %r5677, %r5678, 23;
	shf.l.wrap.b32 	%r5684, %r5678, %r5677, 23;
	mov.b64 	%rd9141, {%r5684, %r5683};
	xor.b64  	%rd9142, %rd9140, %rd9141;
	xor.b64  	%rd9143, %rd9097, %rd9070;
	and.b64  	%rd9144, %rd9124, %rd9143;
	xor.b64  	%rd9145, %rd9144, %rd9070;
	add.s64 	%rd9146, %rd9043, %rd21551;
	ld.const.u64 	%rd9147, [%rd9137];
	add.s64 	%rd9148, %rd9146, %rd9147;
	add.s64 	%rd9149, %rd9148, %rd9145;
	add.s64 	%rd9150, %rd9149, %rd9142;
	add.s64 	%rd9151, %rd9150, %rd9054;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5685,%dummy}, %rd9135;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5686}, %rd9135;
	}
	shf.r.wrap.b32 	%r5687, %r5686, %r5685, 28;
	shf.r.wrap.b32 	%r5688, %r5685, %r5686, 28;
	mov.b64 	%rd9152, {%r5688, %r5687};
	shf.l.wrap.b32 	%r5689, %r5685, %r5686, 30;
	shf.l.wrap.b32 	%r5690, %r5686, %r5685, 30;
	mov.b64 	%rd9153, {%r5690, %r5689};
	xor.b64  	%rd9154, %rd9153, %rd9152;
	shf.l.wrap.b32 	%r5691, %r5685, %r5686, 25;
	shf.l.wrap.b32 	%r5692, %r5686, %r5685, 25;
	mov.b64 	%rd9155, {%r5692, %r5691};
	xor.b64  	%rd9156, %rd9154, %rd9155;
	xor.b64  	%rd9157, %rd9135, %rd9081;
	xor.b64  	%rd9158, %rd9135, %rd9108;
	and.b64  	%rd9159, %rd9158, %rd9157;
	xor.b64  	%rd9160, %rd9159, %rd9135;
	add.s64 	%rd9161, %rd9150, %rd9160;
	add.s64 	%rd9162, %rd9161, %rd9156;
	add.s32 	%r5693, %r14371, 8;
	mul.wide.s32 	%rd9163, %r5693, 8;
	add.s64 	%rd9164, %rd6761, %rd9163;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5694,%dummy}, %rd9151;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5695}, %rd9151;
	}
	shf.r.wrap.b32 	%r5696, %r5695, %r5694, 14;
	shf.r.wrap.b32 	%r5697, %r5694, %r5695, 14;
	mov.b64 	%rd9165, {%r5697, %r5696};
	shf.r.wrap.b32 	%r5698, %r5695, %r5694, 18;
	shf.r.wrap.b32 	%r5699, %r5694, %r5695, 18;
	mov.b64 	%rd9166, {%r5699, %r5698};
	xor.b64  	%rd9167, %rd9166, %rd9165;
	shf.l.wrap.b32 	%r5700, %r5694, %r5695, 23;
	shf.l.wrap.b32 	%r5701, %r5695, %r5694, 23;
	mov.b64 	%rd9168, {%r5701, %r5700};
	xor.b64  	%rd9169, %rd9167, %rd9168;
	xor.b64  	%rd9170, %rd9124, %rd9097;
	and.b64  	%rd9171, %rd9151, %rd9170;
	xor.b64  	%rd9172, %rd9171, %rd9097;
	add.s64 	%rd9173, %rd9070, %rd21535;
	ld.const.u64 	%rd9174, [%rd9164];
	add.s64 	%rd9175, %rd9173, %rd9174;
	add.s64 	%rd9176, %rd9175, %rd9172;
	add.s64 	%rd9177, %rd9176, %rd9169;
	add.s64 	%rd9178, %rd9177, %rd9081;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5702,%dummy}, %rd9162;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5703}, %rd9162;
	}
	shf.r.wrap.b32 	%r5704, %r5703, %r5702, 28;
	shf.r.wrap.b32 	%r5705, %r5702, %r5703, 28;
	mov.b64 	%rd9179, {%r5705, %r5704};
	shf.l.wrap.b32 	%r5706, %r5702, %r5703, 30;
	shf.l.wrap.b32 	%r5707, %r5703, %r5702, 30;
	mov.b64 	%rd9180, {%r5707, %r5706};
	xor.b64  	%rd9181, %rd9180, %rd9179;
	shf.l.wrap.b32 	%r5708, %r5702, %r5703, 25;
	shf.l.wrap.b32 	%r5709, %r5703, %r5702, 25;
	mov.b64 	%rd9182, {%r5709, %r5708};
	xor.b64  	%rd9183, %rd9181, %rd9182;
	xor.b64  	%rd9184, %rd9162, %rd9108;
	xor.b64  	%rd9185, %rd9162, %rd9135;
	and.b64  	%rd9186, %rd9185, %rd9184;
	xor.b64  	%rd9187, %rd9186, %rd9162;
	add.s64 	%rd9188, %rd9177, %rd9187;
	add.s64 	%rd9189, %rd9188, %rd9183;
	add.s32 	%r5710, %r14371, 9;
	mul.wide.s32 	%rd9190, %r5710, 8;
	add.s64 	%rd9191, %rd6761, %rd9190;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5711,%dummy}, %rd9178;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5712}, %rd9178;
	}
	shf.r.wrap.b32 	%r5713, %r5712, %r5711, 14;
	shf.r.wrap.b32 	%r5714, %r5711, %r5712, 14;
	mov.b64 	%rd9192, {%r5714, %r5713};
	shf.r.wrap.b32 	%r5715, %r5712, %r5711, 18;
	shf.r.wrap.b32 	%r5716, %r5711, %r5712, 18;
	mov.b64 	%rd9193, {%r5716, %r5715};
	xor.b64  	%rd9194, %rd9193, %rd9192;
	shf.l.wrap.b32 	%r5717, %r5711, %r5712, 23;
	shf.l.wrap.b32 	%r5718, %r5712, %r5711, 23;
	mov.b64 	%rd9195, {%r5718, %r5717};
	xor.b64  	%rd9196, %rd9194, %rd9195;
	xor.b64  	%rd9197, %rd9151, %rd9124;
	and.b64  	%rd9198, %rd9178, %rd9197;
	xor.b64  	%rd9199, %rd9198, %rd9124;
	add.s64 	%rd9200, %rd9097, %rd21534;
	ld.const.u64 	%rd9201, [%rd9191];
	add.s64 	%rd9202, %rd9200, %rd9201;
	add.s64 	%rd9203, %rd9202, %rd9199;
	add.s64 	%rd9204, %rd9203, %rd9196;
	add.s64 	%rd9205, %rd9204, %rd9108;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5719,%dummy}, %rd9189;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5720}, %rd9189;
	}
	shf.r.wrap.b32 	%r5721, %r5720, %r5719, 28;
	shf.r.wrap.b32 	%r5722, %r5719, %r5720, 28;
	mov.b64 	%rd9206, {%r5722, %r5721};
	shf.l.wrap.b32 	%r5723, %r5719, %r5720, 30;
	shf.l.wrap.b32 	%r5724, %r5720, %r5719, 30;
	mov.b64 	%rd9207, {%r5724, %r5723};
	xor.b64  	%rd9208, %rd9207, %rd9206;
	shf.l.wrap.b32 	%r5725, %r5719, %r5720, 25;
	shf.l.wrap.b32 	%r5726, %r5720, %r5719, 25;
	mov.b64 	%rd9209, {%r5726, %r5725};
	xor.b64  	%rd9210, %rd9208, %rd9209;
	xor.b64  	%rd9211, %rd9189, %rd9135;
	xor.b64  	%rd9212, %rd9189, %rd9162;
	and.b64  	%rd9213, %rd9212, %rd9211;
	xor.b64  	%rd9214, %rd9213, %rd9189;
	add.s64 	%rd9215, %rd9204, %rd9214;
	add.s64 	%rd9216, %rd9215, %rd9210;
	add.s32 	%r5727, %r14371, 10;
	mul.wide.s32 	%rd9217, %r5727, 8;
	add.s64 	%rd9218, %rd6761, %rd9217;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5728,%dummy}, %rd9205;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5729}, %rd9205;
	}
	shf.r.wrap.b32 	%r5730, %r5729, %r5728, 14;
	shf.r.wrap.b32 	%r5731, %r5728, %r5729, 14;
	mov.b64 	%rd9219, {%r5731, %r5730};
	shf.r.wrap.b32 	%r5732, %r5729, %r5728, 18;
	shf.r.wrap.b32 	%r5733, %r5728, %r5729, 18;
	mov.b64 	%rd9220, {%r5733, %r5732};
	xor.b64  	%rd9221, %rd9220, %rd9219;
	shf.l.wrap.b32 	%r5734, %r5728, %r5729, 23;
	shf.l.wrap.b32 	%r5735, %r5729, %r5728, 23;
	mov.b64 	%rd9222, {%r5735, %r5734};
	xor.b64  	%rd9223, %rd9221, %rd9222;
	xor.b64  	%rd9224, %rd9178, %rd9151;
	and.b64  	%rd9225, %rd9205, %rd9224;
	xor.b64  	%rd9226, %rd9225, %rd9151;
	add.s64 	%rd9227, %rd9124, %rd21533;
	ld.const.u64 	%rd9228, [%rd9218];
	add.s64 	%rd9229, %rd9227, %rd9228;
	add.s64 	%rd9230, %rd9229, %rd9226;
	add.s64 	%rd9231, %rd9230, %rd9223;
	add.s64 	%rd9232, %rd9231, %rd9135;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5736,%dummy}, %rd9216;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5737}, %rd9216;
	}
	shf.r.wrap.b32 	%r5738, %r5737, %r5736, 28;
	shf.r.wrap.b32 	%r5739, %r5736, %r5737, 28;
	mov.b64 	%rd9233, {%r5739, %r5738};
	shf.l.wrap.b32 	%r5740, %r5736, %r5737, 30;
	shf.l.wrap.b32 	%r5741, %r5737, %r5736, 30;
	mov.b64 	%rd9234, {%r5741, %r5740};
	xor.b64  	%rd9235, %rd9234, %rd9233;
	shf.l.wrap.b32 	%r5742, %r5736, %r5737, 25;
	shf.l.wrap.b32 	%r5743, %r5737, %r5736, 25;
	mov.b64 	%rd9236, {%r5743, %r5742};
	xor.b64  	%rd9237, %rd9235, %rd9236;
	xor.b64  	%rd9238, %rd9216, %rd9162;
	xor.b64  	%rd9239, %rd9216, %rd9189;
	and.b64  	%rd9240, %rd9239, %rd9238;
	xor.b64  	%rd9241, %rd9240, %rd9216;
	add.s64 	%rd9242, %rd9231, %rd9241;
	add.s64 	%rd9243, %rd9242, %rd9237;
	add.s32 	%r5744, %r14371, 11;
	mul.wide.s32 	%rd9244, %r5744, 8;
	add.s64 	%rd9245, %rd6761, %rd9244;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5745,%dummy}, %rd9232;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5746}, %rd9232;
	}
	shf.r.wrap.b32 	%r5747, %r5746, %r5745, 14;
	shf.r.wrap.b32 	%r5748, %r5745, %r5746, 14;
	mov.b64 	%rd9246, {%r5748, %r5747};
	shf.r.wrap.b32 	%r5749, %r5746, %r5745, 18;
	shf.r.wrap.b32 	%r5750, %r5745, %r5746, 18;
	mov.b64 	%rd9247, {%r5750, %r5749};
	xor.b64  	%rd9248, %rd9247, %rd9246;
	shf.l.wrap.b32 	%r5751, %r5745, %r5746, 23;
	shf.l.wrap.b32 	%r5752, %r5746, %r5745, 23;
	mov.b64 	%rd9249, {%r5752, %r5751};
	xor.b64  	%rd9250, %rd9248, %rd9249;
	xor.b64  	%rd9251, %rd9205, %rd9178;
	and.b64  	%rd9252, %rd9232, %rd9251;
	xor.b64  	%rd9253, %rd9252, %rd9178;
	add.s64 	%rd9254, %rd9151, %rd21532;
	ld.const.u64 	%rd9255, [%rd9245];
	add.s64 	%rd9256, %rd9254, %rd9255;
	add.s64 	%rd9257, %rd9256, %rd9253;
	add.s64 	%rd9258, %rd9257, %rd9250;
	add.s64 	%rd9259, %rd9258, %rd9162;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5753,%dummy}, %rd9243;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5754}, %rd9243;
	}
	shf.r.wrap.b32 	%r5755, %r5754, %r5753, 28;
	shf.r.wrap.b32 	%r5756, %r5753, %r5754, 28;
	mov.b64 	%rd9260, {%r5756, %r5755};
	shf.l.wrap.b32 	%r5757, %r5753, %r5754, 30;
	shf.l.wrap.b32 	%r5758, %r5754, %r5753, 30;
	mov.b64 	%rd9261, {%r5758, %r5757};
	xor.b64  	%rd9262, %rd9261, %rd9260;
	shf.l.wrap.b32 	%r5759, %r5753, %r5754, 25;
	shf.l.wrap.b32 	%r5760, %r5754, %r5753, 25;
	mov.b64 	%rd9263, {%r5760, %r5759};
	xor.b64  	%rd9264, %rd9262, %rd9263;
	xor.b64  	%rd9265, %rd9243, %rd9189;
	xor.b64  	%rd9266, %rd9243, %rd9216;
	and.b64  	%rd9267, %rd9266, %rd9265;
	xor.b64  	%rd9268, %rd9267, %rd9243;
	add.s64 	%rd9269, %rd9258, %rd9268;
	add.s64 	%rd9270, %rd9269, %rd9264;
	add.s32 	%r5761, %r14371, 12;
	mul.wide.s32 	%rd9271, %r5761, 8;
	add.s64 	%rd9272, %rd6761, %rd9271;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5762,%dummy}, %rd9259;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5763}, %rd9259;
	}
	shf.r.wrap.b32 	%r5764, %r5763, %r5762, 14;
	shf.r.wrap.b32 	%r5765, %r5762, %r5763, 14;
	mov.b64 	%rd9273, {%r5765, %r5764};
	shf.r.wrap.b32 	%r5766, %r5763, %r5762, 18;
	shf.r.wrap.b32 	%r5767, %r5762, %r5763, 18;
	mov.b64 	%rd9274, {%r5767, %r5766};
	xor.b64  	%rd9275, %rd9274, %rd9273;
	shf.l.wrap.b32 	%r5768, %r5762, %r5763, 23;
	shf.l.wrap.b32 	%r5769, %r5763, %r5762, 23;
	mov.b64 	%rd9276, {%r5769, %r5768};
	xor.b64  	%rd9277, %rd9275, %rd9276;
	xor.b64  	%rd9278, %rd9232, %rd9205;
	and.b64  	%rd9279, %rd9259, %rd9278;
	xor.b64  	%rd9280, %rd9279, %rd9205;
	add.s64 	%rd9281, %rd9178, %rd21531;
	ld.const.u64 	%rd9282, [%rd9272];
	add.s64 	%rd9283, %rd9281, %rd9282;
	add.s64 	%rd9284, %rd9283, %rd9280;
	add.s64 	%rd9285, %rd9284, %rd9277;
	add.s64 	%rd21543, %rd9285, %rd9189;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5770,%dummy}, %rd9270;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5771}, %rd9270;
	}
	shf.r.wrap.b32 	%r5772, %r5771, %r5770, 28;
	shf.r.wrap.b32 	%r5773, %r5770, %r5771, 28;
	mov.b64 	%rd9286, {%r5773, %r5772};
	shf.l.wrap.b32 	%r5774, %r5770, %r5771, 30;
	shf.l.wrap.b32 	%r5775, %r5771, %r5770, 30;
	mov.b64 	%rd9287, {%r5775, %r5774};
	xor.b64  	%rd9288, %rd9287, %rd9286;
	shf.l.wrap.b32 	%r5776, %r5770, %r5771, 25;
	shf.l.wrap.b32 	%r5777, %r5771, %r5770, 25;
	mov.b64 	%rd9289, {%r5777, %r5776};
	xor.b64  	%rd9290, %rd9288, %rd9289;
	xor.b64  	%rd9291, %rd9270, %rd9216;
	xor.b64  	%rd9292, %rd9270, %rd9243;
	and.b64  	%rd9293, %rd9292, %rd9291;
	xor.b64  	%rd9294, %rd9293, %rd9270;
	add.s64 	%rd9295, %rd9285, %rd9294;
	add.s64 	%rd21539, %rd9295, %rd9290;
	add.s32 	%r5778, %r14371, 13;
	mul.wide.s32 	%rd9296, %r5778, 8;
	add.s64 	%rd9297, %rd6761, %rd9296;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5779,%dummy}, %rd21543;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5780}, %rd21543;
	}
	shf.r.wrap.b32 	%r5781, %r5780, %r5779, 14;
	shf.r.wrap.b32 	%r5782, %r5779, %r5780, 14;
	mov.b64 	%rd9298, {%r5782, %r5781};
	shf.r.wrap.b32 	%r5783, %r5780, %r5779, 18;
	shf.r.wrap.b32 	%r5784, %r5779, %r5780, 18;
	mov.b64 	%rd9299, {%r5784, %r5783};
	xor.b64  	%rd9300, %rd9299, %rd9298;
	shf.l.wrap.b32 	%r5785, %r5779, %r5780, 23;
	shf.l.wrap.b32 	%r5786, %r5780, %r5779, 23;
	mov.b64 	%rd9301, {%r5786, %r5785};
	xor.b64  	%rd9302, %rd9300, %rd9301;
	xor.b64  	%rd9303, %rd9259, %rd9232;
	and.b64  	%rd9304, %rd21543, %rd9303;
	xor.b64  	%rd9305, %rd9304, %rd9232;
	add.s64 	%rd9306, %rd9205, %rd21530;
	ld.const.u64 	%rd9307, [%rd9297];
	add.s64 	%rd9308, %rd9306, %rd9307;
	add.s64 	%rd9309, %rd9308, %rd9305;
	add.s64 	%rd9310, %rd9309, %rd9302;
	add.s64 	%rd21542, %rd9310, %rd9216;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5787,%dummy}, %rd21539;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5788}, %rd21539;
	}
	shf.r.wrap.b32 	%r5789, %r5788, %r5787, 28;
	shf.r.wrap.b32 	%r5790, %r5787, %r5788, 28;
	mov.b64 	%rd9311, {%r5790, %r5789};
	shf.l.wrap.b32 	%r5791, %r5787, %r5788, 30;
	shf.l.wrap.b32 	%r5792, %r5788, %r5787, 30;
	mov.b64 	%rd9312, {%r5792, %r5791};
	xor.b64  	%rd9313, %rd9312, %rd9311;
	shf.l.wrap.b32 	%r5793, %r5787, %r5788, 25;
	shf.l.wrap.b32 	%r5794, %r5788, %r5787, 25;
	mov.b64 	%rd9314, {%r5794, %r5793};
	xor.b64  	%rd9315, %rd9313, %rd9314;
	xor.b64  	%rd9316, %rd21539, %rd9243;
	xor.b64  	%rd9317, %rd21539, %rd9270;
	and.b64  	%rd9318, %rd9317, %rd9316;
	xor.b64  	%rd9319, %rd9318, %rd21539;
	add.s64 	%rd9320, %rd9310, %rd9319;
	add.s64 	%rd21538, %rd9320, %rd9315;
	add.s32 	%r5795, %r14371, 14;
	mul.wide.s32 	%rd9321, %r5795, 8;
	add.s64 	%rd9322, %rd6761, %rd9321;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5796,%dummy}, %rd21542;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5797}, %rd21542;
	}
	shf.r.wrap.b32 	%r5798, %r5797, %r5796, 14;
	shf.r.wrap.b32 	%r5799, %r5796, %r5797, 14;
	mov.b64 	%rd9323, {%r5799, %r5798};
	shf.r.wrap.b32 	%r5800, %r5797, %r5796, 18;
	shf.r.wrap.b32 	%r5801, %r5796, %r5797, 18;
	mov.b64 	%rd9324, {%r5801, %r5800};
	xor.b64  	%rd9325, %rd9324, %rd9323;
	shf.l.wrap.b32 	%r5802, %r5796, %r5797, 23;
	shf.l.wrap.b32 	%r5803, %r5797, %r5796, 23;
	mov.b64 	%rd9326, {%r5803, %r5802};
	xor.b64  	%rd9327, %rd9325, %rd9326;
	xor.b64  	%rd9328, %rd21543, %rd9259;
	and.b64  	%rd9329, %rd21542, %rd9328;
	xor.b64  	%rd9330, %rd9329, %rd9259;
	add.s64 	%rd9331, %rd9232, %rd21529;
	ld.const.u64 	%rd9332, [%rd9322];
	add.s64 	%rd9333, %rd9331, %rd9332;
	add.s64 	%rd9334, %rd9333, %rd9330;
	add.s64 	%rd9335, %rd9334, %rd9327;
	add.s64 	%rd21541, %rd9335, %rd9243;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5804,%dummy}, %rd21538;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5805}, %rd21538;
	}
	shf.r.wrap.b32 	%r5806, %r5805, %r5804, 28;
	shf.r.wrap.b32 	%r5807, %r5804, %r5805, 28;
	mov.b64 	%rd9336, {%r5807, %r5806};
	shf.l.wrap.b32 	%r5808, %r5804, %r5805, 30;
	shf.l.wrap.b32 	%r5809, %r5805, %r5804, 30;
	mov.b64 	%rd9337, {%r5809, %r5808};
	xor.b64  	%rd9338, %rd9337, %rd9336;
	shf.l.wrap.b32 	%r5810, %r5804, %r5805, 25;
	shf.l.wrap.b32 	%r5811, %r5805, %r5804, 25;
	mov.b64 	%rd9339, {%r5811, %r5810};
	xor.b64  	%rd9340, %rd9338, %rd9339;
	xor.b64  	%rd9341, %rd21538, %rd9270;
	xor.b64  	%rd9342, %rd21538, %rd21539;
	and.b64  	%rd9343, %rd9342, %rd9341;
	xor.b64  	%rd9344, %rd9343, %rd21538;
	add.s64 	%rd9345, %rd9335, %rd9344;
	add.s64 	%rd21537, %rd9345, %rd9340;
	add.s32 	%r5812, %r14371, 15;
	mul.wide.s32 	%rd9346, %r5812, 8;
	add.s64 	%rd9347, %rd6761, %rd9346;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5813,%dummy}, %rd21541;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5814}, %rd21541;
	}
	shf.r.wrap.b32 	%r5815, %r5814, %r5813, 14;
	shf.r.wrap.b32 	%r5816, %r5813, %r5814, 14;
	mov.b64 	%rd9348, {%r5816, %r5815};
	shf.r.wrap.b32 	%r5817, %r5814, %r5813, 18;
	shf.r.wrap.b32 	%r5818, %r5813, %r5814, 18;
	mov.b64 	%rd9349, {%r5818, %r5817};
	xor.b64  	%rd9350, %rd9349, %rd9348;
	shf.l.wrap.b32 	%r5819, %r5813, %r5814, 23;
	shf.l.wrap.b32 	%r5820, %r5814, %r5813, 23;
	mov.b64 	%rd9351, {%r5820, %r5819};
	xor.b64  	%rd9352, %rd9350, %rd9351;
	xor.b64  	%rd9353, %rd21542, %rd21543;
	and.b64  	%rd9354, %rd21541, %rd9353;
	xor.b64  	%rd9355, %rd9354, %rd21543;
	add.s64 	%rd9356, %rd9259, %rd21528;
	ld.const.u64 	%rd9357, [%rd9347];
	add.s64 	%rd9358, %rd9356, %rd9357;
	add.s64 	%rd9359, %rd9358, %rd9355;
	add.s64 	%rd9360, %rd9359, %rd9352;
	add.s64 	%rd21540, %rd9360, %rd9270;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5821,%dummy}, %rd21537;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5822}, %rd21537;
	}
	shf.r.wrap.b32 	%r5823, %r5822, %r5821, 28;
	shf.r.wrap.b32 	%r5824, %r5821, %r5822, 28;
	mov.b64 	%rd9361, {%r5824, %r5823};
	shf.l.wrap.b32 	%r5825, %r5821, %r5822, 30;
	shf.l.wrap.b32 	%r5826, %r5822, %r5821, 30;
	mov.b64 	%rd9362, {%r5826, %r5825};
	xor.b64  	%rd9363, %rd9362, %rd9361;
	shf.l.wrap.b32 	%r5827, %r5821, %r5822, 25;
	shf.l.wrap.b32 	%r5828, %r5822, %r5821, 25;
	mov.b64 	%rd9364, {%r5828, %r5827};
	xor.b64  	%rd9365, %rd9363, %rd9364;
	xor.b64  	%rd9366, %rd21537, %rd21539;
	xor.b64  	%rd9367, %rd21537, %rd21538;
	and.b64  	%rd9368, %rd9367, %rd9366;
	xor.b64  	%rd9369, %rd9368, %rd21537;
	add.s64 	%rd9370, %rd9360, %rd9369;
	add.s64 	%rd21536, %rd9370, %rd9365;
	add.s32 	%r14371, %r14371, 16;
	setp.lt.s32	%p84, %r14371, 80;
	@%p84 bra 	BB3_131;

	add.s64 	%rd9371, %rd635, %rd21536;
	st.local.u64 	[%rd1], %rd9371;
	add.s64 	%rd9372, %rd637, %rd21537;
	st.local.u64 	[%rd1+8], %rd9372;
	add.s64 	%rd9373, %rd636, %rd21538;
	st.local.u64 	[%rd1+16], %rd9373;
	add.s64 	%rd9374, %rd634, %rd21539;
	st.local.u64 	[%rd1+24], %rd9374;
	add.s64 	%rd9375, %rd630, %rd21540;
	st.local.u64 	[%rd1+32], %rd9375;
	add.s64 	%rd9376, %rd632, %rd21541;
	st.local.u64 	[%rd1+40], %rd9376;
	add.s64 	%rd9377, %rd631, %rd21542;
	st.local.u64 	[%rd1+48], %rd9377;
	add.s64 	%rd9378, %rd633, %rd21543;
	st.local.u64 	[%rd1+56], %rd9378;
	sub.s32 	%r183, %r3, %r163;
	setp.lt.s32	%p85, %r183, 1;
	@%p85 bra 	BB3_150;

	add.s32 	%r184, %r162, -128;
	and.b32  	%r185, %r184, 3;
	setp.eq.s32	%p86, %r185, 0;
	mov.u32 	%r14375, 0;
	@%p86 bra 	BB3_139;

	setp.eq.s32	%p87, %r185, 1;
	mov.u32 	%r14373, 0;
	@%p87 bra 	BB3_138;

	setp.eq.s32	%p88, %r185, 2;
	mov.u32 	%r14372, 0;
	@%p88 bra 	BB3_137;

	xor.b32  	%r5833, %r163, 7;
	cvt.u64.u32	%rd9379, %r5833;
	add.s64 	%rd9380, %rd1808, %rd9379;
	ld.local.u8 	%rs121, [%rd9380];
	st.local.u8 	[%rd179+7], %rs121;
	mov.u32 	%r14372, 1;

BB3_137:
	add.s32 	%r5834, %r14372, %r163;
	xor.b32  	%r5835, %r5834, 7;
	cvt.s64.s32	%rd9381, %r5835;
	add.s64 	%rd9382, %rd1808, %rd9381;
	ld.local.u8 	%rs122, [%rd9382];
	xor.b32  	%r5836, %r14372, 7;
	cvt.u64.u32	%rd9383, %r5836;
	add.s64 	%rd9384, %rd179, %rd9383;
	st.local.u8 	[%rd9384], %rs122;
	add.s32 	%r14373, %r14372, 1;

BB3_138:
	add.s32 	%r5837, %r14373, %r163;
	xor.b32  	%r5838, %r5837, 7;
	cvt.s64.s32	%rd9385, %r5838;
	add.s64 	%rd9386, %rd1808, %rd9385;
	ld.local.u8 	%rs123, [%rd9386];
	xor.b32  	%r5839, %r14373, 7;
	cvt.s64.s32	%rd9387, %r5839;
	add.s64 	%rd9388, %rd179, %rd9387;
	st.local.u8 	[%rd9388], %rs123;
	add.s32 	%r14375, %r14373, 1;

BB3_139:
	setp.lt.u32	%p89, %r184, 4;
	@%p89 bra 	BB3_150;

BB3_140:
	add.s32 	%r5840, %r14375, %r163;
	xor.b32  	%r5841, %r5840, 7;
	cvt.s64.s32	%rd9389, %r5841;
	add.s64 	%rd9390, %rd1808, %rd9389;
	ld.local.u8 	%rs124, [%rd9390];
	xor.b32  	%r5842, %r14375, 7;
	cvt.s64.s32	%rd9391, %r5842;
	add.s64 	%rd9392, %rd179, %rd9391;
	st.local.u8 	[%rd9392], %rs124;
	add.s32 	%r5843, %r14375, 1;
	add.s32 	%r5844, %r5843, %r163;
	xor.b32  	%r5845, %r5844, 7;
	cvt.s64.s32	%rd9393, %r5845;
	add.s64 	%rd9394, %rd1808, %rd9393;
	ld.local.u8 	%rs125, [%rd9394];
	xor.b32  	%r5846, %r5843, 7;
	cvt.s64.s32	%rd9395, %r5846;
	add.s64 	%rd9396, %rd179, %rd9395;
	st.local.u8 	[%rd9396], %rs125;
	add.s32 	%r5847, %r14375, 2;
	add.s32 	%r5848, %r5847, %r163;
	xor.b32  	%r5849, %r5848, 7;
	cvt.s64.s32	%rd9397, %r5849;
	add.s64 	%rd9398, %rd1808, %rd9397;
	ld.local.u8 	%rs126, [%rd9398];
	xor.b32  	%r5850, %r5847, 7;
	cvt.s64.s32	%rd9399, %r5850;
	add.s64 	%rd9400, %rd179, %rd9399;
	st.local.u8 	[%rd9400], %rs126;
	add.s32 	%r5851, %r14375, 3;
	add.s32 	%r5852, %r5851, %r163;
	xor.b32  	%r5853, %r5852, 7;
	cvt.s64.s32	%rd9401, %r5853;
	add.s64 	%rd9402, %rd1808, %rd9401;
	ld.local.u8 	%rs127, [%rd9402];
	xor.b32  	%r5854, %r5851, 7;
	cvt.s64.s32	%rd9403, %r5854;
	add.s64 	%rd9404, %rd179, %rd9403;
	st.local.u8 	[%rd9404], %rs127;
	add.s32 	%r14375, %r14375, 4;
	setp.lt.s32	%p90, %r14375, %r183;
	@%p90 bra 	BB3_140;

BB3_150:
	ld.local.u32 	%r5879, [%rd1+192];
	and.b32  	%r208, %r5879, 127;
	add.s32 	%r5880, %r5879, %r2;
	st.local.u32 	[%rd1+192], %r5880;
	add.s32 	%r209, %r208, %r2;
	setp.lt.s32	%p97, %r209, 128;
	@%p97 bra 	BB3_171;
	bra.uni 	BB3_151;

BB3_171:
	setp.lt.s32	%p110, %r2, 1;
	@%p110 bra 	BB3_180;

	and.b32  	%r240, %r2, 3;
	setp.eq.s32	%p111, %r240, 0;
	mov.u32 	%r14404, 0;
	@%p111 bra 	BB3_178;

	setp.eq.s32	%p112, %r240, 1;
	mov.u32 	%r14400, 0;
	@%p112 bra 	BB3_177;

	setp.eq.s32	%p113, %r240, 2;
	mov.u32 	%r14398, 0;
	@%p113 bra 	BB3_176;

	ld.local.u8 	%rs149, [%rd446+7];
	xor.b32  	%r6650, %r208, 7;
	cvt.u64.u32	%rd10519, %r6650;
	add.s64 	%rd10520, %rd179, %rd10519;
	st.local.u8 	[%rd10520], %rs149;
	add.s32 	%r208, %r208, 1;
	mov.u32 	%r14398, 1;

BB3_176:
	xor.b32  	%r6651, %r14398, 7;
	cvt.u64.u32	%rd10521, %r6651;
	add.s64 	%rd10522, %rd446, %rd10521;
	ld.local.u8 	%rs150, [%rd10522];
	xor.b32  	%r6652, %r208, 7;
	cvt.s64.s32	%rd10523, %r6652;
	add.s64 	%rd10524, %rd179, %rd10523;
	st.local.u8 	[%rd10524], %rs150;
	add.s32 	%r208, %r208, 1;
	add.s32 	%r14400, %r14398, 1;

BB3_177:
	xor.b32  	%r6653, %r14400, 7;
	cvt.s64.s32	%rd10525, %r6653;
	add.s64 	%rd10526, %rd446, %rd10525;
	ld.local.u8 	%rs151, [%rd10526];
	xor.b32  	%r6654, %r208, 7;
	cvt.s64.s32	%rd10527, %r6654;
	add.s64 	%rd10528, %rd179, %rd10527;
	st.local.u8 	[%rd10528], %rs151;
	add.s32 	%r208, %r208, 1;
	add.s32 	%r14404, %r14400, 1;

BB3_178:
	setp.lt.u32	%p114, %r2, 4;
	@%p114 bra 	BB3_180;

BB3_179:
	xor.b32  	%r6655, %r14404, 7;
	cvt.s64.s32	%rd10529, %r6655;
	add.s64 	%rd10530, %rd446, %rd10529;
	ld.local.u8 	%rs152, [%rd10530];
	xor.b32  	%r6656, %r208, 7;
	cvt.s64.s32	%rd10531, %r6656;
	add.s64 	%rd10532, %rd179, %rd10531;
	st.local.u8 	[%rd10532], %rs152;
	add.s32 	%r6657, %r14404, 1;
	xor.b32  	%r6658, %r6657, 7;
	cvt.s64.s32	%rd10533, %r6658;
	add.s64 	%rd10534, %rd446, %rd10533;
	ld.local.u8 	%rs153, [%rd10534];
	add.s32 	%r6659, %r208, 1;
	xor.b32  	%r6660, %r6659, 7;
	cvt.s64.s32	%rd10535, %r6660;
	add.s64 	%rd10536, %rd179, %rd10535;
	st.local.u8 	[%rd10536], %rs153;
	add.s32 	%r6661, %r14404, 2;
	xor.b32  	%r6662, %r6661, 7;
	cvt.s64.s32	%rd10537, %r6662;
	add.s64 	%rd10538, %rd446, %rd10537;
	ld.local.u8 	%rs154, [%rd10538];
	add.s32 	%r6663, %r208, 2;
	xor.b32  	%r6664, %r6663, 7;
	cvt.s64.s32	%rd10539, %r6664;
	add.s64 	%rd10540, %rd179, %rd10539;
	st.local.u8 	[%rd10540], %rs154;
	add.s32 	%r6665, %r14404, 3;
	xor.b32  	%r6666, %r6665, 7;
	cvt.s64.s32	%rd10541, %r6666;
	add.s64 	%rd10542, %rd446, %rd10541;
	ld.local.u8 	%rs155, [%rd10542];
	add.s32 	%r6667, %r208, 3;
	xor.b32  	%r6668, %r6667, 7;
	cvt.s64.s32	%rd10543, %r6668;
	add.s64 	%rd10544, %rd179, %rd10543;
	st.local.u8 	[%rd10544], %rs155;
	add.s32 	%r14404, %r14404, 4;
	setp.lt.s32	%p115, %r14404, %r2;
	add.s32 	%r208, %r208, 4;
	@%p115 bra 	BB3_179;
	bra.uni 	BB3_180;

BB3_151:
	sub.s32 	%r210, %r2861, %r208;
	mov.u32 	%r5883, 1;
	max.u32 	%r211, %r210, %r5883;
	and.b32  	%r212, %r211, 3;
	setp.eq.s32	%p98, %r212, 0;
	mov.u32 	%r14390, 0;
	@%p98 bra 	BB3_158;

	setp.eq.s32	%p99, %r212, 1;
	mov.u32 	%r14386, 0;
	@%p99 bra 	BB3_157;

	setp.eq.s32	%p100, %r212, 2;
	mov.u32 	%r5885, 0;
	@%p100 bra 	BB3_154;
	bra.uni 	BB3_155;

BB3_154:
	mov.u32 	%r5883, %r5885;
	bra.uni 	BB3_156;

BB3_155:
	ld.local.u8 	%rs135, [%rd446+7];
	xor.b32  	%r5887, %r208, 7;
	cvt.u64.u32	%rd9433, %r5887;
	add.s64 	%rd9434, %rd179, %rd9433;
	st.local.u8 	[%rd9434], %rs135;
	add.s32 	%r208, %r208, 1;

BB3_156:
	xor.b32  	%r5888, %r5883, 7;
	cvt.u64.u32	%rd9435, %r5888;
	add.s64 	%rd9436, %rd446, %rd9435;
	ld.local.u8 	%rs136, [%rd9436];
	xor.b32  	%r5889, %r208, 7;
	cvt.s64.s32	%rd9437, %r5889;
	add.s64 	%rd9438, %rd179, %rd9437;
	st.local.u8 	[%rd9438], %rs136;
	add.s32 	%r208, %r208, 1;
	add.s32 	%r14386, %r5883, 1;

BB3_157:
	xor.b32  	%r5890, %r14386, 7;
	cvt.s64.s32	%rd9439, %r5890;
	add.s64 	%rd9440, %rd446, %rd9439;
	ld.local.u8 	%rs137, [%rd9440];
	xor.b32  	%r5891, %r208, 7;
	cvt.s64.s32	%rd9441, %r5891;
	add.s64 	%rd9442, %rd179, %rd9441;
	st.local.u8 	[%rd9442], %rs137;
	add.s32 	%r208, %r208, 1;
	add.s32 	%r14390, %r14386, 1;

BB3_158:
	setp.lt.u32	%p101, %r211, 4;
	@%p101 bra 	BB3_160;

BB3_159:
	xor.b32  	%r5892, %r14390, 7;
	cvt.s64.s32	%rd9443, %r5892;
	add.s64 	%rd9444, %rd446, %rd9443;
	ld.local.u8 	%rs138, [%rd9444];
	xor.b32  	%r5893, %r208, 7;
	cvt.s64.s32	%rd9445, %r5893;
	add.s64 	%rd9446, %rd179, %rd9445;
	st.local.u8 	[%rd9446], %rs138;
	add.s32 	%r5894, %r14390, 1;
	xor.b32  	%r5895, %r5894, 7;
	cvt.s64.s32	%rd9447, %r5895;
	add.s64 	%rd9448, %rd446, %rd9447;
	ld.local.u8 	%rs139, [%rd9448];
	add.s32 	%r5896, %r208, 1;
	xor.b32  	%r5897, %r5896, 7;
	cvt.s64.s32	%rd9449, %r5897;
	add.s64 	%rd9450, %rd179, %rd9449;
	st.local.u8 	[%rd9450], %rs139;
	add.s32 	%r5898, %r14390, 2;
	xor.b32  	%r5899, %r5898, 7;
	cvt.s64.s32	%rd9451, %r5899;
	add.s64 	%rd9452, %rd446, %rd9451;
	ld.local.u8 	%rs140, [%rd9452];
	add.s32 	%r5900, %r208, 2;
	xor.b32  	%r5901, %r5900, 7;
	cvt.s64.s32	%rd9453, %r5901;
	add.s64 	%rd9454, %rd179, %rd9453;
	st.local.u8 	[%rd9454], %rs140;
	add.s32 	%r5902, %r14390, 3;
	xor.b32  	%r5903, %r5902, 7;
	cvt.s64.s32	%rd9455, %r5903;
	add.s64 	%rd9456, %rd446, %rd9455;
	ld.local.u8 	%rs141, [%rd9456];
	add.s32 	%r5904, %r208, 3;
	xor.b32  	%r5905, %r5904, 7;
	cvt.s64.s32	%rd9457, %r5905;
	add.s64 	%rd9458, %rd179, %rd9457;
	st.local.u8 	[%rd9458], %rs141;
	add.s32 	%r14390, %r14390, 4;
	setp.lt.s32	%p102, %r14390, %r210;
	add.s32 	%r208, %r208, 4;
	@%p102 bra 	BB3_159;

BB3_160:
	ld.local.u64 	%rd9459, [%rd1+64];
	shr.u64 	%rd9460, %rd9459, 32;
	ld.local.u64 	%rd9461, [%rd1+72];
	shr.u64 	%rd9462, %rd9461, 32;
	ld.local.u64 	%rd9463, [%rd1+80];
	shr.u64 	%rd9464, %rd9463, 32;
	ld.local.u64 	%rd9465, [%rd1+88];
	shr.u64 	%rd9466, %rd9465, 32;
	ld.local.u64 	%rd9467, [%rd1+96];
	shr.u64 	%rd9468, %rd9467, 32;
	ld.local.u64 	%rd9469, [%rd1+104];
	shr.u64 	%rd9470, %rd9469, 32;
	ld.local.u64 	%rd9471, [%rd1+112];
	shr.u64 	%rd9472, %rd9471, 32;
	ld.local.u64 	%rd9473, [%rd1+120];
	shr.u64 	%rd9474, %rd9473, 32;
	ld.local.u64 	%rd9475, [%rd1+128];
	shr.u64 	%rd9476, %rd9475, 32;
	ld.local.u64 	%rd9477, [%rd1+136];
	shr.u64 	%rd9478, %rd9477, 32;
	ld.local.u64 	%rd9479, [%rd1+144];
	shr.u64 	%rd9480, %rd9479, 32;
	ld.local.u64 	%rd9481, [%rd1+152];
	shr.u64 	%rd9482, %rd9481, 32;
	ld.local.u64 	%rd9483, [%rd1+160];
	shr.u64 	%rd9484, %rd9483, 32;
	ld.local.u64 	%rd9485, [%rd1+168];
	shr.u64 	%rd9486, %rd9485, 32;
	ld.local.u64 	%rd9487, [%rd1+176];
	shr.u64 	%rd9488, %rd9487, 32;
	ld.local.u64 	%rd9489, [%rd1+184];
	shr.u64 	%rd9490, %rd9489, 32;
	bfi.b64 	%rd21568, %rd9460, %rd9459, 32, 32;
	bfi.b64 	%rd21569, %rd9462, %rd9461, 32, 32;
	bfi.b64 	%rd21570, %rd9464, %rd9463, 32, 32;
	bfi.b64 	%rd21571, %rd9466, %rd9465, 32, 32;
	bfi.b64 	%rd21572, %rd9468, %rd9467, 32, 32;
	bfi.b64 	%rd21573, %rd9470, %rd9469, 32, 32;
	bfi.b64 	%rd21574, %rd9472, %rd9471, 32, 32;
	bfi.b64 	%rd21575, %rd9474, %rd9473, 32, 32;
	bfi.b64 	%rd21559, %rd9476, %rd9475, 32, 32;
	bfi.b64 	%rd21558, %rd9478, %rd9477, 32, 32;
	bfi.b64 	%rd21557, %rd9480, %rd9479, 32, 32;
	bfi.b64 	%rd21556, %rd9482, %rd9481, 32, 32;
	bfi.b64 	%rd21555, %rd9484, %rd9483, 32, 32;
	bfi.b64 	%rd21554, %rd9486, %rd9485, 32, 32;
	bfi.b64 	%rd21553, %rd9488, %rd9487, 32, 32;
	bfi.b64 	%rd21552, %rd9490, %rd9489, 32, 32;
	ld.local.u64 	%rd712, [%rd1+32];
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5907,%dummy}, %rd712;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5908}, %rd712;
	}
	shf.r.wrap.b32 	%r5909, %r5908, %r5907, 14;
	shf.r.wrap.b32 	%r5910, %r5907, %r5908, 14;
	mov.b64 	%rd9491, {%r5910, %r5909};
	shf.r.wrap.b32 	%r5911, %r5908, %r5907, 18;
	shf.r.wrap.b32 	%r5912, %r5907, %r5908, 18;
	mov.b64 	%rd9492, {%r5912, %r5911};
	xor.b64  	%rd9493, %rd9492, %rd9491;
	shf.l.wrap.b32 	%r5913, %r5907, %r5908, 23;
	shf.l.wrap.b32 	%r5914, %r5908, %r5907, 23;
	mov.b64 	%rd9494, {%r5914, %r5913};
	xor.b64  	%rd9495, %rd9493, %rd9494;
	ld.local.u64 	%rd713, [%rd1+48];
	ld.local.u64 	%rd714, [%rd1+40];
	xor.b64  	%rd9496, %rd713, %rd714;
	and.b64  	%rd9497, %rd9496, %rd712;
	xor.b64  	%rd9498, %rd9497, %rd713;
	ld.local.u64 	%rd715, [%rd1+56];
	add.s64 	%rd9499, %rd715, %rd21568;
	add.s64 	%rd9500, %rd9499, %rd21454;
	add.s64 	%rd9501, %rd9500, %rd9498;
	add.s64 	%rd9502, %rd9501, %rd9495;
	ld.local.u64 	%rd716, [%rd1+24];
	add.s64 	%rd9503, %rd9502, %rd716;
	ld.local.u64 	%rd717, [%rd1];
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5915,%dummy}, %rd717;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5916}, %rd717;
	}
	shf.r.wrap.b32 	%r5917, %r5916, %r5915, 28;
	shf.r.wrap.b32 	%r5918, %r5915, %r5916, 28;
	mov.b64 	%rd9504, {%r5918, %r5917};
	shf.l.wrap.b32 	%r5919, %r5915, %r5916, 30;
	shf.l.wrap.b32 	%r5920, %r5916, %r5915, 30;
	mov.b64 	%rd9505, {%r5920, %r5919};
	xor.b64  	%rd9506, %rd9505, %rd9504;
	shf.l.wrap.b32 	%r5921, %r5915, %r5916, 25;
	shf.l.wrap.b32 	%r5922, %r5916, %r5915, 25;
	mov.b64 	%rd9507, {%r5922, %r5921};
	xor.b64  	%rd9508, %rd9506, %rd9507;
	ld.local.u64 	%rd718, [%rd1+16];
	xor.b64  	%rd9509, %rd718, %rd717;
	ld.local.u64 	%rd719, [%rd1+8];
	xor.b64  	%rd9510, %rd719, %rd717;
	and.b64  	%rd9511, %rd9509, %rd9510;
	xor.b64  	%rd9512, %rd9511, %rd717;
	add.s64 	%rd9513, %rd9502, %rd9512;
	add.s64 	%rd9514, %rd9513, %rd9508;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5923,%dummy}, %rd9503;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5924}, %rd9503;
	}
	shf.r.wrap.b32 	%r5925, %r5924, %r5923, 14;
	shf.r.wrap.b32 	%r5926, %r5923, %r5924, 14;
	mov.b64 	%rd9515, {%r5926, %r5925};
	shf.r.wrap.b32 	%r5927, %r5924, %r5923, 18;
	shf.r.wrap.b32 	%r5928, %r5923, %r5924, 18;
	mov.b64 	%rd9516, {%r5928, %r5927};
	xor.b64  	%rd9517, %rd9516, %rd9515;
	shf.l.wrap.b32 	%r5929, %r5923, %r5924, 23;
	shf.l.wrap.b32 	%r5930, %r5924, %r5923, 23;
	mov.b64 	%rd9518, {%r5930, %r5929};
	xor.b64  	%rd9519, %rd9517, %rd9518;
	xor.b64  	%rd9520, %rd714, %rd712;
	and.b64  	%rd9521, %rd9503, %rd9520;
	xor.b64  	%rd9522, %rd9521, %rd714;
	add.s64 	%rd9523, %rd713, %rd21569;
	add.s64 	%rd9524, %rd9523, %rd21453;
	add.s64 	%rd9525, %rd9524, %rd9522;
	add.s64 	%rd9526, %rd9525, %rd9519;
	add.s64 	%rd9527, %rd9526, %rd718;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5931,%dummy}, %rd9514;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5932}, %rd9514;
	}
	shf.r.wrap.b32 	%r5933, %r5932, %r5931, 28;
	shf.r.wrap.b32 	%r5934, %r5931, %r5932, 28;
	mov.b64 	%rd9528, {%r5934, %r5933};
	shf.l.wrap.b32 	%r5935, %r5931, %r5932, 30;
	shf.l.wrap.b32 	%r5936, %r5932, %r5931, 30;
	mov.b64 	%rd9529, {%r5936, %r5935};
	xor.b64  	%rd9530, %rd9529, %rd9528;
	shf.l.wrap.b32 	%r5937, %r5931, %r5932, 25;
	shf.l.wrap.b32 	%r5938, %r5932, %r5931, 25;
	mov.b64 	%rd9531, {%r5938, %r5937};
	xor.b64  	%rd9532, %rd9530, %rd9531;
	xor.b64  	%rd9533, %rd9514, %rd719;
	xor.b64  	%rd9534, %rd9514, %rd717;
	and.b64  	%rd9535, %rd9534, %rd9533;
	xor.b64  	%rd9536, %rd9535, %rd9514;
	add.s64 	%rd9537, %rd9526, %rd9536;
	add.s64 	%rd9538, %rd9537, %rd9532;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5939,%dummy}, %rd9527;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5940}, %rd9527;
	}
	shf.r.wrap.b32 	%r5941, %r5940, %r5939, 14;
	shf.r.wrap.b32 	%r5942, %r5939, %r5940, 14;
	mov.b64 	%rd9539, {%r5942, %r5941};
	shf.r.wrap.b32 	%r5943, %r5940, %r5939, 18;
	shf.r.wrap.b32 	%r5944, %r5939, %r5940, 18;
	mov.b64 	%rd9540, {%r5944, %r5943};
	xor.b64  	%rd9541, %rd9540, %rd9539;
	shf.l.wrap.b32 	%r5945, %r5939, %r5940, 23;
	shf.l.wrap.b32 	%r5946, %r5940, %r5939, 23;
	mov.b64 	%rd9542, {%r5946, %r5945};
	xor.b64  	%rd9543, %rd9541, %rd9542;
	xor.b64  	%rd9544, %rd9503, %rd712;
	and.b64  	%rd9545, %rd9527, %rd9544;
	xor.b64  	%rd9546, %rd9545, %rd712;
	add.s64 	%rd9547, %rd714, %rd21570;
	add.s64 	%rd9548, %rd9547, %rd21452;
	add.s64 	%rd9549, %rd9548, %rd9546;
	add.s64 	%rd9550, %rd9549, %rd9543;
	add.s64 	%rd9551, %rd9550, %rd719;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5947,%dummy}, %rd9538;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5948}, %rd9538;
	}
	shf.r.wrap.b32 	%r5949, %r5948, %r5947, 28;
	shf.r.wrap.b32 	%r5950, %r5947, %r5948, 28;
	mov.b64 	%rd9552, {%r5950, %r5949};
	shf.l.wrap.b32 	%r5951, %r5947, %r5948, 30;
	shf.l.wrap.b32 	%r5952, %r5948, %r5947, 30;
	mov.b64 	%rd9553, {%r5952, %r5951};
	xor.b64  	%rd9554, %rd9553, %rd9552;
	shf.l.wrap.b32 	%r5953, %r5947, %r5948, 25;
	shf.l.wrap.b32 	%r5954, %r5948, %r5947, 25;
	mov.b64 	%rd9555, {%r5954, %r5953};
	xor.b64  	%rd9556, %rd9554, %rd9555;
	xor.b64  	%rd9557, %rd9538, %rd717;
	xor.b64  	%rd9558, %rd9538, %rd9514;
	and.b64  	%rd9559, %rd9558, %rd9557;
	xor.b64  	%rd9560, %rd9559, %rd9538;
	add.s64 	%rd9561, %rd9550, %rd9560;
	add.s64 	%rd9562, %rd9561, %rd9556;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5955,%dummy}, %rd9551;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5956}, %rd9551;
	}
	shf.r.wrap.b32 	%r5957, %r5956, %r5955, 14;
	shf.r.wrap.b32 	%r5958, %r5955, %r5956, 14;
	mov.b64 	%rd9563, {%r5958, %r5957};
	shf.r.wrap.b32 	%r5959, %r5956, %r5955, 18;
	shf.r.wrap.b32 	%r5960, %r5955, %r5956, 18;
	mov.b64 	%rd9564, {%r5960, %r5959};
	xor.b64  	%rd9565, %rd9564, %rd9563;
	shf.l.wrap.b32 	%r5961, %r5955, %r5956, 23;
	shf.l.wrap.b32 	%r5962, %r5956, %r5955, 23;
	mov.b64 	%rd9566, {%r5962, %r5961};
	xor.b64  	%rd9567, %rd9565, %rd9566;
	xor.b64  	%rd9568, %rd9527, %rd9503;
	and.b64  	%rd9569, %rd9551, %rd9568;
	xor.b64  	%rd9570, %rd9569, %rd9503;
	add.s64 	%rd9571, %rd712, %rd21571;
	add.s64 	%rd9572, %rd9571, %rd21451;
	add.s64 	%rd9573, %rd9572, %rd9570;
	add.s64 	%rd9574, %rd9573, %rd9567;
	add.s64 	%rd9575, %rd9574, %rd717;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5963,%dummy}, %rd9562;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5964}, %rd9562;
	}
	shf.r.wrap.b32 	%r5965, %r5964, %r5963, 28;
	shf.r.wrap.b32 	%r5966, %r5963, %r5964, 28;
	mov.b64 	%rd9576, {%r5966, %r5965};
	shf.l.wrap.b32 	%r5967, %r5963, %r5964, 30;
	shf.l.wrap.b32 	%r5968, %r5964, %r5963, 30;
	mov.b64 	%rd9577, {%r5968, %r5967};
	xor.b64  	%rd9578, %rd9577, %rd9576;
	shf.l.wrap.b32 	%r5969, %r5963, %r5964, 25;
	shf.l.wrap.b32 	%r5970, %r5964, %r5963, 25;
	mov.b64 	%rd9579, {%r5970, %r5969};
	xor.b64  	%rd9580, %rd9578, %rd9579;
	xor.b64  	%rd9581, %rd9562, %rd9514;
	xor.b64  	%rd9582, %rd9562, %rd9538;
	and.b64  	%rd9583, %rd9582, %rd9581;
	xor.b64  	%rd9584, %rd9583, %rd9562;
	add.s64 	%rd9585, %rd9574, %rd9584;
	add.s64 	%rd9586, %rd9585, %rd9580;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5971,%dummy}, %rd9575;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5972}, %rd9575;
	}
	shf.r.wrap.b32 	%r5973, %r5972, %r5971, 14;
	shf.r.wrap.b32 	%r5974, %r5971, %r5972, 14;
	mov.b64 	%rd9587, {%r5974, %r5973};
	shf.r.wrap.b32 	%r5975, %r5972, %r5971, 18;
	shf.r.wrap.b32 	%r5976, %r5971, %r5972, 18;
	mov.b64 	%rd9588, {%r5976, %r5975};
	xor.b64  	%rd9589, %rd9588, %rd9587;
	shf.l.wrap.b32 	%r5977, %r5971, %r5972, 23;
	shf.l.wrap.b32 	%r5978, %r5972, %r5971, 23;
	mov.b64 	%rd9590, {%r5978, %r5977};
	xor.b64  	%rd9591, %rd9589, %rd9590;
	xor.b64  	%rd9592, %rd9551, %rd9527;
	and.b64  	%rd9593, %rd9575, %rd9592;
	xor.b64  	%rd9594, %rd9593, %rd9527;
	add.s64 	%rd9595, %rd9503, %rd21572;
	add.s64 	%rd9596, %rd9595, %rd21450;
	add.s64 	%rd9597, %rd9596, %rd9594;
	add.s64 	%rd9598, %rd9597, %rd9591;
	add.s64 	%rd9599, %rd9598, %rd9514;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5979,%dummy}, %rd9586;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5980}, %rd9586;
	}
	shf.r.wrap.b32 	%r5981, %r5980, %r5979, 28;
	shf.r.wrap.b32 	%r5982, %r5979, %r5980, 28;
	mov.b64 	%rd9600, {%r5982, %r5981};
	shf.l.wrap.b32 	%r5983, %r5979, %r5980, 30;
	shf.l.wrap.b32 	%r5984, %r5980, %r5979, 30;
	mov.b64 	%rd9601, {%r5984, %r5983};
	xor.b64  	%rd9602, %rd9601, %rd9600;
	shf.l.wrap.b32 	%r5985, %r5979, %r5980, 25;
	shf.l.wrap.b32 	%r5986, %r5980, %r5979, 25;
	mov.b64 	%rd9603, {%r5986, %r5985};
	xor.b64  	%rd9604, %rd9602, %rd9603;
	xor.b64  	%rd9605, %rd9586, %rd9538;
	xor.b64  	%rd9606, %rd9586, %rd9562;
	and.b64  	%rd9607, %rd9606, %rd9605;
	xor.b64  	%rd9608, %rd9607, %rd9586;
	add.s64 	%rd9609, %rd9598, %rd9608;
	add.s64 	%rd9610, %rd9609, %rd9604;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5987,%dummy}, %rd9599;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5988}, %rd9599;
	}
	shf.r.wrap.b32 	%r5989, %r5988, %r5987, 14;
	shf.r.wrap.b32 	%r5990, %r5987, %r5988, 14;
	mov.b64 	%rd9611, {%r5990, %r5989};
	shf.r.wrap.b32 	%r5991, %r5988, %r5987, 18;
	shf.r.wrap.b32 	%r5992, %r5987, %r5988, 18;
	mov.b64 	%rd9612, {%r5992, %r5991};
	xor.b64  	%rd9613, %rd9612, %rd9611;
	shf.l.wrap.b32 	%r5993, %r5987, %r5988, 23;
	shf.l.wrap.b32 	%r5994, %r5988, %r5987, 23;
	mov.b64 	%rd9614, {%r5994, %r5993};
	xor.b64  	%rd9615, %rd9613, %rd9614;
	xor.b64  	%rd9616, %rd9575, %rd9551;
	and.b64  	%rd9617, %rd9599, %rd9616;
	xor.b64  	%rd9618, %rd9617, %rd9551;
	add.s64 	%rd9619, %rd9527, %rd21573;
	add.s64 	%rd9620, %rd9619, %rd21449;
	add.s64 	%rd9621, %rd9620, %rd9618;
	add.s64 	%rd9622, %rd9621, %rd9615;
	add.s64 	%rd9623, %rd9622, %rd9538;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r5995,%dummy}, %rd9610;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r5996}, %rd9610;
	}
	shf.r.wrap.b32 	%r5997, %r5996, %r5995, 28;
	shf.r.wrap.b32 	%r5998, %r5995, %r5996, 28;
	mov.b64 	%rd9624, {%r5998, %r5997};
	shf.l.wrap.b32 	%r5999, %r5995, %r5996, 30;
	shf.l.wrap.b32 	%r6000, %r5996, %r5995, 30;
	mov.b64 	%rd9625, {%r6000, %r5999};
	xor.b64  	%rd9626, %rd9625, %rd9624;
	shf.l.wrap.b32 	%r6001, %r5995, %r5996, 25;
	shf.l.wrap.b32 	%r6002, %r5996, %r5995, 25;
	mov.b64 	%rd9627, {%r6002, %r6001};
	xor.b64  	%rd9628, %rd9626, %rd9627;
	xor.b64  	%rd9629, %rd9610, %rd9562;
	xor.b64  	%rd9630, %rd9610, %rd9586;
	and.b64  	%rd9631, %rd9630, %rd9629;
	xor.b64  	%rd9632, %rd9631, %rd9610;
	add.s64 	%rd9633, %rd9622, %rd9632;
	add.s64 	%rd9634, %rd9633, %rd9628;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6003,%dummy}, %rd9623;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6004}, %rd9623;
	}
	shf.r.wrap.b32 	%r6005, %r6004, %r6003, 14;
	shf.r.wrap.b32 	%r6006, %r6003, %r6004, 14;
	mov.b64 	%rd9635, {%r6006, %r6005};
	shf.r.wrap.b32 	%r6007, %r6004, %r6003, 18;
	shf.r.wrap.b32 	%r6008, %r6003, %r6004, 18;
	mov.b64 	%rd9636, {%r6008, %r6007};
	xor.b64  	%rd9637, %rd9636, %rd9635;
	shf.l.wrap.b32 	%r6009, %r6003, %r6004, 23;
	shf.l.wrap.b32 	%r6010, %r6004, %r6003, 23;
	mov.b64 	%rd9638, {%r6010, %r6009};
	xor.b64  	%rd9639, %rd9637, %rd9638;
	xor.b64  	%rd9640, %rd9599, %rd9575;
	and.b64  	%rd9641, %rd9623, %rd9640;
	xor.b64  	%rd9642, %rd9641, %rd9575;
	add.s64 	%rd9643, %rd9551, %rd21574;
	add.s64 	%rd9644, %rd9643, %rd21448;
	add.s64 	%rd9645, %rd9644, %rd9642;
	add.s64 	%rd9646, %rd9645, %rd9639;
	add.s64 	%rd9647, %rd9646, %rd9562;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6011,%dummy}, %rd9634;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6012}, %rd9634;
	}
	shf.r.wrap.b32 	%r6013, %r6012, %r6011, 28;
	shf.r.wrap.b32 	%r6014, %r6011, %r6012, 28;
	mov.b64 	%rd9648, {%r6014, %r6013};
	shf.l.wrap.b32 	%r6015, %r6011, %r6012, 30;
	shf.l.wrap.b32 	%r6016, %r6012, %r6011, 30;
	mov.b64 	%rd9649, {%r6016, %r6015};
	xor.b64  	%rd9650, %rd9649, %rd9648;
	shf.l.wrap.b32 	%r6017, %r6011, %r6012, 25;
	shf.l.wrap.b32 	%r6018, %r6012, %r6011, 25;
	mov.b64 	%rd9651, {%r6018, %r6017};
	xor.b64  	%rd9652, %rd9650, %rd9651;
	xor.b64  	%rd9653, %rd9634, %rd9586;
	xor.b64  	%rd9654, %rd9634, %rd9610;
	and.b64  	%rd9655, %rd9654, %rd9653;
	xor.b64  	%rd9656, %rd9655, %rd9634;
	add.s64 	%rd9657, %rd9646, %rd9656;
	add.s64 	%rd9658, %rd9657, %rd9652;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6019,%dummy}, %rd9647;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6020}, %rd9647;
	}
	shf.r.wrap.b32 	%r6021, %r6020, %r6019, 14;
	shf.r.wrap.b32 	%r6022, %r6019, %r6020, 14;
	mov.b64 	%rd9659, {%r6022, %r6021};
	shf.r.wrap.b32 	%r6023, %r6020, %r6019, 18;
	shf.r.wrap.b32 	%r6024, %r6019, %r6020, 18;
	mov.b64 	%rd9660, {%r6024, %r6023};
	xor.b64  	%rd9661, %rd9660, %rd9659;
	shf.l.wrap.b32 	%r6025, %r6019, %r6020, 23;
	shf.l.wrap.b32 	%r6026, %r6020, %r6019, 23;
	mov.b64 	%rd9662, {%r6026, %r6025};
	xor.b64  	%rd9663, %rd9661, %rd9662;
	xor.b64  	%rd9664, %rd9623, %rd9599;
	and.b64  	%rd9665, %rd9647, %rd9664;
	xor.b64  	%rd9666, %rd9665, %rd9599;
	add.s64 	%rd9667, %rd9575, %rd21575;
	add.s64 	%rd9668, %rd9667, %rd21447;
	add.s64 	%rd9669, %rd9668, %rd9666;
	add.s64 	%rd9670, %rd9669, %rd9663;
	add.s64 	%rd9671, %rd9670, %rd9586;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6027,%dummy}, %rd9658;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6028}, %rd9658;
	}
	shf.r.wrap.b32 	%r6029, %r6028, %r6027, 28;
	shf.r.wrap.b32 	%r6030, %r6027, %r6028, 28;
	mov.b64 	%rd9672, {%r6030, %r6029};
	shf.l.wrap.b32 	%r6031, %r6027, %r6028, 30;
	shf.l.wrap.b32 	%r6032, %r6028, %r6027, 30;
	mov.b64 	%rd9673, {%r6032, %r6031};
	xor.b64  	%rd9674, %rd9673, %rd9672;
	shf.l.wrap.b32 	%r6033, %r6027, %r6028, 25;
	shf.l.wrap.b32 	%r6034, %r6028, %r6027, 25;
	mov.b64 	%rd9675, {%r6034, %r6033};
	xor.b64  	%rd9676, %rd9674, %rd9675;
	xor.b64  	%rd9677, %rd9658, %rd9610;
	xor.b64  	%rd9678, %rd9658, %rd9634;
	and.b64  	%rd9679, %rd9678, %rd9677;
	xor.b64  	%rd9680, %rd9679, %rd9658;
	add.s64 	%rd9681, %rd9670, %rd9680;
	add.s64 	%rd9682, %rd9681, %rd9676;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6035,%dummy}, %rd9671;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6036}, %rd9671;
	}
	shf.r.wrap.b32 	%r6037, %r6036, %r6035, 14;
	shf.r.wrap.b32 	%r6038, %r6035, %r6036, 14;
	mov.b64 	%rd9683, {%r6038, %r6037};
	shf.r.wrap.b32 	%r6039, %r6036, %r6035, 18;
	shf.r.wrap.b32 	%r6040, %r6035, %r6036, 18;
	mov.b64 	%rd9684, {%r6040, %r6039};
	xor.b64  	%rd9685, %rd9684, %rd9683;
	shf.l.wrap.b32 	%r6041, %r6035, %r6036, 23;
	shf.l.wrap.b32 	%r6042, %r6036, %r6035, 23;
	mov.b64 	%rd9686, {%r6042, %r6041};
	xor.b64  	%rd9687, %rd9685, %rd9686;
	xor.b64  	%rd9688, %rd9647, %rd9623;
	and.b64  	%rd9689, %rd9671, %rd9688;
	xor.b64  	%rd9690, %rd9689, %rd9623;
	add.s64 	%rd9691, %rd9599, %rd21559;
	add.s64 	%rd9692, %rd9691, %rd21446;
	add.s64 	%rd9693, %rd9692, %rd9690;
	add.s64 	%rd9694, %rd9693, %rd9687;
	add.s64 	%rd9695, %rd9694, %rd9610;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6043,%dummy}, %rd9682;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6044}, %rd9682;
	}
	shf.r.wrap.b32 	%r6045, %r6044, %r6043, 28;
	shf.r.wrap.b32 	%r6046, %r6043, %r6044, 28;
	mov.b64 	%rd9696, {%r6046, %r6045};
	shf.l.wrap.b32 	%r6047, %r6043, %r6044, 30;
	shf.l.wrap.b32 	%r6048, %r6044, %r6043, 30;
	mov.b64 	%rd9697, {%r6048, %r6047};
	xor.b64  	%rd9698, %rd9697, %rd9696;
	shf.l.wrap.b32 	%r6049, %r6043, %r6044, 25;
	shf.l.wrap.b32 	%r6050, %r6044, %r6043, 25;
	mov.b64 	%rd9699, {%r6050, %r6049};
	xor.b64  	%rd9700, %rd9698, %rd9699;
	xor.b64  	%rd9701, %rd9682, %rd9634;
	xor.b64  	%rd9702, %rd9682, %rd9658;
	and.b64  	%rd9703, %rd9702, %rd9701;
	xor.b64  	%rd9704, %rd9703, %rd9682;
	add.s64 	%rd9705, %rd9694, %rd9704;
	add.s64 	%rd9706, %rd9705, %rd9700;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6051,%dummy}, %rd9695;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6052}, %rd9695;
	}
	shf.r.wrap.b32 	%r6053, %r6052, %r6051, 14;
	shf.r.wrap.b32 	%r6054, %r6051, %r6052, 14;
	mov.b64 	%rd9707, {%r6054, %r6053};
	shf.r.wrap.b32 	%r6055, %r6052, %r6051, 18;
	shf.r.wrap.b32 	%r6056, %r6051, %r6052, 18;
	mov.b64 	%rd9708, {%r6056, %r6055};
	xor.b64  	%rd9709, %rd9708, %rd9707;
	shf.l.wrap.b32 	%r6057, %r6051, %r6052, 23;
	shf.l.wrap.b32 	%r6058, %r6052, %r6051, 23;
	mov.b64 	%rd9710, {%r6058, %r6057};
	xor.b64  	%rd9711, %rd9709, %rd9710;
	xor.b64  	%rd9712, %rd9671, %rd9647;
	and.b64  	%rd9713, %rd9695, %rd9712;
	xor.b64  	%rd9714, %rd9713, %rd9647;
	add.s64 	%rd9715, %rd9623, %rd21558;
	add.s64 	%rd9716, %rd9715, %rd21445;
	add.s64 	%rd9717, %rd9716, %rd9714;
	add.s64 	%rd9718, %rd9717, %rd9711;
	add.s64 	%rd9719, %rd9718, %rd9634;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6059,%dummy}, %rd9706;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6060}, %rd9706;
	}
	shf.r.wrap.b32 	%r6061, %r6060, %r6059, 28;
	shf.r.wrap.b32 	%r6062, %r6059, %r6060, 28;
	mov.b64 	%rd9720, {%r6062, %r6061};
	shf.l.wrap.b32 	%r6063, %r6059, %r6060, 30;
	shf.l.wrap.b32 	%r6064, %r6060, %r6059, 30;
	mov.b64 	%rd9721, {%r6064, %r6063};
	xor.b64  	%rd9722, %rd9721, %rd9720;
	shf.l.wrap.b32 	%r6065, %r6059, %r6060, 25;
	shf.l.wrap.b32 	%r6066, %r6060, %r6059, 25;
	mov.b64 	%rd9723, {%r6066, %r6065};
	xor.b64  	%rd9724, %rd9722, %rd9723;
	xor.b64  	%rd9725, %rd9706, %rd9658;
	xor.b64  	%rd9726, %rd9706, %rd9682;
	and.b64  	%rd9727, %rd9726, %rd9725;
	xor.b64  	%rd9728, %rd9727, %rd9706;
	add.s64 	%rd9729, %rd9718, %rd9728;
	add.s64 	%rd9730, %rd9729, %rd9724;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6067,%dummy}, %rd9719;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6068}, %rd9719;
	}
	shf.r.wrap.b32 	%r6069, %r6068, %r6067, 14;
	shf.r.wrap.b32 	%r6070, %r6067, %r6068, 14;
	mov.b64 	%rd9731, {%r6070, %r6069};
	shf.r.wrap.b32 	%r6071, %r6068, %r6067, 18;
	shf.r.wrap.b32 	%r6072, %r6067, %r6068, 18;
	mov.b64 	%rd9732, {%r6072, %r6071};
	xor.b64  	%rd9733, %rd9732, %rd9731;
	shf.l.wrap.b32 	%r6073, %r6067, %r6068, 23;
	shf.l.wrap.b32 	%r6074, %r6068, %r6067, 23;
	mov.b64 	%rd9734, {%r6074, %r6073};
	xor.b64  	%rd9735, %rd9733, %rd9734;
	xor.b64  	%rd9736, %rd9695, %rd9671;
	and.b64  	%rd9737, %rd9719, %rd9736;
	xor.b64  	%rd9738, %rd9737, %rd9671;
	add.s64 	%rd9739, %rd9647, %rd21557;
	add.s64 	%rd9740, %rd9739, %rd21444;
	add.s64 	%rd9741, %rd9740, %rd9738;
	add.s64 	%rd9742, %rd9741, %rd9735;
	add.s64 	%rd9743, %rd9742, %rd9658;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6075,%dummy}, %rd9730;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6076}, %rd9730;
	}
	shf.r.wrap.b32 	%r6077, %r6076, %r6075, 28;
	shf.r.wrap.b32 	%r6078, %r6075, %r6076, 28;
	mov.b64 	%rd9744, {%r6078, %r6077};
	shf.l.wrap.b32 	%r6079, %r6075, %r6076, 30;
	shf.l.wrap.b32 	%r6080, %r6076, %r6075, 30;
	mov.b64 	%rd9745, {%r6080, %r6079};
	xor.b64  	%rd9746, %rd9745, %rd9744;
	shf.l.wrap.b32 	%r6081, %r6075, %r6076, 25;
	shf.l.wrap.b32 	%r6082, %r6076, %r6075, 25;
	mov.b64 	%rd9747, {%r6082, %r6081};
	xor.b64  	%rd9748, %rd9746, %rd9747;
	xor.b64  	%rd9749, %rd9730, %rd9682;
	xor.b64  	%rd9750, %rd9730, %rd9706;
	and.b64  	%rd9751, %rd9750, %rd9749;
	xor.b64  	%rd9752, %rd9751, %rd9730;
	add.s64 	%rd9753, %rd9742, %rd9752;
	add.s64 	%rd9754, %rd9753, %rd9748;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6083,%dummy}, %rd9743;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6084}, %rd9743;
	}
	shf.r.wrap.b32 	%r6085, %r6084, %r6083, 14;
	shf.r.wrap.b32 	%r6086, %r6083, %r6084, 14;
	mov.b64 	%rd9755, {%r6086, %r6085};
	shf.r.wrap.b32 	%r6087, %r6084, %r6083, 18;
	shf.r.wrap.b32 	%r6088, %r6083, %r6084, 18;
	mov.b64 	%rd9756, {%r6088, %r6087};
	xor.b64  	%rd9757, %rd9756, %rd9755;
	shf.l.wrap.b32 	%r6089, %r6083, %r6084, 23;
	shf.l.wrap.b32 	%r6090, %r6084, %r6083, 23;
	mov.b64 	%rd9758, {%r6090, %r6089};
	xor.b64  	%rd9759, %rd9757, %rd9758;
	xor.b64  	%rd9760, %rd9719, %rd9695;
	and.b64  	%rd9761, %rd9743, %rd9760;
	xor.b64  	%rd9762, %rd9761, %rd9695;
	add.s64 	%rd9763, %rd9671, %rd21556;
	add.s64 	%rd9764, %rd9763, %rd21443;
	add.s64 	%rd9765, %rd9764, %rd9762;
	add.s64 	%rd9766, %rd9765, %rd9759;
	add.s64 	%rd9767, %rd9766, %rd9682;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6091,%dummy}, %rd9754;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6092}, %rd9754;
	}
	shf.r.wrap.b32 	%r6093, %r6092, %r6091, 28;
	shf.r.wrap.b32 	%r6094, %r6091, %r6092, 28;
	mov.b64 	%rd9768, {%r6094, %r6093};
	shf.l.wrap.b32 	%r6095, %r6091, %r6092, 30;
	shf.l.wrap.b32 	%r6096, %r6092, %r6091, 30;
	mov.b64 	%rd9769, {%r6096, %r6095};
	xor.b64  	%rd9770, %rd9769, %rd9768;
	shf.l.wrap.b32 	%r6097, %r6091, %r6092, 25;
	shf.l.wrap.b32 	%r6098, %r6092, %r6091, 25;
	mov.b64 	%rd9771, {%r6098, %r6097};
	xor.b64  	%rd9772, %rd9770, %rd9771;
	xor.b64  	%rd9773, %rd9754, %rd9706;
	xor.b64  	%rd9774, %rd9754, %rd9730;
	and.b64  	%rd9775, %rd9774, %rd9773;
	xor.b64  	%rd9776, %rd9775, %rd9754;
	add.s64 	%rd9777, %rd9766, %rd9776;
	add.s64 	%rd9778, %rd9777, %rd9772;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6099,%dummy}, %rd9767;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6100}, %rd9767;
	}
	shf.r.wrap.b32 	%r6101, %r6100, %r6099, 14;
	shf.r.wrap.b32 	%r6102, %r6099, %r6100, 14;
	mov.b64 	%rd9779, {%r6102, %r6101};
	shf.r.wrap.b32 	%r6103, %r6100, %r6099, 18;
	shf.r.wrap.b32 	%r6104, %r6099, %r6100, 18;
	mov.b64 	%rd9780, {%r6104, %r6103};
	xor.b64  	%rd9781, %rd9780, %rd9779;
	shf.l.wrap.b32 	%r6105, %r6099, %r6100, 23;
	shf.l.wrap.b32 	%r6106, %r6100, %r6099, 23;
	mov.b64 	%rd9782, {%r6106, %r6105};
	xor.b64  	%rd9783, %rd9781, %rd9782;
	xor.b64  	%rd9784, %rd9743, %rd9719;
	and.b64  	%rd9785, %rd9767, %rd9784;
	xor.b64  	%rd9786, %rd9785, %rd9719;
	add.s64 	%rd9787, %rd9695, %rd21555;
	add.s64 	%rd9788, %rd9787, %rd21442;
	add.s64 	%rd9789, %rd9788, %rd9786;
	add.s64 	%rd9790, %rd9789, %rd9783;
	add.s64 	%rd21567, %rd9790, %rd9706;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6107,%dummy}, %rd9778;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6108}, %rd9778;
	}
	shf.r.wrap.b32 	%r6109, %r6108, %r6107, 28;
	shf.r.wrap.b32 	%r6110, %r6107, %r6108, 28;
	mov.b64 	%rd9791, {%r6110, %r6109};
	shf.l.wrap.b32 	%r6111, %r6107, %r6108, 30;
	shf.l.wrap.b32 	%r6112, %r6108, %r6107, 30;
	mov.b64 	%rd9792, {%r6112, %r6111};
	xor.b64  	%rd9793, %rd9792, %rd9791;
	shf.l.wrap.b32 	%r6113, %r6107, %r6108, 25;
	shf.l.wrap.b32 	%r6114, %r6108, %r6107, 25;
	mov.b64 	%rd9794, {%r6114, %r6113};
	xor.b64  	%rd9795, %rd9793, %rd9794;
	xor.b64  	%rd9796, %rd9778, %rd9730;
	xor.b64  	%rd9797, %rd9778, %rd9754;
	and.b64  	%rd9798, %rd9797, %rd9796;
	xor.b64  	%rd9799, %rd9798, %rd9778;
	add.s64 	%rd9800, %rd9790, %rd9799;
	add.s64 	%rd21563, %rd9800, %rd9795;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6115,%dummy}, %rd21567;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6116}, %rd21567;
	}
	shf.r.wrap.b32 	%r6117, %r6116, %r6115, 14;
	shf.r.wrap.b32 	%r6118, %r6115, %r6116, 14;
	mov.b64 	%rd9801, {%r6118, %r6117};
	shf.r.wrap.b32 	%r6119, %r6116, %r6115, 18;
	shf.r.wrap.b32 	%r6120, %r6115, %r6116, 18;
	mov.b64 	%rd9802, {%r6120, %r6119};
	xor.b64  	%rd9803, %rd9802, %rd9801;
	shf.l.wrap.b32 	%r6121, %r6115, %r6116, 23;
	shf.l.wrap.b32 	%r6122, %r6116, %r6115, 23;
	mov.b64 	%rd9804, {%r6122, %r6121};
	xor.b64  	%rd9805, %rd9803, %rd9804;
	xor.b64  	%rd9806, %rd9767, %rd9743;
	and.b64  	%rd9807, %rd21567, %rd9806;
	xor.b64  	%rd9808, %rd9807, %rd9743;
	add.s64 	%rd9809, %rd9719, %rd21554;
	add.s64 	%rd9810, %rd9809, %rd21441;
	add.s64 	%rd9811, %rd9810, %rd9808;
	add.s64 	%rd9812, %rd9811, %rd9805;
	add.s64 	%rd21566, %rd9812, %rd9730;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6123,%dummy}, %rd21563;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6124}, %rd21563;
	}
	shf.r.wrap.b32 	%r6125, %r6124, %r6123, 28;
	shf.r.wrap.b32 	%r6126, %r6123, %r6124, 28;
	mov.b64 	%rd9813, {%r6126, %r6125};
	shf.l.wrap.b32 	%r6127, %r6123, %r6124, 30;
	shf.l.wrap.b32 	%r6128, %r6124, %r6123, 30;
	mov.b64 	%rd9814, {%r6128, %r6127};
	xor.b64  	%rd9815, %rd9814, %rd9813;
	shf.l.wrap.b32 	%r6129, %r6123, %r6124, 25;
	shf.l.wrap.b32 	%r6130, %r6124, %r6123, 25;
	mov.b64 	%rd9816, {%r6130, %r6129};
	xor.b64  	%rd9817, %rd9815, %rd9816;
	xor.b64  	%rd9818, %rd21563, %rd9754;
	xor.b64  	%rd9819, %rd21563, %rd9778;
	and.b64  	%rd9820, %rd9819, %rd9818;
	xor.b64  	%rd9821, %rd9820, %rd21563;
	add.s64 	%rd9822, %rd9812, %rd9821;
	add.s64 	%rd21562, %rd9822, %rd9817;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6131,%dummy}, %rd21566;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6132}, %rd21566;
	}
	shf.r.wrap.b32 	%r6133, %r6132, %r6131, 14;
	shf.r.wrap.b32 	%r6134, %r6131, %r6132, 14;
	mov.b64 	%rd9823, {%r6134, %r6133};
	shf.r.wrap.b32 	%r6135, %r6132, %r6131, 18;
	shf.r.wrap.b32 	%r6136, %r6131, %r6132, 18;
	mov.b64 	%rd9824, {%r6136, %r6135};
	xor.b64  	%rd9825, %rd9824, %rd9823;
	shf.l.wrap.b32 	%r6137, %r6131, %r6132, 23;
	shf.l.wrap.b32 	%r6138, %r6132, %r6131, 23;
	mov.b64 	%rd9826, {%r6138, %r6137};
	xor.b64  	%rd9827, %rd9825, %rd9826;
	xor.b64  	%rd9828, %rd21567, %rd9767;
	and.b64  	%rd9829, %rd21566, %rd9828;
	xor.b64  	%rd9830, %rd9829, %rd9767;
	add.s64 	%rd9831, %rd9743, %rd21553;
	add.s64 	%rd9832, %rd9831, %rd21440;
	add.s64 	%rd9833, %rd9832, %rd9830;
	add.s64 	%rd9834, %rd9833, %rd9827;
	add.s64 	%rd21565, %rd9834, %rd9754;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6139,%dummy}, %rd21562;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6140}, %rd21562;
	}
	shf.r.wrap.b32 	%r6141, %r6140, %r6139, 28;
	shf.r.wrap.b32 	%r6142, %r6139, %r6140, 28;
	mov.b64 	%rd9835, {%r6142, %r6141};
	shf.l.wrap.b32 	%r6143, %r6139, %r6140, 30;
	shf.l.wrap.b32 	%r6144, %r6140, %r6139, 30;
	mov.b64 	%rd9836, {%r6144, %r6143};
	xor.b64  	%rd9837, %rd9836, %rd9835;
	shf.l.wrap.b32 	%r6145, %r6139, %r6140, 25;
	shf.l.wrap.b32 	%r6146, %r6140, %r6139, 25;
	mov.b64 	%rd9838, {%r6146, %r6145};
	xor.b64  	%rd9839, %rd9837, %rd9838;
	xor.b64  	%rd9840, %rd21562, %rd9778;
	xor.b64  	%rd9841, %rd21562, %rd21563;
	and.b64  	%rd9842, %rd9841, %rd9840;
	xor.b64  	%rd9843, %rd9842, %rd21562;
	add.s64 	%rd9844, %rd9834, %rd9843;
	add.s64 	%rd21561, %rd9844, %rd9839;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6147,%dummy}, %rd21565;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6148}, %rd21565;
	}
	shf.r.wrap.b32 	%r6149, %r6148, %r6147, 14;
	shf.r.wrap.b32 	%r6150, %r6147, %r6148, 14;
	mov.b64 	%rd9845, {%r6150, %r6149};
	shf.r.wrap.b32 	%r6151, %r6148, %r6147, 18;
	shf.r.wrap.b32 	%r6152, %r6147, %r6148, 18;
	mov.b64 	%rd9846, {%r6152, %r6151};
	xor.b64  	%rd9847, %rd9846, %rd9845;
	shf.l.wrap.b32 	%r6153, %r6147, %r6148, 23;
	shf.l.wrap.b32 	%r6154, %r6148, %r6147, 23;
	mov.b64 	%rd9848, {%r6154, %r6153};
	xor.b64  	%rd9849, %rd9847, %rd9848;
	xor.b64  	%rd9850, %rd21566, %rd21567;
	and.b64  	%rd9851, %rd21565, %rd9850;
	xor.b64  	%rd9852, %rd9851, %rd21567;
	add.s64 	%rd9853, %rd9767, %rd21552;
	add.s64 	%rd9854, %rd9853, %rd21439;
	add.s64 	%rd9855, %rd9854, %rd9852;
	add.s64 	%rd9856, %rd9855, %rd9849;
	add.s64 	%rd21564, %rd9856, %rd9778;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6155,%dummy}, %rd21561;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6156}, %rd21561;
	}
	shf.r.wrap.b32 	%r6157, %r6156, %r6155, 28;
	shf.r.wrap.b32 	%r6158, %r6155, %r6156, 28;
	mov.b64 	%rd9857, {%r6158, %r6157};
	shf.l.wrap.b32 	%r6159, %r6155, %r6156, 30;
	shf.l.wrap.b32 	%r6160, %r6156, %r6155, 30;
	mov.b64 	%rd9858, {%r6160, %r6159};
	xor.b64  	%rd9859, %rd9858, %rd9857;
	shf.l.wrap.b32 	%r6161, %r6155, %r6156, 25;
	shf.l.wrap.b32 	%r6162, %r6156, %r6155, 25;
	mov.b64 	%rd9860, {%r6162, %r6161};
	xor.b64  	%rd9861, %rd9859, %rd9860;
	xor.b64  	%rd9862, %rd21561, %rd21563;
	xor.b64  	%rd9863, %rd21561, %rd21562;
	and.b64  	%rd9864, %rd9863, %rd9862;
	xor.b64  	%rd9865, %rd9864, %rd21561;
	add.s64 	%rd9866, %rd9856, %rd9865;
	add.s64 	%rd21560, %rd9866, %rd9861;
	mov.u32 	%r14392, 16;

BB3_161:
	shr.u64 	%rd9867, %rd21553, 6;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6163,%dummy}, %rd21553;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6164}, %rd21553;
	}
	shf.r.wrap.b32 	%r6165, %r6164, %r6163, 19;
	shf.r.wrap.b32 	%r6166, %r6163, %r6164, 19;
	mov.b64 	%rd9868, {%r6166, %r6165};
	xor.b64  	%rd9869, %rd9868, %rd9867;
	shf.l.wrap.b32 	%r6167, %r6163, %r6164, 3;
	shf.l.wrap.b32 	%r6168, %r6164, %r6163, 3;
	mov.b64 	%rd9870, {%r6168, %r6167};
	xor.b64  	%rd9871, %rd9869, %rd9870;
	shr.u64 	%rd9872, %rd21569, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6169,%dummy}, %rd21569;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6170}, %rd21569;
	}
	shf.r.wrap.b32 	%r6171, %r6170, %r6169, 1;
	shf.r.wrap.b32 	%r6172, %r6169, %r6170, 1;
	mov.b64 	%rd9873, {%r6172, %r6171};
	xor.b64  	%rd9874, %rd9873, %rd9872;
	shf.r.wrap.b32 	%r6173, %r6170, %r6169, 8;
	shf.r.wrap.b32 	%r6174, %r6169, %r6170, 8;
	mov.b64 	%rd9875, {%r6174, %r6173};
	xor.b64  	%rd9876, %rd9874, %rd9875;
	add.s64 	%rd9877, %rd21558, %rd21568;
	add.s64 	%rd9878, %rd9877, %rd9871;
	add.s64 	%rd21568, %rd9878, %rd9876;
	shr.u64 	%rd9879, %rd21552, 6;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6175,%dummy}, %rd21552;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6176}, %rd21552;
	}
	shf.r.wrap.b32 	%r6177, %r6176, %r6175, 19;
	shf.r.wrap.b32 	%r6178, %r6175, %r6176, 19;
	mov.b64 	%rd9880, {%r6178, %r6177};
	xor.b64  	%rd9881, %rd9880, %rd9879;
	shf.l.wrap.b32 	%r6179, %r6175, %r6176, 3;
	shf.l.wrap.b32 	%r6180, %r6176, %r6175, 3;
	mov.b64 	%rd9882, {%r6180, %r6179};
	xor.b64  	%rd9883, %rd9881, %rd9882;
	shr.u64 	%rd9884, %rd21570, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6181,%dummy}, %rd21570;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6182}, %rd21570;
	}
	shf.r.wrap.b32 	%r6183, %r6182, %r6181, 1;
	shf.r.wrap.b32 	%r6184, %r6181, %r6182, 1;
	mov.b64 	%rd9885, {%r6184, %r6183};
	xor.b64  	%rd9886, %rd9885, %rd9884;
	shf.r.wrap.b32 	%r6185, %r6182, %r6181, 8;
	shf.r.wrap.b32 	%r6186, %r6181, %r6182, 8;
	mov.b64 	%rd9887, {%r6186, %r6185};
	xor.b64  	%rd9888, %rd9886, %rd9887;
	add.s64 	%rd9889, %rd21557, %rd21569;
	add.s64 	%rd9890, %rd9889, %rd9883;
	add.s64 	%rd21569, %rd9890, %rd9888;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6187,%dummy}, %rd21568;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6188}, %rd21568;
	}
	shf.r.wrap.b32 	%r6189, %r6188, %r6187, 19;
	shf.r.wrap.b32 	%r6190, %r6187, %r6188, 19;
	mov.b64 	%rd9891, {%r6190, %r6189};
	shf.l.wrap.b32 	%r6191, %r6187, %r6188, 3;
	shf.l.wrap.b32 	%r6192, %r6188, %r6187, 3;
	mov.b64 	%rd9892, {%r6192, %r6191};
	shr.u64 	%rd9893, %rd21568, 6;
	xor.b64  	%rd9894, %rd9891, %rd9893;
	xor.b64  	%rd9895, %rd9894, %rd9892;
	shr.u64 	%rd9896, %rd21571, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6193,%dummy}, %rd21571;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6194}, %rd21571;
	}
	shf.r.wrap.b32 	%r6195, %r6194, %r6193, 1;
	shf.r.wrap.b32 	%r6196, %r6193, %r6194, 1;
	mov.b64 	%rd9897, {%r6196, %r6195};
	xor.b64  	%rd9898, %rd9897, %rd9896;
	shf.r.wrap.b32 	%r6197, %r6194, %r6193, 8;
	shf.r.wrap.b32 	%r6198, %r6193, %r6194, 8;
	mov.b64 	%rd9899, {%r6198, %r6197};
	xor.b64  	%rd9900, %rd9898, %rd9899;
	add.s64 	%rd9901, %rd21556, %rd21570;
	add.s64 	%rd9902, %rd9901, %rd9895;
	add.s64 	%rd21570, %rd9902, %rd9900;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6199,%dummy}, %rd21569;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6200}, %rd21569;
	}
	shf.r.wrap.b32 	%r6201, %r6200, %r6199, 19;
	shf.r.wrap.b32 	%r6202, %r6199, %r6200, 19;
	mov.b64 	%rd9903, {%r6202, %r6201};
	shf.l.wrap.b32 	%r6203, %r6199, %r6200, 3;
	shf.l.wrap.b32 	%r6204, %r6200, %r6199, 3;
	mov.b64 	%rd9904, {%r6204, %r6203};
	shr.u64 	%rd9905, %rd21569, 6;
	xor.b64  	%rd9906, %rd9903, %rd9905;
	xor.b64  	%rd9907, %rd9906, %rd9904;
	shr.u64 	%rd9908, %rd21572, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6205,%dummy}, %rd21572;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6206}, %rd21572;
	}
	shf.r.wrap.b32 	%r6207, %r6206, %r6205, 1;
	shf.r.wrap.b32 	%r6208, %r6205, %r6206, 1;
	mov.b64 	%rd9909, {%r6208, %r6207};
	xor.b64  	%rd9910, %rd9909, %rd9908;
	shf.r.wrap.b32 	%r6209, %r6206, %r6205, 8;
	shf.r.wrap.b32 	%r6210, %r6205, %r6206, 8;
	mov.b64 	%rd9911, {%r6210, %r6209};
	xor.b64  	%rd9912, %rd9910, %rd9911;
	add.s64 	%rd9913, %rd21555, %rd21571;
	add.s64 	%rd9914, %rd9913, %rd9907;
	add.s64 	%rd21571, %rd9914, %rd9912;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6211,%dummy}, %rd21570;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6212}, %rd21570;
	}
	shf.r.wrap.b32 	%r6213, %r6212, %r6211, 19;
	shf.r.wrap.b32 	%r6214, %r6211, %r6212, 19;
	mov.b64 	%rd9915, {%r6214, %r6213};
	shf.l.wrap.b32 	%r6215, %r6211, %r6212, 3;
	shf.l.wrap.b32 	%r6216, %r6212, %r6211, 3;
	mov.b64 	%rd9916, {%r6216, %r6215};
	shr.u64 	%rd9917, %rd21570, 6;
	xor.b64  	%rd9918, %rd9915, %rd9917;
	xor.b64  	%rd9919, %rd9918, %rd9916;
	shr.u64 	%rd9920, %rd21573, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6217,%dummy}, %rd21573;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6218}, %rd21573;
	}
	shf.r.wrap.b32 	%r6219, %r6218, %r6217, 1;
	shf.r.wrap.b32 	%r6220, %r6217, %r6218, 1;
	mov.b64 	%rd9921, {%r6220, %r6219};
	xor.b64  	%rd9922, %rd9921, %rd9920;
	shf.r.wrap.b32 	%r6221, %r6218, %r6217, 8;
	shf.r.wrap.b32 	%r6222, %r6217, %r6218, 8;
	mov.b64 	%rd9923, {%r6222, %r6221};
	xor.b64  	%rd9924, %rd9922, %rd9923;
	add.s64 	%rd9925, %rd21554, %rd21572;
	add.s64 	%rd9926, %rd9925, %rd9919;
	add.s64 	%rd21572, %rd9926, %rd9924;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6223,%dummy}, %rd21571;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6224}, %rd21571;
	}
	shf.r.wrap.b32 	%r6225, %r6224, %r6223, 19;
	shf.r.wrap.b32 	%r6226, %r6223, %r6224, 19;
	mov.b64 	%rd9927, {%r6226, %r6225};
	shf.l.wrap.b32 	%r6227, %r6223, %r6224, 3;
	shf.l.wrap.b32 	%r6228, %r6224, %r6223, 3;
	mov.b64 	%rd9928, {%r6228, %r6227};
	shr.u64 	%rd9929, %rd21571, 6;
	xor.b64  	%rd9930, %rd9927, %rd9929;
	xor.b64  	%rd9931, %rd9930, %rd9928;
	shr.u64 	%rd9932, %rd21574, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6229,%dummy}, %rd21574;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6230}, %rd21574;
	}
	shf.r.wrap.b32 	%r6231, %r6230, %r6229, 1;
	shf.r.wrap.b32 	%r6232, %r6229, %r6230, 1;
	mov.b64 	%rd9933, {%r6232, %r6231};
	xor.b64  	%rd9934, %rd9933, %rd9932;
	shf.r.wrap.b32 	%r6233, %r6230, %r6229, 8;
	shf.r.wrap.b32 	%r6234, %r6229, %r6230, 8;
	mov.b64 	%rd9935, {%r6234, %r6233};
	xor.b64  	%rd9936, %rd9934, %rd9935;
	add.s64 	%rd9937, %rd21553, %rd21573;
	add.s64 	%rd9938, %rd9937, %rd9931;
	add.s64 	%rd21573, %rd9938, %rd9936;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6235,%dummy}, %rd21572;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6236}, %rd21572;
	}
	shf.r.wrap.b32 	%r6237, %r6236, %r6235, 19;
	shf.r.wrap.b32 	%r6238, %r6235, %r6236, 19;
	mov.b64 	%rd9939, {%r6238, %r6237};
	shf.l.wrap.b32 	%r6239, %r6235, %r6236, 3;
	shf.l.wrap.b32 	%r6240, %r6236, %r6235, 3;
	mov.b64 	%rd9940, {%r6240, %r6239};
	shr.u64 	%rd9941, %rd21572, 6;
	xor.b64  	%rd9942, %rd9939, %rd9941;
	xor.b64  	%rd9943, %rd9942, %rd9940;
	shr.u64 	%rd9944, %rd21575, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6241,%dummy}, %rd21575;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6242}, %rd21575;
	}
	shf.r.wrap.b32 	%r6243, %r6242, %r6241, 1;
	shf.r.wrap.b32 	%r6244, %r6241, %r6242, 1;
	mov.b64 	%rd9945, {%r6244, %r6243};
	xor.b64  	%rd9946, %rd9945, %rd9944;
	shf.r.wrap.b32 	%r6245, %r6242, %r6241, 8;
	shf.r.wrap.b32 	%r6246, %r6241, %r6242, 8;
	mov.b64 	%rd9947, {%r6246, %r6245};
	xor.b64  	%rd9948, %rd9946, %rd9947;
	add.s64 	%rd9949, %rd21552, %rd21574;
	add.s64 	%rd9950, %rd9949, %rd9943;
	add.s64 	%rd21574, %rd9950, %rd9948;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6247,%dummy}, %rd21573;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6248}, %rd21573;
	}
	shf.r.wrap.b32 	%r6249, %r6248, %r6247, 19;
	shf.r.wrap.b32 	%r6250, %r6247, %r6248, 19;
	mov.b64 	%rd9951, {%r6250, %r6249};
	shf.l.wrap.b32 	%r6251, %r6247, %r6248, 3;
	shf.l.wrap.b32 	%r6252, %r6248, %r6247, 3;
	mov.b64 	%rd9952, {%r6252, %r6251};
	shr.u64 	%rd9953, %rd21573, 6;
	xor.b64  	%rd9954, %rd9951, %rd9953;
	xor.b64  	%rd9955, %rd9954, %rd9952;
	shr.u64 	%rd9956, %rd21559, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6253,%dummy}, %rd21559;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6254}, %rd21559;
	}
	shf.r.wrap.b32 	%r6255, %r6254, %r6253, 1;
	shf.r.wrap.b32 	%r6256, %r6253, %r6254, 1;
	mov.b64 	%rd9957, {%r6256, %r6255};
	xor.b64  	%rd9958, %rd9957, %rd9956;
	shf.r.wrap.b32 	%r6257, %r6254, %r6253, 8;
	shf.r.wrap.b32 	%r6258, %r6253, %r6254, 8;
	mov.b64 	%rd9959, {%r6258, %r6257};
	xor.b64  	%rd9960, %rd9958, %rd9959;
	add.s64 	%rd9961, %rd21568, %rd21575;
	add.s64 	%rd9962, %rd9961, %rd9955;
	add.s64 	%rd21575, %rd9962, %rd9960;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6259,%dummy}, %rd21574;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6260}, %rd21574;
	}
	shf.r.wrap.b32 	%r6261, %r6260, %r6259, 19;
	shf.r.wrap.b32 	%r6262, %r6259, %r6260, 19;
	mov.b64 	%rd9963, {%r6262, %r6261};
	shf.l.wrap.b32 	%r6263, %r6259, %r6260, 3;
	shf.l.wrap.b32 	%r6264, %r6260, %r6259, 3;
	mov.b64 	%rd9964, {%r6264, %r6263};
	shr.u64 	%rd9965, %rd21574, 6;
	xor.b64  	%rd9966, %rd9963, %rd9965;
	xor.b64  	%rd9967, %rd9966, %rd9964;
	shr.u64 	%rd9968, %rd21558, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6265,%dummy}, %rd21558;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6266}, %rd21558;
	}
	shf.r.wrap.b32 	%r6267, %r6266, %r6265, 1;
	shf.r.wrap.b32 	%r6268, %r6265, %r6266, 1;
	mov.b64 	%rd9969, {%r6268, %r6267};
	xor.b64  	%rd9970, %rd9969, %rd9968;
	shf.r.wrap.b32 	%r6269, %r6266, %r6265, 8;
	shf.r.wrap.b32 	%r6270, %r6265, %r6266, 8;
	mov.b64 	%rd9971, {%r6270, %r6269};
	xor.b64  	%rd9972, %rd9970, %rd9971;
	add.s64 	%rd9973, %rd21569, %rd21559;
	add.s64 	%rd9974, %rd9973, %rd9967;
	add.s64 	%rd21559, %rd9974, %rd9972;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6271,%dummy}, %rd21575;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6272}, %rd21575;
	}
	shf.r.wrap.b32 	%r6273, %r6272, %r6271, 19;
	shf.r.wrap.b32 	%r6274, %r6271, %r6272, 19;
	mov.b64 	%rd9975, {%r6274, %r6273};
	shf.l.wrap.b32 	%r6275, %r6271, %r6272, 3;
	shf.l.wrap.b32 	%r6276, %r6272, %r6271, 3;
	mov.b64 	%rd9976, {%r6276, %r6275};
	shr.u64 	%rd9977, %rd21575, 6;
	xor.b64  	%rd9978, %rd9975, %rd9977;
	xor.b64  	%rd9979, %rd9978, %rd9976;
	shr.u64 	%rd9980, %rd21557, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6277,%dummy}, %rd21557;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6278}, %rd21557;
	}
	shf.r.wrap.b32 	%r6279, %r6278, %r6277, 1;
	shf.r.wrap.b32 	%r6280, %r6277, %r6278, 1;
	mov.b64 	%rd9981, {%r6280, %r6279};
	xor.b64  	%rd9982, %rd9981, %rd9980;
	shf.r.wrap.b32 	%r6281, %r6278, %r6277, 8;
	shf.r.wrap.b32 	%r6282, %r6277, %r6278, 8;
	mov.b64 	%rd9983, {%r6282, %r6281};
	xor.b64  	%rd9984, %rd9982, %rd9983;
	add.s64 	%rd9985, %rd21570, %rd21558;
	add.s64 	%rd9986, %rd9985, %rd9979;
	add.s64 	%rd21558, %rd9986, %rd9984;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6283,%dummy}, %rd21559;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6284}, %rd21559;
	}
	shf.r.wrap.b32 	%r6285, %r6284, %r6283, 19;
	shf.r.wrap.b32 	%r6286, %r6283, %r6284, 19;
	mov.b64 	%rd9987, {%r6286, %r6285};
	shf.l.wrap.b32 	%r6287, %r6283, %r6284, 3;
	shf.l.wrap.b32 	%r6288, %r6284, %r6283, 3;
	mov.b64 	%rd9988, {%r6288, %r6287};
	shr.u64 	%rd9989, %rd21559, 6;
	xor.b64  	%rd9990, %rd9987, %rd9989;
	xor.b64  	%rd9991, %rd9990, %rd9988;
	shr.u64 	%rd9992, %rd21556, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6289,%dummy}, %rd21556;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6290}, %rd21556;
	}
	shf.r.wrap.b32 	%r6291, %r6290, %r6289, 1;
	shf.r.wrap.b32 	%r6292, %r6289, %r6290, 1;
	mov.b64 	%rd9993, {%r6292, %r6291};
	xor.b64  	%rd9994, %rd9993, %rd9992;
	shf.r.wrap.b32 	%r6293, %r6290, %r6289, 8;
	shf.r.wrap.b32 	%r6294, %r6289, %r6290, 8;
	mov.b64 	%rd9995, {%r6294, %r6293};
	xor.b64  	%rd9996, %rd9994, %rd9995;
	add.s64 	%rd9997, %rd21571, %rd21557;
	add.s64 	%rd9998, %rd9997, %rd9991;
	add.s64 	%rd21557, %rd9998, %rd9996;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6295,%dummy}, %rd21558;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6296}, %rd21558;
	}
	shf.r.wrap.b32 	%r6297, %r6296, %r6295, 19;
	shf.r.wrap.b32 	%r6298, %r6295, %r6296, 19;
	mov.b64 	%rd9999, {%r6298, %r6297};
	shf.l.wrap.b32 	%r6299, %r6295, %r6296, 3;
	shf.l.wrap.b32 	%r6300, %r6296, %r6295, 3;
	mov.b64 	%rd10000, {%r6300, %r6299};
	shr.u64 	%rd10001, %rd21558, 6;
	xor.b64  	%rd10002, %rd9999, %rd10001;
	xor.b64  	%rd10003, %rd10002, %rd10000;
	shr.u64 	%rd10004, %rd21555, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6301,%dummy}, %rd21555;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6302}, %rd21555;
	}
	shf.r.wrap.b32 	%r6303, %r6302, %r6301, 1;
	shf.r.wrap.b32 	%r6304, %r6301, %r6302, 1;
	mov.b64 	%rd10005, {%r6304, %r6303};
	xor.b64  	%rd10006, %rd10005, %rd10004;
	shf.r.wrap.b32 	%r6305, %r6302, %r6301, 8;
	shf.r.wrap.b32 	%r6306, %r6301, %r6302, 8;
	mov.b64 	%rd10007, {%r6306, %r6305};
	xor.b64  	%rd10008, %rd10006, %rd10007;
	add.s64 	%rd10009, %rd21572, %rd21556;
	add.s64 	%rd10010, %rd10009, %rd10003;
	add.s64 	%rd21556, %rd10010, %rd10008;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6307,%dummy}, %rd21557;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6308}, %rd21557;
	}
	shf.r.wrap.b32 	%r6309, %r6308, %r6307, 19;
	shf.r.wrap.b32 	%r6310, %r6307, %r6308, 19;
	mov.b64 	%rd10011, {%r6310, %r6309};
	shf.l.wrap.b32 	%r6311, %r6307, %r6308, 3;
	shf.l.wrap.b32 	%r6312, %r6308, %r6307, 3;
	mov.b64 	%rd10012, {%r6312, %r6311};
	shr.u64 	%rd10013, %rd21557, 6;
	xor.b64  	%rd10014, %rd10011, %rd10013;
	xor.b64  	%rd10015, %rd10014, %rd10012;
	shr.u64 	%rd10016, %rd21554, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6313,%dummy}, %rd21554;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6314}, %rd21554;
	}
	shf.r.wrap.b32 	%r6315, %r6314, %r6313, 1;
	shf.r.wrap.b32 	%r6316, %r6313, %r6314, 1;
	mov.b64 	%rd10017, {%r6316, %r6315};
	xor.b64  	%rd10018, %rd10017, %rd10016;
	shf.r.wrap.b32 	%r6317, %r6314, %r6313, 8;
	shf.r.wrap.b32 	%r6318, %r6313, %r6314, 8;
	mov.b64 	%rd10019, {%r6318, %r6317};
	xor.b64  	%rd10020, %rd10018, %rd10019;
	add.s64 	%rd10021, %rd21573, %rd21555;
	add.s64 	%rd10022, %rd10021, %rd10015;
	add.s64 	%rd21555, %rd10022, %rd10020;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6319,%dummy}, %rd21556;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6320}, %rd21556;
	}
	shf.r.wrap.b32 	%r6321, %r6320, %r6319, 19;
	shf.r.wrap.b32 	%r6322, %r6319, %r6320, 19;
	mov.b64 	%rd10023, {%r6322, %r6321};
	shf.l.wrap.b32 	%r6323, %r6319, %r6320, 3;
	shf.l.wrap.b32 	%r6324, %r6320, %r6319, 3;
	mov.b64 	%rd10024, {%r6324, %r6323};
	shr.u64 	%rd10025, %rd21556, 6;
	xor.b64  	%rd10026, %rd10023, %rd10025;
	xor.b64  	%rd10027, %rd10026, %rd10024;
	shr.u64 	%rd10028, %rd21553, 7;
	shf.r.wrap.b32 	%r6325, %r6164, %r6163, 1;
	shf.r.wrap.b32 	%r6326, %r6163, %r6164, 1;
	mov.b64 	%rd10029, {%r6326, %r6325};
	xor.b64  	%rd10030, %rd10029, %rd10028;
	shf.r.wrap.b32 	%r6327, %r6164, %r6163, 8;
	shf.r.wrap.b32 	%r6328, %r6163, %r6164, 8;
	mov.b64 	%rd10031, {%r6328, %r6327};
	xor.b64  	%rd10032, %rd10030, %rd10031;
	add.s64 	%rd10033, %rd21574, %rd21554;
	add.s64 	%rd10034, %rd10033, %rd10027;
	add.s64 	%rd21554, %rd10034, %rd10032;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6329,%dummy}, %rd21555;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6330}, %rd21555;
	}
	shf.r.wrap.b32 	%r6331, %r6330, %r6329, 19;
	shf.r.wrap.b32 	%r6332, %r6329, %r6330, 19;
	mov.b64 	%rd10035, {%r6332, %r6331};
	shf.l.wrap.b32 	%r6333, %r6329, %r6330, 3;
	shf.l.wrap.b32 	%r6334, %r6330, %r6329, 3;
	mov.b64 	%rd10036, {%r6334, %r6333};
	shr.u64 	%rd10037, %rd21555, 6;
	xor.b64  	%rd10038, %rd10035, %rd10037;
	xor.b64  	%rd10039, %rd10038, %rd10036;
	shr.u64 	%rd10040, %rd21552, 7;
	shf.r.wrap.b32 	%r6335, %r6176, %r6175, 1;
	shf.r.wrap.b32 	%r6336, %r6175, %r6176, 1;
	mov.b64 	%rd10041, {%r6336, %r6335};
	xor.b64  	%rd10042, %rd10041, %rd10040;
	shf.r.wrap.b32 	%r6337, %r6176, %r6175, 8;
	shf.r.wrap.b32 	%r6338, %r6175, %r6176, 8;
	mov.b64 	%rd10043, {%r6338, %r6337};
	xor.b64  	%rd10044, %rd10042, %rd10043;
	add.s64 	%rd10045, %rd21575, %rd21553;
	add.s64 	%rd10046, %rd10045, %rd10039;
	add.s64 	%rd21553, %rd10046, %rd10044;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6339,%dummy}, %rd21554;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6340}, %rd21554;
	}
	shf.r.wrap.b32 	%r6341, %r6340, %r6339, 19;
	shf.r.wrap.b32 	%r6342, %r6339, %r6340, 19;
	mov.b64 	%rd10047, {%r6342, %r6341};
	shf.l.wrap.b32 	%r6343, %r6339, %r6340, 3;
	shf.l.wrap.b32 	%r6344, %r6340, %r6339, 3;
	mov.b64 	%rd10048, {%r6344, %r6343};
	shr.u64 	%rd10049, %rd21554, 6;
	xor.b64  	%rd10050, %rd10047, %rd10049;
	xor.b64  	%rd10051, %rd10050, %rd10048;
	shf.r.wrap.b32 	%r6345, %r6188, %r6187, 1;
	shf.r.wrap.b32 	%r6346, %r6187, %r6188, 1;
	mov.b64 	%rd10052, {%r6346, %r6345};
	shf.r.wrap.b32 	%r6347, %r6188, %r6187, 8;
	shf.r.wrap.b32 	%r6348, %r6187, %r6188, 8;
	mov.b64 	%rd10053, {%r6348, %r6347};
	shr.u64 	%rd10054, %rd21568, 7;
	xor.b64  	%rd10055, %rd10052, %rd10054;
	xor.b64  	%rd10056, %rd10055, %rd10053;
	add.s64 	%rd10057, %rd21559, %rd21552;
	add.s64 	%rd10058, %rd10057, %rd10051;
	add.s64 	%rd21552, %rd10058, %rd10056;
	mul.wide.s32 	%rd10059, %r14392, 8;
	add.s64 	%rd10061, %rd6761, %rd10059;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6349,%dummy}, %rd21564;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6350}, %rd21564;
	}
	shf.r.wrap.b32 	%r6351, %r6350, %r6349, 18;
	shf.r.wrap.b32 	%r6352, %r6349, %r6350, 18;
	mov.b64 	%rd10062, {%r6352, %r6351};
	shf.r.wrap.b32 	%r6353, %r6350, %r6349, 14;
	shf.r.wrap.b32 	%r6354, %r6349, %r6350, 14;
	mov.b64 	%rd10063, {%r6354, %r6353};
	xor.b64  	%rd10064, %rd10062, %rd10063;
	shf.l.wrap.b32 	%r6355, %r6349, %r6350, 23;
	shf.l.wrap.b32 	%r6356, %r6350, %r6349, 23;
	mov.b64 	%rd10065, {%r6356, %r6355};
	xor.b64  	%rd10066, %rd10064, %rd10065;
	xor.b64  	%rd10067, %rd21565, %rd21566;
	and.b64  	%rd10068, %rd10067, %rd21564;
	xor.b64  	%rd10069, %rd10068, %rd21566;
	add.s64 	%rd10070, %rd10069, %rd21567;
	add.s64 	%rd10071, %rd10070, %rd21568;
	ld.const.u64 	%rd10072, [%rd10061];
	add.s64 	%rd10073, %rd10071, %rd10072;
	add.s64 	%rd10074, %rd10073, %rd10066;
	add.s64 	%rd10075, %rd10074, %rd21563;
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6357}, %rd21560;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6358,%dummy}, %rd21560;
	}
	shf.l.wrap.b32 	%r6359, %r6358, %r6357, 30;
	shf.l.wrap.b32 	%r6360, %r6357, %r6358, 30;
	mov.b64 	%rd10076, {%r6360, %r6359};
	shf.r.wrap.b32 	%r6361, %r6357, %r6358, 28;
	shf.r.wrap.b32 	%r6362, %r6358, %r6357, 28;
	mov.b64 	%rd10077, {%r6362, %r6361};
	xor.b64  	%rd10078, %rd10076, %rd10077;
	shf.l.wrap.b32 	%r6363, %r6358, %r6357, 25;
	shf.l.wrap.b32 	%r6364, %r6357, %r6358, 25;
	mov.b64 	%rd10079, {%r6364, %r6363};
	xor.b64  	%rd10080, %rd10078, %rd10079;
	xor.b64  	%rd10081, %rd21560, %rd21561;
	xor.b64  	%rd10082, %rd21560, %rd21562;
	and.b64  	%rd10083, %rd10081, %rd10082;
	xor.b64  	%rd10084, %rd10083, %rd21560;
	add.s64 	%rd10085, %rd10074, %rd10084;
	add.s64 	%rd10086, %rd10085, %rd10080;
	add.s32 	%r6365, %r14392, 1;
	mul.wide.s32 	%rd10087, %r6365, 8;
	add.s64 	%rd10088, %rd6761, %rd10087;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6366,%dummy}, %rd10075;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6367}, %rd10075;
	}
	shf.r.wrap.b32 	%r6368, %r6367, %r6366, 14;
	shf.r.wrap.b32 	%r6369, %r6366, %r6367, 14;
	mov.b64 	%rd10089, {%r6369, %r6368};
	shf.r.wrap.b32 	%r6370, %r6367, %r6366, 18;
	shf.r.wrap.b32 	%r6371, %r6366, %r6367, 18;
	mov.b64 	%rd10090, {%r6371, %r6370};
	xor.b64  	%rd10091, %rd10090, %rd10089;
	shf.l.wrap.b32 	%r6372, %r6366, %r6367, 23;
	shf.l.wrap.b32 	%r6373, %r6367, %r6366, 23;
	mov.b64 	%rd10092, {%r6373, %r6372};
	xor.b64  	%rd10093, %rd10091, %rd10092;
	xor.b64  	%rd10094, %rd21564, %rd21565;
	and.b64  	%rd10095, %rd10075, %rd10094;
	xor.b64  	%rd10096, %rd10095, %rd21565;
	add.s64 	%rd10097, %rd21569, %rd21566;
	ld.const.u64 	%rd10098, [%rd10088];
	add.s64 	%rd10099, %rd10097, %rd10098;
	add.s64 	%rd10100, %rd10099, %rd10096;
	add.s64 	%rd10101, %rd10100, %rd10093;
	add.s64 	%rd10102, %rd10101, %rd21562;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6374,%dummy}, %rd10086;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6375}, %rd10086;
	}
	shf.r.wrap.b32 	%r6376, %r6375, %r6374, 28;
	shf.r.wrap.b32 	%r6377, %r6374, %r6375, 28;
	mov.b64 	%rd10103, {%r6377, %r6376};
	shf.l.wrap.b32 	%r6378, %r6374, %r6375, 30;
	shf.l.wrap.b32 	%r6379, %r6375, %r6374, 30;
	mov.b64 	%rd10104, {%r6379, %r6378};
	xor.b64  	%rd10105, %rd10104, %rd10103;
	shf.l.wrap.b32 	%r6380, %r6374, %r6375, 25;
	shf.l.wrap.b32 	%r6381, %r6375, %r6374, 25;
	mov.b64 	%rd10106, {%r6381, %r6380};
	xor.b64  	%rd10107, %rd10105, %rd10106;
	xor.b64  	%rd10108, %rd10086, %rd21561;
	xor.b64  	%rd10109, %rd10086, %rd21560;
	and.b64  	%rd10110, %rd10109, %rd10108;
	xor.b64  	%rd10111, %rd10110, %rd10086;
	add.s64 	%rd10112, %rd10101, %rd10111;
	add.s64 	%rd10113, %rd10112, %rd10107;
	add.s32 	%r6382, %r14392, 2;
	mul.wide.s32 	%rd10114, %r6382, 8;
	add.s64 	%rd10115, %rd6761, %rd10114;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6383,%dummy}, %rd10102;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6384}, %rd10102;
	}
	shf.r.wrap.b32 	%r6385, %r6384, %r6383, 14;
	shf.r.wrap.b32 	%r6386, %r6383, %r6384, 14;
	mov.b64 	%rd10116, {%r6386, %r6385};
	shf.r.wrap.b32 	%r6387, %r6384, %r6383, 18;
	shf.r.wrap.b32 	%r6388, %r6383, %r6384, 18;
	mov.b64 	%rd10117, {%r6388, %r6387};
	xor.b64  	%rd10118, %rd10117, %rd10116;
	shf.l.wrap.b32 	%r6389, %r6383, %r6384, 23;
	shf.l.wrap.b32 	%r6390, %r6384, %r6383, 23;
	mov.b64 	%rd10119, {%r6390, %r6389};
	xor.b64  	%rd10120, %rd10118, %rd10119;
	xor.b64  	%rd10121, %rd10075, %rd21564;
	and.b64  	%rd10122, %rd10102, %rd10121;
	xor.b64  	%rd10123, %rd10122, %rd21564;
	add.s64 	%rd10124, %rd21570, %rd21565;
	ld.const.u64 	%rd10125, [%rd10115];
	add.s64 	%rd10126, %rd10124, %rd10125;
	add.s64 	%rd10127, %rd10126, %rd10123;
	add.s64 	%rd10128, %rd10127, %rd10120;
	add.s64 	%rd10129, %rd10128, %rd21561;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6391,%dummy}, %rd10113;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6392}, %rd10113;
	}
	shf.r.wrap.b32 	%r6393, %r6392, %r6391, 28;
	shf.r.wrap.b32 	%r6394, %r6391, %r6392, 28;
	mov.b64 	%rd10130, {%r6394, %r6393};
	shf.l.wrap.b32 	%r6395, %r6391, %r6392, 30;
	shf.l.wrap.b32 	%r6396, %r6392, %r6391, 30;
	mov.b64 	%rd10131, {%r6396, %r6395};
	xor.b64  	%rd10132, %rd10131, %rd10130;
	shf.l.wrap.b32 	%r6397, %r6391, %r6392, 25;
	shf.l.wrap.b32 	%r6398, %r6392, %r6391, 25;
	mov.b64 	%rd10133, {%r6398, %r6397};
	xor.b64  	%rd10134, %rd10132, %rd10133;
	xor.b64  	%rd10135, %rd10113, %rd21560;
	xor.b64  	%rd10136, %rd10113, %rd10086;
	and.b64  	%rd10137, %rd10136, %rd10135;
	xor.b64  	%rd10138, %rd10137, %rd10113;
	add.s64 	%rd10139, %rd10128, %rd10138;
	add.s64 	%rd10140, %rd10139, %rd10134;
	add.s32 	%r6399, %r14392, 3;
	mul.wide.s32 	%rd10141, %r6399, 8;
	add.s64 	%rd10142, %rd6761, %rd10141;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6400,%dummy}, %rd10129;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6401}, %rd10129;
	}
	shf.r.wrap.b32 	%r6402, %r6401, %r6400, 14;
	shf.r.wrap.b32 	%r6403, %r6400, %r6401, 14;
	mov.b64 	%rd10143, {%r6403, %r6402};
	shf.r.wrap.b32 	%r6404, %r6401, %r6400, 18;
	shf.r.wrap.b32 	%r6405, %r6400, %r6401, 18;
	mov.b64 	%rd10144, {%r6405, %r6404};
	xor.b64  	%rd10145, %rd10144, %rd10143;
	shf.l.wrap.b32 	%r6406, %r6400, %r6401, 23;
	shf.l.wrap.b32 	%r6407, %r6401, %r6400, 23;
	mov.b64 	%rd10146, {%r6407, %r6406};
	xor.b64  	%rd10147, %rd10145, %rd10146;
	xor.b64  	%rd10148, %rd10102, %rd10075;
	and.b64  	%rd10149, %rd10129, %rd10148;
	xor.b64  	%rd10150, %rd10149, %rd10075;
	add.s64 	%rd10151, %rd21571, %rd21564;
	ld.const.u64 	%rd10152, [%rd10142];
	add.s64 	%rd10153, %rd10151, %rd10152;
	add.s64 	%rd10154, %rd10153, %rd10150;
	add.s64 	%rd10155, %rd10154, %rd10147;
	add.s64 	%rd10156, %rd10155, %rd21560;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6408,%dummy}, %rd10140;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6409}, %rd10140;
	}
	shf.r.wrap.b32 	%r6410, %r6409, %r6408, 28;
	shf.r.wrap.b32 	%r6411, %r6408, %r6409, 28;
	mov.b64 	%rd10157, {%r6411, %r6410};
	shf.l.wrap.b32 	%r6412, %r6408, %r6409, 30;
	shf.l.wrap.b32 	%r6413, %r6409, %r6408, 30;
	mov.b64 	%rd10158, {%r6413, %r6412};
	xor.b64  	%rd10159, %rd10158, %rd10157;
	shf.l.wrap.b32 	%r6414, %r6408, %r6409, 25;
	shf.l.wrap.b32 	%r6415, %r6409, %r6408, 25;
	mov.b64 	%rd10160, {%r6415, %r6414};
	xor.b64  	%rd10161, %rd10159, %rd10160;
	xor.b64  	%rd10162, %rd10140, %rd10086;
	xor.b64  	%rd10163, %rd10140, %rd10113;
	and.b64  	%rd10164, %rd10163, %rd10162;
	xor.b64  	%rd10165, %rd10164, %rd10140;
	add.s64 	%rd10166, %rd10155, %rd10165;
	add.s64 	%rd10167, %rd10166, %rd10161;
	add.s32 	%r6416, %r14392, 4;
	mul.wide.s32 	%rd10168, %r6416, 8;
	add.s64 	%rd10169, %rd6761, %rd10168;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6417,%dummy}, %rd10156;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6418}, %rd10156;
	}
	shf.r.wrap.b32 	%r6419, %r6418, %r6417, 14;
	shf.r.wrap.b32 	%r6420, %r6417, %r6418, 14;
	mov.b64 	%rd10170, {%r6420, %r6419};
	shf.r.wrap.b32 	%r6421, %r6418, %r6417, 18;
	shf.r.wrap.b32 	%r6422, %r6417, %r6418, 18;
	mov.b64 	%rd10171, {%r6422, %r6421};
	xor.b64  	%rd10172, %rd10171, %rd10170;
	shf.l.wrap.b32 	%r6423, %r6417, %r6418, 23;
	shf.l.wrap.b32 	%r6424, %r6418, %r6417, 23;
	mov.b64 	%rd10173, {%r6424, %r6423};
	xor.b64  	%rd10174, %rd10172, %rd10173;
	xor.b64  	%rd10175, %rd10129, %rd10102;
	and.b64  	%rd10176, %rd10156, %rd10175;
	xor.b64  	%rd10177, %rd10176, %rd10102;
	add.s64 	%rd10178, %rd10075, %rd21572;
	ld.const.u64 	%rd10179, [%rd10169];
	add.s64 	%rd10180, %rd10178, %rd10179;
	add.s64 	%rd10181, %rd10180, %rd10177;
	add.s64 	%rd10182, %rd10181, %rd10174;
	add.s64 	%rd10183, %rd10182, %rd10086;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6425,%dummy}, %rd10167;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6426}, %rd10167;
	}
	shf.r.wrap.b32 	%r6427, %r6426, %r6425, 28;
	shf.r.wrap.b32 	%r6428, %r6425, %r6426, 28;
	mov.b64 	%rd10184, {%r6428, %r6427};
	shf.l.wrap.b32 	%r6429, %r6425, %r6426, 30;
	shf.l.wrap.b32 	%r6430, %r6426, %r6425, 30;
	mov.b64 	%rd10185, {%r6430, %r6429};
	xor.b64  	%rd10186, %rd10185, %rd10184;
	shf.l.wrap.b32 	%r6431, %r6425, %r6426, 25;
	shf.l.wrap.b32 	%r6432, %r6426, %r6425, 25;
	mov.b64 	%rd10187, {%r6432, %r6431};
	xor.b64  	%rd10188, %rd10186, %rd10187;
	xor.b64  	%rd10189, %rd10167, %rd10113;
	xor.b64  	%rd10190, %rd10167, %rd10140;
	and.b64  	%rd10191, %rd10190, %rd10189;
	xor.b64  	%rd10192, %rd10191, %rd10167;
	add.s64 	%rd10193, %rd10182, %rd10192;
	add.s64 	%rd10194, %rd10193, %rd10188;
	add.s32 	%r6433, %r14392, 5;
	mul.wide.s32 	%rd10195, %r6433, 8;
	add.s64 	%rd10196, %rd6761, %rd10195;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6434,%dummy}, %rd10183;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6435}, %rd10183;
	}
	shf.r.wrap.b32 	%r6436, %r6435, %r6434, 14;
	shf.r.wrap.b32 	%r6437, %r6434, %r6435, 14;
	mov.b64 	%rd10197, {%r6437, %r6436};
	shf.r.wrap.b32 	%r6438, %r6435, %r6434, 18;
	shf.r.wrap.b32 	%r6439, %r6434, %r6435, 18;
	mov.b64 	%rd10198, {%r6439, %r6438};
	xor.b64  	%rd10199, %rd10198, %rd10197;
	shf.l.wrap.b32 	%r6440, %r6434, %r6435, 23;
	shf.l.wrap.b32 	%r6441, %r6435, %r6434, 23;
	mov.b64 	%rd10200, {%r6441, %r6440};
	xor.b64  	%rd10201, %rd10199, %rd10200;
	xor.b64  	%rd10202, %rd10156, %rd10129;
	and.b64  	%rd10203, %rd10183, %rd10202;
	xor.b64  	%rd10204, %rd10203, %rd10129;
	add.s64 	%rd10205, %rd10102, %rd21573;
	ld.const.u64 	%rd10206, [%rd10196];
	add.s64 	%rd10207, %rd10205, %rd10206;
	add.s64 	%rd10208, %rd10207, %rd10204;
	add.s64 	%rd10209, %rd10208, %rd10201;
	add.s64 	%rd10210, %rd10209, %rd10113;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6442,%dummy}, %rd10194;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6443}, %rd10194;
	}
	shf.r.wrap.b32 	%r6444, %r6443, %r6442, 28;
	shf.r.wrap.b32 	%r6445, %r6442, %r6443, 28;
	mov.b64 	%rd10211, {%r6445, %r6444};
	shf.l.wrap.b32 	%r6446, %r6442, %r6443, 30;
	shf.l.wrap.b32 	%r6447, %r6443, %r6442, 30;
	mov.b64 	%rd10212, {%r6447, %r6446};
	xor.b64  	%rd10213, %rd10212, %rd10211;
	shf.l.wrap.b32 	%r6448, %r6442, %r6443, 25;
	shf.l.wrap.b32 	%r6449, %r6443, %r6442, 25;
	mov.b64 	%rd10214, {%r6449, %r6448};
	xor.b64  	%rd10215, %rd10213, %rd10214;
	xor.b64  	%rd10216, %rd10194, %rd10140;
	xor.b64  	%rd10217, %rd10194, %rd10167;
	and.b64  	%rd10218, %rd10217, %rd10216;
	xor.b64  	%rd10219, %rd10218, %rd10194;
	add.s64 	%rd10220, %rd10209, %rd10219;
	add.s64 	%rd10221, %rd10220, %rd10215;
	add.s32 	%r6450, %r14392, 6;
	mul.wide.s32 	%rd10222, %r6450, 8;
	add.s64 	%rd10223, %rd6761, %rd10222;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6451,%dummy}, %rd10210;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6452}, %rd10210;
	}
	shf.r.wrap.b32 	%r6453, %r6452, %r6451, 14;
	shf.r.wrap.b32 	%r6454, %r6451, %r6452, 14;
	mov.b64 	%rd10224, {%r6454, %r6453};
	shf.r.wrap.b32 	%r6455, %r6452, %r6451, 18;
	shf.r.wrap.b32 	%r6456, %r6451, %r6452, 18;
	mov.b64 	%rd10225, {%r6456, %r6455};
	xor.b64  	%rd10226, %rd10225, %rd10224;
	shf.l.wrap.b32 	%r6457, %r6451, %r6452, 23;
	shf.l.wrap.b32 	%r6458, %r6452, %r6451, 23;
	mov.b64 	%rd10227, {%r6458, %r6457};
	xor.b64  	%rd10228, %rd10226, %rd10227;
	xor.b64  	%rd10229, %rd10183, %rd10156;
	and.b64  	%rd10230, %rd10210, %rd10229;
	xor.b64  	%rd10231, %rd10230, %rd10156;
	add.s64 	%rd10232, %rd10129, %rd21574;
	ld.const.u64 	%rd10233, [%rd10223];
	add.s64 	%rd10234, %rd10232, %rd10233;
	add.s64 	%rd10235, %rd10234, %rd10231;
	add.s64 	%rd10236, %rd10235, %rd10228;
	add.s64 	%rd10237, %rd10236, %rd10140;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6459,%dummy}, %rd10221;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6460}, %rd10221;
	}
	shf.r.wrap.b32 	%r6461, %r6460, %r6459, 28;
	shf.r.wrap.b32 	%r6462, %r6459, %r6460, 28;
	mov.b64 	%rd10238, {%r6462, %r6461};
	shf.l.wrap.b32 	%r6463, %r6459, %r6460, 30;
	shf.l.wrap.b32 	%r6464, %r6460, %r6459, 30;
	mov.b64 	%rd10239, {%r6464, %r6463};
	xor.b64  	%rd10240, %rd10239, %rd10238;
	shf.l.wrap.b32 	%r6465, %r6459, %r6460, 25;
	shf.l.wrap.b32 	%r6466, %r6460, %r6459, 25;
	mov.b64 	%rd10241, {%r6466, %r6465};
	xor.b64  	%rd10242, %rd10240, %rd10241;
	xor.b64  	%rd10243, %rd10221, %rd10167;
	xor.b64  	%rd10244, %rd10221, %rd10194;
	and.b64  	%rd10245, %rd10244, %rd10243;
	xor.b64  	%rd10246, %rd10245, %rd10221;
	add.s64 	%rd10247, %rd10236, %rd10246;
	add.s64 	%rd10248, %rd10247, %rd10242;
	add.s32 	%r6467, %r14392, 7;
	mul.wide.s32 	%rd10249, %r6467, 8;
	add.s64 	%rd10250, %rd6761, %rd10249;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6468,%dummy}, %rd10237;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6469}, %rd10237;
	}
	shf.r.wrap.b32 	%r6470, %r6469, %r6468, 14;
	shf.r.wrap.b32 	%r6471, %r6468, %r6469, 14;
	mov.b64 	%rd10251, {%r6471, %r6470};
	shf.r.wrap.b32 	%r6472, %r6469, %r6468, 18;
	shf.r.wrap.b32 	%r6473, %r6468, %r6469, 18;
	mov.b64 	%rd10252, {%r6473, %r6472};
	xor.b64  	%rd10253, %rd10252, %rd10251;
	shf.l.wrap.b32 	%r6474, %r6468, %r6469, 23;
	shf.l.wrap.b32 	%r6475, %r6469, %r6468, 23;
	mov.b64 	%rd10254, {%r6475, %r6474};
	xor.b64  	%rd10255, %rd10253, %rd10254;
	xor.b64  	%rd10256, %rd10210, %rd10183;
	and.b64  	%rd10257, %rd10237, %rd10256;
	xor.b64  	%rd10258, %rd10257, %rd10183;
	add.s64 	%rd10259, %rd10156, %rd21575;
	ld.const.u64 	%rd10260, [%rd10250];
	add.s64 	%rd10261, %rd10259, %rd10260;
	add.s64 	%rd10262, %rd10261, %rd10258;
	add.s64 	%rd10263, %rd10262, %rd10255;
	add.s64 	%rd10264, %rd10263, %rd10167;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6476,%dummy}, %rd10248;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6477}, %rd10248;
	}
	shf.r.wrap.b32 	%r6478, %r6477, %r6476, 28;
	shf.r.wrap.b32 	%r6479, %r6476, %r6477, 28;
	mov.b64 	%rd10265, {%r6479, %r6478};
	shf.l.wrap.b32 	%r6480, %r6476, %r6477, 30;
	shf.l.wrap.b32 	%r6481, %r6477, %r6476, 30;
	mov.b64 	%rd10266, {%r6481, %r6480};
	xor.b64  	%rd10267, %rd10266, %rd10265;
	shf.l.wrap.b32 	%r6482, %r6476, %r6477, 25;
	shf.l.wrap.b32 	%r6483, %r6477, %r6476, 25;
	mov.b64 	%rd10268, {%r6483, %r6482};
	xor.b64  	%rd10269, %rd10267, %rd10268;
	xor.b64  	%rd10270, %rd10248, %rd10194;
	xor.b64  	%rd10271, %rd10248, %rd10221;
	and.b64  	%rd10272, %rd10271, %rd10270;
	xor.b64  	%rd10273, %rd10272, %rd10248;
	add.s64 	%rd10274, %rd10263, %rd10273;
	add.s64 	%rd10275, %rd10274, %rd10269;
	add.s32 	%r6484, %r14392, 8;
	mul.wide.s32 	%rd10276, %r6484, 8;
	add.s64 	%rd10277, %rd6761, %rd10276;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6485,%dummy}, %rd10264;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6486}, %rd10264;
	}
	shf.r.wrap.b32 	%r6487, %r6486, %r6485, 14;
	shf.r.wrap.b32 	%r6488, %r6485, %r6486, 14;
	mov.b64 	%rd10278, {%r6488, %r6487};
	shf.r.wrap.b32 	%r6489, %r6486, %r6485, 18;
	shf.r.wrap.b32 	%r6490, %r6485, %r6486, 18;
	mov.b64 	%rd10279, {%r6490, %r6489};
	xor.b64  	%rd10280, %rd10279, %rd10278;
	shf.l.wrap.b32 	%r6491, %r6485, %r6486, 23;
	shf.l.wrap.b32 	%r6492, %r6486, %r6485, 23;
	mov.b64 	%rd10281, {%r6492, %r6491};
	xor.b64  	%rd10282, %rd10280, %rd10281;
	xor.b64  	%rd10283, %rd10237, %rd10210;
	and.b64  	%rd10284, %rd10264, %rd10283;
	xor.b64  	%rd10285, %rd10284, %rd10210;
	add.s64 	%rd10286, %rd10183, %rd21559;
	ld.const.u64 	%rd10287, [%rd10277];
	add.s64 	%rd10288, %rd10286, %rd10287;
	add.s64 	%rd10289, %rd10288, %rd10285;
	add.s64 	%rd10290, %rd10289, %rd10282;
	add.s64 	%rd10291, %rd10290, %rd10194;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6493,%dummy}, %rd10275;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6494}, %rd10275;
	}
	shf.r.wrap.b32 	%r6495, %r6494, %r6493, 28;
	shf.r.wrap.b32 	%r6496, %r6493, %r6494, 28;
	mov.b64 	%rd10292, {%r6496, %r6495};
	shf.l.wrap.b32 	%r6497, %r6493, %r6494, 30;
	shf.l.wrap.b32 	%r6498, %r6494, %r6493, 30;
	mov.b64 	%rd10293, {%r6498, %r6497};
	xor.b64  	%rd10294, %rd10293, %rd10292;
	shf.l.wrap.b32 	%r6499, %r6493, %r6494, 25;
	shf.l.wrap.b32 	%r6500, %r6494, %r6493, 25;
	mov.b64 	%rd10295, {%r6500, %r6499};
	xor.b64  	%rd10296, %rd10294, %rd10295;
	xor.b64  	%rd10297, %rd10275, %rd10221;
	xor.b64  	%rd10298, %rd10275, %rd10248;
	and.b64  	%rd10299, %rd10298, %rd10297;
	xor.b64  	%rd10300, %rd10299, %rd10275;
	add.s64 	%rd10301, %rd10290, %rd10300;
	add.s64 	%rd10302, %rd10301, %rd10296;
	add.s32 	%r6501, %r14392, 9;
	mul.wide.s32 	%rd10303, %r6501, 8;
	add.s64 	%rd10304, %rd6761, %rd10303;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6502,%dummy}, %rd10291;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6503}, %rd10291;
	}
	shf.r.wrap.b32 	%r6504, %r6503, %r6502, 14;
	shf.r.wrap.b32 	%r6505, %r6502, %r6503, 14;
	mov.b64 	%rd10305, {%r6505, %r6504};
	shf.r.wrap.b32 	%r6506, %r6503, %r6502, 18;
	shf.r.wrap.b32 	%r6507, %r6502, %r6503, 18;
	mov.b64 	%rd10306, {%r6507, %r6506};
	xor.b64  	%rd10307, %rd10306, %rd10305;
	shf.l.wrap.b32 	%r6508, %r6502, %r6503, 23;
	shf.l.wrap.b32 	%r6509, %r6503, %r6502, 23;
	mov.b64 	%rd10308, {%r6509, %r6508};
	xor.b64  	%rd10309, %rd10307, %rd10308;
	xor.b64  	%rd10310, %rd10264, %rd10237;
	and.b64  	%rd10311, %rd10291, %rd10310;
	xor.b64  	%rd10312, %rd10311, %rd10237;
	add.s64 	%rd10313, %rd10210, %rd21558;
	ld.const.u64 	%rd10314, [%rd10304];
	add.s64 	%rd10315, %rd10313, %rd10314;
	add.s64 	%rd10316, %rd10315, %rd10312;
	add.s64 	%rd10317, %rd10316, %rd10309;
	add.s64 	%rd10318, %rd10317, %rd10221;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6510,%dummy}, %rd10302;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6511}, %rd10302;
	}
	shf.r.wrap.b32 	%r6512, %r6511, %r6510, 28;
	shf.r.wrap.b32 	%r6513, %r6510, %r6511, 28;
	mov.b64 	%rd10319, {%r6513, %r6512};
	shf.l.wrap.b32 	%r6514, %r6510, %r6511, 30;
	shf.l.wrap.b32 	%r6515, %r6511, %r6510, 30;
	mov.b64 	%rd10320, {%r6515, %r6514};
	xor.b64  	%rd10321, %rd10320, %rd10319;
	shf.l.wrap.b32 	%r6516, %r6510, %r6511, 25;
	shf.l.wrap.b32 	%r6517, %r6511, %r6510, 25;
	mov.b64 	%rd10322, {%r6517, %r6516};
	xor.b64  	%rd10323, %rd10321, %rd10322;
	xor.b64  	%rd10324, %rd10302, %rd10248;
	xor.b64  	%rd10325, %rd10302, %rd10275;
	and.b64  	%rd10326, %rd10325, %rd10324;
	xor.b64  	%rd10327, %rd10326, %rd10302;
	add.s64 	%rd10328, %rd10317, %rd10327;
	add.s64 	%rd10329, %rd10328, %rd10323;
	add.s32 	%r6518, %r14392, 10;
	mul.wide.s32 	%rd10330, %r6518, 8;
	add.s64 	%rd10331, %rd6761, %rd10330;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6519,%dummy}, %rd10318;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6520}, %rd10318;
	}
	shf.r.wrap.b32 	%r6521, %r6520, %r6519, 14;
	shf.r.wrap.b32 	%r6522, %r6519, %r6520, 14;
	mov.b64 	%rd10332, {%r6522, %r6521};
	shf.r.wrap.b32 	%r6523, %r6520, %r6519, 18;
	shf.r.wrap.b32 	%r6524, %r6519, %r6520, 18;
	mov.b64 	%rd10333, {%r6524, %r6523};
	xor.b64  	%rd10334, %rd10333, %rd10332;
	shf.l.wrap.b32 	%r6525, %r6519, %r6520, 23;
	shf.l.wrap.b32 	%r6526, %r6520, %r6519, 23;
	mov.b64 	%rd10335, {%r6526, %r6525};
	xor.b64  	%rd10336, %rd10334, %rd10335;
	xor.b64  	%rd10337, %rd10291, %rd10264;
	and.b64  	%rd10338, %rd10318, %rd10337;
	xor.b64  	%rd10339, %rd10338, %rd10264;
	add.s64 	%rd10340, %rd10237, %rd21557;
	ld.const.u64 	%rd10341, [%rd10331];
	add.s64 	%rd10342, %rd10340, %rd10341;
	add.s64 	%rd10343, %rd10342, %rd10339;
	add.s64 	%rd10344, %rd10343, %rd10336;
	add.s64 	%rd10345, %rd10344, %rd10248;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6527,%dummy}, %rd10329;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6528}, %rd10329;
	}
	shf.r.wrap.b32 	%r6529, %r6528, %r6527, 28;
	shf.r.wrap.b32 	%r6530, %r6527, %r6528, 28;
	mov.b64 	%rd10346, {%r6530, %r6529};
	shf.l.wrap.b32 	%r6531, %r6527, %r6528, 30;
	shf.l.wrap.b32 	%r6532, %r6528, %r6527, 30;
	mov.b64 	%rd10347, {%r6532, %r6531};
	xor.b64  	%rd10348, %rd10347, %rd10346;
	shf.l.wrap.b32 	%r6533, %r6527, %r6528, 25;
	shf.l.wrap.b32 	%r6534, %r6528, %r6527, 25;
	mov.b64 	%rd10349, {%r6534, %r6533};
	xor.b64  	%rd10350, %rd10348, %rd10349;
	xor.b64  	%rd10351, %rd10329, %rd10275;
	xor.b64  	%rd10352, %rd10329, %rd10302;
	and.b64  	%rd10353, %rd10352, %rd10351;
	xor.b64  	%rd10354, %rd10353, %rd10329;
	add.s64 	%rd10355, %rd10344, %rd10354;
	add.s64 	%rd10356, %rd10355, %rd10350;
	add.s32 	%r6535, %r14392, 11;
	mul.wide.s32 	%rd10357, %r6535, 8;
	add.s64 	%rd10358, %rd6761, %rd10357;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6536,%dummy}, %rd10345;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6537}, %rd10345;
	}
	shf.r.wrap.b32 	%r6538, %r6537, %r6536, 14;
	shf.r.wrap.b32 	%r6539, %r6536, %r6537, 14;
	mov.b64 	%rd10359, {%r6539, %r6538};
	shf.r.wrap.b32 	%r6540, %r6537, %r6536, 18;
	shf.r.wrap.b32 	%r6541, %r6536, %r6537, 18;
	mov.b64 	%rd10360, {%r6541, %r6540};
	xor.b64  	%rd10361, %rd10360, %rd10359;
	shf.l.wrap.b32 	%r6542, %r6536, %r6537, 23;
	shf.l.wrap.b32 	%r6543, %r6537, %r6536, 23;
	mov.b64 	%rd10362, {%r6543, %r6542};
	xor.b64  	%rd10363, %rd10361, %rd10362;
	xor.b64  	%rd10364, %rd10318, %rd10291;
	and.b64  	%rd10365, %rd10345, %rd10364;
	xor.b64  	%rd10366, %rd10365, %rd10291;
	add.s64 	%rd10367, %rd10264, %rd21556;
	ld.const.u64 	%rd10368, [%rd10358];
	add.s64 	%rd10369, %rd10367, %rd10368;
	add.s64 	%rd10370, %rd10369, %rd10366;
	add.s64 	%rd10371, %rd10370, %rd10363;
	add.s64 	%rd10372, %rd10371, %rd10275;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6544,%dummy}, %rd10356;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6545}, %rd10356;
	}
	shf.r.wrap.b32 	%r6546, %r6545, %r6544, 28;
	shf.r.wrap.b32 	%r6547, %r6544, %r6545, 28;
	mov.b64 	%rd10373, {%r6547, %r6546};
	shf.l.wrap.b32 	%r6548, %r6544, %r6545, 30;
	shf.l.wrap.b32 	%r6549, %r6545, %r6544, 30;
	mov.b64 	%rd10374, {%r6549, %r6548};
	xor.b64  	%rd10375, %rd10374, %rd10373;
	shf.l.wrap.b32 	%r6550, %r6544, %r6545, 25;
	shf.l.wrap.b32 	%r6551, %r6545, %r6544, 25;
	mov.b64 	%rd10376, {%r6551, %r6550};
	xor.b64  	%rd10377, %rd10375, %rd10376;
	xor.b64  	%rd10378, %rd10356, %rd10302;
	xor.b64  	%rd10379, %rd10356, %rd10329;
	and.b64  	%rd10380, %rd10379, %rd10378;
	xor.b64  	%rd10381, %rd10380, %rd10356;
	add.s64 	%rd10382, %rd10371, %rd10381;
	add.s64 	%rd10383, %rd10382, %rd10377;
	add.s32 	%r6552, %r14392, 12;
	mul.wide.s32 	%rd10384, %r6552, 8;
	add.s64 	%rd10385, %rd6761, %rd10384;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6553,%dummy}, %rd10372;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6554}, %rd10372;
	}
	shf.r.wrap.b32 	%r6555, %r6554, %r6553, 14;
	shf.r.wrap.b32 	%r6556, %r6553, %r6554, 14;
	mov.b64 	%rd10386, {%r6556, %r6555};
	shf.r.wrap.b32 	%r6557, %r6554, %r6553, 18;
	shf.r.wrap.b32 	%r6558, %r6553, %r6554, 18;
	mov.b64 	%rd10387, {%r6558, %r6557};
	xor.b64  	%rd10388, %rd10387, %rd10386;
	shf.l.wrap.b32 	%r6559, %r6553, %r6554, 23;
	shf.l.wrap.b32 	%r6560, %r6554, %r6553, 23;
	mov.b64 	%rd10389, {%r6560, %r6559};
	xor.b64  	%rd10390, %rd10388, %rd10389;
	xor.b64  	%rd10391, %rd10345, %rd10318;
	and.b64  	%rd10392, %rd10372, %rd10391;
	xor.b64  	%rd10393, %rd10392, %rd10318;
	add.s64 	%rd10394, %rd10291, %rd21555;
	ld.const.u64 	%rd10395, [%rd10385];
	add.s64 	%rd10396, %rd10394, %rd10395;
	add.s64 	%rd10397, %rd10396, %rd10393;
	add.s64 	%rd10398, %rd10397, %rd10390;
	add.s64 	%rd21567, %rd10398, %rd10302;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6561,%dummy}, %rd10383;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6562}, %rd10383;
	}
	shf.r.wrap.b32 	%r6563, %r6562, %r6561, 28;
	shf.r.wrap.b32 	%r6564, %r6561, %r6562, 28;
	mov.b64 	%rd10399, {%r6564, %r6563};
	shf.l.wrap.b32 	%r6565, %r6561, %r6562, 30;
	shf.l.wrap.b32 	%r6566, %r6562, %r6561, 30;
	mov.b64 	%rd10400, {%r6566, %r6565};
	xor.b64  	%rd10401, %rd10400, %rd10399;
	shf.l.wrap.b32 	%r6567, %r6561, %r6562, 25;
	shf.l.wrap.b32 	%r6568, %r6562, %r6561, 25;
	mov.b64 	%rd10402, {%r6568, %r6567};
	xor.b64  	%rd10403, %rd10401, %rd10402;
	xor.b64  	%rd10404, %rd10383, %rd10329;
	xor.b64  	%rd10405, %rd10383, %rd10356;
	and.b64  	%rd10406, %rd10405, %rd10404;
	xor.b64  	%rd10407, %rd10406, %rd10383;
	add.s64 	%rd10408, %rd10398, %rd10407;
	add.s64 	%rd21563, %rd10408, %rd10403;
	add.s32 	%r6569, %r14392, 13;
	mul.wide.s32 	%rd10409, %r6569, 8;
	add.s64 	%rd10410, %rd6761, %rd10409;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6570,%dummy}, %rd21567;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6571}, %rd21567;
	}
	shf.r.wrap.b32 	%r6572, %r6571, %r6570, 14;
	shf.r.wrap.b32 	%r6573, %r6570, %r6571, 14;
	mov.b64 	%rd10411, {%r6573, %r6572};
	shf.r.wrap.b32 	%r6574, %r6571, %r6570, 18;
	shf.r.wrap.b32 	%r6575, %r6570, %r6571, 18;
	mov.b64 	%rd10412, {%r6575, %r6574};
	xor.b64  	%rd10413, %rd10412, %rd10411;
	shf.l.wrap.b32 	%r6576, %r6570, %r6571, 23;
	shf.l.wrap.b32 	%r6577, %r6571, %r6570, 23;
	mov.b64 	%rd10414, {%r6577, %r6576};
	xor.b64  	%rd10415, %rd10413, %rd10414;
	xor.b64  	%rd10416, %rd10372, %rd10345;
	and.b64  	%rd10417, %rd21567, %rd10416;
	xor.b64  	%rd10418, %rd10417, %rd10345;
	add.s64 	%rd10419, %rd10318, %rd21554;
	ld.const.u64 	%rd10420, [%rd10410];
	add.s64 	%rd10421, %rd10419, %rd10420;
	add.s64 	%rd10422, %rd10421, %rd10418;
	add.s64 	%rd10423, %rd10422, %rd10415;
	add.s64 	%rd21566, %rd10423, %rd10329;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6578,%dummy}, %rd21563;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6579}, %rd21563;
	}
	shf.r.wrap.b32 	%r6580, %r6579, %r6578, 28;
	shf.r.wrap.b32 	%r6581, %r6578, %r6579, 28;
	mov.b64 	%rd10424, {%r6581, %r6580};
	shf.l.wrap.b32 	%r6582, %r6578, %r6579, 30;
	shf.l.wrap.b32 	%r6583, %r6579, %r6578, 30;
	mov.b64 	%rd10425, {%r6583, %r6582};
	xor.b64  	%rd10426, %rd10425, %rd10424;
	shf.l.wrap.b32 	%r6584, %r6578, %r6579, 25;
	shf.l.wrap.b32 	%r6585, %r6579, %r6578, 25;
	mov.b64 	%rd10427, {%r6585, %r6584};
	xor.b64  	%rd10428, %rd10426, %rd10427;
	xor.b64  	%rd10429, %rd21563, %rd10356;
	xor.b64  	%rd10430, %rd21563, %rd10383;
	and.b64  	%rd10431, %rd10430, %rd10429;
	xor.b64  	%rd10432, %rd10431, %rd21563;
	add.s64 	%rd10433, %rd10423, %rd10432;
	add.s64 	%rd21562, %rd10433, %rd10428;
	add.s32 	%r6586, %r14392, 14;
	mul.wide.s32 	%rd10434, %r6586, 8;
	add.s64 	%rd10435, %rd6761, %rd10434;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6587,%dummy}, %rd21566;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6588}, %rd21566;
	}
	shf.r.wrap.b32 	%r6589, %r6588, %r6587, 14;
	shf.r.wrap.b32 	%r6590, %r6587, %r6588, 14;
	mov.b64 	%rd10436, {%r6590, %r6589};
	shf.r.wrap.b32 	%r6591, %r6588, %r6587, 18;
	shf.r.wrap.b32 	%r6592, %r6587, %r6588, 18;
	mov.b64 	%rd10437, {%r6592, %r6591};
	xor.b64  	%rd10438, %rd10437, %rd10436;
	shf.l.wrap.b32 	%r6593, %r6587, %r6588, 23;
	shf.l.wrap.b32 	%r6594, %r6588, %r6587, 23;
	mov.b64 	%rd10439, {%r6594, %r6593};
	xor.b64  	%rd10440, %rd10438, %rd10439;
	xor.b64  	%rd10441, %rd21567, %rd10372;
	and.b64  	%rd10442, %rd21566, %rd10441;
	xor.b64  	%rd10443, %rd10442, %rd10372;
	add.s64 	%rd10444, %rd10345, %rd21553;
	ld.const.u64 	%rd10445, [%rd10435];
	add.s64 	%rd10446, %rd10444, %rd10445;
	add.s64 	%rd10447, %rd10446, %rd10443;
	add.s64 	%rd10448, %rd10447, %rd10440;
	add.s64 	%rd21565, %rd10448, %rd10356;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6595,%dummy}, %rd21562;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6596}, %rd21562;
	}
	shf.r.wrap.b32 	%r6597, %r6596, %r6595, 28;
	shf.r.wrap.b32 	%r6598, %r6595, %r6596, 28;
	mov.b64 	%rd10449, {%r6598, %r6597};
	shf.l.wrap.b32 	%r6599, %r6595, %r6596, 30;
	shf.l.wrap.b32 	%r6600, %r6596, %r6595, 30;
	mov.b64 	%rd10450, {%r6600, %r6599};
	xor.b64  	%rd10451, %rd10450, %rd10449;
	shf.l.wrap.b32 	%r6601, %r6595, %r6596, 25;
	shf.l.wrap.b32 	%r6602, %r6596, %r6595, 25;
	mov.b64 	%rd10452, {%r6602, %r6601};
	xor.b64  	%rd10453, %rd10451, %rd10452;
	xor.b64  	%rd10454, %rd21562, %rd10383;
	xor.b64  	%rd10455, %rd21562, %rd21563;
	and.b64  	%rd10456, %rd10455, %rd10454;
	xor.b64  	%rd10457, %rd10456, %rd21562;
	add.s64 	%rd10458, %rd10448, %rd10457;
	add.s64 	%rd21561, %rd10458, %rd10453;
	add.s32 	%r6603, %r14392, 15;
	mul.wide.s32 	%rd10459, %r6603, 8;
	add.s64 	%rd10460, %rd6761, %rd10459;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6604,%dummy}, %rd21565;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6605}, %rd21565;
	}
	shf.r.wrap.b32 	%r6606, %r6605, %r6604, 14;
	shf.r.wrap.b32 	%r6607, %r6604, %r6605, 14;
	mov.b64 	%rd10461, {%r6607, %r6606};
	shf.r.wrap.b32 	%r6608, %r6605, %r6604, 18;
	shf.r.wrap.b32 	%r6609, %r6604, %r6605, 18;
	mov.b64 	%rd10462, {%r6609, %r6608};
	xor.b64  	%rd10463, %rd10462, %rd10461;
	shf.l.wrap.b32 	%r6610, %r6604, %r6605, 23;
	shf.l.wrap.b32 	%r6611, %r6605, %r6604, 23;
	mov.b64 	%rd10464, {%r6611, %r6610};
	xor.b64  	%rd10465, %rd10463, %rd10464;
	xor.b64  	%rd10466, %rd21566, %rd21567;
	and.b64  	%rd10467, %rd21565, %rd10466;
	xor.b64  	%rd10468, %rd10467, %rd21567;
	add.s64 	%rd10469, %rd10372, %rd21552;
	ld.const.u64 	%rd10470, [%rd10460];
	add.s64 	%rd10471, %rd10469, %rd10470;
	add.s64 	%rd10472, %rd10471, %rd10468;
	add.s64 	%rd10473, %rd10472, %rd10465;
	add.s64 	%rd21564, %rd10473, %rd10383;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6612,%dummy}, %rd21561;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6613}, %rd21561;
	}
	shf.r.wrap.b32 	%r6614, %r6613, %r6612, 28;
	shf.r.wrap.b32 	%r6615, %r6612, %r6613, 28;
	mov.b64 	%rd10474, {%r6615, %r6614};
	shf.l.wrap.b32 	%r6616, %r6612, %r6613, 30;
	shf.l.wrap.b32 	%r6617, %r6613, %r6612, 30;
	mov.b64 	%rd10475, {%r6617, %r6616};
	xor.b64  	%rd10476, %rd10475, %rd10474;
	shf.l.wrap.b32 	%r6618, %r6612, %r6613, 25;
	shf.l.wrap.b32 	%r6619, %r6613, %r6612, 25;
	mov.b64 	%rd10477, {%r6619, %r6618};
	xor.b64  	%rd10478, %rd10476, %rd10477;
	xor.b64  	%rd10479, %rd21561, %rd21563;
	xor.b64  	%rd10480, %rd21561, %rd21562;
	and.b64  	%rd10481, %rd10480, %rd10479;
	xor.b64  	%rd10482, %rd10481, %rd21561;
	add.s64 	%rd10483, %rd10473, %rd10482;
	add.s64 	%rd21560, %rd10483, %rd10478;
	add.s32 	%r14392, %r14392, 16;
	setp.lt.s32	%p103, %r14392, 80;
	@%p103 bra 	BB3_161;

	add.s64 	%rd10484, %rd717, %rd21560;
	st.local.u64 	[%rd1], %rd10484;
	add.s64 	%rd10485, %rd719, %rd21561;
	st.local.u64 	[%rd1+8], %rd10485;
	add.s64 	%rd10486, %rd718, %rd21562;
	st.local.u64 	[%rd1+16], %rd10486;
	add.s64 	%rd10487, %rd716, %rd21563;
	st.local.u64 	[%rd1+24], %rd10487;
	add.s64 	%rd10488, %rd712, %rd21564;
	st.local.u64 	[%rd1+32], %rd10488;
	add.s64 	%rd10489, %rd714, %rd21565;
	st.local.u64 	[%rd1+40], %rd10489;
	add.s64 	%rd10490, %rd713, %rd21566;
	st.local.u64 	[%rd1+48], %rd10490;
	add.s64 	%rd10491, %rd715, %rd21567;
	st.local.u64 	[%rd1+56], %rd10491;
	sub.s32 	%r230, %r2, %r210;
	setp.lt.s32	%p104, %r230, 1;
	@%p104 bra 	BB3_180;

	add.s32 	%r231, %r209, -128;
	and.b32  	%r232, %r231, 3;
	setp.eq.s32	%p105, %r232, 0;
	mov.u32 	%r14396, 0;
	@%p105 bra 	BB3_169;

	setp.eq.s32	%p106, %r232, 1;
	mov.u32 	%r14394, 0;
	@%p106 bra 	BB3_168;

	setp.eq.s32	%p107, %r232, 2;
	mov.u32 	%r14393, 0;
	@%p107 bra 	BB3_167;

	xor.b32  	%r6624, %r210, 7;
	cvt.u64.u32	%rd10492, %r6624;
	add.s64 	%rd10493, %rd446, %rd10492;
	ld.local.u8 	%rs142, [%rd10493];
	st.local.u8 	[%rd179+7], %rs142;
	mov.u32 	%r14393, 1;

BB3_167:
	add.s32 	%r6625, %r14393, %r210;
	xor.b32  	%r6626, %r6625, 7;
	cvt.s64.s32	%rd10494, %r6626;
	add.s64 	%rd10495, %rd446, %rd10494;
	ld.local.u8 	%rs143, [%rd10495];
	xor.b32  	%r6627, %r14393, 7;
	cvt.u64.u32	%rd10496, %r6627;
	add.s64 	%rd10497, %rd179, %rd10496;
	st.local.u8 	[%rd10497], %rs143;
	add.s32 	%r14394, %r14393, 1;

BB3_168:
	add.s32 	%r6628, %r14394, %r210;
	xor.b32  	%r6629, %r6628, 7;
	cvt.s64.s32	%rd10498, %r6629;
	add.s64 	%rd10499, %rd446, %rd10498;
	ld.local.u8 	%rs144, [%rd10499];
	xor.b32  	%r6630, %r14394, 7;
	cvt.s64.s32	%rd10500, %r6630;
	add.s64 	%rd10501, %rd179, %rd10500;
	st.local.u8 	[%rd10501], %rs144;
	add.s32 	%r14396, %r14394, 1;

BB3_169:
	setp.lt.u32	%p108, %r231, 4;
	@%p108 bra 	BB3_180;

BB3_170:
	add.s32 	%r6631, %r14396, %r210;
	xor.b32  	%r6632, %r6631, 7;
	cvt.s64.s32	%rd10502, %r6632;
	add.s64 	%rd10503, %rd446, %rd10502;
	ld.local.u8 	%rs145, [%rd10503];
	xor.b32  	%r6633, %r14396, 7;
	cvt.s64.s32	%rd10504, %r6633;
	add.s64 	%rd10505, %rd179, %rd10504;
	st.local.u8 	[%rd10505], %rs145;
	add.s32 	%r6634, %r14396, 1;
	add.s32 	%r6635, %r6634, %r210;
	xor.b32  	%r6636, %r6635, 7;
	cvt.s64.s32	%rd10506, %r6636;
	add.s64 	%rd10507, %rd446, %rd10506;
	ld.local.u8 	%rs146, [%rd10507];
	xor.b32  	%r6637, %r6634, 7;
	cvt.s64.s32	%rd10508, %r6637;
	add.s64 	%rd10509, %rd179, %rd10508;
	st.local.u8 	[%rd10509], %rs146;
	add.s32 	%r6638, %r14396, 2;
	add.s32 	%r6639, %r6638, %r210;
	xor.b32  	%r6640, %r6639, 7;
	cvt.s64.s32	%rd10510, %r6640;
	add.s64 	%rd10511, %rd446, %rd10510;
	ld.local.u8 	%rs147, [%rd10511];
	xor.b32  	%r6641, %r6638, 7;
	cvt.s64.s32	%rd10512, %r6641;
	add.s64 	%rd10513, %rd179, %rd10512;
	st.local.u8 	[%rd10513], %rs147;
	add.s32 	%r6642, %r14396, 3;
	add.s32 	%r6643, %r6642, %r210;
	xor.b32  	%r6644, %r6643, 7;
	cvt.s64.s32	%rd10514, %r6644;
	add.s64 	%rd10515, %rd446, %rd10514;
	ld.local.u8 	%rs148, [%rd10515];
	xor.b32  	%r6645, %r6642, 7;
	cvt.s64.s32	%rd10516, %r6645;
	add.s64 	%rd10517, %rd179, %rd10516;
	st.local.u8 	[%rd10517], %rs148;
	add.s32 	%r14396, %r14396, 4;
	setp.lt.s32	%p109, %r14396, %r230;
	@%p109 bra 	BB3_170;

BB3_180:
	setp.eq.s32	%p116, %r2, 0;
	@%p116 bra 	BB3_235;

	add.s32 	%r256, %r2, -128;
	and.b32  	%r257, %r2, 3;
	cvta.to.local.u64 	%rd777, %rd1805;
	add.s64 	%rd780, %rd777, 7;
	add.s64 	%rd835, %rd179, 7;
	add.s64 	%rd836, %rd446, 7;
	add.s64 	%rd783, %rd446, 4;
	add.s64 	%rd784, %rd446, 2;
	add.s64 	%rd785, %rd446, 1;
	add.s64 	%rd786, %rd446, 15;
	add.s64 	%rd787, %rd446, 14;
	add.s64 	%rd788, %rd446, 13;
	add.s64 	%rd789, %rd446, 12;
	add.s64 	%rd790, %rd446, 11;
	add.s64 	%rd791, %rd446, 10;
	add.s64 	%rd792, %rd446, 9;
	add.s64 	%rd793, %rd446, 23;
	add.s64 	%rd794, %rd446, 22;
	add.s64 	%rd795, %rd446, 21;
	add.s64 	%rd796, %rd446, 20;
	add.s64 	%rd797, %rd446, 19;
	add.s64 	%rd798, %rd446, 18;
	add.s64 	%rd799, %rd446, 17;
	add.s64 	%rd800, %rd446, 31;
	add.s64 	%rd801, %rd446, 30;
	add.s64 	%rd802, %rd446, 29;
	add.s64 	%rd803, %rd446, 28;
	add.s64 	%rd804, %rd446, 27;
	add.s64 	%rd805, %rd446, 26;
	add.s64 	%rd806, %rd446, 25;
	add.s64 	%rd807, %rd446, 39;
	add.s64 	%rd808, %rd446, 38;
	add.s64 	%rd809, %rd446, 37;
	add.s64 	%rd810, %rd446, 36;
	add.s64 	%rd811, %rd446, 35;
	add.s64 	%rd812, %rd446, 34;
	add.s64 	%rd813, %rd446, 33;
	add.s64 	%rd814, %rd446, 47;
	add.s64 	%rd815, %rd446, 46;
	add.s64 	%rd816, %rd446, 45;
	add.s64 	%rd817, %rd446, 44;
	add.s64 	%rd818, %rd446, 43;
	add.s64 	%rd819, %rd446, 42;
	add.s64 	%rd820, %rd446, 41;
	add.s64 	%rd821, %rd446, 55;
	add.s64 	%rd822, %rd446, 54;
	add.s64 	%rd823, %rd446, 53;
	add.s64 	%rd824, %rd446, 52;
	add.s64 	%rd825, %rd446, 51;
	add.s64 	%rd826, %rd446, 50;
	add.s64 	%rd827, %rd446, 49;
	add.s64 	%rd828, %rd446, 63;
	add.s64 	%rd829, %rd446, 62;
	add.s64 	%rd830, %rd446, 61;
	add.s64 	%rd831, %rd446, 60;
	add.s64 	%rd832, %rd446, 59;
	add.s64 	%rd833, %rd446, 58;
	add.s64 	%rd834, %rd446, 57;
	cvt.u16.u64	%rs1, %rd519;
	cvt.u16.u64	%rs2, %rd520;
	cvt.u16.u64	%rs3, %rd521;
	cvt.u16.u64	%rs4, %rd522;
	cvt.u16.u64	%rs5, %rd523;
	cvt.u16.u64	%rs6, %rd524;
	cvt.u16.u64	%rs7, %rd525;
	cvt.u16.u64	%rs8, %rd526;
	mov.u32 	%r14405, %r2;

BB3_182:
	and.b32  	%r6669, %r14405, 1;
	setp.eq.b32	%p117, %r6669, 1;
	ld.local.u32 	%r259, [%rd1+192];
	and.b32  	%r260, %r259, 127;
	@!%p117 bra 	BB3_205;
	bra.uni 	BB3_183;

BB3_205:
	add.s32 	%r7566, %r259, %r2;
	st.local.u32 	[%rd1+192], %r7566;
	add.s32 	%r7567, %r260, %r2;
	setp.lt.s32	%p131, %r7567, 128;
	@%p131 bra 	BB3_225;
	bra.uni 	BB3_206;

BB3_225:
	setp.lt.s32	%p144, %r2, 1;
	@%p144 bra 	BB3_234;

	setp.eq.s32	%p145, %r257, 0;
	mov.u32 	%r14439, 0;
	@%p145 bra 	BB3_232;

	setp.eq.s32	%p146, %r257, 1;
	mov.u32 	%r14435, 0;
	@%p146 bra 	BB3_231;

	setp.eq.s32	%p147, %r257, 2;
	mov.u32 	%r14433, 0;
	@%p147 bra 	BB3_230;

	ld.local.u8 	%rs242, [%rd780];
	xor.b32  	%r8339, %r260, 7;
	cvt.u64.u32	%rd12845, %r8339;
	add.s64 	%rd12846, %rd179, %rd12845;
	st.local.u8 	[%rd12846], %rs242;
	add.s32 	%r260, %r260, 1;
	mov.u32 	%r14433, 1;

BB3_230:
	xor.b32  	%r8340, %r14433, 7;
	cvt.u64.u32	%rd12847, %r8340;
	add.s64 	%rd12848, %rd777, %rd12847;
	ld.local.u8 	%rs243, [%rd12848];
	xor.b32  	%r8341, %r260, 7;
	cvt.s64.s32	%rd12849, %r8341;
	add.s64 	%rd12850, %rd179, %rd12849;
	st.local.u8 	[%rd12850], %rs243;
	add.s32 	%r260, %r260, 1;
	add.s32 	%r14435, %r14433, 1;

BB3_231:
	xor.b32  	%r8342, %r14435, 7;
	cvt.s64.s32	%rd12851, %r8342;
	add.s64 	%rd12852, %rd777, %rd12851;
	ld.local.u8 	%rs244, [%rd12852];
	xor.b32  	%r8343, %r260, 7;
	cvt.s64.s32	%rd12853, %r8343;
	add.s64 	%rd12854, %rd179, %rd12853;
	st.local.u8 	[%rd12854], %rs244;
	add.s32 	%r260, %r260, 1;
	add.s32 	%r14439, %r14435, 1;

BB3_232:
	setp.lt.u32	%p148, %r2, 4;
	@%p148 bra 	BB3_234;

BB3_233:
	xor.b32  	%r8344, %r14439, 7;
	cvt.s64.s32	%rd12855, %r8344;
	add.s64 	%rd12856, %rd777, %rd12855;
	ld.local.u8 	%rs245, [%rd12856];
	xor.b32  	%r8345, %r260, 7;
	cvt.s64.s32	%rd12857, %r8345;
	add.s64 	%rd12858, %rd179, %rd12857;
	st.local.u8 	[%rd12858], %rs245;
	add.s32 	%r8346, %r14439, 1;
	xor.b32  	%r8347, %r8346, 7;
	cvt.s64.s32	%rd12859, %r8347;
	add.s64 	%rd12860, %rd777, %rd12859;
	ld.local.u8 	%rs246, [%rd12860];
	add.s32 	%r8348, %r260, 1;
	xor.b32  	%r8349, %r8348, 7;
	cvt.s64.s32	%rd12861, %r8349;
	add.s64 	%rd12862, %rd179, %rd12861;
	st.local.u8 	[%rd12862], %rs246;
	add.s32 	%r8350, %r14439, 2;
	xor.b32  	%r8351, %r8350, 7;
	cvt.s64.s32	%rd12863, %r8351;
	add.s64 	%rd12864, %rd777, %rd12863;
	ld.local.u8 	%rs247, [%rd12864];
	add.s32 	%r8352, %r260, 2;
	xor.b32  	%r8353, %r8352, 7;
	cvt.s64.s32	%rd12865, %r8353;
	add.s64 	%rd12866, %rd179, %rd12865;
	st.local.u8 	[%rd12866], %rs247;
	add.s32 	%r8354, %r14439, 3;
	xor.b32  	%r8355, %r8354, 7;
	cvt.s64.s32	%rd12867, %r8355;
	add.s64 	%rd12868, %rd777, %rd12867;
	ld.local.u8 	%rs248, [%rd12868];
	add.s32 	%r8356, %r260, 3;
	xor.b32  	%r8357, %r8356, 7;
	cvt.s64.s32	%rd12869, %r8357;
	add.s64 	%rd12870, %rd179, %rd12869;
	st.local.u8 	[%rd12870], %rs248;
	add.s32 	%r260, %r260, 4;
	add.s32 	%r14439, %r14439, 4;
	setp.lt.s32	%p149, %r14439, %r2;
	@%p149 bra 	BB3_233;
	bra.uni 	BB3_234;

BB3_183:
	add.s32 	%r6670, %r259, 64;
	st.local.u32 	[%rd1+192], %r6670;
	add.s32 	%r6671, %r260, 64;
	setp.lt.u32	%p118, %r6671, 128;
	@%p118 bra 	BB3_204;
	bra.uni 	BB3_184;

BB3_204:
	ld.local.u8 	%rs170, [%rd836];
	xor.b32  	%r7439, %r260, 7;
	cvt.u64.u32	%rd11632, %r7439;
	add.s64 	%rd11633, %rd179, %rd11632;
	st.local.u8 	[%rd11633], %rs170;
	ld.local.u8 	%rs171, [%rd446+6];
	add.s32 	%r7440, %r260, 1;
	xor.b32  	%r7441, %r7440, 7;
	cvt.u64.u32	%rd11634, %r7441;
	add.s64 	%rd11635, %rd179, %rd11634;
	ld.local.u8 	%rs172, [%rd446+5];
	st.local.u8 	[%rd11635], %rs171;
	add.s32 	%r7442, %r260, 2;
	xor.b32  	%r7443, %r7442, 7;
	cvt.u64.u32	%rd11636, %r7443;
	add.s64 	%rd11637, %rd179, %rd11636;
	st.local.u8 	[%rd11637], %rs172;
	ld.local.u8 	%rs173, [%rd783];
	add.s32 	%r7444, %r260, 3;
	xor.b32  	%r7445, %r7444, 7;
	cvt.u64.u32	%rd11638, %r7445;
	add.s64 	%rd11639, %rd179, %rd11638;
	st.local.u8 	[%rd11639], %rs173;
	ld.local.v2.u8 	{%rs174, %rs175}, [%rd784];
	add.s32 	%r7446, %r260, 4;
	xor.b32  	%r7447, %r7446, 7;
	cvt.u64.u32	%rd11640, %r7447;
	add.s64 	%rd11641, %rd179, %rd11640;
	st.local.u8 	[%rd11641], %rs175;
	add.s32 	%r7448, %r260, 5;
	xor.b32  	%r7449, %r7448, 7;
	cvt.u64.u32	%rd11642, %r7449;
	add.s64 	%rd11643, %rd179, %rd11642;
	st.local.u8 	[%rd11643], %rs174;
	ld.local.u8 	%rs178, [%rd785];
	add.s32 	%r7450, %r260, 6;
	xor.b32  	%r7451, %r7450, 7;
	cvt.u64.u32	%rd11644, %r7451;
	add.s64 	%rd11645, %rd179, %rd11644;
	st.local.u8 	[%rd11645], %rs178;
	add.s32 	%r7452, %r260, 7;
	xor.b32  	%r7453, %r7452, 7;
	cvt.u64.u32	%rd11646, %r7453;
	add.s64 	%rd11647, %rd179, %rd11646;
	st.local.u8 	[%rd11647], %rs1;
	ld.local.u8 	%rs179, [%rd786];
	add.s32 	%r7454, %r260, 8;
	xor.b32  	%r7455, %r7454, 7;
	cvt.u64.u32	%rd11648, %r7455;
	add.s64 	%rd11649, %rd179, %rd11648;
	st.local.u8 	[%rd11649], %rs179;
	ld.local.u8 	%rs180, [%rd787];
	add.s32 	%r7456, %r260, 9;
	xor.b32  	%r7457, %r7456, 7;
	cvt.u64.u32	%rd11650, %r7457;
	add.s64 	%rd11651, %rd179, %rd11650;
	st.local.u8 	[%rd11651], %rs180;
	ld.local.u8 	%rs181, [%rd788];
	add.s32 	%r7458, %r260, 10;
	xor.b32  	%r7459, %r7458, 7;
	cvt.u64.u32	%rd11652, %r7459;
	add.s64 	%rd11653, %rd179, %rd11652;
	st.local.u8 	[%rd11653], %rs181;
	ld.local.u8 	%rs182, [%rd789];
	add.s32 	%r7460, %r260, 11;
	xor.b32  	%r7461, %r7460, 7;
	cvt.u64.u32	%rd11654, %r7461;
	add.s64 	%rd11655, %rd179, %rd11654;
	st.local.u8 	[%rd11655], %rs182;
	ld.local.u8 	%rs183, [%rd790];
	add.s32 	%r7462, %r260, 12;
	xor.b32  	%r7463, %r7462, 7;
	cvt.u64.u32	%rd11656, %r7463;
	add.s64 	%rd11657, %rd179, %rd11656;
	st.local.u8 	[%rd11657], %rs183;
	ld.local.u8 	%rs184, [%rd791];
	add.s32 	%r7464, %r260, 13;
	xor.b32  	%r7465, %r7464, 7;
	cvt.u64.u32	%rd11658, %r7465;
	add.s64 	%rd11659, %rd179, %rd11658;
	st.local.u8 	[%rd11659], %rs184;
	ld.local.u8 	%rs185, [%rd792];
	add.s32 	%r7466, %r260, 14;
	xor.b32  	%r7467, %r7466, 7;
	cvt.u64.u32	%rd11660, %r7467;
	add.s64 	%rd11661, %rd179, %rd11660;
	st.local.u8 	[%rd11661], %rs185;
	add.s32 	%r7468, %r260, 15;
	xor.b32  	%r7469, %r7468, 7;
	cvt.u64.u32	%rd11662, %r7469;
	add.s64 	%rd11663, %rd179, %rd11662;
	st.local.u8 	[%rd11663], %rs2;
	ld.local.u8 	%rs186, [%rd793];
	add.s32 	%r7470, %r260, 16;
	xor.b32  	%r7471, %r7470, 7;
	cvt.u64.u32	%rd11664, %r7471;
	add.s64 	%rd11665, %rd179, %rd11664;
	st.local.u8 	[%rd11665], %rs186;
	ld.local.u8 	%rs187, [%rd794];
	add.s32 	%r7472, %r260, 17;
	xor.b32  	%r7473, %r7472, 7;
	cvt.u64.u32	%rd11666, %r7473;
	add.s64 	%rd11667, %rd179, %rd11666;
	st.local.u8 	[%rd11667], %rs187;
	ld.local.u8 	%rs188, [%rd795];
	add.s32 	%r7474, %r260, 18;
	xor.b32  	%r7475, %r7474, 7;
	cvt.u64.u32	%rd11668, %r7475;
	add.s64 	%rd11669, %rd179, %rd11668;
	st.local.u8 	[%rd11669], %rs188;
	ld.local.u8 	%rs189, [%rd796];
	add.s32 	%r7476, %r260, 19;
	xor.b32  	%r7477, %r7476, 7;
	cvt.u64.u32	%rd11670, %r7477;
	add.s64 	%rd11671, %rd179, %rd11670;
	st.local.u8 	[%rd11671], %rs189;
	ld.local.u8 	%rs190, [%rd797];
	add.s32 	%r7478, %r260, 20;
	xor.b32  	%r7479, %r7478, 7;
	cvt.u64.u32	%rd11672, %r7479;
	add.s64 	%rd11673, %rd179, %rd11672;
	st.local.u8 	[%rd11673], %rs190;
	ld.local.u8 	%rs191, [%rd798];
	add.s32 	%r7480, %r260, 21;
	xor.b32  	%r7481, %r7480, 7;
	cvt.u64.u32	%rd11674, %r7481;
	add.s64 	%rd11675, %rd179, %rd11674;
	st.local.u8 	[%rd11675], %rs191;
	ld.local.u8 	%rs192, [%rd799];
	add.s32 	%r7482, %r260, 22;
	xor.b32  	%r7483, %r7482, 7;
	cvt.u64.u32	%rd11676, %r7483;
	add.s64 	%rd11677, %rd179, %rd11676;
	st.local.u8 	[%rd11677], %rs192;
	add.s32 	%r7484, %r260, 23;
	xor.b32  	%r7485, %r7484, 7;
	cvt.u64.u32	%rd11678, %r7485;
	add.s64 	%rd11679, %rd179, %rd11678;
	st.local.u8 	[%rd11679], %rs3;
	ld.local.u8 	%rs193, [%rd800];
	add.s32 	%r7486, %r260, 24;
	xor.b32  	%r7487, %r7486, 7;
	cvt.u64.u32	%rd11680, %r7487;
	add.s64 	%rd11681, %rd179, %rd11680;
	st.local.u8 	[%rd11681], %rs193;
	ld.local.u8 	%rs194, [%rd801];
	add.s32 	%r7488, %r260, 25;
	xor.b32  	%r7489, %r7488, 7;
	cvt.u64.u32	%rd11682, %r7489;
	add.s64 	%rd11683, %rd179, %rd11682;
	st.local.u8 	[%rd11683], %rs194;
	ld.local.u8 	%rs195, [%rd802];
	add.s32 	%r7490, %r260, 26;
	xor.b32  	%r7491, %r7490, 7;
	cvt.u64.u32	%rd11684, %r7491;
	add.s64 	%rd11685, %rd179, %rd11684;
	st.local.u8 	[%rd11685], %rs195;
	ld.local.u8 	%rs196, [%rd803];
	add.s32 	%r7492, %r260, 27;
	xor.b32  	%r7493, %r7492, 7;
	cvt.u64.u32	%rd11686, %r7493;
	add.s64 	%rd11687, %rd179, %rd11686;
	st.local.u8 	[%rd11687], %rs196;
	ld.local.u8 	%rs197, [%rd804];
	add.s32 	%r7494, %r260, 28;
	xor.b32  	%r7495, %r7494, 7;
	cvt.u64.u32	%rd11688, %r7495;
	add.s64 	%rd11689, %rd179, %rd11688;
	st.local.u8 	[%rd11689], %rs197;
	ld.local.u8 	%rs198, [%rd805];
	add.s32 	%r7496, %r260, 29;
	xor.b32  	%r7497, %r7496, 7;
	cvt.u64.u32	%rd11690, %r7497;
	add.s64 	%rd11691, %rd179, %rd11690;
	st.local.u8 	[%rd11691], %rs198;
	ld.local.u8 	%rs199, [%rd806];
	add.s32 	%r7498, %r260, 30;
	xor.b32  	%r7499, %r7498, 7;
	cvt.u64.u32	%rd11692, %r7499;
	add.s64 	%rd11693, %rd179, %rd11692;
	st.local.u8 	[%rd11693], %rs199;
	add.s32 	%r7500, %r260, 31;
	xor.b32  	%r7501, %r7500, 7;
	cvt.u64.u32	%rd11694, %r7501;
	add.s64 	%rd11695, %rd179, %rd11694;
	st.local.u8 	[%rd11695], %rs4;
	ld.local.u8 	%rs200, [%rd807];
	add.s32 	%r7502, %r260, 32;
	xor.b32  	%r7503, %r7502, 7;
	cvt.u64.u32	%rd11696, %r7503;
	add.s64 	%rd11697, %rd179, %rd11696;
	st.local.u8 	[%rd11697], %rs200;
	ld.local.u8 	%rs201, [%rd808];
	add.s32 	%r7504, %r260, 33;
	xor.b32  	%r7505, %r7504, 7;
	cvt.u64.u32	%rd11698, %r7505;
	add.s64 	%rd11699, %rd179, %rd11698;
	st.local.u8 	[%rd11699], %rs201;
	ld.local.u8 	%rs202, [%rd809];
	add.s32 	%r7506, %r260, 34;
	xor.b32  	%r7507, %r7506, 7;
	cvt.u64.u32	%rd11700, %r7507;
	add.s64 	%rd11701, %rd179, %rd11700;
	st.local.u8 	[%rd11701], %rs202;
	ld.local.u8 	%rs203, [%rd810];
	add.s32 	%r7508, %r260, 35;
	xor.b32  	%r7509, %r7508, 7;
	cvt.u64.u32	%rd11702, %r7509;
	add.s64 	%rd11703, %rd179, %rd11702;
	st.local.u8 	[%rd11703], %rs203;
	ld.local.u8 	%rs204, [%rd811];
	add.s32 	%r7510, %r260, 36;
	xor.b32  	%r7511, %r7510, 7;
	cvt.u64.u32	%rd11704, %r7511;
	add.s64 	%rd11705, %rd179, %rd11704;
	st.local.u8 	[%rd11705], %rs204;
	ld.local.u8 	%rs205, [%rd812];
	add.s32 	%r7512, %r260, 37;
	xor.b32  	%r7513, %r7512, 7;
	cvt.u64.u32	%rd11706, %r7513;
	add.s64 	%rd11707, %rd179, %rd11706;
	st.local.u8 	[%rd11707], %rs205;
	ld.local.u8 	%rs206, [%rd813];
	add.s32 	%r7514, %r260, 38;
	xor.b32  	%r7515, %r7514, 7;
	cvt.u64.u32	%rd11708, %r7515;
	add.s64 	%rd11709, %rd179, %rd11708;
	st.local.u8 	[%rd11709], %rs206;
	add.s32 	%r7516, %r260, 39;
	xor.b32  	%r7517, %r7516, 7;
	cvt.u64.u32	%rd11710, %r7517;
	add.s64 	%rd11711, %rd179, %rd11710;
	st.local.u8 	[%rd11711], %rs5;
	ld.local.u8 	%rs207, [%rd814];
	add.s32 	%r7518, %r260, 40;
	xor.b32  	%r7519, %r7518, 7;
	cvt.u64.u32	%rd11712, %r7519;
	add.s64 	%rd11713, %rd179, %rd11712;
	st.local.u8 	[%rd11713], %rs207;
	ld.local.u8 	%rs208, [%rd815];
	add.s32 	%r7520, %r260, 41;
	xor.b32  	%r7521, %r7520, 7;
	cvt.u64.u32	%rd11714, %r7521;
	add.s64 	%rd11715, %rd179, %rd11714;
	st.local.u8 	[%rd11715], %rs208;
	ld.local.u8 	%rs209, [%rd816];
	add.s32 	%r7522, %r260, 42;
	xor.b32  	%r7523, %r7522, 7;
	cvt.u64.u32	%rd11716, %r7523;
	add.s64 	%rd11717, %rd179, %rd11716;
	st.local.u8 	[%rd11717], %rs209;
	ld.local.u8 	%rs210, [%rd817];
	add.s32 	%r7524, %r260, 43;
	xor.b32  	%r7525, %r7524, 7;
	cvt.u64.u32	%rd11718, %r7525;
	add.s64 	%rd11719, %rd179, %rd11718;
	st.local.u8 	[%rd11719], %rs210;
	ld.local.u8 	%rs211, [%rd818];
	add.s32 	%r7526, %r260, 44;
	xor.b32  	%r7527, %r7526, 7;
	cvt.u64.u32	%rd11720, %r7527;
	add.s64 	%rd11721, %rd179, %rd11720;
	st.local.u8 	[%rd11721], %rs211;
	ld.local.u8 	%rs212, [%rd819];
	add.s32 	%r7528, %r260, 45;
	xor.b32  	%r7529, %r7528, 7;
	cvt.u64.u32	%rd11722, %r7529;
	add.s64 	%rd11723, %rd179, %rd11722;
	st.local.u8 	[%rd11723], %rs212;
	ld.local.u8 	%rs213, [%rd820];
	add.s32 	%r7530, %r260, 46;
	xor.b32  	%r7531, %r7530, 7;
	cvt.u64.u32	%rd11724, %r7531;
	add.s64 	%rd11725, %rd179, %rd11724;
	st.local.u8 	[%rd11725], %rs213;
	add.s32 	%r7532, %r260, 47;
	xor.b32  	%r7533, %r7532, 7;
	cvt.u64.u32	%rd11726, %r7533;
	add.s64 	%rd11727, %rd179, %rd11726;
	st.local.u8 	[%rd11727], %rs6;
	ld.local.u8 	%rs214, [%rd821];
	add.s32 	%r7534, %r260, 48;
	xor.b32  	%r7535, %r7534, 7;
	cvt.u64.u32	%rd11728, %r7535;
	add.s64 	%rd11729, %rd179, %rd11728;
	st.local.u8 	[%rd11729], %rs214;
	ld.local.u8 	%rs215, [%rd822];
	add.s32 	%r7536, %r260, 49;
	xor.b32  	%r7537, %r7536, 7;
	cvt.u64.u32	%rd11730, %r7537;
	add.s64 	%rd11731, %rd179, %rd11730;
	st.local.u8 	[%rd11731], %rs215;
	ld.local.u8 	%rs216, [%rd823];
	add.s32 	%r7538, %r260, 50;
	xor.b32  	%r7539, %r7538, 7;
	cvt.u64.u32	%rd11732, %r7539;
	add.s64 	%rd11733, %rd179, %rd11732;
	st.local.u8 	[%rd11733], %rs216;
	ld.local.u8 	%rs217, [%rd824];
	add.s32 	%r7540, %r260, 51;
	xor.b32  	%r7541, %r7540, 7;
	cvt.u64.u32	%rd11734, %r7541;
	add.s64 	%rd11735, %rd179, %rd11734;
	st.local.u8 	[%rd11735], %rs217;
	ld.local.u8 	%rs218, [%rd825];
	add.s32 	%r7542, %r260, 52;
	xor.b32  	%r7543, %r7542, 7;
	cvt.u64.u32	%rd11736, %r7543;
	add.s64 	%rd11737, %rd179, %rd11736;
	st.local.u8 	[%rd11737], %rs218;
	ld.local.u8 	%rs219, [%rd826];
	add.s32 	%r7544, %r260, 53;
	xor.b32  	%r7545, %r7544, 7;
	cvt.u64.u32	%rd11738, %r7545;
	add.s64 	%rd11739, %rd179, %rd11738;
	st.local.u8 	[%rd11739], %rs219;
	ld.local.u8 	%rs220, [%rd827];
	add.s32 	%r7546, %r260, 54;
	xor.b32  	%r7547, %r7546, 7;
	cvt.u64.u32	%rd11740, %r7547;
	add.s64 	%rd11741, %rd179, %rd11740;
	st.local.u8 	[%rd11741], %rs220;
	add.s32 	%r7548, %r260, 55;
	xor.b32  	%r7549, %r7548, 7;
	cvt.u64.u32	%rd11742, %r7549;
	add.s64 	%rd11743, %rd179, %rd11742;
	st.local.u8 	[%rd11743], %rs7;
	ld.local.u8 	%rs221, [%rd828];
	add.s32 	%r7550, %r260, 56;
	xor.b32  	%r7551, %r7550, 7;
	cvt.u64.u32	%rd11744, %r7551;
	add.s64 	%rd11745, %rd179, %rd11744;
	st.local.u8 	[%rd11745], %rs221;
	ld.local.u8 	%rs222, [%rd829];
	add.s32 	%r7552, %r260, 57;
	xor.b32  	%r7553, %r7552, 7;
	cvt.u64.u32	%rd11746, %r7553;
	add.s64 	%rd11747, %rd179, %rd11746;
	st.local.u8 	[%rd11747], %rs222;
	ld.local.u8 	%rs223, [%rd830];
	add.s32 	%r7554, %r260, 58;
	xor.b32  	%r7555, %r7554, 7;
	cvt.u64.u32	%rd11748, %r7555;
	add.s64 	%rd11749, %rd179, %rd11748;
	st.local.u8 	[%rd11749], %rs223;
	ld.local.u8 	%rs224, [%rd831];
	add.s32 	%r7556, %r260, 59;
	xor.b32  	%r7557, %r7556, 7;
	cvt.u64.u32	%rd11750, %r7557;
	add.s64 	%rd11751, %rd179, %rd11750;
	st.local.u8 	[%rd11751], %rs224;
	ld.local.u8 	%rs225, [%rd832];
	add.s32 	%r7558, %r260, 60;
	xor.b32  	%r7559, %r7558, 7;
	cvt.u64.u32	%rd11752, %r7559;
	add.s64 	%rd11753, %rd179, %rd11752;
	st.local.u8 	[%rd11753], %rs225;
	ld.local.u8 	%rs226, [%rd833];
	add.s32 	%r7560, %r260, 61;
	xor.b32  	%r7561, %r7560, 7;
	cvt.u64.u32	%rd11754, %r7561;
	add.s64 	%rd11755, %rd179, %rd11754;
	st.local.u8 	[%rd11755], %rs226;
	ld.local.u8 	%rs227, [%rd834];
	add.s32 	%r7562, %r260, 62;
	xor.b32  	%r7563, %r7562, 7;
	cvt.u64.u32	%rd11756, %r7563;
	add.s64 	%rd11757, %rd179, %rd11756;
	st.local.u8 	[%rd11757], %rs227;
	add.s32 	%r7564, %r260, 63;
	xor.b32  	%r7565, %r7564, 7;
	cvt.u64.u32	%rd11758, %r7565;
	add.s64 	%rd11759, %rd179, %rd11758;
	st.local.u8 	[%rd11759], %rs8;
	bra.uni 	BB3_234;

BB3_206:
	sub.s32 	%r290, %r2861, %r260;
	mov.u32 	%r7570, 1;
	max.u32 	%r291, %r290, %r7570;
	and.b32  	%r292, %r291, 3;
	setp.eq.s32	%p132, %r292, 0;
	mov.u32 	%r14425, 0;
	mov.u32 	%r14426, %r260;
	@%p132 bra 	BB3_212;

	setp.eq.s32	%p133, %r292, 1;
	mov.u32 	%r14421, 0;
	mov.u32 	%r14422, %r260;
	@%p133 bra 	BB3_211;

	setp.eq.s32	%p134, %r292, 2;
	mov.u32 	%r14419, 0;
	mov.u32 	%r14420, %r260;
	@%p134 bra 	BB3_210;

	ld.local.u8 	%rs228, [%rd780];
	xor.b32  	%r7574, %r260, 7;
	cvt.u64.u32	%rd11760, %r7574;
	add.s64 	%rd11761, %rd179, %rd11760;
	st.local.u8 	[%rd11761], %rs228;
	add.s32 	%r14420, %r260, 1;
	mov.u32 	%r14419, %r7570;

BB3_210:
	xor.b32  	%r7575, %r14419, 7;
	cvt.u64.u32	%rd11762, %r7575;
	add.s64 	%rd11763, %rd777, %rd11762;
	ld.local.u8 	%rs229, [%rd11763];
	xor.b32  	%r7576, %r14420, 7;
	cvt.s64.s32	%rd11764, %r7576;
	add.s64 	%rd11765, %rd179, %rd11764;
	st.local.u8 	[%rd11765], %rs229;
	add.s32 	%r14422, %r14420, 1;
	add.s32 	%r14421, %r14419, 1;

BB3_211:
	xor.b32  	%r7577, %r14421, 7;
	cvt.s64.s32	%rd11766, %r7577;
	add.s64 	%rd11767, %rd777, %rd11766;
	ld.local.u8 	%rs230, [%rd11767];
	xor.b32  	%r7578, %r14422, 7;
	cvt.s64.s32	%rd11768, %r7578;
	add.s64 	%rd11769, %rd179, %rd11768;
	st.local.u8 	[%rd11769], %rs230;
	add.s32 	%r14426, %r14422, 1;
	add.s32 	%r14425, %r14421, 1;

BB3_212:
	setp.lt.u32	%p135, %r291, 4;
	@%p135 bra 	BB3_214;

BB3_213:
	xor.b32  	%r7579, %r14425, 7;
	cvt.s64.s32	%rd11770, %r7579;
	add.s64 	%rd11771, %rd777, %rd11770;
	ld.local.u8 	%rs231, [%rd11771];
	xor.b32  	%r7580, %r14426, 7;
	cvt.s64.s32	%rd11772, %r7580;
	add.s64 	%rd11773, %rd179, %rd11772;
	st.local.u8 	[%rd11773], %rs231;
	add.s32 	%r7581, %r14425, 1;
	xor.b32  	%r7582, %r7581, 7;
	cvt.s64.s32	%rd11774, %r7582;
	add.s64 	%rd11775, %rd777, %rd11774;
	ld.local.u8 	%rs232, [%rd11775];
	add.s32 	%r7583, %r14426, 1;
	xor.b32  	%r7584, %r7583, 7;
	cvt.s64.s32	%rd11776, %r7584;
	add.s64 	%rd11777, %rd179, %rd11776;
	st.local.u8 	[%rd11777], %rs232;
	add.s32 	%r7585, %r14425, 2;
	xor.b32  	%r7586, %r7585, 7;
	cvt.s64.s32	%rd11778, %r7586;
	add.s64 	%rd11779, %rd777, %rd11778;
	ld.local.u8 	%rs233, [%rd11779];
	add.s32 	%r7587, %r14426, 2;
	xor.b32  	%r7588, %r7587, 7;
	cvt.s64.s32	%rd11780, %r7588;
	add.s64 	%rd11781, %rd179, %rd11780;
	st.local.u8 	[%rd11781], %rs233;
	add.s32 	%r7589, %r14425, 3;
	xor.b32  	%r7590, %r7589, 7;
	cvt.s64.s32	%rd11782, %r7590;
	add.s64 	%rd11783, %rd777, %rd11782;
	ld.local.u8 	%rs234, [%rd11783];
	add.s32 	%r7591, %r14426, 3;
	xor.b32  	%r7592, %r7591, 7;
	cvt.s64.s32	%rd11784, %r7592;
	add.s64 	%rd11785, %rd179, %rd11784;
	st.local.u8 	[%rd11785], %rs234;
	add.s32 	%r14426, %r14426, 4;
	add.s32 	%r14425, %r14425, 4;
	setp.lt.s32	%p136, %r14425, %r290;
	@%p136 bra 	BB3_213;

BB3_214:
	ld.local.u64 	%rd11786, [%rd1+64];
	shr.u64 	%rd11787, %rd11786, 32;
	ld.local.u64 	%rd11788, [%rd1+72];
	shr.u64 	%rd11789, %rd11788, 32;
	ld.local.u64 	%rd11790, [%rd1+80];
	shr.u64 	%rd11791, %rd11790, 32;
	ld.local.u64 	%rd11792, [%rd1+88];
	shr.u64 	%rd11793, %rd11792, 32;
	ld.local.u64 	%rd11794, [%rd1+96];
	shr.u64 	%rd11795, %rd11794, 32;
	ld.local.u64 	%rd11796, [%rd1+104];
	shr.u64 	%rd11797, %rd11796, 32;
	ld.local.u64 	%rd11798, [%rd1+112];
	shr.u64 	%rd11799, %rd11798, 32;
	ld.local.u64 	%rd11800, [%rd1+120];
	shr.u64 	%rd11801, %rd11800, 32;
	ld.local.u64 	%rd11802, [%rd1+128];
	shr.u64 	%rd11803, %rd11802, 32;
	ld.local.u64 	%rd11804, [%rd1+136];
	shr.u64 	%rd11805, %rd11804, 32;
	ld.local.u64 	%rd11806, [%rd1+144];
	shr.u64 	%rd11807, %rd11806, 32;
	ld.local.u64 	%rd11808, [%rd1+152];
	shr.u64 	%rd11809, %rd11808, 32;
	ld.local.u64 	%rd11810, [%rd1+160];
	shr.u64 	%rd11811, %rd11810, 32;
	ld.local.u64 	%rd11812, [%rd1+168];
	shr.u64 	%rd11813, %rd11812, 32;
	ld.local.u64 	%rd11814, [%rd1+176];
	shr.u64 	%rd11815, %rd11814, 32;
	ld.local.u64 	%rd11816, [%rd1+184];
	shr.u64 	%rd11817, %rd11816, 32;
	bfi.b64 	%rd21616, %rd11787, %rd11786, 32, 32;
	bfi.b64 	%rd21617, %rd11789, %rd11788, 32, 32;
	bfi.b64 	%rd21618, %rd11791, %rd11790, 32, 32;
	bfi.b64 	%rd21619, %rd11793, %rd11792, 32, 32;
	bfi.b64 	%rd21620, %rd11795, %rd11794, 32, 32;
	bfi.b64 	%rd21621, %rd11797, %rd11796, 32, 32;
	bfi.b64 	%rd21622, %rd11799, %rd11798, 32, 32;
	bfi.b64 	%rd21623, %rd11801, %rd11800, 32, 32;
	bfi.b64 	%rd21607, %rd11803, %rd11802, 32, 32;
	bfi.b64 	%rd21606, %rd11805, %rd11804, 32, 32;
	bfi.b64 	%rd21605, %rd11807, %rd11806, 32, 32;
	bfi.b64 	%rd21604, %rd11809, %rd11808, 32, 32;
	bfi.b64 	%rd21603, %rd11811, %rd11810, 32, 32;
	bfi.b64 	%rd21602, %rd11813, %rd11812, 32, 32;
	bfi.b64 	%rd21601, %rd11815, %rd11814, 32, 32;
	bfi.b64 	%rd21600, %rd11817, %rd11816, 32, 32;
	ld.local.u64 	%rd933, [%rd1+32];
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7594,%dummy}, %rd933;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7595}, %rd933;
	}
	shf.r.wrap.b32 	%r7596, %r7595, %r7594, 14;
	shf.r.wrap.b32 	%r7597, %r7594, %r7595, 14;
	mov.b64 	%rd11818, {%r7597, %r7596};
	shf.r.wrap.b32 	%r7598, %r7595, %r7594, 18;
	shf.r.wrap.b32 	%r7599, %r7594, %r7595, 18;
	mov.b64 	%rd11819, {%r7599, %r7598};
	xor.b64  	%rd11820, %rd11819, %rd11818;
	shf.l.wrap.b32 	%r7600, %r7594, %r7595, 23;
	shf.l.wrap.b32 	%r7601, %r7595, %r7594, 23;
	mov.b64 	%rd11821, {%r7601, %r7600};
	xor.b64  	%rd11822, %rd11820, %rd11821;
	ld.local.u64 	%rd934, [%rd1+48];
	ld.local.u64 	%rd935, [%rd1+40];
	xor.b64  	%rd11823, %rd934, %rd935;
	and.b64  	%rd11824, %rd11823, %rd933;
	xor.b64  	%rd11825, %rd11824, %rd934;
	ld.local.u64 	%rd936, [%rd1+56];
	add.s64 	%rd11826, %rd936, %rd21616;
	add.s64 	%rd11827, %rd11826, %rd21454;
	add.s64 	%rd11828, %rd11827, %rd11825;
	add.s64 	%rd11829, %rd11828, %rd11822;
	ld.local.u64 	%rd937, [%rd1+24];
	add.s64 	%rd11830, %rd11829, %rd937;
	ld.local.u64 	%rd938, [%rd1];
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7602,%dummy}, %rd938;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7603}, %rd938;
	}
	shf.r.wrap.b32 	%r7604, %r7603, %r7602, 28;
	shf.r.wrap.b32 	%r7605, %r7602, %r7603, 28;
	mov.b64 	%rd11831, {%r7605, %r7604};
	shf.l.wrap.b32 	%r7606, %r7602, %r7603, 30;
	shf.l.wrap.b32 	%r7607, %r7603, %r7602, 30;
	mov.b64 	%rd11832, {%r7607, %r7606};
	xor.b64  	%rd11833, %rd11832, %rd11831;
	shf.l.wrap.b32 	%r7608, %r7602, %r7603, 25;
	shf.l.wrap.b32 	%r7609, %r7603, %r7602, 25;
	mov.b64 	%rd11834, {%r7609, %r7608};
	xor.b64  	%rd11835, %rd11833, %rd11834;
	ld.local.u64 	%rd939, [%rd1+16];
	xor.b64  	%rd11836, %rd939, %rd938;
	ld.local.u64 	%rd940, [%rd1+8];
	xor.b64  	%rd11837, %rd940, %rd938;
	and.b64  	%rd11838, %rd11836, %rd11837;
	xor.b64  	%rd11839, %rd11838, %rd938;
	add.s64 	%rd11840, %rd11829, %rd11839;
	add.s64 	%rd11841, %rd11840, %rd11835;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7610,%dummy}, %rd11830;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7611}, %rd11830;
	}
	shf.r.wrap.b32 	%r7612, %r7611, %r7610, 14;
	shf.r.wrap.b32 	%r7613, %r7610, %r7611, 14;
	mov.b64 	%rd11842, {%r7613, %r7612};
	shf.r.wrap.b32 	%r7614, %r7611, %r7610, 18;
	shf.r.wrap.b32 	%r7615, %r7610, %r7611, 18;
	mov.b64 	%rd11843, {%r7615, %r7614};
	xor.b64  	%rd11844, %rd11843, %rd11842;
	shf.l.wrap.b32 	%r7616, %r7610, %r7611, 23;
	shf.l.wrap.b32 	%r7617, %r7611, %r7610, 23;
	mov.b64 	%rd11845, {%r7617, %r7616};
	xor.b64  	%rd11846, %rd11844, %rd11845;
	xor.b64  	%rd11847, %rd935, %rd933;
	and.b64  	%rd11848, %rd11830, %rd11847;
	xor.b64  	%rd11849, %rd11848, %rd935;
	add.s64 	%rd11850, %rd934, %rd21617;
	add.s64 	%rd11851, %rd11850, %rd21453;
	add.s64 	%rd11852, %rd11851, %rd11849;
	add.s64 	%rd11853, %rd11852, %rd11846;
	add.s64 	%rd11854, %rd11853, %rd939;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7618,%dummy}, %rd11841;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7619}, %rd11841;
	}
	shf.r.wrap.b32 	%r7620, %r7619, %r7618, 28;
	shf.r.wrap.b32 	%r7621, %r7618, %r7619, 28;
	mov.b64 	%rd11855, {%r7621, %r7620};
	shf.l.wrap.b32 	%r7622, %r7618, %r7619, 30;
	shf.l.wrap.b32 	%r7623, %r7619, %r7618, 30;
	mov.b64 	%rd11856, {%r7623, %r7622};
	xor.b64  	%rd11857, %rd11856, %rd11855;
	shf.l.wrap.b32 	%r7624, %r7618, %r7619, 25;
	shf.l.wrap.b32 	%r7625, %r7619, %r7618, 25;
	mov.b64 	%rd11858, {%r7625, %r7624};
	xor.b64  	%rd11859, %rd11857, %rd11858;
	xor.b64  	%rd11860, %rd11841, %rd940;
	xor.b64  	%rd11861, %rd11841, %rd938;
	and.b64  	%rd11862, %rd11861, %rd11860;
	xor.b64  	%rd11863, %rd11862, %rd11841;
	add.s64 	%rd11864, %rd11853, %rd11863;
	add.s64 	%rd11865, %rd11864, %rd11859;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7626,%dummy}, %rd11854;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7627}, %rd11854;
	}
	shf.r.wrap.b32 	%r7628, %r7627, %r7626, 14;
	shf.r.wrap.b32 	%r7629, %r7626, %r7627, 14;
	mov.b64 	%rd11866, {%r7629, %r7628};
	shf.r.wrap.b32 	%r7630, %r7627, %r7626, 18;
	shf.r.wrap.b32 	%r7631, %r7626, %r7627, 18;
	mov.b64 	%rd11867, {%r7631, %r7630};
	xor.b64  	%rd11868, %rd11867, %rd11866;
	shf.l.wrap.b32 	%r7632, %r7626, %r7627, 23;
	shf.l.wrap.b32 	%r7633, %r7627, %r7626, 23;
	mov.b64 	%rd11869, {%r7633, %r7632};
	xor.b64  	%rd11870, %rd11868, %rd11869;
	xor.b64  	%rd11871, %rd11830, %rd933;
	and.b64  	%rd11872, %rd11854, %rd11871;
	xor.b64  	%rd11873, %rd11872, %rd933;
	add.s64 	%rd11874, %rd935, %rd21618;
	add.s64 	%rd11875, %rd11874, %rd21452;
	add.s64 	%rd11876, %rd11875, %rd11873;
	add.s64 	%rd11877, %rd11876, %rd11870;
	add.s64 	%rd11878, %rd11877, %rd940;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7634,%dummy}, %rd11865;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7635}, %rd11865;
	}
	shf.r.wrap.b32 	%r7636, %r7635, %r7634, 28;
	shf.r.wrap.b32 	%r7637, %r7634, %r7635, 28;
	mov.b64 	%rd11879, {%r7637, %r7636};
	shf.l.wrap.b32 	%r7638, %r7634, %r7635, 30;
	shf.l.wrap.b32 	%r7639, %r7635, %r7634, 30;
	mov.b64 	%rd11880, {%r7639, %r7638};
	xor.b64  	%rd11881, %rd11880, %rd11879;
	shf.l.wrap.b32 	%r7640, %r7634, %r7635, 25;
	shf.l.wrap.b32 	%r7641, %r7635, %r7634, 25;
	mov.b64 	%rd11882, {%r7641, %r7640};
	xor.b64  	%rd11883, %rd11881, %rd11882;
	xor.b64  	%rd11884, %rd11865, %rd938;
	xor.b64  	%rd11885, %rd11865, %rd11841;
	and.b64  	%rd11886, %rd11885, %rd11884;
	xor.b64  	%rd11887, %rd11886, %rd11865;
	add.s64 	%rd11888, %rd11877, %rd11887;
	add.s64 	%rd11889, %rd11888, %rd11883;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7642,%dummy}, %rd11878;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7643}, %rd11878;
	}
	shf.r.wrap.b32 	%r7644, %r7643, %r7642, 14;
	shf.r.wrap.b32 	%r7645, %r7642, %r7643, 14;
	mov.b64 	%rd11890, {%r7645, %r7644};
	shf.r.wrap.b32 	%r7646, %r7643, %r7642, 18;
	shf.r.wrap.b32 	%r7647, %r7642, %r7643, 18;
	mov.b64 	%rd11891, {%r7647, %r7646};
	xor.b64  	%rd11892, %rd11891, %rd11890;
	shf.l.wrap.b32 	%r7648, %r7642, %r7643, 23;
	shf.l.wrap.b32 	%r7649, %r7643, %r7642, 23;
	mov.b64 	%rd11893, {%r7649, %r7648};
	xor.b64  	%rd11894, %rd11892, %rd11893;
	xor.b64  	%rd11895, %rd11854, %rd11830;
	and.b64  	%rd11896, %rd11878, %rd11895;
	xor.b64  	%rd11897, %rd11896, %rd11830;
	add.s64 	%rd11898, %rd933, %rd21619;
	add.s64 	%rd11899, %rd11898, %rd21451;
	add.s64 	%rd11900, %rd11899, %rd11897;
	add.s64 	%rd11901, %rd11900, %rd11894;
	add.s64 	%rd11902, %rd11901, %rd938;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7650,%dummy}, %rd11889;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7651}, %rd11889;
	}
	shf.r.wrap.b32 	%r7652, %r7651, %r7650, 28;
	shf.r.wrap.b32 	%r7653, %r7650, %r7651, 28;
	mov.b64 	%rd11903, {%r7653, %r7652};
	shf.l.wrap.b32 	%r7654, %r7650, %r7651, 30;
	shf.l.wrap.b32 	%r7655, %r7651, %r7650, 30;
	mov.b64 	%rd11904, {%r7655, %r7654};
	xor.b64  	%rd11905, %rd11904, %rd11903;
	shf.l.wrap.b32 	%r7656, %r7650, %r7651, 25;
	shf.l.wrap.b32 	%r7657, %r7651, %r7650, 25;
	mov.b64 	%rd11906, {%r7657, %r7656};
	xor.b64  	%rd11907, %rd11905, %rd11906;
	xor.b64  	%rd11908, %rd11889, %rd11841;
	xor.b64  	%rd11909, %rd11889, %rd11865;
	and.b64  	%rd11910, %rd11909, %rd11908;
	xor.b64  	%rd11911, %rd11910, %rd11889;
	add.s64 	%rd11912, %rd11901, %rd11911;
	add.s64 	%rd11913, %rd11912, %rd11907;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7658,%dummy}, %rd11902;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7659}, %rd11902;
	}
	shf.r.wrap.b32 	%r7660, %r7659, %r7658, 14;
	shf.r.wrap.b32 	%r7661, %r7658, %r7659, 14;
	mov.b64 	%rd11914, {%r7661, %r7660};
	shf.r.wrap.b32 	%r7662, %r7659, %r7658, 18;
	shf.r.wrap.b32 	%r7663, %r7658, %r7659, 18;
	mov.b64 	%rd11915, {%r7663, %r7662};
	xor.b64  	%rd11916, %rd11915, %rd11914;
	shf.l.wrap.b32 	%r7664, %r7658, %r7659, 23;
	shf.l.wrap.b32 	%r7665, %r7659, %r7658, 23;
	mov.b64 	%rd11917, {%r7665, %r7664};
	xor.b64  	%rd11918, %rd11916, %rd11917;
	xor.b64  	%rd11919, %rd11878, %rd11854;
	and.b64  	%rd11920, %rd11902, %rd11919;
	xor.b64  	%rd11921, %rd11920, %rd11854;
	add.s64 	%rd11922, %rd11830, %rd21620;
	add.s64 	%rd11923, %rd11922, %rd21450;
	add.s64 	%rd11924, %rd11923, %rd11921;
	add.s64 	%rd11925, %rd11924, %rd11918;
	add.s64 	%rd11926, %rd11925, %rd11841;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7666,%dummy}, %rd11913;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7667}, %rd11913;
	}
	shf.r.wrap.b32 	%r7668, %r7667, %r7666, 28;
	shf.r.wrap.b32 	%r7669, %r7666, %r7667, 28;
	mov.b64 	%rd11927, {%r7669, %r7668};
	shf.l.wrap.b32 	%r7670, %r7666, %r7667, 30;
	shf.l.wrap.b32 	%r7671, %r7667, %r7666, 30;
	mov.b64 	%rd11928, {%r7671, %r7670};
	xor.b64  	%rd11929, %rd11928, %rd11927;
	shf.l.wrap.b32 	%r7672, %r7666, %r7667, 25;
	shf.l.wrap.b32 	%r7673, %r7667, %r7666, 25;
	mov.b64 	%rd11930, {%r7673, %r7672};
	xor.b64  	%rd11931, %rd11929, %rd11930;
	xor.b64  	%rd11932, %rd11913, %rd11865;
	xor.b64  	%rd11933, %rd11913, %rd11889;
	and.b64  	%rd11934, %rd11933, %rd11932;
	xor.b64  	%rd11935, %rd11934, %rd11913;
	add.s64 	%rd11936, %rd11925, %rd11935;
	add.s64 	%rd11937, %rd11936, %rd11931;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7674,%dummy}, %rd11926;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7675}, %rd11926;
	}
	shf.r.wrap.b32 	%r7676, %r7675, %r7674, 14;
	shf.r.wrap.b32 	%r7677, %r7674, %r7675, 14;
	mov.b64 	%rd11938, {%r7677, %r7676};
	shf.r.wrap.b32 	%r7678, %r7675, %r7674, 18;
	shf.r.wrap.b32 	%r7679, %r7674, %r7675, 18;
	mov.b64 	%rd11939, {%r7679, %r7678};
	xor.b64  	%rd11940, %rd11939, %rd11938;
	shf.l.wrap.b32 	%r7680, %r7674, %r7675, 23;
	shf.l.wrap.b32 	%r7681, %r7675, %r7674, 23;
	mov.b64 	%rd11941, {%r7681, %r7680};
	xor.b64  	%rd11942, %rd11940, %rd11941;
	xor.b64  	%rd11943, %rd11902, %rd11878;
	and.b64  	%rd11944, %rd11926, %rd11943;
	xor.b64  	%rd11945, %rd11944, %rd11878;
	add.s64 	%rd11946, %rd11854, %rd21621;
	add.s64 	%rd11947, %rd11946, %rd21449;
	add.s64 	%rd11948, %rd11947, %rd11945;
	add.s64 	%rd11949, %rd11948, %rd11942;
	add.s64 	%rd11950, %rd11949, %rd11865;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7682,%dummy}, %rd11937;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7683}, %rd11937;
	}
	shf.r.wrap.b32 	%r7684, %r7683, %r7682, 28;
	shf.r.wrap.b32 	%r7685, %r7682, %r7683, 28;
	mov.b64 	%rd11951, {%r7685, %r7684};
	shf.l.wrap.b32 	%r7686, %r7682, %r7683, 30;
	shf.l.wrap.b32 	%r7687, %r7683, %r7682, 30;
	mov.b64 	%rd11952, {%r7687, %r7686};
	xor.b64  	%rd11953, %rd11952, %rd11951;
	shf.l.wrap.b32 	%r7688, %r7682, %r7683, 25;
	shf.l.wrap.b32 	%r7689, %r7683, %r7682, 25;
	mov.b64 	%rd11954, {%r7689, %r7688};
	xor.b64  	%rd11955, %rd11953, %rd11954;
	xor.b64  	%rd11956, %rd11937, %rd11889;
	xor.b64  	%rd11957, %rd11937, %rd11913;
	and.b64  	%rd11958, %rd11957, %rd11956;
	xor.b64  	%rd11959, %rd11958, %rd11937;
	add.s64 	%rd11960, %rd11949, %rd11959;
	add.s64 	%rd11961, %rd11960, %rd11955;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7690,%dummy}, %rd11950;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7691}, %rd11950;
	}
	shf.r.wrap.b32 	%r7692, %r7691, %r7690, 14;
	shf.r.wrap.b32 	%r7693, %r7690, %r7691, 14;
	mov.b64 	%rd11962, {%r7693, %r7692};
	shf.r.wrap.b32 	%r7694, %r7691, %r7690, 18;
	shf.r.wrap.b32 	%r7695, %r7690, %r7691, 18;
	mov.b64 	%rd11963, {%r7695, %r7694};
	xor.b64  	%rd11964, %rd11963, %rd11962;
	shf.l.wrap.b32 	%r7696, %r7690, %r7691, 23;
	shf.l.wrap.b32 	%r7697, %r7691, %r7690, 23;
	mov.b64 	%rd11965, {%r7697, %r7696};
	xor.b64  	%rd11966, %rd11964, %rd11965;
	xor.b64  	%rd11967, %rd11926, %rd11902;
	and.b64  	%rd11968, %rd11950, %rd11967;
	xor.b64  	%rd11969, %rd11968, %rd11902;
	add.s64 	%rd11970, %rd11878, %rd21622;
	add.s64 	%rd11971, %rd11970, %rd21448;
	add.s64 	%rd11972, %rd11971, %rd11969;
	add.s64 	%rd11973, %rd11972, %rd11966;
	add.s64 	%rd11974, %rd11973, %rd11889;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7698,%dummy}, %rd11961;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7699}, %rd11961;
	}
	shf.r.wrap.b32 	%r7700, %r7699, %r7698, 28;
	shf.r.wrap.b32 	%r7701, %r7698, %r7699, 28;
	mov.b64 	%rd11975, {%r7701, %r7700};
	shf.l.wrap.b32 	%r7702, %r7698, %r7699, 30;
	shf.l.wrap.b32 	%r7703, %r7699, %r7698, 30;
	mov.b64 	%rd11976, {%r7703, %r7702};
	xor.b64  	%rd11977, %rd11976, %rd11975;
	shf.l.wrap.b32 	%r7704, %r7698, %r7699, 25;
	shf.l.wrap.b32 	%r7705, %r7699, %r7698, 25;
	mov.b64 	%rd11978, {%r7705, %r7704};
	xor.b64  	%rd11979, %rd11977, %rd11978;
	xor.b64  	%rd11980, %rd11961, %rd11913;
	xor.b64  	%rd11981, %rd11961, %rd11937;
	and.b64  	%rd11982, %rd11981, %rd11980;
	xor.b64  	%rd11983, %rd11982, %rd11961;
	add.s64 	%rd11984, %rd11973, %rd11983;
	add.s64 	%rd11985, %rd11984, %rd11979;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7706,%dummy}, %rd11974;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7707}, %rd11974;
	}
	shf.r.wrap.b32 	%r7708, %r7707, %r7706, 14;
	shf.r.wrap.b32 	%r7709, %r7706, %r7707, 14;
	mov.b64 	%rd11986, {%r7709, %r7708};
	shf.r.wrap.b32 	%r7710, %r7707, %r7706, 18;
	shf.r.wrap.b32 	%r7711, %r7706, %r7707, 18;
	mov.b64 	%rd11987, {%r7711, %r7710};
	xor.b64  	%rd11988, %rd11987, %rd11986;
	shf.l.wrap.b32 	%r7712, %r7706, %r7707, 23;
	shf.l.wrap.b32 	%r7713, %r7707, %r7706, 23;
	mov.b64 	%rd11989, {%r7713, %r7712};
	xor.b64  	%rd11990, %rd11988, %rd11989;
	xor.b64  	%rd11991, %rd11950, %rd11926;
	and.b64  	%rd11992, %rd11974, %rd11991;
	xor.b64  	%rd11993, %rd11992, %rd11926;
	add.s64 	%rd11994, %rd11902, %rd21623;
	add.s64 	%rd11995, %rd11994, %rd21447;
	add.s64 	%rd11996, %rd11995, %rd11993;
	add.s64 	%rd11997, %rd11996, %rd11990;
	add.s64 	%rd11998, %rd11997, %rd11913;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7714,%dummy}, %rd11985;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7715}, %rd11985;
	}
	shf.r.wrap.b32 	%r7716, %r7715, %r7714, 28;
	shf.r.wrap.b32 	%r7717, %r7714, %r7715, 28;
	mov.b64 	%rd11999, {%r7717, %r7716};
	shf.l.wrap.b32 	%r7718, %r7714, %r7715, 30;
	shf.l.wrap.b32 	%r7719, %r7715, %r7714, 30;
	mov.b64 	%rd12000, {%r7719, %r7718};
	xor.b64  	%rd12001, %rd12000, %rd11999;
	shf.l.wrap.b32 	%r7720, %r7714, %r7715, 25;
	shf.l.wrap.b32 	%r7721, %r7715, %r7714, 25;
	mov.b64 	%rd12002, {%r7721, %r7720};
	xor.b64  	%rd12003, %rd12001, %rd12002;
	xor.b64  	%rd12004, %rd11985, %rd11937;
	xor.b64  	%rd12005, %rd11985, %rd11961;
	and.b64  	%rd12006, %rd12005, %rd12004;
	xor.b64  	%rd12007, %rd12006, %rd11985;
	add.s64 	%rd12008, %rd11997, %rd12007;
	add.s64 	%rd12009, %rd12008, %rd12003;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7722,%dummy}, %rd11998;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7723}, %rd11998;
	}
	shf.r.wrap.b32 	%r7724, %r7723, %r7722, 14;
	shf.r.wrap.b32 	%r7725, %r7722, %r7723, 14;
	mov.b64 	%rd12010, {%r7725, %r7724};
	shf.r.wrap.b32 	%r7726, %r7723, %r7722, 18;
	shf.r.wrap.b32 	%r7727, %r7722, %r7723, 18;
	mov.b64 	%rd12011, {%r7727, %r7726};
	xor.b64  	%rd12012, %rd12011, %rd12010;
	shf.l.wrap.b32 	%r7728, %r7722, %r7723, 23;
	shf.l.wrap.b32 	%r7729, %r7723, %r7722, 23;
	mov.b64 	%rd12013, {%r7729, %r7728};
	xor.b64  	%rd12014, %rd12012, %rd12013;
	xor.b64  	%rd12015, %rd11974, %rd11950;
	and.b64  	%rd12016, %rd11998, %rd12015;
	xor.b64  	%rd12017, %rd12016, %rd11950;
	add.s64 	%rd12018, %rd11926, %rd21607;
	add.s64 	%rd12019, %rd12018, %rd21446;
	add.s64 	%rd12020, %rd12019, %rd12017;
	add.s64 	%rd12021, %rd12020, %rd12014;
	add.s64 	%rd12022, %rd12021, %rd11937;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7730,%dummy}, %rd12009;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7731}, %rd12009;
	}
	shf.r.wrap.b32 	%r7732, %r7731, %r7730, 28;
	shf.r.wrap.b32 	%r7733, %r7730, %r7731, 28;
	mov.b64 	%rd12023, {%r7733, %r7732};
	shf.l.wrap.b32 	%r7734, %r7730, %r7731, 30;
	shf.l.wrap.b32 	%r7735, %r7731, %r7730, 30;
	mov.b64 	%rd12024, {%r7735, %r7734};
	xor.b64  	%rd12025, %rd12024, %rd12023;
	shf.l.wrap.b32 	%r7736, %r7730, %r7731, 25;
	shf.l.wrap.b32 	%r7737, %r7731, %r7730, 25;
	mov.b64 	%rd12026, {%r7737, %r7736};
	xor.b64  	%rd12027, %rd12025, %rd12026;
	xor.b64  	%rd12028, %rd12009, %rd11961;
	xor.b64  	%rd12029, %rd12009, %rd11985;
	and.b64  	%rd12030, %rd12029, %rd12028;
	xor.b64  	%rd12031, %rd12030, %rd12009;
	add.s64 	%rd12032, %rd12021, %rd12031;
	add.s64 	%rd12033, %rd12032, %rd12027;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7738,%dummy}, %rd12022;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7739}, %rd12022;
	}
	shf.r.wrap.b32 	%r7740, %r7739, %r7738, 14;
	shf.r.wrap.b32 	%r7741, %r7738, %r7739, 14;
	mov.b64 	%rd12034, {%r7741, %r7740};
	shf.r.wrap.b32 	%r7742, %r7739, %r7738, 18;
	shf.r.wrap.b32 	%r7743, %r7738, %r7739, 18;
	mov.b64 	%rd12035, {%r7743, %r7742};
	xor.b64  	%rd12036, %rd12035, %rd12034;
	shf.l.wrap.b32 	%r7744, %r7738, %r7739, 23;
	shf.l.wrap.b32 	%r7745, %r7739, %r7738, 23;
	mov.b64 	%rd12037, {%r7745, %r7744};
	xor.b64  	%rd12038, %rd12036, %rd12037;
	xor.b64  	%rd12039, %rd11998, %rd11974;
	and.b64  	%rd12040, %rd12022, %rd12039;
	xor.b64  	%rd12041, %rd12040, %rd11974;
	add.s64 	%rd12042, %rd11950, %rd21606;
	add.s64 	%rd12043, %rd12042, %rd21445;
	add.s64 	%rd12044, %rd12043, %rd12041;
	add.s64 	%rd12045, %rd12044, %rd12038;
	add.s64 	%rd12046, %rd12045, %rd11961;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7746,%dummy}, %rd12033;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7747}, %rd12033;
	}
	shf.r.wrap.b32 	%r7748, %r7747, %r7746, 28;
	shf.r.wrap.b32 	%r7749, %r7746, %r7747, 28;
	mov.b64 	%rd12047, {%r7749, %r7748};
	shf.l.wrap.b32 	%r7750, %r7746, %r7747, 30;
	shf.l.wrap.b32 	%r7751, %r7747, %r7746, 30;
	mov.b64 	%rd12048, {%r7751, %r7750};
	xor.b64  	%rd12049, %rd12048, %rd12047;
	shf.l.wrap.b32 	%r7752, %r7746, %r7747, 25;
	shf.l.wrap.b32 	%r7753, %r7747, %r7746, 25;
	mov.b64 	%rd12050, {%r7753, %r7752};
	xor.b64  	%rd12051, %rd12049, %rd12050;
	xor.b64  	%rd12052, %rd12033, %rd11985;
	xor.b64  	%rd12053, %rd12033, %rd12009;
	and.b64  	%rd12054, %rd12053, %rd12052;
	xor.b64  	%rd12055, %rd12054, %rd12033;
	add.s64 	%rd12056, %rd12045, %rd12055;
	add.s64 	%rd12057, %rd12056, %rd12051;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7754,%dummy}, %rd12046;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7755}, %rd12046;
	}
	shf.r.wrap.b32 	%r7756, %r7755, %r7754, 14;
	shf.r.wrap.b32 	%r7757, %r7754, %r7755, 14;
	mov.b64 	%rd12058, {%r7757, %r7756};
	shf.r.wrap.b32 	%r7758, %r7755, %r7754, 18;
	shf.r.wrap.b32 	%r7759, %r7754, %r7755, 18;
	mov.b64 	%rd12059, {%r7759, %r7758};
	xor.b64  	%rd12060, %rd12059, %rd12058;
	shf.l.wrap.b32 	%r7760, %r7754, %r7755, 23;
	shf.l.wrap.b32 	%r7761, %r7755, %r7754, 23;
	mov.b64 	%rd12061, {%r7761, %r7760};
	xor.b64  	%rd12062, %rd12060, %rd12061;
	xor.b64  	%rd12063, %rd12022, %rd11998;
	and.b64  	%rd12064, %rd12046, %rd12063;
	xor.b64  	%rd12065, %rd12064, %rd11998;
	add.s64 	%rd12066, %rd11974, %rd21605;
	add.s64 	%rd12067, %rd12066, %rd21444;
	add.s64 	%rd12068, %rd12067, %rd12065;
	add.s64 	%rd12069, %rd12068, %rd12062;
	add.s64 	%rd12070, %rd12069, %rd11985;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7762,%dummy}, %rd12057;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7763}, %rd12057;
	}
	shf.r.wrap.b32 	%r7764, %r7763, %r7762, 28;
	shf.r.wrap.b32 	%r7765, %r7762, %r7763, 28;
	mov.b64 	%rd12071, {%r7765, %r7764};
	shf.l.wrap.b32 	%r7766, %r7762, %r7763, 30;
	shf.l.wrap.b32 	%r7767, %r7763, %r7762, 30;
	mov.b64 	%rd12072, {%r7767, %r7766};
	xor.b64  	%rd12073, %rd12072, %rd12071;
	shf.l.wrap.b32 	%r7768, %r7762, %r7763, 25;
	shf.l.wrap.b32 	%r7769, %r7763, %r7762, 25;
	mov.b64 	%rd12074, {%r7769, %r7768};
	xor.b64  	%rd12075, %rd12073, %rd12074;
	xor.b64  	%rd12076, %rd12057, %rd12009;
	xor.b64  	%rd12077, %rd12057, %rd12033;
	and.b64  	%rd12078, %rd12077, %rd12076;
	xor.b64  	%rd12079, %rd12078, %rd12057;
	add.s64 	%rd12080, %rd12069, %rd12079;
	add.s64 	%rd12081, %rd12080, %rd12075;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7770,%dummy}, %rd12070;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7771}, %rd12070;
	}
	shf.r.wrap.b32 	%r7772, %r7771, %r7770, 14;
	shf.r.wrap.b32 	%r7773, %r7770, %r7771, 14;
	mov.b64 	%rd12082, {%r7773, %r7772};
	shf.r.wrap.b32 	%r7774, %r7771, %r7770, 18;
	shf.r.wrap.b32 	%r7775, %r7770, %r7771, 18;
	mov.b64 	%rd12083, {%r7775, %r7774};
	xor.b64  	%rd12084, %rd12083, %rd12082;
	shf.l.wrap.b32 	%r7776, %r7770, %r7771, 23;
	shf.l.wrap.b32 	%r7777, %r7771, %r7770, 23;
	mov.b64 	%rd12085, {%r7777, %r7776};
	xor.b64  	%rd12086, %rd12084, %rd12085;
	xor.b64  	%rd12087, %rd12046, %rd12022;
	and.b64  	%rd12088, %rd12070, %rd12087;
	xor.b64  	%rd12089, %rd12088, %rd12022;
	add.s64 	%rd12090, %rd11998, %rd21604;
	add.s64 	%rd12091, %rd12090, %rd21443;
	add.s64 	%rd12092, %rd12091, %rd12089;
	add.s64 	%rd12093, %rd12092, %rd12086;
	add.s64 	%rd12094, %rd12093, %rd12009;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7778,%dummy}, %rd12081;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7779}, %rd12081;
	}
	shf.r.wrap.b32 	%r7780, %r7779, %r7778, 28;
	shf.r.wrap.b32 	%r7781, %r7778, %r7779, 28;
	mov.b64 	%rd12095, {%r7781, %r7780};
	shf.l.wrap.b32 	%r7782, %r7778, %r7779, 30;
	shf.l.wrap.b32 	%r7783, %r7779, %r7778, 30;
	mov.b64 	%rd12096, {%r7783, %r7782};
	xor.b64  	%rd12097, %rd12096, %rd12095;
	shf.l.wrap.b32 	%r7784, %r7778, %r7779, 25;
	shf.l.wrap.b32 	%r7785, %r7779, %r7778, 25;
	mov.b64 	%rd12098, {%r7785, %r7784};
	xor.b64  	%rd12099, %rd12097, %rd12098;
	xor.b64  	%rd12100, %rd12081, %rd12033;
	xor.b64  	%rd12101, %rd12081, %rd12057;
	and.b64  	%rd12102, %rd12101, %rd12100;
	xor.b64  	%rd12103, %rd12102, %rd12081;
	add.s64 	%rd12104, %rd12093, %rd12103;
	add.s64 	%rd12105, %rd12104, %rd12099;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7786,%dummy}, %rd12094;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7787}, %rd12094;
	}
	shf.r.wrap.b32 	%r7788, %r7787, %r7786, 14;
	shf.r.wrap.b32 	%r7789, %r7786, %r7787, 14;
	mov.b64 	%rd12106, {%r7789, %r7788};
	shf.r.wrap.b32 	%r7790, %r7787, %r7786, 18;
	shf.r.wrap.b32 	%r7791, %r7786, %r7787, 18;
	mov.b64 	%rd12107, {%r7791, %r7790};
	xor.b64  	%rd12108, %rd12107, %rd12106;
	shf.l.wrap.b32 	%r7792, %r7786, %r7787, 23;
	shf.l.wrap.b32 	%r7793, %r7787, %r7786, 23;
	mov.b64 	%rd12109, {%r7793, %r7792};
	xor.b64  	%rd12110, %rd12108, %rd12109;
	xor.b64  	%rd12111, %rd12070, %rd12046;
	and.b64  	%rd12112, %rd12094, %rd12111;
	xor.b64  	%rd12113, %rd12112, %rd12046;
	add.s64 	%rd12114, %rd12022, %rd21603;
	add.s64 	%rd12115, %rd12114, %rd21442;
	add.s64 	%rd12116, %rd12115, %rd12113;
	add.s64 	%rd12117, %rd12116, %rd12110;
	add.s64 	%rd21615, %rd12117, %rd12033;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7794,%dummy}, %rd12105;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7795}, %rd12105;
	}
	shf.r.wrap.b32 	%r7796, %r7795, %r7794, 28;
	shf.r.wrap.b32 	%r7797, %r7794, %r7795, 28;
	mov.b64 	%rd12118, {%r7797, %r7796};
	shf.l.wrap.b32 	%r7798, %r7794, %r7795, 30;
	shf.l.wrap.b32 	%r7799, %r7795, %r7794, 30;
	mov.b64 	%rd12119, {%r7799, %r7798};
	xor.b64  	%rd12120, %rd12119, %rd12118;
	shf.l.wrap.b32 	%r7800, %r7794, %r7795, 25;
	shf.l.wrap.b32 	%r7801, %r7795, %r7794, 25;
	mov.b64 	%rd12121, {%r7801, %r7800};
	xor.b64  	%rd12122, %rd12120, %rd12121;
	xor.b64  	%rd12123, %rd12105, %rd12057;
	xor.b64  	%rd12124, %rd12105, %rd12081;
	and.b64  	%rd12125, %rd12124, %rd12123;
	xor.b64  	%rd12126, %rd12125, %rd12105;
	add.s64 	%rd12127, %rd12117, %rd12126;
	add.s64 	%rd21611, %rd12127, %rd12122;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7802,%dummy}, %rd21615;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7803}, %rd21615;
	}
	shf.r.wrap.b32 	%r7804, %r7803, %r7802, 14;
	shf.r.wrap.b32 	%r7805, %r7802, %r7803, 14;
	mov.b64 	%rd12128, {%r7805, %r7804};
	shf.r.wrap.b32 	%r7806, %r7803, %r7802, 18;
	shf.r.wrap.b32 	%r7807, %r7802, %r7803, 18;
	mov.b64 	%rd12129, {%r7807, %r7806};
	xor.b64  	%rd12130, %rd12129, %rd12128;
	shf.l.wrap.b32 	%r7808, %r7802, %r7803, 23;
	shf.l.wrap.b32 	%r7809, %r7803, %r7802, 23;
	mov.b64 	%rd12131, {%r7809, %r7808};
	xor.b64  	%rd12132, %rd12130, %rd12131;
	xor.b64  	%rd12133, %rd12094, %rd12070;
	and.b64  	%rd12134, %rd21615, %rd12133;
	xor.b64  	%rd12135, %rd12134, %rd12070;
	add.s64 	%rd12136, %rd12046, %rd21602;
	add.s64 	%rd12137, %rd12136, %rd21441;
	add.s64 	%rd12138, %rd12137, %rd12135;
	add.s64 	%rd12139, %rd12138, %rd12132;
	add.s64 	%rd21614, %rd12139, %rd12057;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7810,%dummy}, %rd21611;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7811}, %rd21611;
	}
	shf.r.wrap.b32 	%r7812, %r7811, %r7810, 28;
	shf.r.wrap.b32 	%r7813, %r7810, %r7811, 28;
	mov.b64 	%rd12140, {%r7813, %r7812};
	shf.l.wrap.b32 	%r7814, %r7810, %r7811, 30;
	shf.l.wrap.b32 	%r7815, %r7811, %r7810, 30;
	mov.b64 	%rd12141, {%r7815, %r7814};
	xor.b64  	%rd12142, %rd12141, %rd12140;
	shf.l.wrap.b32 	%r7816, %r7810, %r7811, 25;
	shf.l.wrap.b32 	%r7817, %r7811, %r7810, 25;
	mov.b64 	%rd12143, {%r7817, %r7816};
	xor.b64  	%rd12144, %rd12142, %rd12143;
	xor.b64  	%rd12145, %rd21611, %rd12081;
	xor.b64  	%rd12146, %rd21611, %rd12105;
	and.b64  	%rd12147, %rd12146, %rd12145;
	xor.b64  	%rd12148, %rd12147, %rd21611;
	add.s64 	%rd12149, %rd12139, %rd12148;
	add.s64 	%rd21610, %rd12149, %rd12144;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7818,%dummy}, %rd21614;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7819}, %rd21614;
	}
	shf.r.wrap.b32 	%r7820, %r7819, %r7818, 14;
	shf.r.wrap.b32 	%r7821, %r7818, %r7819, 14;
	mov.b64 	%rd12150, {%r7821, %r7820};
	shf.r.wrap.b32 	%r7822, %r7819, %r7818, 18;
	shf.r.wrap.b32 	%r7823, %r7818, %r7819, 18;
	mov.b64 	%rd12151, {%r7823, %r7822};
	xor.b64  	%rd12152, %rd12151, %rd12150;
	shf.l.wrap.b32 	%r7824, %r7818, %r7819, 23;
	shf.l.wrap.b32 	%r7825, %r7819, %r7818, 23;
	mov.b64 	%rd12153, {%r7825, %r7824};
	xor.b64  	%rd12154, %rd12152, %rd12153;
	xor.b64  	%rd12155, %rd21615, %rd12094;
	and.b64  	%rd12156, %rd21614, %rd12155;
	xor.b64  	%rd12157, %rd12156, %rd12094;
	add.s64 	%rd12158, %rd12070, %rd21601;
	add.s64 	%rd12159, %rd12158, %rd21440;
	add.s64 	%rd12160, %rd12159, %rd12157;
	add.s64 	%rd12161, %rd12160, %rd12154;
	add.s64 	%rd21613, %rd12161, %rd12081;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7826,%dummy}, %rd21610;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7827}, %rd21610;
	}
	shf.r.wrap.b32 	%r7828, %r7827, %r7826, 28;
	shf.r.wrap.b32 	%r7829, %r7826, %r7827, 28;
	mov.b64 	%rd12162, {%r7829, %r7828};
	shf.l.wrap.b32 	%r7830, %r7826, %r7827, 30;
	shf.l.wrap.b32 	%r7831, %r7827, %r7826, 30;
	mov.b64 	%rd12163, {%r7831, %r7830};
	xor.b64  	%rd12164, %rd12163, %rd12162;
	shf.l.wrap.b32 	%r7832, %r7826, %r7827, 25;
	shf.l.wrap.b32 	%r7833, %r7827, %r7826, 25;
	mov.b64 	%rd12165, {%r7833, %r7832};
	xor.b64  	%rd12166, %rd12164, %rd12165;
	xor.b64  	%rd12167, %rd21610, %rd12105;
	xor.b64  	%rd12168, %rd21610, %rd21611;
	and.b64  	%rd12169, %rd12168, %rd12167;
	xor.b64  	%rd12170, %rd12169, %rd21610;
	add.s64 	%rd12171, %rd12161, %rd12170;
	add.s64 	%rd21609, %rd12171, %rd12166;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7834,%dummy}, %rd21613;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7835}, %rd21613;
	}
	shf.r.wrap.b32 	%r7836, %r7835, %r7834, 14;
	shf.r.wrap.b32 	%r7837, %r7834, %r7835, 14;
	mov.b64 	%rd12172, {%r7837, %r7836};
	shf.r.wrap.b32 	%r7838, %r7835, %r7834, 18;
	shf.r.wrap.b32 	%r7839, %r7834, %r7835, 18;
	mov.b64 	%rd12173, {%r7839, %r7838};
	xor.b64  	%rd12174, %rd12173, %rd12172;
	shf.l.wrap.b32 	%r7840, %r7834, %r7835, 23;
	shf.l.wrap.b32 	%r7841, %r7835, %r7834, 23;
	mov.b64 	%rd12175, {%r7841, %r7840};
	xor.b64  	%rd12176, %rd12174, %rd12175;
	xor.b64  	%rd12177, %rd21614, %rd21615;
	and.b64  	%rd12178, %rd21613, %rd12177;
	xor.b64  	%rd12179, %rd12178, %rd21615;
	add.s64 	%rd12180, %rd12094, %rd21600;
	add.s64 	%rd12181, %rd12180, %rd21439;
	add.s64 	%rd12182, %rd12181, %rd12179;
	add.s64 	%rd12183, %rd12182, %rd12176;
	add.s64 	%rd21612, %rd12183, %rd12105;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7842,%dummy}, %rd21609;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7843}, %rd21609;
	}
	shf.r.wrap.b32 	%r7844, %r7843, %r7842, 28;
	shf.r.wrap.b32 	%r7845, %r7842, %r7843, 28;
	mov.b64 	%rd12184, {%r7845, %r7844};
	shf.l.wrap.b32 	%r7846, %r7842, %r7843, 30;
	shf.l.wrap.b32 	%r7847, %r7843, %r7842, 30;
	mov.b64 	%rd12185, {%r7847, %r7846};
	xor.b64  	%rd12186, %rd12185, %rd12184;
	shf.l.wrap.b32 	%r7848, %r7842, %r7843, 25;
	shf.l.wrap.b32 	%r7849, %r7843, %r7842, 25;
	mov.b64 	%rd12187, {%r7849, %r7848};
	xor.b64  	%rd12188, %rd12186, %rd12187;
	xor.b64  	%rd12189, %rd21609, %rd21611;
	xor.b64  	%rd12190, %rd21609, %rd21610;
	and.b64  	%rd12191, %rd12190, %rd12189;
	xor.b64  	%rd12192, %rd12191, %rd21609;
	add.s64 	%rd12193, %rd12183, %rd12192;
	add.s64 	%rd21608, %rd12193, %rd12188;
	mov.u32 	%r14427, 16;

BB3_215:
	mov.u64 	%rd21333, k_sha512;
	shr.u64 	%rd12194, %rd21601, 6;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7850,%dummy}, %rd21601;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7851}, %rd21601;
	}
	shf.r.wrap.b32 	%r7852, %r7851, %r7850, 19;
	shf.r.wrap.b32 	%r7853, %r7850, %r7851, 19;
	mov.b64 	%rd12195, {%r7853, %r7852};
	xor.b64  	%rd12196, %rd12195, %rd12194;
	shf.l.wrap.b32 	%r7854, %r7850, %r7851, 3;
	shf.l.wrap.b32 	%r7855, %r7851, %r7850, 3;
	mov.b64 	%rd12197, {%r7855, %r7854};
	xor.b64  	%rd12198, %rd12196, %rd12197;
	shr.u64 	%rd12199, %rd21617, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7856,%dummy}, %rd21617;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7857}, %rd21617;
	}
	shf.r.wrap.b32 	%r7858, %r7857, %r7856, 1;
	shf.r.wrap.b32 	%r7859, %r7856, %r7857, 1;
	mov.b64 	%rd12200, {%r7859, %r7858};
	xor.b64  	%rd12201, %rd12200, %rd12199;
	shf.r.wrap.b32 	%r7860, %r7857, %r7856, 8;
	shf.r.wrap.b32 	%r7861, %r7856, %r7857, 8;
	mov.b64 	%rd12202, {%r7861, %r7860};
	xor.b64  	%rd12203, %rd12201, %rd12202;
	add.s64 	%rd12204, %rd21606, %rd21616;
	add.s64 	%rd12205, %rd12204, %rd12198;
	add.s64 	%rd21616, %rd12205, %rd12203;
	shr.u64 	%rd12206, %rd21600, 6;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7862,%dummy}, %rd21600;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7863}, %rd21600;
	}
	shf.r.wrap.b32 	%r7864, %r7863, %r7862, 19;
	shf.r.wrap.b32 	%r7865, %r7862, %r7863, 19;
	mov.b64 	%rd12207, {%r7865, %r7864};
	xor.b64  	%rd12208, %rd12207, %rd12206;
	shf.l.wrap.b32 	%r7866, %r7862, %r7863, 3;
	shf.l.wrap.b32 	%r7867, %r7863, %r7862, 3;
	mov.b64 	%rd12209, {%r7867, %r7866};
	xor.b64  	%rd12210, %rd12208, %rd12209;
	shr.u64 	%rd12211, %rd21618, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7868,%dummy}, %rd21618;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7869}, %rd21618;
	}
	shf.r.wrap.b32 	%r7870, %r7869, %r7868, 1;
	shf.r.wrap.b32 	%r7871, %r7868, %r7869, 1;
	mov.b64 	%rd12212, {%r7871, %r7870};
	xor.b64  	%rd12213, %rd12212, %rd12211;
	shf.r.wrap.b32 	%r7872, %r7869, %r7868, 8;
	shf.r.wrap.b32 	%r7873, %r7868, %r7869, 8;
	mov.b64 	%rd12214, {%r7873, %r7872};
	xor.b64  	%rd12215, %rd12213, %rd12214;
	add.s64 	%rd12216, %rd21605, %rd21617;
	add.s64 	%rd12217, %rd12216, %rd12210;
	add.s64 	%rd21617, %rd12217, %rd12215;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7874,%dummy}, %rd21616;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7875}, %rd21616;
	}
	shf.r.wrap.b32 	%r7876, %r7875, %r7874, 19;
	shf.r.wrap.b32 	%r7877, %r7874, %r7875, 19;
	mov.b64 	%rd12218, {%r7877, %r7876};
	shf.l.wrap.b32 	%r7878, %r7874, %r7875, 3;
	shf.l.wrap.b32 	%r7879, %r7875, %r7874, 3;
	mov.b64 	%rd12219, {%r7879, %r7878};
	shr.u64 	%rd12220, %rd21616, 6;
	xor.b64  	%rd12221, %rd12218, %rd12220;
	xor.b64  	%rd12222, %rd12221, %rd12219;
	shr.u64 	%rd12223, %rd21619, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7880,%dummy}, %rd21619;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7881}, %rd21619;
	}
	shf.r.wrap.b32 	%r7882, %r7881, %r7880, 1;
	shf.r.wrap.b32 	%r7883, %r7880, %r7881, 1;
	mov.b64 	%rd12224, {%r7883, %r7882};
	xor.b64  	%rd12225, %rd12224, %rd12223;
	shf.r.wrap.b32 	%r7884, %r7881, %r7880, 8;
	shf.r.wrap.b32 	%r7885, %r7880, %r7881, 8;
	mov.b64 	%rd12226, {%r7885, %r7884};
	xor.b64  	%rd12227, %rd12225, %rd12226;
	add.s64 	%rd12228, %rd21604, %rd21618;
	add.s64 	%rd12229, %rd12228, %rd12222;
	add.s64 	%rd21618, %rd12229, %rd12227;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7886,%dummy}, %rd21617;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7887}, %rd21617;
	}
	shf.r.wrap.b32 	%r7888, %r7887, %r7886, 19;
	shf.r.wrap.b32 	%r7889, %r7886, %r7887, 19;
	mov.b64 	%rd12230, {%r7889, %r7888};
	shf.l.wrap.b32 	%r7890, %r7886, %r7887, 3;
	shf.l.wrap.b32 	%r7891, %r7887, %r7886, 3;
	mov.b64 	%rd12231, {%r7891, %r7890};
	shr.u64 	%rd12232, %rd21617, 6;
	xor.b64  	%rd12233, %rd12230, %rd12232;
	xor.b64  	%rd12234, %rd12233, %rd12231;
	shr.u64 	%rd12235, %rd21620, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7892,%dummy}, %rd21620;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7893}, %rd21620;
	}
	shf.r.wrap.b32 	%r7894, %r7893, %r7892, 1;
	shf.r.wrap.b32 	%r7895, %r7892, %r7893, 1;
	mov.b64 	%rd12236, {%r7895, %r7894};
	xor.b64  	%rd12237, %rd12236, %rd12235;
	shf.r.wrap.b32 	%r7896, %r7893, %r7892, 8;
	shf.r.wrap.b32 	%r7897, %r7892, %r7893, 8;
	mov.b64 	%rd12238, {%r7897, %r7896};
	xor.b64  	%rd12239, %rd12237, %rd12238;
	add.s64 	%rd12240, %rd21603, %rd21619;
	add.s64 	%rd12241, %rd12240, %rd12234;
	add.s64 	%rd21619, %rd12241, %rd12239;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7898,%dummy}, %rd21618;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7899}, %rd21618;
	}
	shf.r.wrap.b32 	%r7900, %r7899, %r7898, 19;
	shf.r.wrap.b32 	%r7901, %r7898, %r7899, 19;
	mov.b64 	%rd12242, {%r7901, %r7900};
	shf.l.wrap.b32 	%r7902, %r7898, %r7899, 3;
	shf.l.wrap.b32 	%r7903, %r7899, %r7898, 3;
	mov.b64 	%rd12243, {%r7903, %r7902};
	shr.u64 	%rd12244, %rd21618, 6;
	xor.b64  	%rd12245, %rd12242, %rd12244;
	xor.b64  	%rd12246, %rd12245, %rd12243;
	shr.u64 	%rd12247, %rd21621, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7904,%dummy}, %rd21621;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7905}, %rd21621;
	}
	shf.r.wrap.b32 	%r7906, %r7905, %r7904, 1;
	shf.r.wrap.b32 	%r7907, %r7904, %r7905, 1;
	mov.b64 	%rd12248, {%r7907, %r7906};
	xor.b64  	%rd12249, %rd12248, %rd12247;
	shf.r.wrap.b32 	%r7908, %r7905, %r7904, 8;
	shf.r.wrap.b32 	%r7909, %r7904, %r7905, 8;
	mov.b64 	%rd12250, {%r7909, %r7908};
	xor.b64  	%rd12251, %rd12249, %rd12250;
	add.s64 	%rd12252, %rd21602, %rd21620;
	add.s64 	%rd12253, %rd12252, %rd12246;
	add.s64 	%rd21620, %rd12253, %rd12251;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7910,%dummy}, %rd21619;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7911}, %rd21619;
	}
	shf.r.wrap.b32 	%r7912, %r7911, %r7910, 19;
	shf.r.wrap.b32 	%r7913, %r7910, %r7911, 19;
	mov.b64 	%rd12254, {%r7913, %r7912};
	shf.l.wrap.b32 	%r7914, %r7910, %r7911, 3;
	shf.l.wrap.b32 	%r7915, %r7911, %r7910, 3;
	mov.b64 	%rd12255, {%r7915, %r7914};
	shr.u64 	%rd12256, %rd21619, 6;
	xor.b64  	%rd12257, %rd12254, %rd12256;
	xor.b64  	%rd12258, %rd12257, %rd12255;
	shr.u64 	%rd12259, %rd21622, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7916,%dummy}, %rd21622;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7917}, %rd21622;
	}
	shf.r.wrap.b32 	%r7918, %r7917, %r7916, 1;
	shf.r.wrap.b32 	%r7919, %r7916, %r7917, 1;
	mov.b64 	%rd12260, {%r7919, %r7918};
	xor.b64  	%rd12261, %rd12260, %rd12259;
	shf.r.wrap.b32 	%r7920, %r7917, %r7916, 8;
	shf.r.wrap.b32 	%r7921, %r7916, %r7917, 8;
	mov.b64 	%rd12262, {%r7921, %r7920};
	xor.b64  	%rd12263, %rd12261, %rd12262;
	add.s64 	%rd12264, %rd21601, %rd21621;
	add.s64 	%rd12265, %rd12264, %rd12258;
	add.s64 	%rd21621, %rd12265, %rd12263;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7922,%dummy}, %rd21620;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7923}, %rd21620;
	}
	shf.r.wrap.b32 	%r7924, %r7923, %r7922, 19;
	shf.r.wrap.b32 	%r7925, %r7922, %r7923, 19;
	mov.b64 	%rd12266, {%r7925, %r7924};
	shf.l.wrap.b32 	%r7926, %r7922, %r7923, 3;
	shf.l.wrap.b32 	%r7927, %r7923, %r7922, 3;
	mov.b64 	%rd12267, {%r7927, %r7926};
	shr.u64 	%rd12268, %rd21620, 6;
	xor.b64  	%rd12269, %rd12266, %rd12268;
	xor.b64  	%rd12270, %rd12269, %rd12267;
	shr.u64 	%rd12271, %rd21623, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7928,%dummy}, %rd21623;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7929}, %rd21623;
	}
	shf.r.wrap.b32 	%r7930, %r7929, %r7928, 1;
	shf.r.wrap.b32 	%r7931, %r7928, %r7929, 1;
	mov.b64 	%rd12272, {%r7931, %r7930};
	xor.b64  	%rd12273, %rd12272, %rd12271;
	shf.r.wrap.b32 	%r7932, %r7929, %r7928, 8;
	shf.r.wrap.b32 	%r7933, %r7928, %r7929, 8;
	mov.b64 	%rd12274, {%r7933, %r7932};
	xor.b64  	%rd12275, %rd12273, %rd12274;
	add.s64 	%rd12276, %rd21600, %rd21622;
	add.s64 	%rd12277, %rd12276, %rd12270;
	add.s64 	%rd21622, %rd12277, %rd12275;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7934,%dummy}, %rd21621;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7935}, %rd21621;
	}
	shf.r.wrap.b32 	%r7936, %r7935, %r7934, 19;
	shf.r.wrap.b32 	%r7937, %r7934, %r7935, 19;
	mov.b64 	%rd12278, {%r7937, %r7936};
	shf.l.wrap.b32 	%r7938, %r7934, %r7935, 3;
	shf.l.wrap.b32 	%r7939, %r7935, %r7934, 3;
	mov.b64 	%rd12279, {%r7939, %r7938};
	shr.u64 	%rd12280, %rd21621, 6;
	xor.b64  	%rd12281, %rd12278, %rd12280;
	xor.b64  	%rd12282, %rd12281, %rd12279;
	shr.u64 	%rd12283, %rd21607, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7940,%dummy}, %rd21607;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7941}, %rd21607;
	}
	shf.r.wrap.b32 	%r7942, %r7941, %r7940, 1;
	shf.r.wrap.b32 	%r7943, %r7940, %r7941, 1;
	mov.b64 	%rd12284, {%r7943, %r7942};
	xor.b64  	%rd12285, %rd12284, %rd12283;
	shf.r.wrap.b32 	%r7944, %r7941, %r7940, 8;
	shf.r.wrap.b32 	%r7945, %r7940, %r7941, 8;
	mov.b64 	%rd12286, {%r7945, %r7944};
	xor.b64  	%rd12287, %rd12285, %rd12286;
	add.s64 	%rd12288, %rd21616, %rd21623;
	add.s64 	%rd12289, %rd12288, %rd12282;
	add.s64 	%rd21623, %rd12289, %rd12287;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7946,%dummy}, %rd21622;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7947}, %rd21622;
	}
	shf.r.wrap.b32 	%r7948, %r7947, %r7946, 19;
	shf.r.wrap.b32 	%r7949, %r7946, %r7947, 19;
	mov.b64 	%rd12290, {%r7949, %r7948};
	shf.l.wrap.b32 	%r7950, %r7946, %r7947, 3;
	shf.l.wrap.b32 	%r7951, %r7947, %r7946, 3;
	mov.b64 	%rd12291, {%r7951, %r7950};
	shr.u64 	%rd12292, %rd21622, 6;
	xor.b64  	%rd12293, %rd12290, %rd12292;
	xor.b64  	%rd12294, %rd12293, %rd12291;
	shr.u64 	%rd12295, %rd21606, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7952,%dummy}, %rd21606;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7953}, %rd21606;
	}
	shf.r.wrap.b32 	%r7954, %r7953, %r7952, 1;
	shf.r.wrap.b32 	%r7955, %r7952, %r7953, 1;
	mov.b64 	%rd12296, {%r7955, %r7954};
	xor.b64  	%rd12297, %rd12296, %rd12295;
	shf.r.wrap.b32 	%r7956, %r7953, %r7952, 8;
	shf.r.wrap.b32 	%r7957, %r7952, %r7953, 8;
	mov.b64 	%rd12298, {%r7957, %r7956};
	xor.b64  	%rd12299, %rd12297, %rd12298;
	add.s64 	%rd12300, %rd21617, %rd21607;
	add.s64 	%rd12301, %rd12300, %rd12294;
	add.s64 	%rd21607, %rd12301, %rd12299;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7958,%dummy}, %rd21623;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7959}, %rd21623;
	}
	shf.r.wrap.b32 	%r7960, %r7959, %r7958, 19;
	shf.r.wrap.b32 	%r7961, %r7958, %r7959, 19;
	mov.b64 	%rd12302, {%r7961, %r7960};
	shf.l.wrap.b32 	%r7962, %r7958, %r7959, 3;
	shf.l.wrap.b32 	%r7963, %r7959, %r7958, 3;
	mov.b64 	%rd12303, {%r7963, %r7962};
	shr.u64 	%rd12304, %rd21623, 6;
	xor.b64  	%rd12305, %rd12302, %rd12304;
	xor.b64  	%rd12306, %rd12305, %rd12303;
	shr.u64 	%rd12307, %rd21605, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7964,%dummy}, %rd21605;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7965}, %rd21605;
	}
	shf.r.wrap.b32 	%r7966, %r7965, %r7964, 1;
	shf.r.wrap.b32 	%r7967, %r7964, %r7965, 1;
	mov.b64 	%rd12308, {%r7967, %r7966};
	xor.b64  	%rd12309, %rd12308, %rd12307;
	shf.r.wrap.b32 	%r7968, %r7965, %r7964, 8;
	shf.r.wrap.b32 	%r7969, %r7964, %r7965, 8;
	mov.b64 	%rd12310, {%r7969, %r7968};
	xor.b64  	%rd12311, %rd12309, %rd12310;
	add.s64 	%rd12312, %rd21618, %rd21606;
	add.s64 	%rd12313, %rd12312, %rd12306;
	add.s64 	%rd21606, %rd12313, %rd12311;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7970,%dummy}, %rd21607;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7971}, %rd21607;
	}
	shf.r.wrap.b32 	%r7972, %r7971, %r7970, 19;
	shf.r.wrap.b32 	%r7973, %r7970, %r7971, 19;
	mov.b64 	%rd12314, {%r7973, %r7972};
	shf.l.wrap.b32 	%r7974, %r7970, %r7971, 3;
	shf.l.wrap.b32 	%r7975, %r7971, %r7970, 3;
	mov.b64 	%rd12315, {%r7975, %r7974};
	shr.u64 	%rd12316, %rd21607, 6;
	xor.b64  	%rd12317, %rd12314, %rd12316;
	xor.b64  	%rd12318, %rd12317, %rd12315;
	shr.u64 	%rd12319, %rd21604, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7976,%dummy}, %rd21604;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7977}, %rd21604;
	}
	shf.r.wrap.b32 	%r7978, %r7977, %r7976, 1;
	shf.r.wrap.b32 	%r7979, %r7976, %r7977, 1;
	mov.b64 	%rd12320, {%r7979, %r7978};
	xor.b64  	%rd12321, %rd12320, %rd12319;
	shf.r.wrap.b32 	%r7980, %r7977, %r7976, 8;
	shf.r.wrap.b32 	%r7981, %r7976, %r7977, 8;
	mov.b64 	%rd12322, {%r7981, %r7980};
	xor.b64  	%rd12323, %rd12321, %rd12322;
	add.s64 	%rd12324, %rd21619, %rd21605;
	add.s64 	%rd12325, %rd12324, %rd12318;
	add.s64 	%rd21605, %rd12325, %rd12323;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7982,%dummy}, %rd21606;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7983}, %rd21606;
	}
	shf.r.wrap.b32 	%r7984, %r7983, %r7982, 19;
	shf.r.wrap.b32 	%r7985, %r7982, %r7983, 19;
	mov.b64 	%rd12326, {%r7985, %r7984};
	shf.l.wrap.b32 	%r7986, %r7982, %r7983, 3;
	shf.l.wrap.b32 	%r7987, %r7983, %r7982, 3;
	mov.b64 	%rd12327, {%r7987, %r7986};
	shr.u64 	%rd12328, %rd21606, 6;
	xor.b64  	%rd12329, %rd12326, %rd12328;
	xor.b64  	%rd12330, %rd12329, %rd12327;
	shr.u64 	%rd12331, %rd21603, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7988,%dummy}, %rd21603;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7989}, %rd21603;
	}
	shf.r.wrap.b32 	%r7990, %r7989, %r7988, 1;
	shf.r.wrap.b32 	%r7991, %r7988, %r7989, 1;
	mov.b64 	%rd12332, {%r7991, %r7990};
	xor.b64  	%rd12333, %rd12332, %rd12331;
	shf.r.wrap.b32 	%r7992, %r7989, %r7988, 8;
	shf.r.wrap.b32 	%r7993, %r7988, %r7989, 8;
	mov.b64 	%rd12334, {%r7993, %r7992};
	xor.b64  	%rd12335, %rd12333, %rd12334;
	add.s64 	%rd12336, %rd21620, %rd21604;
	add.s64 	%rd12337, %rd12336, %rd12330;
	add.s64 	%rd21604, %rd12337, %rd12335;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7994,%dummy}, %rd21605;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7995}, %rd21605;
	}
	shf.r.wrap.b32 	%r7996, %r7995, %r7994, 19;
	shf.r.wrap.b32 	%r7997, %r7994, %r7995, 19;
	mov.b64 	%rd12338, {%r7997, %r7996};
	shf.l.wrap.b32 	%r7998, %r7994, %r7995, 3;
	shf.l.wrap.b32 	%r7999, %r7995, %r7994, 3;
	mov.b64 	%rd12339, {%r7999, %r7998};
	shr.u64 	%rd12340, %rd21605, 6;
	xor.b64  	%rd12341, %rd12338, %rd12340;
	xor.b64  	%rd12342, %rd12341, %rd12339;
	shr.u64 	%rd12343, %rd21602, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8000,%dummy}, %rd21602;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8001}, %rd21602;
	}
	shf.r.wrap.b32 	%r8002, %r8001, %r8000, 1;
	shf.r.wrap.b32 	%r8003, %r8000, %r8001, 1;
	mov.b64 	%rd12344, {%r8003, %r8002};
	xor.b64  	%rd12345, %rd12344, %rd12343;
	shf.r.wrap.b32 	%r8004, %r8001, %r8000, 8;
	shf.r.wrap.b32 	%r8005, %r8000, %r8001, 8;
	mov.b64 	%rd12346, {%r8005, %r8004};
	xor.b64  	%rd12347, %rd12345, %rd12346;
	add.s64 	%rd12348, %rd21621, %rd21603;
	add.s64 	%rd12349, %rd12348, %rd12342;
	add.s64 	%rd21603, %rd12349, %rd12347;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8006,%dummy}, %rd21604;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8007}, %rd21604;
	}
	shf.r.wrap.b32 	%r8008, %r8007, %r8006, 19;
	shf.r.wrap.b32 	%r8009, %r8006, %r8007, 19;
	mov.b64 	%rd12350, {%r8009, %r8008};
	shf.l.wrap.b32 	%r8010, %r8006, %r8007, 3;
	shf.l.wrap.b32 	%r8011, %r8007, %r8006, 3;
	mov.b64 	%rd12351, {%r8011, %r8010};
	shr.u64 	%rd12352, %rd21604, 6;
	xor.b64  	%rd12353, %rd12350, %rd12352;
	xor.b64  	%rd12354, %rd12353, %rd12351;
	shr.u64 	%rd12355, %rd21601, 7;
	shf.r.wrap.b32 	%r8012, %r7851, %r7850, 1;
	shf.r.wrap.b32 	%r8013, %r7850, %r7851, 1;
	mov.b64 	%rd12356, {%r8013, %r8012};
	xor.b64  	%rd12357, %rd12356, %rd12355;
	shf.r.wrap.b32 	%r8014, %r7851, %r7850, 8;
	shf.r.wrap.b32 	%r8015, %r7850, %r7851, 8;
	mov.b64 	%rd12358, {%r8015, %r8014};
	xor.b64  	%rd12359, %rd12357, %rd12358;
	add.s64 	%rd12360, %rd21622, %rd21602;
	add.s64 	%rd12361, %rd12360, %rd12354;
	add.s64 	%rd21602, %rd12361, %rd12359;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8016,%dummy}, %rd21603;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8017}, %rd21603;
	}
	shf.r.wrap.b32 	%r8018, %r8017, %r8016, 19;
	shf.r.wrap.b32 	%r8019, %r8016, %r8017, 19;
	mov.b64 	%rd12362, {%r8019, %r8018};
	shf.l.wrap.b32 	%r8020, %r8016, %r8017, 3;
	shf.l.wrap.b32 	%r8021, %r8017, %r8016, 3;
	mov.b64 	%rd12363, {%r8021, %r8020};
	shr.u64 	%rd12364, %rd21603, 6;
	xor.b64  	%rd12365, %rd12362, %rd12364;
	xor.b64  	%rd12366, %rd12365, %rd12363;
	shr.u64 	%rd12367, %rd21600, 7;
	shf.r.wrap.b32 	%r8022, %r7863, %r7862, 1;
	shf.r.wrap.b32 	%r8023, %r7862, %r7863, 1;
	mov.b64 	%rd12368, {%r8023, %r8022};
	xor.b64  	%rd12369, %rd12368, %rd12367;
	shf.r.wrap.b32 	%r8024, %r7863, %r7862, 8;
	shf.r.wrap.b32 	%r8025, %r7862, %r7863, 8;
	mov.b64 	%rd12370, {%r8025, %r8024};
	xor.b64  	%rd12371, %rd12369, %rd12370;
	add.s64 	%rd12372, %rd21623, %rd21601;
	add.s64 	%rd12373, %rd12372, %rd12366;
	add.s64 	%rd21601, %rd12373, %rd12371;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8026,%dummy}, %rd21602;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8027}, %rd21602;
	}
	shf.r.wrap.b32 	%r8028, %r8027, %r8026, 19;
	shf.r.wrap.b32 	%r8029, %r8026, %r8027, 19;
	mov.b64 	%rd12374, {%r8029, %r8028};
	shf.l.wrap.b32 	%r8030, %r8026, %r8027, 3;
	shf.l.wrap.b32 	%r8031, %r8027, %r8026, 3;
	mov.b64 	%rd12375, {%r8031, %r8030};
	shr.u64 	%rd12376, %rd21602, 6;
	xor.b64  	%rd12377, %rd12374, %rd12376;
	xor.b64  	%rd12378, %rd12377, %rd12375;
	shf.r.wrap.b32 	%r8032, %r7875, %r7874, 1;
	shf.r.wrap.b32 	%r8033, %r7874, %r7875, 1;
	mov.b64 	%rd12379, {%r8033, %r8032};
	shf.r.wrap.b32 	%r8034, %r7875, %r7874, 8;
	shf.r.wrap.b32 	%r8035, %r7874, %r7875, 8;
	mov.b64 	%rd12380, {%r8035, %r8034};
	shr.u64 	%rd12381, %rd21616, 7;
	xor.b64  	%rd12382, %rd12379, %rd12381;
	xor.b64  	%rd12383, %rd12382, %rd12380;
	add.s64 	%rd12384, %rd21607, %rd21600;
	add.s64 	%rd12385, %rd12384, %rd12378;
	add.s64 	%rd21600, %rd12385, %rd12383;
	mul.wide.s32 	%rd12386, %r14427, 8;
	add.s64 	%rd12388, %rd21333, %rd12386;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8036,%dummy}, %rd21612;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8037}, %rd21612;
	}
	shf.r.wrap.b32 	%r8038, %r8037, %r8036, 18;
	shf.r.wrap.b32 	%r8039, %r8036, %r8037, 18;
	mov.b64 	%rd12389, {%r8039, %r8038};
	shf.r.wrap.b32 	%r8040, %r8037, %r8036, 14;
	shf.r.wrap.b32 	%r8041, %r8036, %r8037, 14;
	mov.b64 	%rd12390, {%r8041, %r8040};
	xor.b64  	%rd12391, %rd12389, %rd12390;
	shf.l.wrap.b32 	%r8042, %r8036, %r8037, 23;
	shf.l.wrap.b32 	%r8043, %r8037, %r8036, 23;
	mov.b64 	%rd12392, {%r8043, %r8042};
	xor.b64  	%rd12393, %rd12391, %rd12392;
	xor.b64  	%rd12394, %rd21613, %rd21614;
	and.b64  	%rd12395, %rd12394, %rd21612;
	xor.b64  	%rd12396, %rd12395, %rd21614;
	add.s64 	%rd12397, %rd12396, %rd21615;
	add.s64 	%rd12398, %rd12397, %rd21616;
	ld.const.u64 	%rd12399, [%rd12388];
	add.s64 	%rd12400, %rd12398, %rd12399;
	add.s64 	%rd12401, %rd12400, %rd12393;
	add.s64 	%rd12402, %rd12401, %rd21611;
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8044}, %rd21608;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8045,%dummy}, %rd21608;
	}
	shf.l.wrap.b32 	%r8046, %r8045, %r8044, 30;
	shf.l.wrap.b32 	%r8047, %r8044, %r8045, 30;
	mov.b64 	%rd12403, {%r8047, %r8046};
	shf.r.wrap.b32 	%r8048, %r8044, %r8045, 28;
	shf.r.wrap.b32 	%r8049, %r8045, %r8044, 28;
	mov.b64 	%rd12404, {%r8049, %r8048};
	xor.b64  	%rd12405, %rd12403, %rd12404;
	shf.l.wrap.b32 	%r8050, %r8045, %r8044, 25;
	shf.l.wrap.b32 	%r8051, %r8044, %r8045, 25;
	mov.b64 	%rd12406, {%r8051, %r8050};
	xor.b64  	%rd12407, %rd12405, %rd12406;
	xor.b64  	%rd12408, %rd21608, %rd21609;
	xor.b64  	%rd12409, %rd21608, %rd21610;
	and.b64  	%rd12410, %rd12408, %rd12409;
	xor.b64  	%rd12411, %rd12410, %rd21608;
	add.s64 	%rd12412, %rd12401, %rd12411;
	add.s64 	%rd12413, %rd12412, %rd12407;
	add.s32 	%r8052, %r14427, 1;
	mul.wide.s32 	%rd12414, %r8052, 8;
	add.s64 	%rd12415, %rd21333, %rd12414;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8053,%dummy}, %rd12402;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8054}, %rd12402;
	}
	shf.r.wrap.b32 	%r8055, %r8054, %r8053, 14;
	shf.r.wrap.b32 	%r8056, %r8053, %r8054, 14;
	mov.b64 	%rd12416, {%r8056, %r8055};
	shf.r.wrap.b32 	%r8057, %r8054, %r8053, 18;
	shf.r.wrap.b32 	%r8058, %r8053, %r8054, 18;
	mov.b64 	%rd12417, {%r8058, %r8057};
	xor.b64  	%rd12418, %rd12417, %rd12416;
	shf.l.wrap.b32 	%r8059, %r8053, %r8054, 23;
	shf.l.wrap.b32 	%r8060, %r8054, %r8053, 23;
	mov.b64 	%rd12419, {%r8060, %r8059};
	xor.b64  	%rd12420, %rd12418, %rd12419;
	xor.b64  	%rd12421, %rd21612, %rd21613;
	and.b64  	%rd12422, %rd12402, %rd12421;
	xor.b64  	%rd12423, %rd12422, %rd21613;
	add.s64 	%rd12424, %rd21617, %rd21614;
	ld.const.u64 	%rd12425, [%rd12415];
	add.s64 	%rd12426, %rd12424, %rd12425;
	add.s64 	%rd12427, %rd12426, %rd12423;
	add.s64 	%rd12428, %rd12427, %rd12420;
	add.s64 	%rd12429, %rd12428, %rd21610;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8061,%dummy}, %rd12413;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8062}, %rd12413;
	}
	shf.r.wrap.b32 	%r8063, %r8062, %r8061, 28;
	shf.r.wrap.b32 	%r8064, %r8061, %r8062, 28;
	mov.b64 	%rd12430, {%r8064, %r8063};
	shf.l.wrap.b32 	%r8065, %r8061, %r8062, 30;
	shf.l.wrap.b32 	%r8066, %r8062, %r8061, 30;
	mov.b64 	%rd12431, {%r8066, %r8065};
	xor.b64  	%rd12432, %rd12431, %rd12430;
	shf.l.wrap.b32 	%r8067, %r8061, %r8062, 25;
	shf.l.wrap.b32 	%r8068, %r8062, %r8061, 25;
	mov.b64 	%rd12433, {%r8068, %r8067};
	xor.b64  	%rd12434, %rd12432, %rd12433;
	xor.b64  	%rd12435, %rd12413, %rd21609;
	xor.b64  	%rd12436, %rd12413, %rd21608;
	and.b64  	%rd12437, %rd12436, %rd12435;
	xor.b64  	%rd12438, %rd12437, %rd12413;
	add.s64 	%rd12439, %rd12428, %rd12438;
	add.s64 	%rd12440, %rd12439, %rd12434;
	add.s32 	%r8069, %r14427, 2;
	mul.wide.s32 	%rd12441, %r8069, 8;
	add.s64 	%rd12442, %rd21333, %rd12441;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8070,%dummy}, %rd12429;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8071}, %rd12429;
	}
	shf.r.wrap.b32 	%r8072, %r8071, %r8070, 14;
	shf.r.wrap.b32 	%r8073, %r8070, %r8071, 14;
	mov.b64 	%rd12443, {%r8073, %r8072};
	shf.r.wrap.b32 	%r8074, %r8071, %r8070, 18;
	shf.r.wrap.b32 	%r8075, %r8070, %r8071, 18;
	mov.b64 	%rd12444, {%r8075, %r8074};
	xor.b64  	%rd12445, %rd12444, %rd12443;
	shf.l.wrap.b32 	%r8076, %r8070, %r8071, 23;
	shf.l.wrap.b32 	%r8077, %r8071, %r8070, 23;
	mov.b64 	%rd12446, {%r8077, %r8076};
	xor.b64  	%rd12447, %rd12445, %rd12446;
	xor.b64  	%rd12448, %rd12402, %rd21612;
	and.b64  	%rd12449, %rd12429, %rd12448;
	xor.b64  	%rd12450, %rd12449, %rd21612;
	add.s64 	%rd12451, %rd21618, %rd21613;
	ld.const.u64 	%rd12452, [%rd12442];
	add.s64 	%rd12453, %rd12451, %rd12452;
	add.s64 	%rd12454, %rd12453, %rd12450;
	add.s64 	%rd12455, %rd12454, %rd12447;
	add.s64 	%rd12456, %rd12455, %rd21609;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8078,%dummy}, %rd12440;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8079}, %rd12440;
	}
	shf.r.wrap.b32 	%r8080, %r8079, %r8078, 28;
	shf.r.wrap.b32 	%r8081, %r8078, %r8079, 28;
	mov.b64 	%rd12457, {%r8081, %r8080};
	shf.l.wrap.b32 	%r8082, %r8078, %r8079, 30;
	shf.l.wrap.b32 	%r8083, %r8079, %r8078, 30;
	mov.b64 	%rd12458, {%r8083, %r8082};
	xor.b64  	%rd12459, %rd12458, %rd12457;
	shf.l.wrap.b32 	%r8084, %r8078, %r8079, 25;
	shf.l.wrap.b32 	%r8085, %r8079, %r8078, 25;
	mov.b64 	%rd12460, {%r8085, %r8084};
	xor.b64  	%rd12461, %rd12459, %rd12460;
	xor.b64  	%rd12462, %rd12440, %rd21608;
	xor.b64  	%rd12463, %rd12440, %rd12413;
	and.b64  	%rd12464, %rd12463, %rd12462;
	xor.b64  	%rd12465, %rd12464, %rd12440;
	add.s64 	%rd12466, %rd12455, %rd12465;
	add.s64 	%rd12467, %rd12466, %rd12461;
	add.s32 	%r8086, %r14427, 3;
	mul.wide.s32 	%rd12468, %r8086, 8;
	add.s64 	%rd12469, %rd21333, %rd12468;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8087,%dummy}, %rd12456;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8088}, %rd12456;
	}
	shf.r.wrap.b32 	%r8089, %r8088, %r8087, 14;
	shf.r.wrap.b32 	%r8090, %r8087, %r8088, 14;
	mov.b64 	%rd12470, {%r8090, %r8089};
	shf.r.wrap.b32 	%r8091, %r8088, %r8087, 18;
	shf.r.wrap.b32 	%r8092, %r8087, %r8088, 18;
	mov.b64 	%rd12471, {%r8092, %r8091};
	xor.b64  	%rd12472, %rd12471, %rd12470;
	shf.l.wrap.b32 	%r8093, %r8087, %r8088, 23;
	shf.l.wrap.b32 	%r8094, %r8088, %r8087, 23;
	mov.b64 	%rd12473, {%r8094, %r8093};
	xor.b64  	%rd12474, %rd12472, %rd12473;
	xor.b64  	%rd12475, %rd12429, %rd12402;
	and.b64  	%rd12476, %rd12456, %rd12475;
	xor.b64  	%rd12477, %rd12476, %rd12402;
	add.s64 	%rd12478, %rd21619, %rd21612;
	ld.const.u64 	%rd12479, [%rd12469];
	add.s64 	%rd12480, %rd12478, %rd12479;
	add.s64 	%rd12481, %rd12480, %rd12477;
	add.s64 	%rd12482, %rd12481, %rd12474;
	add.s64 	%rd12483, %rd12482, %rd21608;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8095,%dummy}, %rd12467;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8096}, %rd12467;
	}
	shf.r.wrap.b32 	%r8097, %r8096, %r8095, 28;
	shf.r.wrap.b32 	%r8098, %r8095, %r8096, 28;
	mov.b64 	%rd12484, {%r8098, %r8097};
	shf.l.wrap.b32 	%r8099, %r8095, %r8096, 30;
	shf.l.wrap.b32 	%r8100, %r8096, %r8095, 30;
	mov.b64 	%rd12485, {%r8100, %r8099};
	xor.b64  	%rd12486, %rd12485, %rd12484;
	shf.l.wrap.b32 	%r8101, %r8095, %r8096, 25;
	shf.l.wrap.b32 	%r8102, %r8096, %r8095, 25;
	mov.b64 	%rd12487, {%r8102, %r8101};
	xor.b64  	%rd12488, %rd12486, %rd12487;
	xor.b64  	%rd12489, %rd12467, %rd12413;
	xor.b64  	%rd12490, %rd12467, %rd12440;
	and.b64  	%rd12491, %rd12490, %rd12489;
	xor.b64  	%rd12492, %rd12491, %rd12467;
	add.s64 	%rd12493, %rd12482, %rd12492;
	add.s64 	%rd12494, %rd12493, %rd12488;
	add.s32 	%r8103, %r14427, 4;
	mul.wide.s32 	%rd12495, %r8103, 8;
	add.s64 	%rd12496, %rd21333, %rd12495;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8104,%dummy}, %rd12483;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8105}, %rd12483;
	}
	shf.r.wrap.b32 	%r8106, %r8105, %r8104, 14;
	shf.r.wrap.b32 	%r8107, %r8104, %r8105, 14;
	mov.b64 	%rd12497, {%r8107, %r8106};
	shf.r.wrap.b32 	%r8108, %r8105, %r8104, 18;
	shf.r.wrap.b32 	%r8109, %r8104, %r8105, 18;
	mov.b64 	%rd12498, {%r8109, %r8108};
	xor.b64  	%rd12499, %rd12498, %rd12497;
	shf.l.wrap.b32 	%r8110, %r8104, %r8105, 23;
	shf.l.wrap.b32 	%r8111, %r8105, %r8104, 23;
	mov.b64 	%rd12500, {%r8111, %r8110};
	xor.b64  	%rd12501, %rd12499, %rd12500;
	xor.b64  	%rd12502, %rd12456, %rd12429;
	and.b64  	%rd12503, %rd12483, %rd12502;
	xor.b64  	%rd12504, %rd12503, %rd12429;
	add.s64 	%rd12505, %rd12402, %rd21620;
	ld.const.u64 	%rd12506, [%rd12496];
	add.s64 	%rd12507, %rd12505, %rd12506;
	add.s64 	%rd12508, %rd12507, %rd12504;
	add.s64 	%rd12509, %rd12508, %rd12501;
	add.s64 	%rd12510, %rd12509, %rd12413;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8112,%dummy}, %rd12494;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8113}, %rd12494;
	}
	shf.r.wrap.b32 	%r8114, %r8113, %r8112, 28;
	shf.r.wrap.b32 	%r8115, %r8112, %r8113, 28;
	mov.b64 	%rd12511, {%r8115, %r8114};
	shf.l.wrap.b32 	%r8116, %r8112, %r8113, 30;
	shf.l.wrap.b32 	%r8117, %r8113, %r8112, 30;
	mov.b64 	%rd12512, {%r8117, %r8116};
	xor.b64  	%rd12513, %rd12512, %rd12511;
	shf.l.wrap.b32 	%r8118, %r8112, %r8113, 25;
	shf.l.wrap.b32 	%r8119, %r8113, %r8112, 25;
	mov.b64 	%rd12514, {%r8119, %r8118};
	xor.b64  	%rd12515, %rd12513, %rd12514;
	xor.b64  	%rd12516, %rd12494, %rd12440;
	xor.b64  	%rd12517, %rd12494, %rd12467;
	and.b64  	%rd12518, %rd12517, %rd12516;
	xor.b64  	%rd12519, %rd12518, %rd12494;
	add.s64 	%rd12520, %rd12509, %rd12519;
	add.s64 	%rd12521, %rd12520, %rd12515;
	add.s32 	%r8120, %r14427, 5;
	mul.wide.s32 	%rd12522, %r8120, 8;
	add.s64 	%rd12523, %rd21333, %rd12522;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8121,%dummy}, %rd12510;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8122}, %rd12510;
	}
	shf.r.wrap.b32 	%r8123, %r8122, %r8121, 14;
	shf.r.wrap.b32 	%r8124, %r8121, %r8122, 14;
	mov.b64 	%rd12524, {%r8124, %r8123};
	shf.r.wrap.b32 	%r8125, %r8122, %r8121, 18;
	shf.r.wrap.b32 	%r8126, %r8121, %r8122, 18;
	mov.b64 	%rd12525, {%r8126, %r8125};
	xor.b64  	%rd12526, %rd12525, %rd12524;
	shf.l.wrap.b32 	%r8127, %r8121, %r8122, 23;
	shf.l.wrap.b32 	%r8128, %r8122, %r8121, 23;
	mov.b64 	%rd12527, {%r8128, %r8127};
	xor.b64  	%rd12528, %rd12526, %rd12527;
	xor.b64  	%rd12529, %rd12483, %rd12456;
	and.b64  	%rd12530, %rd12510, %rd12529;
	xor.b64  	%rd12531, %rd12530, %rd12456;
	add.s64 	%rd12532, %rd12429, %rd21621;
	ld.const.u64 	%rd12533, [%rd12523];
	add.s64 	%rd12534, %rd12532, %rd12533;
	add.s64 	%rd12535, %rd12534, %rd12531;
	add.s64 	%rd12536, %rd12535, %rd12528;
	add.s64 	%rd12537, %rd12536, %rd12440;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8129,%dummy}, %rd12521;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8130}, %rd12521;
	}
	shf.r.wrap.b32 	%r8131, %r8130, %r8129, 28;
	shf.r.wrap.b32 	%r8132, %r8129, %r8130, 28;
	mov.b64 	%rd12538, {%r8132, %r8131};
	shf.l.wrap.b32 	%r8133, %r8129, %r8130, 30;
	shf.l.wrap.b32 	%r8134, %r8130, %r8129, 30;
	mov.b64 	%rd12539, {%r8134, %r8133};
	xor.b64  	%rd12540, %rd12539, %rd12538;
	shf.l.wrap.b32 	%r8135, %r8129, %r8130, 25;
	shf.l.wrap.b32 	%r8136, %r8130, %r8129, 25;
	mov.b64 	%rd12541, {%r8136, %r8135};
	xor.b64  	%rd12542, %rd12540, %rd12541;
	xor.b64  	%rd12543, %rd12521, %rd12467;
	xor.b64  	%rd12544, %rd12521, %rd12494;
	and.b64  	%rd12545, %rd12544, %rd12543;
	xor.b64  	%rd12546, %rd12545, %rd12521;
	add.s64 	%rd12547, %rd12536, %rd12546;
	add.s64 	%rd12548, %rd12547, %rd12542;
	add.s32 	%r8137, %r14427, 6;
	mul.wide.s32 	%rd12549, %r8137, 8;
	add.s64 	%rd12550, %rd21333, %rd12549;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8138,%dummy}, %rd12537;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8139}, %rd12537;
	}
	shf.r.wrap.b32 	%r8140, %r8139, %r8138, 14;
	shf.r.wrap.b32 	%r8141, %r8138, %r8139, 14;
	mov.b64 	%rd12551, {%r8141, %r8140};
	shf.r.wrap.b32 	%r8142, %r8139, %r8138, 18;
	shf.r.wrap.b32 	%r8143, %r8138, %r8139, 18;
	mov.b64 	%rd12552, {%r8143, %r8142};
	xor.b64  	%rd12553, %rd12552, %rd12551;
	shf.l.wrap.b32 	%r8144, %r8138, %r8139, 23;
	shf.l.wrap.b32 	%r8145, %r8139, %r8138, 23;
	mov.b64 	%rd12554, {%r8145, %r8144};
	xor.b64  	%rd12555, %rd12553, %rd12554;
	xor.b64  	%rd12556, %rd12510, %rd12483;
	and.b64  	%rd12557, %rd12537, %rd12556;
	xor.b64  	%rd12558, %rd12557, %rd12483;
	add.s64 	%rd12559, %rd12456, %rd21622;
	ld.const.u64 	%rd12560, [%rd12550];
	add.s64 	%rd12561, %rd12559, %rd12560;
	add.s64 	%rd12562, %rd12561, %rd12558;
	add.s64 	%rd12563, %rd12562, %rd12555;
	add.s64 	%rd12564, %rd12563, %rd12467;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8146,%dummy}, %rd12548;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8147}, %rd12548;
	}
	shf.r.wrap.b32 	%r8148, %r8147, %r8146, 28;
	shf.r.wrap.b32 	%r8149, %r8146, %r8147, 28;
	mov.b64 	%rd12565, {%r8149, %r8148};
	shf.l.wrap.b32 	%r8150, %r8146, %r8147, 30;
	shf.l.wrap.b32 	%r8151, %r8147, %r8146, 30;
	mov.b64 	%rd12566, {%r8151, %r8150};
	xor.b64  	%rd12567, %rd12566, %rd12565;
	shf.l.wrap.b32 	%r8152, %r8146, %r8147, 25;
	shf.l.wrap.b32 	%r8153, %r8147, %r8146, 25;
	mov.b64 	%rd12568, {%r8153, %r8152};
	xor.b64  	%rd12569, %rd12567, %rd12568;
	xor.b64  	%rd12570, %rd12548, %rd12494;
	xor.b64  	%rd12571, %rd12548, %rd12521;
	and.b64  	%rd12572, %rd12571, %rd12570;
	xor.b64  	%rd12573, %rd12572, %rd12548;
	add.s64 	%rd12574, %rd12563, %rd12573;
	add.s64 	%rd12575, %rd12574, %rd12569;
	add.s32 	%r8154, %r14427, 7;
	mul.wide.s32 	%rd12576, %r8154, 8;
	add.s64 	%rd12577, %rd21333, %rd12576;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8155,%dummy}, %rd12564;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8156}, %rd12564;
	}
	shf.r.wrap.b32 	%r8157, %r8156, %r8155, 14;
	shf.r.wrap.b32 	%r8158, %r8155, %r8156, 14;
	mov.b64 	%rd12578, {%r8158, %r8157};
	shf.r.wrap.b32 	%r8159, %r8156, %r8155, 18;
	shf.r.wrap.b32 	%r8160, %r8155, %r8156, 18;
	mov.b64 	%rd12579, {%r8160, %r8159};
	xor.b64  	%rd12580, %rd12579, %rd12578;
	shf.l.wrap.b32 	%r8161, %r8155, %r8156, 23;
	shf.l.wrap.b32 	%r8162, %r8156, %r8155, 23;
	mov.b64 	%rd12581, {%r8162, %r8161};
	xor.b64  	%rd12582, %rd12580, %rd12581;
	xor.b64  	%rd12583, %rd12537, %rd12510;
	and.b64  	%rd12584, %rd12564, %rd12583;
	xor.b64  	%rd12585, %rd12584, %rd12510;
	add.s64 	%rd12586, %rd12483, %rd21623;
	ld.const.u64 	%rd12587, [%rd12577];
	add.s64 	%rd12588, %rd12586, %rd12587;
	add.s64 	%rd12589, %rd12588, %rd12585;
	add.s64 	%rd12590, %rd12589, %rd12582;
	add.s64 	%rd12591, %rd12590, %rd12494;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8163,%dummy}, %rd12575;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8164}, %rd12575;
	}
	shf.r.wrap.b32 	%r8165, %r8164, %r8163, 28;
	shf.r.wrap.b32 	%r8166, %r8163, %r8164, 28;
	mov.b64 	%rd12592, {%r8166, %r8165};
	shf.l.wrap.b32 	%r8167, %r8163, %r8164, 30;
	shf.l.wrap.b32 	%r8168, %r8164, %r8163, 30;
	mov.b64 	%rd12593, {%r8168, %r8167};
	xor.b64  	%rd12594, %rd12593, %rd12592;
	shf.l.wrap.b32 	%r8169, %r8163, %r8164, 25;
	shf.l.wrap.b32 	%r8170, %r8164, %r8163, 25;
	mov.b64 	%rd12595, {%r8170, %r8169};
	xor.b64  	%rd12596, %rd12594, %rd12595;
	xor.b64  	%rd12597, %rd12575, %rd12521;
	xor.b64  	%rd12598, %rd12575, %rd12548;
	and.b64  	%rd12599, %rd12598, %rd12597;
	xor.b64  	%rd12600, %rd12599, %rd12575;
	add.s64 	%rd12601, %rd12590, %rd12600;
	add.s64 	%rd12602, %rd12601, %rd12596;
	add.s32 	%r8171, %r14427, 8;
	mul.wide.s32 	%rd12603, %r8171, 8;
	add.s64 	%rd12604, %rd21333, %rd12603;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8172,%dummy}, %rd12591;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8173}, %rd12591;
	}
	shf.r.wrap.b32 	%r8174, %r8173, %r8172, 14;
	shf.r.wrap.b32 	%r8175, %r8172, %r8173, 14;
	mov.b64 	%rd12605, {%r8175, %r8174};
	shf.r.wrap.b32 	%r8176, %r8173, %r8172, 18;
	shf.r.wrap.b32 	%r8177, %r8172, %r8173, 18;
	mov.b64 	%rd12606, {%r8177, %r8176};
	xor.b64  	%rd12607, %rd12606, %rd12605;
	shf.l.wrap.b32 	%r8178, %r8172, %r8173, 23;
	shf.l.wrap.b32 	%r8179, %r8173, %r8172, 23;
	mov.b64 	%rd12608, {%r8179, %r8178};
	xor.b64  	%rd12609, %rd12607, %rd12608;
	xor.b64  	%rd12610, %rd12564, %rd12537;
	and.b64  	%rd12611, %rd12591, %rd12610;
	xor.b64  	%rd12612, %rd12611, %rd12537;
	add.s64 	%rd12613, %rd12510, %rd21607;
	ld.const.u64 	%rd12614, [%rd12604];
	add.s64 	%rd12615, %rd12613, %rd12614;
	add.s64 	%rd12616, %rd12615, %rd12612;
	add.s64 	%rd12617, %rd12616, %rd12609;
	add.s64 	%rd12618, %rd12617, %rd12521;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8180,%dummy}, %rd12602;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8181}, %rd12602;
	}
	shf.r.wrap.b32 	%r8182, %r8181, %r8180, 28;
	shf.r.wrap.b32 	%r8183, %r8180, %r8181, 28;
	mov.b64 	%rd12619, {%r8183, %r8182};
	shf.l.wrap.b32 	%r8184, %r8180, %r8181, 30;
	shf.l.wrap.b32 	%r8185, %r8181, %r8180, 30;
	mov.b64 	%rd12620, {%r8185, %r8184};
	xor.b64  	%rd12621, %rd12620, %rd12619;
	shf.l.wrap.b32 	%r8186, %r8180, %r8181, 25;
	shf.l.wrap.b32 	%r8187, %r8181, %r8180, 25;
	mov.b64 	%rd12622, {%r8187, %r8186};
	xor.b64  	%rd12623, %rd12621, %rd12622;
	xor.b64  	%rd12624, %rd12602, %rd12548;
	xor.b64  	%rd12625, %rd12602, %rd12575;
	and.b64  	%rd12626, %rd12625, %rd12624;
	xor.b64  	%rd12627, %rd12626, %rd12602;
	add.s64 	%rd12628, %rd12617, %rd12627;
	add.s64 	%rd12629, %rd12628, %rd12623;
	add.s32 	%r8188, %r14427, 9;
	mul.wide.s32 	%rd12630, %r8188, 8;
	add.s64 	%rd12631, %rd21333, %rd12630;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8189,%dummy}, %rd12618;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8190}, %rd12618;
	}
	shf.r.wrap.b32 	%r8191, %r8190, %r8189, 14;
	shf.r.wrap.b32 	%r8192, %r8189, %r8190, 14;
	mov.b64 	%rd12632, {%r8192, %r8191};
	shf.r.wrap.b32 	%r8193, %r8190, %r8189, 18;
	shf.r.wrap.b32 	%r8194, %r8189, %r8190, 18;
	mov.b64 	%rd12633, {%r8194, %r8193};
	xor.b64  	%rd12634, %rd12633, %rd12632;
	shf.l.wrap.b32 	%r8195, %r8189, %r8190, 23;
	shf.l.wrap.b32 	%r8196, %r8190, %r8189, 23;
	mov.b64 	%rd12635, {%r8196, %r8195};
	xor.b64  	%rd12636, %rd12634, %rd12635;
	xor.b64  	%rd12637, %rd12591, %rd12564;
	and.b64  	%rd12638, %rd12618, %rd12637;
	xor.b64  	%rd12639, %rd12638, %rd12564;
	add.s64 	%rd12640, %rd12537, %rd21606;
	ld.const.u64 	%rd12641, [%rd12631];
	add.s64 	%rd12642, %rd12640, %rd12641;
	add.s64 	%rd12643, %rd12642, %rd12639;
	add.s64 	%rd12644, %rd12643, %rd12636;
	add.s64 	%rd12645, %rd12644, %rd12548;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8197,%dummy}, %rd12629;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8198}, %rd12629;
	}
	shf.r.wrap.b32 	%r8199, %r8198, %r8197, 28;
	shf.r.wrap.b32 	%r8200, %r8197, %r8198, 28;
	mov.b64 	%rd12646, {%r8200, %r8199};
	shf.l.wrap.b32 	%r8201, %r8197, %r8198, 30;
	shf.l.wrap.b32 	%r8202, %r8198, %r8197, 30;
	mov.b64 	%rd12647, {%r8202, %r8201};
	xor.b64  	%rd12648, %rd12647, %rd12646;
	shf.l.wrap.b32 	%r8203, %r8197, %r8198, 25;
	shf.l.wrap.b32 	%r8204, %r8198, %r8197, 25;
	mov.b64 	%rd12649, {%r8204, %r8203};
	xor.b64  	%rd12650, %rd12648, %rd12649;
	xor.b64  	%rd12651, %rd12629, %rd12575;
	xor.b64  	%rd12652, %rd12629, %rd12602;
	and.b64  	%rd12653, %rd12652, %rd12651;
	xor.b64  	%rd12654, %rd12653, %rd12629;
	add.s64 	%rd12655, %rd12644, %rd12654;
	add.s64 	%rd12656, %rd12655, %rd12650;
	add.s32 	%r8205, %r14427, 10;
	mul.wide.s32 	%rd12657, %r8205, 8;
	add.s64 	%rd12658, %rd21333, %rd12657;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8206,%dummy}, %rd12645;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8207}, %rd12645;
	}
	shf.r.wrap.b32 	%r8208, %r8207, %r8206, 14;
	shf.r.wrap.b32 	%r8209, %r8206, %r8207, 14;
	mov.b64 	%rd12659, {%r8209, %r8208};
	shf.r.wrap.b32 	%r8210, %r8207, %r8206, 18;
	shf.r.wrap.b32 	%r8211, %r8206, %r8207, 18;
	mov.b64 	%rd12660, {%r8211, %r8210};
	xor.b64  	%rd12661, %rd12660, %rd12659;
	shf.l.wrap.b32 	%r8212, %r8206, %r8207, 23;
	shf.l.wrap.b32 	%r8213, %r8207, %r8206, 23;
	mov.b64 	%rd12662, {%r8213, %r8212};
	xor.b64  	%rd12663, %rd12661, %rd12662;
	xor.b64  	%rd12664, %rd12618, %rd12591;
	and.b64  	%rd12665, %rd12645, %rd12664;
	xor.b64  	%rd12666, %rd12665, %rd12591;
	add.s64 	%rd12667, %rd12564, %rd21605;
	ld.const.u64 	%rd12668, [%rd12658];
	add.s64 	%rd12669, %rd12667, %rd12668;
	add.s64 	%rd12670, %rd12669, %rd12666;
	add.s64 	%rd12671, %rd12670, %rd12663;
	add.s64 	%rd12672, %rd12671, %rd12575;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8214,%dummy}, %rd12656;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8215}, %rd12656;
	}
	shf.r.wrap.b32 	%r8216, %r8215, %r8214, 28;
	shf.r.wrap.b32 	%r8217, %r8214, %r8215, 28;
	mov.b64 	%rd12673, {%r8217, %r8216};
	shf.l.wrap.b32 	%r8218, %r8214, %r8215, 30;
	shf.l.wrap.b32 	%r8219, %r8215, %r8214, 30;
	mov.b64 	%rd12674, {%r8219, %r8218};
	xor.b64  	%rd12675, %rd12674, %rd12673;
	shf.l.wrap.b32 	%r8220, %r8214, %r8215, 25;
	shf.l.wrap.b32 	%r8221, %r8215, %r8214, 25;
	mov.b64 	%rd12676, {%r8221, %r8220};
	xor.b64  	%rd12677, %rd12675, %rd12676;
	xor.b64  	%rd12678, %rd12656, %rd12602;
	xor.b64  	%rd12679, %rd12656, %rd12629;
	and.b64  	%rd12680, %rd12679, %rd12678;
	xor.b64  	%rd12681, %rd12680, %rd12656;
	add.s64 	%rd12682, %rd12671, %rd12681;
	add.s64 	%rd12683, %rd12682, %rd12677;
	add.s32 	%r8222, %r14427, 11;
	mul.wide.s32 	%rd12684, %r8222, 8;
	add.s64 	%rd12685, %rd21333, %rd12684;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8223,%dummy}, %rd12672;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8224}, %rd12672;
	}
	shf.r.wrap.b32 	%r8225, %r8224, %r8223, 14;
	shf.r.wrap.b32 	%r8226, %r8223, %r8224, 14;
	mov.b64 	%rd12686, {%r8226, %r8225};
	shf.r.wrap.b32 	%r8227, %r8224, %r8223, 18;
	shf.r.wrap.b32 	%r8228, %r8223, %r8224, 18;
	mov.b64 	%rd12687, {%r8228, %r8227};
	xor.b64  	%rd12688, %rd12687, %rd12686;
	shf.l.wrap.b32 	%r8229, %r8223, %r8224, 23;
	shf.l.wrap.b32 	%r8230, %r8224, %r8223, 23;
	mov.b64 	%rd12689, {%r8230, %r8229};
	xor.b64  	%rd12690, %rd12688, %rd12689;
	xor.b64  	%rd12691, %rd12645, %rd12618;
	and.b64  	%rd12692, %rd12672, %rd12691;
	xor.b64  	%rd12693, %rd12692, %rd12618;
	add.s64 	%rd12694, %rd12591, %rd21604;
	ld.const.u64 	%rd12695, [%rd12685];
	add.s64 	%rd12696, %rd12694, %rd12695;
	add.s64 	%rd12697, %rd12696, %rd12693;
	add.s64 	%rd12698, %rd12697, %rd12690;
	add.s64 	%rd12699, %rd12698, %rd12602;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8231,%dummy}, %rd12683;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8232}, %rd12683;
	}
	shf.r.wrap.b32 	%r8233, %r8232, %r8231, 28;
	shf.r.wrap.b32 	%r8234, %r8231, %r8232, 28;
	mov.b64 	%rd12700, {%r8234, %r8233};
	shf.l.wrap.b32 	%r8235, %r8231, %r8232, 30;
	shf.l.wrap.b32 	%r8236, %r8232, %r8231, 30;
	mov.b64 	%rd12701, {%r8236, %r8235};
	xor.b64  	%rd12702, %rd12701, %rd12700;
	shf.l.wrap.b32 	%r8237, %r8231, %r8232, 25;
	shf.l.wrap.b32 	%r8238, %r8232, %r8231, 25;
	mov.b64 	%rd12703, {%r8238, %r8237};
	xor.b64  	%rd12704, %rd12702, %rd12703;
	xor.b64  	%rd12705, %rd12683, %rd12629;
	xor.b64  	%rd12706, %rd12683, %rd12656;
	and.b64  	%rd12707, %rd12706, %rd12705;
	xor.b64  	%rd12708, %rd12707, %rd12683;
	add.s64 	%rd12709, %rd12698, %rd12708;
	add.s64 	%rd12710, %rd12709, %rd12704;
	add.s32 	%r8239, %r14427, 12;
	mul.wide.s32 	%rd12711, %r8239, 8;
	add.s64 	%rd12712, %rd21333, %rd12711;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8240,%dummy}, %rd12699;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8241}, %rd12699;
	}
	shf.r.wrap.b32 	%r8242, %r8241, %r8240, 14;
	shf.r.wrap.b32 	%r8243, %r8240, %r8241, 14;
	mov.b64 	%rd12713, {%r8243, %r8242};
	shf.r.wrap.b32 	%r8244, %r8241, %r8240, 18;
	shf.r.wrap.b32 	%r8245, %r8240, %r8241, 18;
	mov.b64 	%rd12714, {%r8245, %r8244};
	xor.b64  	%rd12715, %rd12714, %rd12713;
	shf.l.wrap.b32 	%r8246, %r8240, %r8241, 23;
	shf.l.wrap.b32 	%r8247, %r8241, %r8240, 23;
	mov.b64 	%rd12716, {%r8247, %r8246};
	xor.b64  	%rd12717, %rd12715, %rd12716;
	xor.b64  	%rd12718, %rd12672, %rd12645;
	and.b64  	%rd12719, %rd12699, %rd12718;
	xor.b64  	%rd12720, %rd12719, %rd12645;
	add.s64 	%rd12721, %rd12618, %rd21603;
	ld.const.u64 	%rd12722, [%rd12712];
	add.s64 	%rd12723, %rd12721, %rd12722;
	add.s64 	%rd12724, %rd12723, %rd12720;
	add.s64 	%rd12725, %rd12724, %rd12717;
	add.s64 	%rd21615, %rd12725, %rd12629;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8248,%dummy}, %rd12710;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8249}, %rd12710;
	}
	shf.r.wrap.b32 	%r8250, %r8249, %r8248, 28;
	shf.r.wrap.b32 	%r8251, %r8248, %r8249, 28;
	mov.b64 	%rd12726, {%r8251, %r8250};
	shf.l.wrap.b32 	%r8252, %r8248, %r8249, 30;
	shf.l.wrap.b32 	%r8253, %r8249, %r8248, 30;
	mov.b64 	%rd12727, {%r8253, %r8252};
	xor.b64  	%rd12728, %rd12727, %rd12726;
	shf.l.wrap.b32 	%r8254, %r8248, %r8249, 25;
	shf.l.wrap.b32 	%r8255, %r8249, %r8248, 25;
	mov.b64 	%rd12729, {%r8255, %r8254};
	xor.b64  	%rd12730, %rd12728, %rd12729;
	xor.b64  	%rd12731, %rd12710, %rd12656;
	xor.b64  	%rd12732, %rd12710, %rd12683;
	and.b64  	%rd12733, %rd12732, %rd12731;
	xor.b64  	%rd12734, %rd12733, %rd12710;
	add.s64 	%rd12735, %rd12725, %rd12734;
	add.s64 	%rd21611, %rd12735, %rd12730;
	add.s32 	%r8256, %r14427, 13;
	mul.wide.s32 	%rd12736, %r8256, 8;
	add.s64 	%rd12737, %rd21333, %rd12736;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8257,%dummy}, %rd21615;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8258}, %rd21615;
	}
	shf.r.wrap.b32 	%r8259, %r8258, %r8257, 14;
	shf.r.wrap.b32 	%r8260, %r8257, %r8258, 14;
	mov.b64 	%rd12738, {%r8260, %r8259};
	shf.r.wrap.b32 	%r8261, %r8258, %r8257, 18;
	shf.r.wrap.b32 	%r8262, %r8257, %r8258, 18;
	mov.b64 	%rd12739, {%r8262, %r8261};
	xor.b64  	%rd12740, %rd12739, %rd12738;
	shf.l.wrap.b32 	%r8263, %r8257, %r8258, 23;
	shf.l.wrap.b32 	%r8264, %r8258, %r8257, 23;
	mov.b64 	%rd12741, {%r8264, %r8263};
	xor.b64  	%rd12742, %rd12740, %rd12741;
	xor.b64  	%rd12743, %rd12699, %rd12672;
	and.b64  	%rd12744, %rd21615, %rd12743;
	xor.b64  	%rd12745, %rd12744, %rd12672;
	add.s64 	%rd12746, %rd12645, %rd21602;
	ld.const.u64 	%rd12747, [%rd12737];
	add.s64 	%rd12748, %rd12746, %rd12747;
	add.s64 	%rd12749, %rd12748, %rd12745;
	add.s64 	%rd12750, %rd12749, %rd12742;
	add.s64 	%rd21614, %rd12750, %rd12656;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8265,%dummy}, %rd21611;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8266}, %rd21611;
	}
	shf.r.wrap.b32 	%r8267, %r8266, %r8265, 28;
	shf.r.wrap.b32 	%r8268, %r8265, %r8266, 28;
	mov.b64 	%rd12751, {%r8268, %r8267};
	shf.l.wrap.b32 	%r8269, %r8265, %r8266, 30;
	shf.l.wrap.b32 	%r8270, %r8266, %r8265, 30;
	mov.b64 	%rd12752, {%r8270, %r8269};
	xor.b64  	%rd12753, %rd12752, %rd12751;
	shf.l.wrap.b32 	%r8271, %r8265, %r8266, 25;
	shf.l.wrap.b32 	%r8272, %r8266, %r8265, 25;
	mov.b64 	%rd12754, {%r8272, %r8271};
	xor.b64  	%rd12755, %rd12753, %rd12754;
	xor.b64  	%rd12756, %rd21611, %rd12683;
	xor.b64  	%rd12757, %rd21611, %rd12710;
	and.b64  	%rd12758, %rd12757, %rd12756;
	xor.b64  	%rd12759, %rd12758, %rd21611;
	add.s64 	%rd12760, %rd12750, %rd12759;
	add.s64 	%rd21610, %rd12760, %rd12755;
	add.s32 	%r8273, %r14427, 14;
	mul.wide.s32 	%rd12761, %r8273, 8;
	add.s64 	%rd12762, %rd21333, %rd12761;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8274,%dummy}, %rd21614;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8275}, %rd21614;
	}
	shf.r.wrap.b32 	%r8276, %r8275, %r8274, 14;
	shf.r.wrap.b32 	%r8277, %r8274, %r8275, 14;
	mov.b64 	%rd12763, {%r8277, %r8276};
	shf.r.wrap.b32 	%r8278, %r8275, %r8274, 18;
	shf.r.wrap.b32 	%r8279, %r8274, %r8275, 18;
	mov.b64 	%rd12764, {%r8279, %r8278};
	xor.b64  	%rd12765, %rd12764, %rd12763;
	shf.l.wrap.b32 	%r8280, %r8274, %r8275, 23;
	shf.l.wrap.b32 	%r8281, %r8275, %r8274, 23;
	mov.b64 	%rd12766, {%r8281, %r8280};
	xor.b64  	%rd12767, %rd12765, %rd12766;
	xor.b64  	%rd12768, %rd21615, %rd12699;
	and.b64  	%rd12769, %rd21614, %rd12768;
	xor.b64  	%rd12770, %rd12769, %rd12699;
	add.s64 	%rd12771, %rd12672, %rd21601;
	ld.const.u64 	%rd12772, [%rd12762];
	add.s64 	%rd12773, %rd12771, %rd12772;
	add.s64 	%rd12774, %rd12773, %rd12770;
	add.s64 	%rd12775, %rd12774, %rd12767;
	add.s64 	%rd21613, %rd12775, %rd12683;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8282,%dummy}, %rd21610;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8283}, %rd21610;
	}
	shf.r.wrap.b32 	%r8284, %r8283, %r8282, 28;
	shf.r.wrap.b32 	%r8285, %r8282, %r8283, 28;
	mov.b64 	%rd12776, {%r8285, %r8284};
	shf.l.wrap.b32 	%r8286, %r8282, %r8283, 30;
	shf.l.wrap.b32 	%r8287, %r8283, %r8282, 30;
	mov.b64 	%rd12777, {%r8287, %r8286};
	xor.b64  	%rd12778, %rd12777, %rd12776;
	shf.l.wrap.b32 	%r8288, %r8282, %r8283, 25;
	shf.l.wrap.b32 	%r8289, %r8283, %r8282, 25;
	mov.b64 	%rd12779, {%r8289, %r8288};
	xor.b64  	%rd12780, %rd12778, %rd12779;
	xor.b64  	%rd12781, %rd21610, %rd12710;
	xor.b64  	%rd12782, %rd21610, %rd21611;
	and.b64  	%rd12783, %rd12782, %rd12781;
	xor.b64  	%rd12784, %rd12783, %rd21610;
	add.s64 	%rd12785, %rd12775, %rd12784;
	add.s64 	%rd21609, %rd12785, %rd12780;
	add.s32 	%r8290, %r14427, 15;
	mul.wide.s32 	%rd12786, %r8290, 8;
	add.s64 	%rd12787, %rd21333, %rd12786;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8291,%dummy}, %rd21613;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8292}, %rd21613;
	}
	shf.r.wrap.b32 	%r8293, %r8292, %r8291, 14;
	shf.r.wrap.b32 	%r8294, %r8291, %r8292, 14;
	mov.b64 	%rd12788, {%r8294, %r8293};
	shf.r.wrap.b32 	%r8295, %r8292, %r8291, 18;
	shf.r.wrap.b32 	%r8296, %r8291, %r8292, 18;
	mov.b64 	%rd12789, {%r8296, %r8295};
	xor.b64  	%rd12790, %rd12789, %rd12788;
	shf.l.wrap.b32 	%r8297, %r8291, %r8292, 23;
	shf.l.wrap.b32 	%r8298, %r8292, %r8291, 23;
	mov.b64 	%rd12791, {%r8298, %r8297};
	xor.b64  	%rd12792, %rd12790, %rd12791;
	xor.b64  	%rd12793, %rd21614, %rd21615;
	and.b64  	%rd12794, %rd21613, %rd12793;
	xor.b64  	%rd12795, %rd12794, %rd21615;
	add.s64 	%rd12796, %rd12699, %rd21600;
	ld.const.u64 	%rd12797, [%rd12787];
	add.s64 	%rd12798, %rd12796, %rd12797;
	add.s64 	%rd12799, %rd12798, %rd12795;
	add.s64 	%rd12800, %rd12799, %rd12792;
	add.s64 	%rd21612, %rd12800, %rd12710;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8299,%dummy}, %rd21609;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8300}, %rd21609;
	}
	shf.r.wrap.b32 	%r8301, %r8300, %r8299, 28;
	shf.r.wrap.b32 	%r8302, %r8299, %r8300, 28;
	mov.b64 	%rd12801, {%r8302, %r8301};
	shf.l.wrap.b32 	%r8303, %r8299, %r8300, 30;
	shf.l.wrap.b32 	%r8304, %r8300, %r8299, 30;
	mov.b64 	%rd12802, {%r8304, %r8303};
	xor.b64  	%rd12803, %rd12802, %rd12801;
	shf.l.wrap.b32 	%r8305, %r8299, %r8300, 25;
	shf.l.wrap.b32 	%r8306, %r8300, %r8299, 25;
	mov.b64 	%rd12804, {%r8306, %r8305};
	xor.b64  	%rd12805, %rd12803, %rd12804;
	xor.b64  	%rd12806, %rd21609, %rd21611;
	xor.b64  	%rd12807, %rd21609, %rd21610;
	and.b64  	%rd12808, %rd12807, %rd12806;
	xor.b64  	%rd12809, %rd12808, %rd21609;
	add.s64 	%rd12810, %rd12800, %rd12809;
	add.s64 	%rd21608, %rd12810, %rd12805;
	add.s32 	%r14427, %r14427, 16;
	setp.lt.s32	%p137, %r14427, 80;
	@%p137 bra 	BB3_215;

	sub.s32 	%r14290, %r2861, %r260;
	add.s64 	%rd12811, %rd938, %rd21608;
	st.local.u64 	[%rd1], %rd12811;
	add.s64 	%rd12812, %rd940, %rd21609;
	st.local.u64 	[%rd1+8], %rd12812;
	add.s64 	%rd12813, %rd939, %rd21610;
	st.local.u64 	[%rd1+16], %rd12813;
	add.s64 	%rd12814, %rd937, %rd21611;
	st.local.u64 	[%rd1+24], %rd12814;
	add.s64 	%rd12815, %rd933, %rd21612;
	st.local.u64 	[%rd1+32], %rd12815;
	add.s64 	%rd12816, %rd935, %rd21613;
	st.local.u64 	[%rd1+40], %rd12816;
	add.s64 	%rd12817, %rd934, %rd21614;
	st.local.u64 	[%rd1+48], %rd12817;
	add.s64 	%rd12818, %rd936, %rd21615;
	st.local.u64 	[%rd1+56], %rd12818;
	sub.s32 	%r310, %r2, %r14290;
	setp.lt.s32	%p138, %r310, 1;
	@%p138 bra 	BB3_234;

	add.s32 	%r8308, %r259, %r256;
	and.b32  	%r311, %r8308, 3;
	setp.eq.s32	%p139, %r311, 0;
	mov.u32 	%r14431, 0;
	@%p139 bra 	BB3_223;

	setp.eq.s32	%p140, %r311, 1;
	mov.u32 	%r14429, 0;
	@%p140 bra 	BB3_222;

	setp.eq.s32	%p141, %r311, 2;
	mov.u32 	%r14428, 0;
	@%p141 bra 	BB3_221;

	sub.s32 	%r14291, %r2861, %r260;
	xor.b32  	%r8312, %r14291, 7;
	cvt.u64.u32	%rd12819, %r8312;
	add.s64 	%rd12820, %rd777, %rd12819;
	ld.local.u8 	%rs235, [%rd12820];
	st.local.u8 	[%rd835], %rs235;
	mov.u32 	%r14428, 1;

BB3_221:
	sub.s32 	%r14292, %r2861, %r260;
	add.s32 	%r8313, %r14428, %r14292;
	xor.b32  	%r8314, %r8313, 7;
	cvt.s64.s32	%rd12821, %r8314;
	add.s64 	%rd12822, %rd777, %rd12821;
	ld.local.u8 	%rs236, [%rd12822];
	xor.b32  	%r8315, %r14428, 7;
	cvt.u64.u32	%rd12823, %r8315;
	add.s64 	%rd12824, %rd179, %rd12823;
	st.local.u8 	[%rd12824], %rs236;
	add.s32 	%r14429, %r14428, 1;

BB3_222:
	sub.s32 	%r14293, %r2861, %r260;
	add.s32 	%r8316, %r14429, %r14293;
	xor.b32  	%r8317, %r8316, 7;
	cvt.s64.s32	%rd12825, %r8317;
	add.s64 	%rd12826, %rd777, %rd12825;
	ld.local.u8 	%rs237, [%rd12826];
	xor.b32  	%r8318, %r14429, 7;
	cvt.s64.s32	%rd12827, %r8318;
	add.s64 	%rd12828, %rd179, %rd12827;
	st.local.u8 	[%rd12828], %rs237;
	add.s32 	%r14431, %r14429, 1;

BB3_223:
	add.s32 	%r8319, %r256, %r260;
	setp.lt.u32	%p142, %r8319, 4;
	@%p142 bra 	BB3_234;

BB3_224:
	sub.s32 	%r14294, %r2861, %r260;
	add.s32 	%r8320, %r14431, %r14294;
	xor.b32  	%r8321, %r8320, 7;
	cvt.s64.s32	%rd12829, %r8321;
	add.s64 	%rd12830, %rd777, %rd12829;
	ld.local.u8 	%rs238, [%rd12830];
	xor.b32  	%r8322, %r14431, 7;
	cvt.s64.s32	%rd12831, %r8322;
	add.s64 	%rd12832, %rd179, %rd12831;
	st.local.u8 	[%rd12832], %rs238;
	add.s32 	%r8323, %r14431, 1;
	add.s32 	%r8324, %r8323, %r14294;
	xor.b32  	%r8325, %r8324, 7;
	cvt.s64.s32	%rd12833, %r8325;
	add.s64 	%rd12834, %rd777, %rd12833;
	ld.local.u8 	%rs239, [%rd12834];
	xor.b32  	%r8326, %r8323, 7;
	cvt.s64.s32	%rd12835, %r8326;
	add.s64 	%rd12836, %rd179, %rd12835;
	st.local.u8 	[%rd12836], %rs239;
	add.s32 	%r8327, %r14431, 2;
	add.s32 	%r8328, %r8327, %r14294;
	xor.b32  	%r8329, %r8328, 7;
	cvt.s64.s32	%rd12837, %r8329;
	add.s64 	%rd12838, %rd777, %rd12837;
	ld.local.u8 	%rs240, [%rd12838];
	xor.b32  	%r8330, %r8327, 7;
	cvt.s64.s32	%rd12839, %r8330;
	add.s64 	%rd12840, %rd179, %rd12839;
	st.local.u8 	[%rd12840], %rs240;
	add.s32 	%r8331, %r14431, 3;
	add.s32 	%r8332, %r8331, %r14294;
	xor.b32  	%r8333, %r8332, 7;
	cvt.s64.s32	%rd12841, %r8333;
	add.s64 	%rd12842, %rd777, %rd12841;
	ld.local.u8 	%rs241, [%rd12842];
	xor.b32  	%r8334, %r8331, 7;
	cvt.s64.s32	%rd12843, %r8334;
	add.s64 	%rd12844, %rd179, %rd12843;
	st.local.u8 	[%rd12844], %rs241;
	add.s32 	%r14431, %r14431, 4;
	setp.lt.s32	%p143, %r14431, %r310;
	@%p143 bra 	BB3_224;
	bra.uni 	BB3_234;

BB3_184:
	sub.s32 	%r261, %r2861, %r260;
	mov.u32 	%r6674, 1;
	max.u32 	%r262, %r261, %r6674;
	and.b32  	%r263, %r262, 3;
	setp.eq.s32	%p119, %r263, 0;
	mov.u32 	%r14412, 0;
	@%p119 bra 	BB3_191;

	setp.eq.s32	%p120, %r263, 1;
	mov.u32 	%r14408, 0;
	@%p120 bra 	BB3_190;

	setp.eq.s32	%p121, %r263, 2;
	mov.u32 	%r6676, 0;
	@%p121 bra 	BB3_187;
	bra.uni 	BB3_188;

BB3_187:
	mov.u32 	%r6674, %r6676;
	bra.uni 	BB3_189;

BB3_188:
	ld.local.u8 	%rs156, [%rd836];
	xor.b32  	%r6678, %r260, 7;
	cvt.u64.u32	%rd10547, %r6678;
	add.s64 	%rd10548, %rd179, %rd10547;
	st.local.u8 	[%rd10548], %rs156;
	add.s32 	%r260, %r260, 1;

BB3_189:
	xor.b32  	%r6679, %r6674, 7;
	cvt.u64.u32	%rd10549, %r6679;
	add.s64 	%rd10550, %rd446, %rd10549;
	ld.local.u8 	%rs157, [%rd10550];
	xor.b32  	%r6680, %r260, 7;
	cvt.s64.s32	%rd10551, %r6680;
	add.s64 	%rd10552, %rd179, %rd10551;
	st.local.u8 	[%rd10552], %rs157;
	add.s32 	%r260, %r260, 1;
	add.s32 	%r14408, %r6674, 1;

BB3_190:
	xor.b32  	%r6681, %r14408, 7;
	cvt.s64.s32	%rd10553, %r6681;
	add.s64 	%rd10554, %rd446, %rd10553;
	ld.local.u8 	%rs158, [%rd10554];
	xor.b32  	%r6682, %r260, 7;
	cvt.s64.s32	%rd10555, %r6682;
	add.s64 	%rd10556, %rd179, %rd10555;
	st.local.u8 	[%rd10556], %rs158;
	add.s32 	%r260, %r260, 1;
	add.s32 	%r14412, %r14408, 1;

BB3_191:
	setp.lt.u32	%p122, %r262, 4;
	@%p122 bra 	BB3_193;

BB3_192:
	xor.b32  	%r6683, %r14412, 7;
	cvt.s64.s32	%rd10557, %r6683;
	add.s64 	%rd10558, %rd446, %rd10557;
	ld.local.u8 	%rs159, [%rd10558];
	xor.b32  	%r6684, %r260, 7;
	cvt.s64.s32	%rd10559, %r6684;
	add.s64 	%rd10560, %rd179, %rd10559;
	st.local.u8 	[%rd10560], %rs159;
	add.s32 	%r6685, %r14412, 1;
	xor.b32  	%r6686, %r6685, 7;
	cvt.s64.s32	%rd10561, %r6686;
	add.s64 	%rd10562, %rd446, %rd10561;
	ld.local.u8 	%rs160, [%rd10562];
	add.s32 	%r6687, %r260, 1;
	xor.b32  	%r6688, %r6687, 7;
	cvt.s64.s32	%rd10563, %r6688;
	add.s64 	%rd10564, %rd179, %rd10563;
	st.local.u8 	[%rd10564], %rs160;
	add.s32 	%r6689, %r14412, 2;
	xor.b32  	%r6690, %r6689, 7;
	cvt.s64.s32	%rd10565, %r6690;
	add.s64 	%rd10566, %rd446, %rd10565;
	ld.local.u8 	%rs161, [%rd10566];
	add.s32 	%r6691, %r260, 2;
	xor.b32  	%r6692, %r6691, 7;
	cvt.s64.s32	%rd10567, %r6692;
	add.s64 	%rd10568, %rd179, %rd10567;
	st.local.u8 	[%rd10568], %rs161;
	add.s32 	%r6693, %r14412, 3;
	xor.b32  	%r6694, %r6693, 7;
	cvt.s64.s32	%rd10569, %r6694;
	add.s64 	%rd10570, %rd446, %rd10569;
	ld.local.u8 	%rs162, [%rd10570];
	add.s32 	%r6695, %r260, 3;
	xor.b32  	%r6696, %r6695, 7;
	cvt.s64.s32	%rd10571, %r6696;
	add.s64 	%rd10572, %rd179, %rd10571;
	st.local.u8 	[%rd10572], %rs162;
	add.s32 	%r260, %r260, 4;
	add.s32 	%r14412, %r14412, 4;
	setp.lt.s32	%p123, %r14412, %r261;
	@%p123 bra 	BB3_192;

BB3_193:
	ld.local.u64 	%rd10573, [%rd1+64];
	shr.u64 	%rd10574, %rd10573, 32;
	ld.local.u64 	%rd10575, [%rd1+72];
	shr.u64 	%rd10576, %rd10575, 32;
	ld.local.u64 	%rd10577, [%rd1+80];
	shr.u64 	%rd10578, %rd10577, 32;
	ld.local.u64 	%rd10579, [%rd1+88];
	shr.u64 	%rd10580, %rd10579, 32;
	ld.local.u64 	%rd10581, [%rd1+96];
	shr.u64 	%rd10582, %rd10581, 32;
	ld.local.u64 	%rd10583, [%rd1+104];
	shr.u64 	%rd10584, %rd10583, 32;
	ld.local.u64 	%rd10585, [%rd1+112];
	shr.u64 	%rd10586, %rd10585, 32;
	ld.local.u64 	%rd10587, [%rd1+120];
	shr.u64 	%rd10588, %rd10587, 32;
	ld.local.u64 	%rd10589, [%rd1+128];
	shr.u64 	%rd10590, %rd10589, 32;
	ld.local.u64 	%rd10591, [%rd1+136];
	shr.u64 	%rd10592, %rd10591, 32;
	ld.local.u64 	%rd10593, [%rd1+144];
	shr.u64 	%rd10594, %rd10593, 32;
	ld.local.u64 	%rd10595, [%rd1+152];
	shr.u64 	%rd10596, %rd10595, 32;
	ld.local.u64 	%rd10597, [%rd1+160];
	shr.u64 	%rd10598, %rd10597, 32;
	ld.local.u64 	%rd10599, [%rd1+168];
	shr.u64 	%rd10600, %rd10599, 32;
	ld.local.u64 	%rd10601, [%rd1+176];
	shr.u64 	%rd10602, %rd10601, 32;
	ld.local.u64 	%rd10603, [%rd1+184];
	shr.u64 	%rd10604, %rd10603, 32;
	bfi.b64 	%rd21592, %rd10574, %rd10573, 32, 32;
	bfi.b64 	%rd21593, %rd10576, %rd10575, 32, 32;
	bfi.b64 	%rd21594, %rd10578, %rd10577, 32, 32;
	bfi.b64 	%rd21595, %rd10580, %rd10579, 32, 32;
	bfi.b64 	%rd21596, %rd10582, %rd10581, 32, 32;
	bfi.b64 	%rd21597, %rd10584, %rd10583, 32, 32;
	bfi.b64 	%rd21598, %rd10586, %rd10585, 32, 32;
	bfi.b64 	%rd21599, %rd10588, %rd10587, 32, 32;
	bfi.b64 	%rd21583, %rd10590, %rd10589, 32, 32;
	bfi.b64 	%rd21582, %rd10592, %rd10591, 32, 32;
	bfi.b64 	%rd21581, %rd10594, %rd10593, 32, 32;
	bfi.b64 	%rd21580, %rd10596, %rd10595, 32, 32;
	bfi.b64 	%rd21579, %rd10598, %rd10597, 32, 32;
	bfi.b64 	%rd21578, %rd10600, %rd10599, 32, 32;
	bfi.b64 	%rd21577, %rd10602, %rd10601, 32, 32;
	bfi.b64 	%rd21576, %rd10604, %rd10603, 32, 32;
	ld.local.u64 	%rd853, [%rd1+32];
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6698,%dummy}, %rd853;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6699}, %rd853;
	}
	shf.r.wrap.b32 	%r6700, %r6699, %r6698, 14;
	shf.r.wrap.b32 	%r6701, %r6698, %r6699, 14;
	mov.b64 	%rd10605, {%r6701, %r6700};
	shf.r.wrap.b32 	%r6702, %r6699, %r6698, 18;
	shf.r.wrap.b32 	%r6703, %r6698, %r6699, 18;
	mov.b64 	%rd10606, {%r6703, %r6702};
	xor.b64  	%rd10607, %rd10606, %rd10605;
	shf.l.wrap.b32 	%r6704, %r6698, %r6699, 23;
	shf.l.wrap.b32 	%r6705, %r6699, %r6698, 23;
	mov.b64 	%rd10608, {%r6705, %r6704};
	xor.b64  	%rd10609, %rd10607, %rd10608;
	ld.local.u64 	%rd854, [%rd1+48];
	ld.local.u64 	%rd855, [%rd1+40];
	xor.b64  	%rd10610, %rd854, %rd855;
	and.b64  	%rd10611, %rd10610, %rd853;
	xor.b64  	%rd10612, %rd10611, %rd854;
	ld.local.u64 	%rd856, [%rd1+56];
	add.s64 	%rd10613, %rd856, %rd21592;
	add.s64 	%rd10614, %rd10613, %rd21454;
	add.s64 	%rd10615, %rd10614, %rd10612;
	add.s64 	%rd10616, %rd10615, %rd10609;
	ld.local.u64 	%rd857, [%rd1+24];
	add.s64 	%rd10617, %rd10616, %rd857;
	ld.local.u64 	%rd858, [%rd1];
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6706,%dummy}, %rd858;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6707}, %rd858;
	}
	shf.r.wrap.b32 	%r6708, %r6707, %r6706, 28;
	shf.r.wrap.b32 	%r6709, %r6706, %r6707, 28;
	mov.b64 	%rd10618, {%r6709, %r6708};
	shf.l.wrap.b32 	%r6710, %r6706, %r6707, 30;
	shf.l.wrap.b32 	%r6711, %r6707, %r6706, 30;
	mov.b64 	%rd10619, {%r6711, %r6710};
	xor.b64  	%rd10620, %rd10619, %rd10618;
	shf.l.wrap.b32 	%r6712, %r6706, %r6707, 25;
	shf.l.wrap.b32 	%r6713, %r6707, %r6706, 25;
	mov.b64 	%rd10621, {%r6713, %r6712};
	xor.b64  	%rd10622, %rd10620, %rd10621;
	ld.local.u64 	%rd859, [%rd1+16];
	xor.b64  	%rd10623, %rd859, %rd858;
	ld.local.u64 	%rd860, [%rd1+8];
	xor.b64  	%rd10624, %rd860, %rd858;
	and.b64  	%rd10625, %rd10623, %rd10624;
	xor.b64  	%rd10626, %rd10625, %rd858;
	add.s64 	%rd10627, %rd10616, %rd10626;
	add.s64 	%rd10628, %rd10627, %rd10622;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6714,%dummy}, %rd10617;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6715}, %rd10617;
	}
	shf.r.wrap.b32 	%r6716, %r6715, %r6714, 14;
	shf.r.wrap.b32 	%r6717, %r6714, %r6715, 14;
	mov.b64 	%rd10629, {%r6717, %r6716};
	shf.r.wrap.b32 	%r6718, %r6715, %r6714, 18;
	shf.r.wrap.b32 	%r6719, %r6714, %r6715, 18;
	mov.b64 	%rd10630, {%r6719, %r6718};
	xor.b64  	%rd10631, %rd10630, %rd10629;
	shf.l.wrap.b32 	%r6720, %r6714, %r6715, 23;
	shf.l.wrap.b32 	%r6721, %r6715, %r6714, 23;
	mov.b64 	%rd10632, {%r6721, %r6720};
	xor.b64  	%rd10633, %rd10631, %rd10632;
	xor.b64  	%rd10634, %rd855, %rd853;
	and.b64  	%rd10635, %rd10617, %rd10634;
	xor.b64  	%rd10636, %rd10635, %rd855;
	add.s64 	%rd10637, %rd854, %rd21593;
	add.s64 	%rd10638, %rd10637, %rd21453;
	add.s64 	%rd10639, %rd10638, %rd10636;
	add.s64 	%rd10640, %rd10639, %rd10633;
	add.s64 	%rd10641, %rd10640, %rd859;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6722,%dummy}, %rd10628;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6723}, %rd10628;
	}
	shf.r.wrap.b32 	%r6724, %r6723, %r6722, 28;
	shf.r.wrap.b32 	%r6725, %r6722, %r6723, 28;
	mov.b64 	%rd10642, {%r6725, %r6724};
	shf.l.wrap.b32 	%r6726, %r6722, %r6723, 30;
	shf.l.wrap.b32 	%r6727, %r6723, %r6722, 30;
	mov.b64 	%rd10643, {%r6727, %r6726};
	xor.b64  	%rd10644, %rd10643, %rd10642;
	shf.l.wrap.b32 	%r6728, %r6722, %r6723, 25;
	shf.l.wrap.b32 	%r6729, %r6723, %r6722, 25;
	mov.b64 	%rd10645, {%r6729, %r6728};
	xor.b64  	%rd10646, %rd10644, %rd10645;
	xor.b64  	%rd10647, %rd10628, %rd860;
	xor.b64  	%rd10648, %rd10628, %rd858;
	and.b64  	%rd10649, %rd10648, %rd10647;
	xor.b64  	%rd10650, %rd10649, %rd10628;
	add.s64 	%rd10651, %rd10640, %rd10650;
	add.s64 	%rd10652, %rd10651, %rd10646;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6730,%dummy}, %rd10641;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6731}, %rd10641;
	}
	shf.r.wrap.b32 	%r6732, %r6731, %r6730, 14;
	shf.r.wrap.b32 	%r6733, %r6730, %r6731, 14;
	mov.b64 	%rd10653, {%r6733, %r6732};
	shf.r.wrap.b32 	%r6734, %r6731, %r6730, 18;
	shf.r.wrap.b32 	%r6735, %r6730, %r6731, 18;
	mov.b64 	%rd10654, {%r6735, %r6734};
	xor.b64  	%rd10655, %rd10654, %rd10653;
	shf.l.wrap.b32 	%r6736, %r6730, %r6731, 23;
	shf.l.wrap.b32 	%r6737, %r6731, %r6730, 23;
	mov.b64 	%rd10656, {%r6737, %r6736};
	xor.b64  	%rd10657, %rd10655, %rd10656;
	xor.b64  	%rd10658, %rd10617, %rd853;
	and.b64  	%rd10659, %rd10641, %rd10658;
	xor.b64  	%rd10660, %rd10659, %rd853;
	add.s64 	%rd10661, %rd855, %rd21594;
	add.s64 	%rd10662, %rd10661, %rd21452;
	add.s64 	%rd10663, %rd10662, %rd10660;
	add.s64 	%rd10664, %rd10663, %rd10657;
	add.s64 	%rd10665, %rd10664, %rd860;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6738,%dummy}, %rd10652;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6739}, %rd10652;
	}
	shf.r.wrap.b32 	%r6740, %r6739, %r6738, 28;
	shf.r.wrap.b32 	%r6741, %r6738, %r6739, 28;
	mov.b64 	%rd10666, {%r6741, %r6740};
	shf.l.wrap.b32 	%r6742, %r6738, %r6739, 30;
	shf.l.wrap.b32 	%r6743, %r6739, %r6738, 30;
	mov.b64 	%rd10667, {%r6743, %r6742};
	xor.b64  	%rd10668, %rd10667, %rd10666;
	shf.l.wrap.b32 	%r6744, %r6738, %r6739, 25;
	shf.l.wrap.b32 	%r6745, %r6739, %r6738, 25;
	mov.b64 	%rd10669, {%r6745, %r6744};
	xor.b64  	%rd10670, %rd10668, %rd10669;
	xor.b64  	%rd10671, %rd10652, %rd858;
	xor.b64  	%rd10672, %rd10652, %rd10628;
	and.b64  	%rd10673, %rd10672, %rd10671;
	xor.b64  	%rd10674, %rd10673, %rd10652;
	add.s64 	%rd10675, %rd10664, %rd10674;
	add.s64 	%rd10676, %rd10675, %rd10670;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6746,%dummy}, %rd10665;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6747}, %rd10665;
	}
	shf.r.wrap.b32 	%r6748, %r6747, %r6746, 14;
	shf.r.wrap.b32 	%r6749, %r6746, %r6747, 14;
	mov.b64 	%rd10677, {%r6749, %r6748};
	shf.r.wrap.b32 	%r6750, %r6747, %r6746, 18;
	shf.r.wrap.b32 	%r6751, %r6746, %r6747, 18;
	mov.b64 	%rd10678, {%r6751, %r6750};
	xor.b64  	%rd10679, %rd10678, %rd10677;
	shf.l.wrap.b32 	%r6752, %r6746, %r6747, 23;
	shf.l.wrap.b32 	%r6753, %r6747, %r6746, 23;
	mov.b64 	%rd10680, {%r6753, %r6752};
	xor.b64  	%rd10681, %rd10679, %rd10680;
	xor.b64  	%rd10682, %rd10641, %rd10617;
	and.b64  	%rd10683, %rd10665, %rd10682;
	xor.b64  	%rd10684, %rd10683, %rd10617;
	add.s64 	%rd10685, %rd853, %rd21595;
	add.s64 	%rd10686, %rd10685, %rd21451;
	add.s64 	%rd10687, %rd10686, %rd10684;
	add.s64 	%rd10688, %rd10687, %rd10681;
	add.s64 	%rd10689, %rd10688, %rd858;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6754,%dummy}, %rd10676;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6755}, %rd10676;
	}
	shf.r.wrap.b32 	%r6756, %r6755, %r6754, 28;
	shf.r.wrap.b32 	%r6757, %r6754, %r6755, 28;
	mov.b64 	%rd10690, {%r6757, %r6756};
	shf.l.wrap.b32 	%r6758, %r6754, %r6755, 30;
	shf.l.wrap.b32 	%r6759, %r6755, %r6754, 30;
	mov.b64 	%rd10691, {%r6759, %r6758};
	xor.b64  	%rd10692, %rd10691, %rd10690;
	shf.l.wrap.b32 	%r6760, %r6754, %r6755, 25;
	shf.l.wrap.b32 	%r6761, %r6755, %r6754, 25;
	mov.b64 	%rd10693, {%r6761, %r6760};
	xor.b64  	%rd10694, %rd10692, %rd10693;
	xor.b64  	%rd10695, %rd10676, %rd10628;
	xor.b64  	%rd10696, %rd10676, %rd10652;
	and.b64  	%rd10697, %rd10696, %rd10695;
	xor.b64  	%rd10698, %rd10697, %rd10676;
	add.s64 	%rd10699, %rd10688, %rd10698;
	add.s64 	%rd10700, %rd10699, %rd10694;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6762,%dummy}, %rd10689;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6763}, %rd10689;
	}
	shf.r.wrap.b32 	%r6764, %r6763, %r6762, 14;
	shf.r.wrap.b32 	%r6765, %r6762, %r6763, 14;
	mov.b64 	%rd10701, {%r6765, %r6764};
	shf.r.wrap.b32 	%r6766, %r6763, %r6762, 18;
	shf.r.wrap.b32 	%r6767, %r6762, %r6763, 18;
	mov.b64 	%rd10702, {%r6767, %r6766};
	xor.b64  	%rd10703, %rd10702, %rd10701;
	shf.l.wrap.b32 	%r6768, %r6762, %r6763, 23;
	shf.l.wrap.b32 	%r6769, %r6763, %r6762, 23;
	mov.b64 	%rd10704, {%r6769, %r6768};
	xor.b64  	%rd10705, %rd10703, %rd10704;
	xor.b64  	%rd10706, %rd10665, %rd10641;
	and.b64  	%rd10707, %rd10689, %rd10706;
	xor.b64  	%rd10708, %rd10707, %rd10641;
	add.s64 	%rd10709, %rd10617, %rd21596;
	add.s64 	%rd10710, %rd10709, %rd21450;
	add.s64 	%rd10711, %rd10710, %rd10708;
	add.s64 	%rd10712, %rd10711, %rd10705;
	add.s64 	%rd10713, %rd10712, %rd10628;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6770,%dummy}, %rd10700;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6771}, %rd10700;
	}
	shf.r.wrap.b32 	%r6772, %r6771, %r6770, 28;
	shf.r.wrap.b32 	%r6773, %r6770, %r6771, 28;
	mov.b64 	%rd10714, {%r6773, %r6772};
	shf.l.wrap.b32 	%r6774, %r6770, %r6771, 30;
	shf.l.wrap.b32 	%r6775, %r6771, %r6770, 30;
	mov.b64 	%rd10715, {%r6775, %r6774};
	xor.b64  	%rd10716, %rd10715, %rd10714;
	shf.l.wrap.b32 	%r6776, %r6770, %r6771, 25;
	shf.l.wrap.b32 	%r6777, %r6771, %r6770, 25;
	mov.b64 	%rd10717, {%r6777, %r6776};
	xor.b64  	%rd10718, %rd10716, %rd10717;
	xor.b64  	%rd10719, %rd10700, %rd10652;
	xor.b64  	%rd10720, %rd10700, %rd10676;
	and.b64  	%rd10721, %rd10720, %rd10719;
	xor.b64  	%rd10722, %rd10721, %rd10700;
	add.s64 	%rd10723, %rd10712, %rd10722;
	add.s64 	%rd10724, %rd10723, %rd10718;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6778,%dummy}, %rd10713;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6779}, %rd10713;
	}
	shf.r.wrap.b32 	%r6780, %r6779, %r6778, 14;
	shf.r.wrap.b32 	%r6781, %r6778, %r6779, 14;
	mov.b64 	%rd10725, {%r6781, %r6780};
	shf.r.wrap.b32 	%r6782, %r6779, %r6778, 18;
	shf.r.wrap.b32 	%r6783, %r6778, %r6779, 18;
	mov.b64 	%rd10726, {%r6783, %r6782};
	xor.b64  	%rd10727, %rd10726, %rd10725;
	shf.l.wrap.b32 	%r6784, %r6778, %r6779, 23;
	shf.l.wrap.b32 	%r6785, %r6779, %r6778, 23;
	mov.b64 	%rd10728, {%r6785, %r6784};
	xor.b64  	%rd10729, %rd10727, %rd10728;
	xor.b64  	%rd10730, %rd10689, %rd10665;
	and.b64  	%rd10731, %rd10713, %rd10730;
	xor.b64  	%rd10732, %rd10731, %rd10665;
	add.s64 	%rd10733, %rd10641, %rd21597;
	add.s64 	%rd10734, %rd10733, %rd21449;
	add.s64 	%rd10735, %rd10734, %rd10732;
	add.s64 	%rd10736, %rd10735, %rd10729;
	add.s64 	%rd10737, %rd10736, %rd10652;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6786,%dummy}, %rd10724;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6787}, %rd10724;
	}
	shf.r.wrap.b32 	%r6788, %r6787, %r6786, 28;
	shf.r.wrap.b32 	%r6789, %r6786, %r6787, 28;
	mov.b64 	%rd10738, {%r6789, %r6788};
	shf.l.wrap.b32 	%r6790, %r6786, %r6787, 30;
	shf.l.wrap.b32 	%r6791, %r6787, %r6786, 30;
	mov.b64 	%rd10739, {%r6791, %r6790};
	xor.b64  	%rd10740, %rd10739, %rd10738;
	shf.l.wrap.b32 	%r6792, %r6786, %r6787, 25;
	shf.l.wrap.b32 	%r6793, %r6787, %r6786, 25;
	mov.b64 	%rd10741, {%r6793, %r6792};
	xor.b64  	%rd10742, %rd10740, %rd10741;
	xor.b64  	%rd10743, %rd10724, %rd10676;
	xor.b64  	%rd10744, %rd10724, %rd10700;
	and.b64  	%rd10745, %rd10744, %rd10743;
	xor.b64  	%rd10746, %rd10745, %rd10724;
	add.s64 	%rd10747, %rd10736, %rd10746;
	add.s64 	%rd10748, %rd10747, %rd10742;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6794,%dummy}, %rd10737;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6795}, %rd10737;
	}
	shf.r.wrap.b32 	%r6796, %r6795, %r6794, 14;
	shf.r.wrap.b32 	%r6797, %r6794, %r6795, 14;
	mov.b64 	%rd10749, {%r6797, %r6796};
	shf.r.wrap.b32 	%r6798, %r6795, %r6794, 18;
	shf.r.wrap.b32 	%r6799, %r6794, %r6795, 18;
	mov.b64 	%rd10750, {%r6799, %r6798};
	xor.b64  	%rd10751, %rd10750, %rd10749;
	shf.l.wrap.b32 	%r6800, %r6794, %r6795, 23;
	shf.l.wrap.b32 	%r6801, %r6795, %r6794, 23;
	mov.b64 	%rd10752, {%r6801, %r6800};
	xor.b64  	%rd10753, %rd10751, %rd10752;
	xor.b64  	%rd10754, %rd10713, %rd10689;
	and.b64  	%rd10755, %rd10737, %rd10754;
	xor.b64  	%rd10756, %rd10755, %rd10689;
	add.s64 	%rd10757, %rd10665, %rd21598;
	add.s64 	%rd10758, %rd10757, %rd21448;
	add.s64 	%rd10759, %rd10758, %rd10756;
	add.s64 	%rd10760, %rd10759, %rd10753;
	add.s64 	%rd10761, %rd10760, %rd10676;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6802,%dummy}, %rd10748;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6803}, %rd10748;
	}
	shf.r.wrap.b32 	%r6804, %r6803, %r6802, 28;
	shf.r.wrap.b32 	%r6805, %r6802, %r6803, 28;
	mov.b64 	%rd10762, {%r6805, %r6804};
	shf.l.wrap.b32 	%r6806, %r6802, %r6803, 30;
	shf.l.wrap.b32 	%r6807, %r6803, %r6802, 30;
	mov.b64 	%rd10763, {%r6807, %r6806};
	xor.b64  	%rd10764, %rd10763, %rd10762;
	shf.l.wrap.b32 	%r6808, %r6802, %r6803, 25;
	shf.l.wrap.b32 	%r6809, %r6803, %r6802, 25;
	mov.b64 	%rd10765, {%r6809, %r6808};
	xor.b64  	%rd10766, %rd10764, %rd10765;
	xor.b64  	%rd10767, %rd10748, %rd10700;
	xor.b64  	%rd10768, %rd10748, %rd10724;
	and.b64  	%rd10769, %rd10768, %rd10767;
	xor.b64  	%rd10770, %rd10769, %rd10748;
	add.s64 	%rd10771, %rd10760, %rd10770;
	add.s64 	%rd10772, %rd10771, %rd10766;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6810,%dummy}, %rd10761;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6811}, %rd10761;
	}
	shf.r.wrap.b32 	%r6812, %r6811, %r6810, 14;
	shf.r.wrap.b32 	%r6813, %r6810, %r6811, 14;
	mov.b64 	%rd10773, {%r6813, %r6812};
	shf.r.wrap.b32 	%r6814, %r6811, %r6810, 18;
	shf.r.wrap.b32 	%r6815, %r6810, %r6811, 18;
	mov.b64 	%rd10774, {%r6815, %r6814};
	xor.b64  	%rd10775, %rd10774, %rd10773;
	shf.l.wrap.b32 	%r6816, %r6810, %r6811, 23;
	shf.l.wrap.b32 	%r6817, %r6811, %r6810, 23;
	mov.b64 	%rd10776, {%r6817, %r6816};
	xor.b64  	%rd10777, %rd10775, %rd10776;
	xor.b64  	%rd10778, %rd10737, %rd10713;
	and.b64  	%rd10779, %rd10761, %rd10778;
	xor.b64  	%rd10780, %rd10779, %rd10713;
	add.s64 	%rd10781, %rd10689, %rd21599;
	add.s64 	%rd10782, %rd10781, %rd21447;
	add.s64 	%rd10783, %rd10782, %rd10780;
	add.s64 	%rd10784, %rd10783, %rd10777;
	add.s64 	%rd10785, %rd10784, %rd10700;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6818,%dummy}, %rd10772;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6819}, %rd10772;
	}
	shf.r.wrap.b32 	%r6820, %r6819, %r6818, 28;
	shf.r.wrap.b32 	%r6821, %r6818, %r6819, 28;
	mov.b64 	%rd10786, {%r6821, %r6820};
	shf.l.wrap.b32 	%r6822, %r6818, %r6819, 30;
	shf.l.wrap.b32 	%r6823, %r6819, %r6818, 30;
	mov.b64 	%rd10787, {%r6823, %r6822};
	xor.b64  	%rd10788, %rd10787, %rd10786;
	shf.l.wrap.b32 	%r6824, %r6818, %r6819, 25;
	shf.l.wrap.b32 	%r6825, %r6819, %r6818, 25;
	mov.b64 	%rd10789, {%r6825, %r6824};
	xor.b64  	%rd10790, %rd10788, %rd10789;
	xor.b64  	%rd10791, %rd10772, %rd10724;
	xor.b64  	%rd10792, %rd10772, %rd10748;
	and.b64  	%rd10793, %rd10792, %rd10791;
	xor.b64  	%rd10794, %rd10793, %rd10772;
	add.s64 	%rd10795, %rd10784, %rd10794;
	add.s64 	%rd10796, %rd10795, %rd10790;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6826,%dummy}, %rd10785;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6827}, %rd10785;
	}
	shf.r.wrap.b32 	%r6828, %r6827, %r6826, 14;
	shf.r.wrap.b32 	%r6829, %r6826, %r6827, 14;
	mov.b64 	%rd10797, {%r6829, %r6828};
	shf.r.wrap.b32 	%r6830, %r6827, %r6826, 18;
	shf.r.wrap.b32 	%r6831, %r6826, %r6827, 18;
	mov.b64 	%rd10798, {%r6831, %r6830};
	xor.b64  	%rd10799, %rd10798, %rd10797;
	shf.l.wrap.b32 	%r6832, %r6826, %r6827, 23;
	shf.l.wrap.b32 	%r6833, %r6827, %r6826, 23;
	mov.b64 	%rd10800, {%r6833, %r6832};
	xor.b64  	%rd10801, %rd10799, %rd10800;
	xor.b64  	%rd10802, %rd10761, %rd10737;
	and.b64  	%rd10803, %rd10785, %rd10802;
	xor.b64  	%rd10804, %rd10803, %rd10737;
	add.s64 	%rd10805, %rd10713, %rd21583;
	add.s64 	%rd10806, %rd10805, %rd21446;
	add.s64 	%rd10807, %rd10806, %rd10804;
	add.s64 	%rd10808, %rd10807, %rd10801;
	add.s64 	%rd10809, %rd10808, %rd10724;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6834,%dummy}, %rd10796;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6835}, %rd10796;
	}
	shf.r.wrap.b32 	%r6836, %r6835, %r6834, 28;
	shf.r.wrap.b32 	%r6837, %r6834, %r6835, 28;
	mov.b64 	%rd10810, {%r6837, %r6836};
	shf.l.wrap.b32 	%r6838, %r6834, %r6835, 30;
	shf.l.wrap.b32 	%r6839, %r6835, %r6834, 30;
	mov.b64 	%rd10811, {%r6839, %r6838};
	xor.b64  	%rd10812, %rd10811, %rd10810;
	shf.l.wrap.b32 	%r6840, %r6834, %r6835, 25;
	shf.l.wrap.b32 	%r6841, %r6835, %r6834, 25;
	mov.b64 	%rd10813, {%r6841, %r6840};
	xor.b64  	%rd10814, %rd10812, %rd10813;
	xor.b64  	%rd10815, %rd10796, %rd10748;
	xor.b64  	%rd10816, %rd10796, %rd10772;
	and.b64  	%rd10817, %rd10816, %rd10815;
	xor.b64  	%rd10818, %rd10817, %rd10796;
	add.s64 	%rd10819, %rd10808, %rd10818;
	add.s64 	%rd10820, %rd10819, %rd10814;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6842,%dummy}, %rd10809;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6843}, %rd10809;
	}
	shf.r.wrap.b32 	%r6844, %r6843, %r6842, 14;
	shf.r.wrap.b32 	%r6845, %r6842, %r6843, 14;
	mov.b64 	%rd10821, {%r6845, %r6844};
	shf.r.wrap.b32 	%r6846, %r6843, %r6842, 18;
	shf.r.wrap.b32 	%r6847, %r6842, %r6843, 18;
	mov.b64 	%rd10822, {%r6847, %r6846};
	xor.b64  	%rd10823, %rd10822, %rd10821;
	shf.l.wrap.b32 	%r6848, %r6842, %r6843, 23;
	shf.l.wrap.b32 	%r6849, %r6843, %r6842, 23;
	mov.b64 	%rd10824, {%r6849, %r6848};
	xor.b64  	%rd10825, %rd10823, %rd10824;
	xor.b64  	%rd10826, %rd10785, %rd10761;
	and.b64  	%rd10827, %rd10809, %rd10826;
	xor.b64  	%rd10828, %rd10827, %rd10761;
	add.s64 	%rd10829, %rd10737, %rd21582;
	add.s64 	%rd10830, %rd10829, %rd21445;
	add.s64 	%rd10831, %rd10830, %rd10828;
	add.s64 	%rd10832, %rd10831, %rd10825;
	add.s64 	%rd10833, %rd10832, %rd10748;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6850,%dummy}, %rd10820;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6851}, %rd10820;
	}
	shf.r.wrap.b32 	%r6852, %r6851, %r6850, 28;
	shf.r.wrap.b32 	%r6853, %r6850, %r6851, 28;
	mov.b64 	%rd10834, {%r6853, %r6852};
	shf.l.wrap.b32 	%r6854, %r6850, %r6851, 30;
	shf.l.wrap.b32 	%r6855, %r6851, %r6850, 30;
	mov.b64 	%rd10835, {%r6855, %r6854};
	xor.b64  	%rd10836, %rd10835, %rd10834;
	shf.l.wrap.b32 	%r6856, %r6850, %r6851, 25;
	shf.l.wrap.b32 	%r6857, %r6851, %r6850, 25;
	mov.b64 	%rd10837, {%r6857, %r6856};
	xor.b64  	%rd10838, %rd10836, %rd10837;
	xor.b64  	%rd10839, %rd10820, %rd10772;
	xor.b64  	%rd10840, %rd10820, %rd10796;
	and.b64  	%rd10841, %rd10840, %rd10839;
	xor.b64  	%rd10842, %rd10841, %rd10820;
	add.s64 	%rd10843, %rd10832, %rd10842;
	add.s64 	%rd10844, %rd10843, %rd10838;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6858,%dummy}, %rd10833;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6859}, %rd10833;
	}
	shf.r.wrap.b32 	%r6860, %r6859, %r6858, 14;
	shf.r.wrap.b32 	%r6861, %r6858, %r6859, 14;
	mov.b64 	%rd10845, {%r6861, %r6860};
	shf.r.wrap.b32 	%r6862, %r6859, %r6858, 18;
	shf.r.wrap.b32 	%r6863, %r6858, %r6859, 18;
	mov.b64 	%rd10846, {%r6863, %r6862};
	xor.b64  	%rd10847, %rd10846, %rd10845;
	shf.l.wrap.b32 	%r6864, %r6858, %r6859, 23;
	shf.l.wrap.b32 	%r6865, %r6859, %r6858, 23;
	mov.b64 	%rd10848, {%r6865, %r6864};
	xor.b64  	%rd10849, %rd10847, %rd10848;
	xor.b64  	%rd10850, %rd10809, %rd10785;
	and.b64  	%rd10851, %rd10833, %rd10850;
	xor.b64  	%rd10852, %rd10851, %rd10785;
	add.s64 	%rd10853, %rd10761, %rd21581;
	add.s64 	%rd10854, %rd10853, %rd21444;
	add.s64 	%rd10855, %rd10854, %rd10852;
	add.s64 	%rd10856, %rd10855, %rd10849;
	add.s64 	%rd10857, %rd10856, %rd10772;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6866,%dummy}, %rd10844;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6867}, %rd10844;
	}
	shf.r.wrap.b32 	%r6868, %r6867, %r6866, 28;
	shf.r.wrap.b32 	%r6869, %r6866, %r6867, 28;
	mov.b64 	%rd10858, {%r6869, %r6868};
	shf.l.wrap.b32 	%r6870, %r6866, %r6867, 30;
	shf.l.wrap.b32 	%r6871, %r6867, %r6866, 30;
	mov.b64 	%rd10859, {%r6871, %r6870};
	xor.b64  	%rd10860, %rd10859, %rd10858;
	shf.l.wrap.b32 	%r6872, %r6866, %r6867, 25;
	shf.l.wrap.b32 	%r6873, %r6867, %r6866, 25;
	mov.b64 	%rd10861, {%r6873, %r6872};
	xor.b64  	%rd10862, %rd10860, %rd10861;
	xor.b64  	%rd10863, %rd10844, %rd10796;
	xor.b64  	%rd10864, %rd10844, %rd10820;
	and.b64  	%rd10865, %rd10864, %rd10863;
	xor.b64  	%rd10866, %rd10865, %rd10844;
	add.s64 	%rd10867, %rd10856, %rd10866;
	add.s64 	%rd10868, %rd10867, %rd10862;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6874,%dummy}, %rd10857;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6875}, %rd10857;
	}
	shf.r.wrap.b32 	%r6876, %r6875, %r6874, 14;
	shf.r.wrap.b32 	%r6877, %r6874, %r6875, 14;
	mov.b64 	%rd10869, {%r6877, %r6876};
	shf.r.wrap.b32 	%r6878, %r6875, %r6874, 18;
	shf.r.wrap.b32 	%r6879, %r6874, %r6875, 18;
	mov.b64 	%rd10870, {%r6879, %r6878};
	xor.b64  	%rd10871, %rd10870, %rd10869;
	shf.l.wrap.b32 	%r6880, %r6874, %r6875, 23;
	shf.l.wrap.b32 	%r6881, %r6875, %r6874, 23;
	mov.b64 	%rd10872, {%r6881, %r6880};
	xor.b64  	%rd10873, %rd10871, %rd10872;
	xor.b64  	%rd10874, %rd10833, %rd10809;
	and.b64  	%rd10875, %rd10857, %rd10874;
	xor.b64  	%rd10876, %rd10875, %rd10809;
	add.s64 	%rd10877, %rd10785, %rd21580;
	add.s64 	%rd10878, %rd10877, %rd21443;
	add.s64 	%rd10879, %rd10878, %rd10876;
	add.s64 	%rd10880, %rd10879, %rd10873;
	add.s64 	%rd10881, %rd10880, %rd10796;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6882,%dummy}, %rd10868;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6883}, %rd10868;
	}
	shf.r.wrap.b32 	%r6884, %r6883, %r6882, 28;
	shf.r.wrap.b32 	%r6885, %r6882, %r6883, 28;
	mov.b64 	%rd10882, {%r6885, %r6884};
	shf.l.wrap.b32 	%r6886, %r6882, %r6883, 30;
	shf.l.wrap.b32 	%r6887, %r6883, %r6882, 30;
	mov.b64 	%rd10883, {%r6887, %r6886};
	xor.b64  	%rd10884, %rd10883, %rd10882;
	shf.l.wrap.b32 	%r6888, %r6882, %r6883, 25;
	shf.l.wrap.b32 	%r6889, %r6883, %r6882, 25;
	mov.b64 	%rd10885, {%r6889, %r6888};
	xor.b64  	%rd10886, %rd10884, %rd10885;
	xor.b64  	%rd10887, %rd10868, %rd10820;
	xor.b64  	%rd10888, %rd10868, %rd10844;
	and.b64  	%rd10889, %rd10888, %rd10887;
	xor.b64  	%rd10890, %rd10889, %rd10868;
	add.s64 	%rd10891, %rd10880, %rd10890;
	add.s64 	%rd10892, %rd10891, %rd10886;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6890,%dummy}, %rd10881;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6891}, %rd10881;
	}
	shf.r.wrap.b32 	%r6892, %r6891, %r6890, 14;
	shf.r.wrap.b32 	%r6893, %r6890, %r6891, 14;
	mov.b64 	%rd10893, {%r6893, %r6892};
	shf.r.wrap.b32 	%r6894, %r6891, %r6890, 18;
	shf.r.wrap.b32 	%r6895, %r6890, %r6891, 18;
	mov.b64 	%rd10894, {%r6895, %r6894};
	xor.b64  	%rd10895, %rd10894, %rd10893;
	shf.l.wrap.b32 	%r6896, %r6890, %r6891, 23;
	shf.l.wrap.b32 	%r6897, %r6891, %r6890, 23;
	mov.b64 	%rd10896, {%r6897, %r6896};
	xor.b64  	%rd10897, %rd10895, %rd10896;
	xor.b64  	%rd10898, %rd10857, %rd10833;
	and.b64  	%rd10899, %rd10881, %rd10898;
	xor.b64  	%rd10900, %rd10899, %rd10833;
	add.s64 	%rd10901, %rd10809, %rd21579;
	add.s64 	%rd10902, %rd10901, %rd21442;
	add.s64 	%rd10903, %rd10902, %rd10900;
	add.s64 	%rd10904, %rd10903, %rd10897;
	add.s64 	%rd21591, %rd10904, %rd10820;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6898,%dummy}, %rd10892;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6899}, %rd10892;
	}
	shf.r.wrap.b32 	%r6900, %r6899, %r6898, 28;
	shf.r.wrap.b32 	%r6901, %r6898, %r6899, 28;
	mov.b64 	%rd10905, {%r6901, %r6900};
	shf.l.wrap.b32 	%r6902, %r6898, %r6899, 30;
	shf.l.wrap.b32 	%r6903, %r6899, %r6898, 30;
	mov.b64 	%rd10906, {%r6903, %r6902};
	xor.b64  	%rd10907, %rd10906, %rd10905;
	shf.l.wrap.b32 	%r6904, %r6898, %r6899, 25;
	shf.l.wrap.b32 	%r6905, %r6899, %r6898, 25;
	mov.b64 	%rd10908, {%r6905, %r6904};
	xor.b64  	%rd10909, %rd10907, %rd10908;
	xor.b64  	%rd10910, %rd10892, %rd10844;
	xor.b64  	%rd10911, %rd10892, %rd10868;
	and.b64  	%rd10912, %rd10911, %rd10910;
	xor.b64  	%rd10913, %rd10912, %rd10892;
	add.s64 	%rd10914, %rd10904, %rd10913;
	add.s64 	%rd21587, %rd10914, %rd10909;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6906,%dummy}, %rd21591;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6907}, %rd21591;
	}
	shf.r.wrap.b32 	%r6908, %r6907, %r6906, 14;
	shf.r.wrap.b32 	%r6909, %r6906, %r6907, 14;
	mov.b64 	%rd10915, {%r6909, %r6908};
	shf.r.wrap.b32 	%r6910, %r6907, %r6906, 18;
	shf.r.wrap.b32 	%r6911, %r6906, %r6907, 18;
	mov.b64 	%rd10916, {%r6911, %r6910};
	xor.b64  	%rd10917, %rd10916, %rd10915;
	shf.l.wrap.b32 	%r6912, %r6906, %r6907, 23;
	shf.l.wrap.b32 	%r6913, %r6907, %r6906, 23;
	mov.b64 	%rd10918, {%r6913, %r6912};
	xor.b64  	%rd10919, %rd10917, %rd10918;
	xor.b64  	%rd10920, %rd10881, %rd10857;
	and.b64  	%rd10921, %rd21591, %rd10920;
	xor.b64  	%rd10922, %rd10921, %rd10857;
	add.s64 	%rd10923, %rd10833, %rd21578;
	add.s64 	%rd10924, %rd10923, %rd21441;
	add.s64 	%rd10925, %rd10924, %rd10922;
	add.s64 	%rd10926, %rd10925, %rd10919;
	add.s64 	%rd21590, %rd10926, %rd10844;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6914,%dummy}, %rd21587;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6915}, %rd21587;
	}
	shf.r.wrap.b32 	%r6916, %r6915, %r6914, 28;
	shf.r.wrap.b32 	%r6917, %r6914, %r6915, 28;
	mov.b64 	%rd10927, {%r6917, %r6916};
	shf.l.wrap.b32 	%r6918, %r6914, %r6915, 30;
	shf.l.wrap.b32 	%r6919, %r6915, %r6914, 30;
	mov.b64 	%rd10928, {%r6919, %r6918};
	xor.b64  	%rd10929, %rd10928, %rd10927;
	shf.l.wrap.b32 	%r6920, %r6914, %r6915, 25;
	shf.l.wrap.b32 	%r6921, %r6915, %r6914, 25;
	mov.b64 	%rd10930, {%r6921, %r6920};
	xor.b64  	%rd10931, %rd10929, %rd10930;
	xor.b64  	%rd10932, %rd21587, %rd10868;
	xor.b64  	%rd10933, %rd21587, %rd10892;
	and.b64  	%rd10934, %rd10933, %rd10932;
	xor.b64  	%rd10935, %rd10934, %rd21587;
	add.s64 	%rd10936, %rd10926, %rd10935;
	add.s64 	%rd21586, %rd10936, %rd10931;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6922,%dummy}, %rd21590;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6923}, %rd21590;
	}
	shf.r.wrap.b32 	%r6924, %r6923, %r6922, 14;
	shf.r.wrap.b32 	%r6925, %r6922, %r6923, 14;
	mov.b64 	%rd10937, {%r6925, %r6924};
	shf.r.wrap.b32 	%r6926, %r6923, %r6922, 18;
	shf.r.wrap.b32 	%r6927, %r6922, %r6923, 18;
	mov.b64 	%rd10938, {%r6927, %r6926};
	xor.b64  	%rd10939, %rd10938, %rd10937;
	shf.l.wrap.b32 	%r6928, %r6922, %r6923, 23;
	shf.l.wrap.b32 	%r6929, %r6923, %r6922, 23;
	mov.b64 	%rd10940, {%r6929, %r6928};
	xor.b64  	%rd10941, %rd10939, %rd10940;
	xor.b64  	%rd10942, %rd21591, %rd10881;
	and.b64  	%rd10943, %rd21590, %rd10942;
	xor.b64  	%rd10944, %rd10943, %rd10881;
	add.s64 	%rd10945, %rd10857, %rd21577;
	add.s64 	%rd10946, %rd10945, %rd21440;
	add.s64 	%rd10947, %rd10946, %rd10944;
	add.s64 	%rd10948, %rd10947, %rd10941;
	add.s64 	%rd21589, %rd10948, %rd10868;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6930,%dummy}, %rd21586;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6931}, %rd21586;
	}
	shf.r.wrap.b32 	%r6932, %r6931, %r6930, 28;
	shf.r.wrap.b32 	%r6933, %r6930, %r6931, 28;
	mov.b64 	%rd10949, {%r6933, %r6932};
	shf.l.wrap.b32 	%r6934, %r6930, %r6931, 30;
	shf.l.wrap.b32 	%r6935, %r6931, %r6930, 30;
	mov.b64 	%rd10950, {%r6935, %r6934};
	xor.b64  	%rd10951, %rd10950, %rd10949;
	shf.l.wrap.b32 	%r6936, %r6930, %r6931, 25;
	shf.l.wrap.b32 	%r6937, %r6931, %r6930, 25;
	mov.b64 	%rd10952, {%r6937, %r6936};
	xor.b64  	%rd10953, %rd10951, %rd10952;
	xor.b64  	%rd10954, %rd21586, %rd10892;
	xor.b64  	%rd10955, %rd21586, %rd21587;
	and.b64  	%rd10956, %rd10955, %rd10954;
	xor.b64  	%rd10957, %rd10956, %rd21586;
	add.s64 	%rd10958, %rd10948, %rd10957;
	add.s64 	%rd21585, %rd10958, %rd10953;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6938,%dummy}, %rd21589;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6939}, %rd21589;
	}
	shf.r.wrap.b32 	%r6940, %r6939, %r6938, 14;
	shf.r.wrap.b32 	%r6941, %r6938, %r6939, 14;
	mov.b64 	%rd10959, {%r6941, %r6940};
	shf.r.wrap.b32 	%r6942, %r6939, %r6938, 18;
	shf.r.wrap.b32 	%r6943, %r6938, %r6939, 18;
	mov.b64 	%rd10960, {%r6943, %r6942};
	xor.b64  	%rd10961, %rd10960, %rd10959;
	shf.l.wrap.b32 	%r6944, %r6938, %r6939, 23;
	shf.l.wrap.b32 	%r6945, %r6939, %r6938, 23;
	mov.b64 	%rd10962, {%r6945, %r6944};
	xor.b64  	%rd10963, %rd10961, %rd10962;
	xor.b64  	%rd10964, %rd21590, %rd21591;
	and.b64  	%rd10965, %rd21589, %rd10964;
	xor.b64  	%rd10966, %rd10965, %rd21591;
	add.s64 	%rd10967, %rd10881, %rd21576;
	add.s64 	%rd10968, %rd10967, %rd21439;
	add.s64 	%rd10969, %rd10968, %rd10966;
	add.s64 	%rd10970, %rd10969, %rd10963;
	add.s64 	%rd21588, %rd10970, %rd10892;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6946,%dummy}, %rd21585;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6947}, %rd21585;
	}
	shf.r.wrap.b32 	%r6948, %r6947, %r6946, 28;
	shf.r.wrap.b32 	%r6949, %r6946, %r6947, 28;
	mov.b64 	%rd10971, {%r6949, %r6948};
	shf.l.wrap.b32 	%r6950, %r6946, %r6947, 30;
	shf.l.wrap.b32 	%r6951, %r6947, %r6946, 30;
	mov.b64 	%rd10972, {%r6951, %r6950};
	xor.b64  	%rd10973, %rd10972, %rd10971;
	shf.l.wrap.b32 	%r6952, %r6946, %r6947, 25;
	shf.l.wrap.b32 	%r6953, %r6947, %r6946, 25;
	mov.b64 	%rd10974, {%r6953, %r6952};
	xor.b64  	%rd10975, %rd10973, %rd10974;
	xor.b64  	%rd10976, %rd21585, %rd21587;
	xor.b64  	%rd10977, %rd21585, %rd21586;
	and.b64  	%rd10978, %rd10977, %rd10976;
	xor.b64  	%rd10979, %rd10978, %rd21585;
	add.s64 	%rd10980, %rd10970, %rd10979;
	add.s64 	%rd21584, %rd10980, %rd10975;
	mov.u32 	%r14414, 16;

BB3_194:
	mov.u64 	%rd21334, k_sha512;
	shr.u64 	%rd10981, %rd21577, 6;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6954,%dummy}, %rd21577;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6955}, %rd21577;
	}
	shf.r.wrap.b32 	%r6956, %r6955, %r6954, 19;
	shf.r.wrap.b32 	%r6957, %r6954, %r6955, 19;
	mov.b64 	%rd10982, {%r6957, %r6956};
	xor.b64  	%rd10983, %rd10982, %rd10981;
	shf.l.wrap.b32 	%r6958, %r6954, %r6955, 3;
	shf.l.wrap.b32 	%r6959, %r6955, %r6954, 3;
	mov.b64 	%rd10984, {%r6959, %r6958};
	xor.b64  	%rd10985, %rd10983, %rd10984;
	shr.u64 	%rd10986, %rd21593, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6960,%dummy}, %rd21593;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6961}, %rd21593;
	}
	shf.r.wrap.b32 	%r6962, %r6961, %r6960, 1;
	shf.r.wrap.b32 	%r6963, %r6960, %r6961, 1;
	mov.b64 	%rd10987, {%r6963, %r6962};
	xor.b64  	%rd10988, %rd10987, %rd10986;
	shf.r.wrap.b32 	%r6964, %r6961, %r6960, 8;
	shf.r.wrap.b32 	%r6965, %r6960, %r6961, 8;
	mov.b64 	%rd10989, {%r6965, %r6964};
	xor.b64  	%rd10990, %rd10988, %rd10989;
	add.s64 	%rd10991, %rd21582, %rd21592;
	add.s64 	%rd10992, %rd10991, %rd10985;
	add.s64 	%rd21592, %rd10992, %rd10990;
	shr.u64 	%rd10993, %rd21576, 6;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6966,%dummy}, %rd21576;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6967}, %rd21576;
	}
	shf.r.wrap.b32 	%r6968, %r6967, %r6966, 19;
	shf.r.wrap.b32 	%r6969, %r6966, %r6967, 19;
	mov.b64 	%rd10994, {%r6969, %r6968};
	xor.b64  	%rd10995, %rd10994, %rd10993;
	shf.l.wrap.b32 	%r6970, %r6966, %r6967, 3;
	shf.l.wrap.b32 	%r6971, %r6967, %r6966, 3;
	mov.b64 	%rd10996, {%r6971, %r6970};
	xor.b64  	%rd10997, %rd10995, %rd10996;
	shr.u64 	%rd10998, %rd21594, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6972,%dummy}, %rd21594;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6973}, %rd21594;
	}
	shf.r.wrap.b32 	%r6974, %r6973, %r6972, 1;
	shf.r.wrap.b32 	%r6975, %r6972, %r6973, 1;
	mov.b64 	%rd10999, {%r6975, %r6974};
	xor.b64  	%rd11000, %rd10999, %rd10998;
	shf.r.wrap.b32 	%r6976, %r6973, %r6972, 8;
	shf.r.wrap.b32 	%r6977, %r6972, %r6973, 8;
	mov.b64 	%rd11001, {%r6977, %r6976};
	xor.b64  	%rd11002, %rd11000, %rd11001;
	add.s64 	%rd11003, %rd21581, %rd21593;
	add.s64 	%rd11004, %rd11003, %rd10997;
	add.s64 	%rd21593, %rd11004, %rd11002;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6978,%dummy}, %rd21592;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6979}, %rd21592;
	}
	shf.r.wrap.b32 	%r6980, %r6979, %r6978, 19;
	shf.r.wrap.b32 	%r6981, %r6978, %r6979, 19;
	mov.b64 	%rd11005, {%r6981, %r6980};
	shf.l.wrap.b32 	%r6982, %r6978, %r6979, 3;
	shf.l.wrap.b32 	%r6983, %r6979, %r6978, 3;
	mov.b64 	%rd11006, {%r6983, %r6982};
	shr.u64 	%rd11007, %rd21592, 6;
	xor.b64  	%rd11008, %rd11005, %rd11007;
	xor.b64  	%rd11009, %rd11008, %rd11006;
	shr.u64 	%rd11010, %rd21595, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6984,%dummy}, %rd21595;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6985}, %rd21595;
	}
	shf.r.wrap.b32 	%r6986, %r6985, %r6984, 1;
	shf.r.wrap.b32 	%r6987, %r6984, %r6985, 1;
	mov.b64 	%rd11011, {%r6987, %r6986};
	xor.b64  	%rd11012, %rd11011, %rd11010;
	shf.r.wrap.b32 	%r6988, %r6985, %r6984, 8;
	shf.r.wrap.b32 	%r6989, %r6984, %r6985, 8;
	mov.b64 	%rd11013, {%r6989, %r6988};
	xor.b64  	%rd11014, %rd11012, %rd11013;
	add.s64 	%rd11015, %rd21580, %rd21594;
	add.s64 	%rd11016, %rd11015, %rd11009;
	add.s64 	%rd21594, %rd11016, %rd11014;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6990,%dummy}, %rd21593;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6991}, %rd21593;
	}
	shf.r.wrap.b32 	%r6992, %r6991, %r6990, 19;
	shf.r.wrap.b32 	%r6993, %r6990, %r6991, 19;
	mov.b64 	%rd11017, {%r6993, %r6992};
	shf.l.wrap.b32 	%r6994, %r6990, %r6991, 3;
	shf.l.wrap.b32 	%r6995, %r6991, %r6990, 3;
	mov.b64 	%rd11018, {%r6995, %r6994};
	shr.u64 	%rd11019, %rd21593, 6;
	xor.b64  	%rd11020, %rd11017, %rd11019;
	xor.b64  	%rd11021, %rd11020, %rd11018;
	shr.u64 	%rd11022, %rd21596, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r6996,%dummy}, %rd21596;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r6997}, %rd21596;
	}
	shf.r.wrap.b32 	%r6998, %r6997, %r6996, 1;
	shf.r.wrap.b32 	%r6999, %r6996, %r6997, 1;
	mov.b64 	%rd11023, {%r6999, %r6998};
	xor.b64  	%rd11024, %rd11023, %rd11022;
	shf.r.wrap.b32 	%r7000, %r6997, %r6996, 8;
	shf.r.wrap.b32 	%r7001, %r6996, %r6997, 8;
	mov.b64 	%rd11025, {%r7001, %r7000};
	xor.b64  	%rd11026, %rd11024, %rd11025;
	add.s64 	%rd11027, %rd21579, %rd21595;
	add.s64 	%rd11028, %rd11027, %rd11021;
	add.s64 	%rd21595, %rd11028, %rd11026;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7002,%dummy}, %rd21594;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7003}, %rd21594;
	}
	shf.r.wrap.b32 	%r7004, %r7003, %r7002, 19;
	shf.r.wrap.b32 	%r7005, %r7002, %r7003, 19;
	mov.b64 	%rd11029, {%r7005, %r7004};
	shf.l.wrap.b32 	%r7006, %r7002, %r7003, 3;
	shf.l.wrap.b32 	%r7007, %r7003, %r7002, 3;
	mov.b64 	%rd11030, {%r7007, %r7006};
	shr.u64 	%rd11031, %rd21594, 6;
	xor.b64  	%rd11032, %rd11029, %rd11031;
	xor.b64  	%rd11033, %rd11032, %rd11030;
	shr.u64 	%rd11034, %rd21597, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7008,%dummy}, %rd21597;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7009}, %rd21597;
	}
	shf.r.wrap.b32 	%r7010, %r7009, %r7008, 1;
	shf.r.wrap.b32 	%r7011, %r7008, %r7009, 1;
	mov.b64 	%rd11035, {%r7011, %r7010};
	xor.b64  	%rd11036, %rd11035, %rd11034;
	shf.r.wrap.b32 	%r7012, %r7009, %r7008, 8;
	shf.r.wrap.b32 	%r7013, %r7008, %r7009, 8;
	mov.b64 	%rd11037, {%r7013, %r7012};
	xor.b64  	%rd11038, %rd11036, %rd11037;
	add.s64 	%rd11039, %rd21578, %rd21596;
	add.s64 	%rd11040, %rd11039, %rd11033;
	add.s64 	%rd21596, %rd11040, %rd11038;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7014,%dummy}, %rd21595;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7015}, %rd21595;
	}
	shf.r.wrap.b32 	%r7016, %r7015, %r7014, 19;
	shf.r.wrap.b32 	%r7017, %r7014, %r7015, 19;
	mov.b64 	%rd11041, {%r7017, %r7016};
	shf.l.wrap.b32 	%r7018, %r7014, %r7015, 3;
	shf.l.wrap.b32 	%r7019, %r7015, %r7014, 3;
	mov.b64 	%rd11042, {%r7019, %r7018};
	shr.u64 	%rd11043, %rd21595, 6;
	xor.b64  	%rd11044, %rd11041, %rd11043;
	xor.b64  	%rd11045, %rd11044, %rd11042;
	shr.u64 	%rd11046, %rd21598, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7020,%dummy}, %rd21598;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7021}, %rd21598;
	}
	shf.r.wrap.b32 	%r7022, %r7021, %r7020, 1;
	shf.r.wrap.b32 	%r7023, %r7020, %r7021, 1;
	mov.b64 	%rd11047, {%r7023, %r7022};
	xor.b64  	%rd11048, %rd11047, %rd11046;
	shf.r.wrap.b32 	%r7024, %r7021, %r7020, 8;
	shf.r.wrap.b32 	%r7025, %r7020, %r7021, 8;
	mov.b64 	%rd11049, {%r7025, %r7024};
	xor.b64  	%rd11050, %rd11048, %rd11049;
	add.s64 	%rd11051, %rd21577, %rd21597;
	add.s64 	%rd11052, %rd11051, %rd11045;
	add.s64 	%rd21597, %rd11052, %rd11050;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7026,%dummy}, %rd21596;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7027}, %rd21596;
	}
	shf.r.wrap.b32 	%r7028, %r7027, %r7026, 19;
	shf.r.wrap.b32 	%r7029, %r7026, %r7027, 19;
	mov.b64 	%rd11053, {%r7029, %r7028};
	shf.l.wrap.b32 	%r7030, %r7026, %r7027, 3;
	shf.l.wrap.b32 	%r7031, %r7027, %r7026, 3;
	mov.b64 	%rd11054, {%r7031, %r7030};
	shr.u64 	%rd11055, %rd21596, 6;
	xor.b64  	%rd11056, %rd11053, %rd11055;
	xor.b64  	%rd11057, %rd11056, %rd11054;
	shr.u64 	%rd11058, %rd21599, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7032,%dummy}, %rd21599;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7033}, %rd21599;
	}
	shf.r.wrap.b32 	%r7034, %r7033, %r7032, 1;
	shf.r.wrap.b32 	%r7035, %r7032, %r7033, 1;
	mov.b64 	%rd11059, {%r7035, %r7034};
	xor.b64  	%rd11060, %rd11059, %rd11058;
	shf.r.wrap.b32 	%r7036, %r7033, %r7032, 8;
	shf.r.wrap.b32 	%r7037, %r7032, %r7033, 8;
	mov.b64 	%rd11061, {%r7037, %r7036};
	xor.b64  	%rd11062, %rd11060, %rd11061;
	add.s64 	%rd11063, %rd21576, %rd21598;
	add.s64 	%rd11064, %rd11063, %rd11057;
	add.s64 	%rd21598, %rd11064, %rd11062;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7038,%dummy}, %rd21597;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7039}, %rd21597;
	}
	shf.r.wrap.b32 	%r7040, %r7039, %r7038, 19;
	shf.r.wrap.b32 	%r7041, %r7038, %r7039, 19;
	mov.b64 	%rd11065, {%r7041, %r7040};
	shf.l.wrap.b32 	%r7042, %r7038, %r7039, 3;
	shf.l.wrap.b32 	%r7043, %r7039, %r7038, 3;
	mov.b64 	%rd11066, {%r7043, %r7042};
	shr.u64 	%rd11067, %rd21597, 6;
	xor.b64  	%rd11068, %rd11065, %rd11067;
	xor.b64  	%rd11069, %rd11068, %rd11066;
	shr.u64 	%rd11070, %rd21583, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7044,%dummy}, %rd21583;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7045}, %rd21583;
	}
	shf.r.wrap.b32 	%r7046, %r7045, %r7044, 1;
	shf.r.wrap.b32 	%r7047, %r7044, %r7045, 1;
	mov.b64 	%rd11071, {%r7047, %r7046};
	xor.b64  	%rd11072, %rd11071, %rd11070;
	shf.r.wrap.b32 	%r7048, %r7045, %r7044, 8;
	shf.r.wrap.b32 	%r7049, %r7044, %r7045, 8;
	mov.b64 	%rd11073, {%r7049, %r7048};
	xor.b64  	%rd11074, %rd11072, %rd11073;
	add.s64 	%rd11075, %rd21592, %rd21599;
	add.s64 	%rd11076, %rd11075, %rd11069;
	add.s64 	%rd21599, %rd11076, %rd11074;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7050,%dummy}, %rd21598;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7051}, %rd21598;
	}
	shf.r.wrap.b32 	%r7052, %r7051, %r7050, 19;
	shf.r.wrap.b32 	%r7053, %r7050, %r7051, 19;
	mov.b64 	%rd11077, {%r7053, %r7052};
	shf.l.wrap.b32 	%r7054, %r7050, %r7051, 3;
	shf.l.wrap.b32 	%r7055, %r7051, %r7050, 3;
	mov.b64 	%rd11078, {%r7055, %r7054};
	shr.u64 	%rd11079, %rd21598, 6;
	xor.b64  	%rd11080, %rd11077, %rd11079;
	xor.b64  	%rd11081, %rd11080, %rd11078;
	shr.u64 	%rd11082, %rd21582, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7056,%dummy}, %rd21582;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7057}, %rd21582;
	}
	shf.r.wrap.b32 	%r7058, %r7057, %r7056, 1;
	shf.r.wrap.b32 	%r7059, %r7056, %r7057, 1;
	mov.b64 	%rd11083, {%r7059, %r7058};
	xor.b64  	%rd11084, %rd11083, %rd11082;
	shf.r.wrap.b32 	%r7060, %r7057, %r7056, 8;
	shf.r.wrap.b32 	%r7061, %r7056, %r7057, 8;
	mov.b64 	%rd11085, {%r7061, %r7060};
	xor.b64  	%rd11086, %rd11084, %rd11085;
	add.s64 	%rd11087, %rd21593, %rd21583;
	add.s64 	%rd11088, %rd11087, %rd11081;
	add.s64 	%rd21583, %rd11088, %rd11086;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7062,%dummy}, %rd21599;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7063}, %rd21599;
	}
	shf.r.wrap.b32 	%r7064, %r7063, %r7062, 19;
	shf.r.wrap.b32 	%r7065, %r7062, %r7063, 19;
	mov.b64 	%rd11089, {%r7065, %r7064};
	shf.l.wrap.b32 	%r7066, %r7062, %r7063, 3;
	shf.l.wrap.b32 	%r7067, %r7063, %r7062, 3;
	mov.b64 	%rd11090, {%r7067, %r7066};
	shr.u64 	%rd11091, %rd21599, 6;
	xor.b64  	%rd11092, %rd11089, %rd11091;
	xor.b64  	%rd11093, %rd11092, %rd11090;
	shr.u64 	%rd11094, %rd21581, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7068,%dummy}, %rd21581;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7069}, %rd21581;
	}
	shf.r.wrap.b32 	%r7070, %r7069, %r7068, 1;
	shf.r.wrap.b32 	%r7071, %r7068, %r7069, 1;
	mov.b64 	%rd11095, {%r7071, %r7070};
	xor.b64  	%rd11096, %rd11095, %rd11094;
	shf.r.wrap.b32 	%r7072, %r7069, %r7068, 8;
	shf.r.wrap.b32 	%r7073, %r7068, %r7069, 8;
	mov.b64 	%rd11097, {%r7073, %r7072};
	xor.b64  	%rd11098, %rd11096, %rd11097;
	add.s64 	%rd11099, %rd21594, %rd21582;
	add.s64 	%rd11100, %rd11099, %rd11093;
	add.s64 	%rd21582, %rd11100, %rd11098;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7074,%dummy}, %rd21583;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7075}, %rd21583;
	}
	shf.r.wrap.b32 	%r7076, %r7075, %r7074, 19;
	shf.r.wrap.b32 	%r7077, %r7074, %r7075, 19;
	mov.b64 	%rd11101, {%r7077, %r7076};
	shf.l.wrap.b32 	%r7078, %r7074, %r7075, 3;
	shf.l.wrap.b32 	%r7079, %r7075, %r7074, 3;
	mov.b64 	%rd11102, {%r7079, %r7078};
	shr.u64 	%rd11103, %rd21583, 6;
	xor.b64  	%rd11104, %rd11101, %rd11103;
	xor.b64  	%rd11105, %rd11104, %rd11102;
	shr.u64 	%rd11106, %rd21580, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7080,%dummy}, %rd21580;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7081}, %rd21580;
	}
	shf.r.wrap.b32 	%r7082, %r7081, %r7080, 1;
	shf.r.wrap.b32 	%r7083, %r7080, %r7081, 1;
	mov.b64 	%rd11107, {%r7083, %r7082};
	xor.b64  	%rd11108, %rd11107, %rd11106;
	shf.r.wrap.b32 	%r7084, %r7081, %r7080, 8;
	shf.r.wrap.b32 	%r7085, %r7080, %r7081, 8;
	mov.b64 	%rd11109, {%r7085, %r7084};
	xor.b64  	%rd11110, %rd11108, %rd11109;
	add.s64 	%rd11111, %rd21595, %rd21581;
	add.s64 	%rd11112, %rd11111, %rd11105;
	add.s64 	%rd21581, %rd11112, %rd11110;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7086,%dummy}, %rd21582;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7087}, %rd21582;
	}
	shf.r.wrap.b32 	%r7088, %r7087, %r7086, 19;
	shf.r.wrap.b32 	%r7089, %r7086, %r7087, 19;
	mov.b64 	%rd11113, {%r7089, %r7088};
	shf.l.wrap.b32 	%r7090, %r7086, %r7087, 3;
	shf.l.wrap.b32 	%r7091, %r7087, %r7086, 3;
	mov.b64 	%rd11114, {%r7091, %r7090};
	shr.u64 	%rd11115, %rd21582, 6;
	xor.b64  	%rd11116, %rd11113, %rd11115;
	xor.b64  	%rd11117, %rd11116, %rd11114;
	shr.u64 	%rd11118, %rd21579, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7092,%dummy}, %rd21579;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7093}, %rd21579;
	}
	shf.r.wrap.b32 	%r7094, %r7093, %r7092, 1;
	shf.r.wrap.b32 	%r7095, %r7092, %r7093, 1;
	mov.b64 	%rd11119, {%r7095, %r7094};
	xor.b64  	%rd11120, %rd11119, %rd11118;
	shf.r.wrap.b32 	%r7096, %r7093, %r7092, 8;
	shf.r.wrap.b32 	%r7097, %r7092, %r7093, 8;
	mov.b64 	%rd11121, {%r7097, %r7096};
	xor.b64  	%rd11122, %rd11120, %rd11121;
	add.s64 	%rd11123, %rd21596, %rd21580;
	add.s64 	%rd11124, %rd11123, %rd11117;
	add.s64 	%rd21580, %rd11124, %rd11122;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7098,%dummy}, %rd21581;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7099}, %rd21581;
	}
	shf.r.wrap.b32 	%r7100, %r7099, %r7098, 19;
	shf.r.wrap.b32 	%r7101, %r7098, %r7099, 19;
	mov.b64 	%rd11125, {%r7101, %r7100};
	shf.l.wrap.b32 	%r7102, %r7098, %r7099, 3;
	shf.l.wrap.b32 	%r7103, %r7099, %r7098, 3;
	mov.b64 	%rd11126, {%r7103, %r7102};
	shr.u64 	%rd11127, %rd21581, 6;
	xor.b64  	%rd11128, %rd11125, %rd11127;
	xor.b64  	%rd11129, %rd11128, %rd11126;
	shr.u64 	%rd11130, %rd21578, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7104,%dummy}, %rd21578;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7105}, %rd21578;
	}
	shf.r.wrap.b32 	%r7106, %r7105, %r7104, 1;
	shf.r.wrap.b32 	%r7107, %r7104, %r7105, 1;
	mov.b64 	%rd11131, {%r7107, %r7106};
	xor.b64  	%rd11132, %rd11131, %rd11130;
	shf.r.wrap.b32 	%r7108, %r7105, %r7104, 8;
	shf.r.wrap.b32 	%r7109, %r7104, %r7105, 8;
	mov.b64 	%rd11133, {%r7109, %r7108};
	xor.b64  	%rd11134, %rd11132, %rd11133;
	add.s64 	%rd11135, %rd21597, %rd21579;
	add.s64 	%rd11136, %rd11135, %rd11129;
	add.s64 	%rd21579, %rd11136, %rd11134;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7110,%dummy}, %rd21580;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7111}, %rd21580;
	}
	shf.r.wrap.b32 	%r7112, %r7111, %r7110, 19;
	shf.r.wrap.b32 	%r7113, %r7110, %r7111, 19;
	mov.b64 	%rd11137, {%r7113, %r7112};
	shf.l.wrap.b32 	%r7114, %r7110, %r7111, 3;
	shf.l.wrap.b32 	%r7115, %r7111, %r7110, 3;
	mov.b64 	%rd11138, {%r7115, %r7114};
	shr.u64 	%rd11139, %rd21580, 6;
	xor.b64  	%rd11140, %rd11137, %rd11139;
	xor.b64  	%rd11141, %rd11140, %rd11138;
	shr.u64 	%rd11142, %rd21577, 7;
	shf.r.wrap.b32 	%r7116, %r6955, %r6954, 1;
	shf.r.wrap.b32 	%r7117, %r6954, %r6955, 1;
	mov.b64 	%rd11143, {%r7117, %r7116};
	xor.b64  	%rd11144, %rd11143, %rd11142;
	shf.r.wrap.b32 	%r7118, %r6955, %r6954, 8;
	shf.r.wrap.b32 	%r7119, %r6954, %r6955, 8;
	mov.b64 	%rd11145, {%r7119, %r7118};
	xor.b64  	%rd11146, %rd11144, %rd11145;
	add.s64 	%rd11147, %rd21598, %rd21578;
	add.s64 	%rd11148, %rd11147, %rd11141;
	add.s64 	%rd21578, %rd11148, %rd11146;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7120,%dummy}, %rd21579;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7121}, %rd21579;
	}
	shf.r.wrap.b32 	%r7122, %r7121, %r7120, 19;
	shf.r.wrap.b32 	%r7123, %r7120, %r7121, 19;
	mov.b64 	%rd11149, {%r7123, %r7122};
	shf.l.wrap.b32 	%r7124, %r7120, %r7121, 3;
	shf.l.wrap.b32 	%r7125, %r7121, %r7120, 3;
	mov.b64 	%rd11150, {%r7125, %r7124};
	shr.u64 	%rd11151, %rd21579, 6;
	xor.b64  	%rd11152, %rd11149, %rd11151;
	xor.b64  	%rd11153, %rd11152, %rd11150;
	shr.u64 	%rd11154, %rd21576, 7;
	shf.r.wrap.b32 	%r7126, %r6967, %r6966, 1;
	shf.r.wrap.b32 	%r7127, %r6966, %r6967, 1;
	mov.b64 	%rd11155, {%r7127, %r7126};
	xor.b64  	%rd11156, %rd11155, %rd11154;
	shf.r.wrap.b32 	%r7128, %r6967, %r6966, 8;
	shf.r.wrap.b32 	%r7129, %r6966, %r6967, 8;
	mov.b64 	%rd11157, {%r7129, %r7128};
	xor.b64  	%rd11158, %rd11156, %rd11157;
	add.s64 	%rd11159, %rd21599, %rd21577;
	add.s64 	%rd11160, %rd11159, %rd11153;
	add.s64 	%rd21577, %rd11160, %rd11158;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7130,%dummy}, %rd21578;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7131}, %rd21578;
	}
	shf.r.wrap.b32 	%r7132, %r7131, %r7130, 19;
	shf.r.wrap.b32 	%r7133, %r7130, %r7131, 19;
	mov.b64 	%rd11161, {%r7133, %r7132};
	shf.l.wrap.b32 	%r7134, %r7130, %r7131, 3;
	shf.l.wrap.b32 	%r7135, %r7131, %r7130, 3;
	mov.b64 	%rd11162, {%r7135, %r7134};
	shr.u64 	%rd11163, %rd21578, 6;
	xor.b64  	%rd11164, %rd11161, %rd11163;
	xor.b64  	%rd11165, %rd11164, %rd11162;
	shf.r.wrap.b32 	%r7136, %r6979, %r6978, 1;
	shf.r.wrap.b32 	%r7137, %r6978, %r6979, 1;
	mov.b64 	%rd11166, {%r7137, %r7136};
	shf.r.wrap.b32 	%r7138, %r6979, %r6978, 8;
	shf.r.wrap.b32 	%r7139, %r6978, %r6979, 8;
	mov.b64 	%rd11167, {%r7139, %r7138};
	shr.u64 	%rd11168, %rd21592, 7;
	xor.b64  	%rd11169, %rd11166, %rd11168;
	xor.b64  	%rd11170, %rd11169, %rd11167;
	add.s64 	%rd11171, %rd21583, %rd21576;
	add.s64 	%rd11172, %rd11171, %rd11165;
	add.s64 	%rd21576, %rd11172, %rd11170;
	mul.wide.s32 	%rd11173, %r14414, 8;
	add.s64 	%rd11175, %rd21334, %rd11173;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7140,%dummy}, %rd21588;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7141}, %rd21588;
	}
	shf.r.wrap.b32 	%r7142, %r7141, %r7140, 18;
	shf.r.wrap.b32 	%r7143, %r7140, %r7141, 18;
	mov.b64 	%rd11176, {%r7143, %r7142};
	shf.r.wrap.b32 	%r7144, %r7141, %r7140, 14;
	shf.r.wrap.b32 	%r7145, %r7140, %r7141, 14;
	mov.b64 	%rd11177, {%r7145, %r7144};
	xor.b64  	%rd11178, %rd11176, %rd11177;
	shf.l.wrap.b32 	%r7146, %r7140, %r7141, 23;
	shf.l.wrap.b32 	%r7147, %r7141, %r7140, 23;
	mov.b64 	%rd11179, {%r7147, %r7146};
	xor.b64  	%rd11180, %rd11178, %rd11179;
	xor.b64  	%rd11181, %rd21589, %rd21590;
	and.b64  	%rd11182, %rd11181, %rd21588;
	xor.b64  	%rd11183, %rd11182, %rd21590;
	add.s64 	%rd11184, %rd11183, %rd21591;
	add.s64 	%rd11185, %rd11184, %rd21592;
	ld.const.u64 	%rd11186, [%rd11175];
	add.s64 	%rd11187, %rd11185, %rd11186;
	add.s64 	%rd11188, %rd11187, %rd11180;
	add.s64 	%rd11189, %rd11188, %rd21587;
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7148}, %rd21584;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7149,%dummy}, %rd21584;
	}
	shf.l.wrap.b32 	%r7150, %r7149, %r7148, 30;
	shf.l.wrap.b32 	%r7151, %r7148, %r7149, 30;
	mov.b64 	%rd11190, {%r7151, %r7150};
	shf.r.wrap.b32 	%r7152, %r7148, %r7149, 28;
	shf.r.wrap.b32 	%r7153, %r7149, %r7148, 28;
	mov.b64 	%rd11191, {%r7153, %r7152};
	xor.b64  	%rd11192, %rd11190, %rd11191;
	shf.l.wrap.b32 	%r7154, %r7149, %r7148, 25;
	shf.l.wrap.b32 	%r7155, %r7148, %r7149, 25;
	mov.b64 	%rd11193, {%r7155, %r7154};
	xor.b64  	%rd11194, %rd11192, %rd11193;
	xor.b64  	%rd11195, %rd21584, %rd21585;
	xor.b64  	%rd11196, %rd21584, %rd21586;
	and.b64  	%rd11197, %rd11195, %rd11196;
	xor.b64  	%rd11198, %rd11197, %rd21584;
	add.s64 	%rd11199, %rd11188, %rd11198;
	add.s64 	%rd11200, %rd11199, %rd11194;
	add.s32 	%r7156, %r14414, 1;
	mul.wide.s32 	%rd11201, %r7156, 8;
	add.s64 	%rd11202, %rd21334, %rd11201;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7157,%dummy}, %rd11189;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7158}, %rd11189;
	}
	shf.r.wrap.b32 	%r7159, %r7158, %r7157, 14;
	shf.r.wrap.b32 	%r7160, %r7157, %r7158, 14;
	mov.b64 	%rd11203, {%r7160, %r7159};
	shf.r.wrap.b32 	%r7161, %r7158, %r7157, 18;
	shf.r.wrap.b32 	%r7162, %r7157, %r7158, 18;
	mov.b64 	%rd11204, {%r7162, %r7161};
	xor.b64  	%rd11205, %rd11204, %rd11203;
	shf.l.wrap.b32 	%r7163, %r7157, %r7158, 23;
	shf.l.wrap.b32 	%r7164, %r7158, %r7157, 23;
	mov.b64 	%rd11206, {%r7164, %r7163};
	xor.b64  	%rd11207, %rd11205, %rd11206;
	xor.b64  	%rd11208, %rd21588, %rd21589;
	and.b64  	%rd11209, %rd11189, %rd11208;
	xor.b64  	%rd11210, %rd11209, %rd21589;
	add.s64 	%rd11211, %rd21593, %rd21590;
	ld.const.u64 	%rd11212, [%rd11202];
	add.s64 	%rd11213, %rd11211, %rd11212;
	add.s64 	%rd11214, %rd11213, %rd11210;
	add.s64 	%rd11215, %rd11214, %rd11207;
	add.s64 	%rd11216, %rd11215, %rd21586;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7165,%dummy}, %rd11200;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7166}, %rd11200;
	}
	shf.r.wrap.b32 	%r7167, %r7166, %r7165, 28;
	shf.r.wrap.b32 	%r7168, %r7165, %r7166, 28;
	mov.b64 	%rd11217, {%r7168, %r7167};
	shf.l.wrap.b32 	%r7169, %r7165, %r7166, 30;
	shf.l.wrap.b32 	%r7170, %r7166, %r7165, 30;
	mov.b64 	%rd11218, {%r7170, %r7169};
	xor.b64  	%rd11219, %rd11218, %rd11217;
	shf.l.wrap.b32 	%r7171, %r7165, %r7166, 25;
	shf.l.wrap.b32 	%r7172, %r7166, %r7165, 25;
	mov.b64 	%rd11220, {%r7172, %r7171};
	xor.b64  	%rd11221, %rd11219, %rd11220;
	xor.b64  	%rd11222, %rd11200, %rd21585;
	xor.b64  	%rd11223, %rd11200, %rd21584;
	and.b64  	%rd11224, %rd11223, %rd11222;
	xor.b64  	%rd11225, %rd11224, %rd11200;
	add.s64 	%rd11226, %rd11215, %rd11225;
	add.s64 	%rd11227, %rd11226, %rd11221;
	add.s32 	%r7173, %r14414, 2;
	mul.wide.s32 	%rd11228, %r7173, 8;
	add.s64 	%rd11229, %rd21334, %rd11228;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7174,%dummy}, %rd11216;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7175}, %rd11216;
	}
	shf.r.wrap.b32 	%r7176, %r7175, %r7174, 14;
	shf.r.wrap.b32 	%r7177, %r7174, %r7175, 14;
	mov.b64 	%rd11230, {%r7177, %r7176};
	shf.r.wrap.b32 	%r7178, %r7175, %r7174, 18;
	shf.r.wrap.b32 	%r7179, %r7174, %r7175, 18;
	mov.b64 	%rd11231, {%r7179, %r7178};
	xor.b64  	%rd11232, %rd11231, %rd11230;
	shf.l.wrap.b32 	%r7180, %r7174, %r7175, 23;
	shf.l.wrap.b32 	%r7181, %r7175, %r7174, 23;
	mov.b64 	%rd11233, {%r7181, %r7180};
	xor.b64  	%rd11234, %rd11232, %rd11233;
	xor.b64  	%rd11235, %rd11189, %rd21588;
	and.b64  	%rd11236, %rd11216, %rd11235;
	xor.b64  	%rd11237, %rd11236, %rd21588;
	add.s64 	%rd11238, %rd21594, %rd21589;
	ld.const.u64 	%rd11239, [%rd11229];
	add.s64 	%rd11240, %rd11238, %rd11239;
	add.s64 	%rd11241, %rd11240, %rd11237;
	add.s64 	%rd11242, %rd11241, %rd11234;
	add.s64 	%rd11243, %rd11242, %rd21585;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7182,%dummy}, %rd11227;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7183}, %rd11227;
	}
	shf.r.wrap.b32 	%r7184, %r7183, %r7182, 28;
	shf.r.wrap.b32 	%r7185, %r7182, %r7183, 28;
	mov.b64 	%rd11244, {%r7185, %r7184};
	shf.l.wrap.b32 	%r7186, %r7182, %r7183, 30;
	shf.l.wrap.b32 	%r7187, %r7183, %r7182, 30;
	mov.b64 	%rd11245, {%r7187, %r7186};
	xor.b64  	%rd11246, %rd11245, %rd11244;
	shf.l.wrap.b32 	%r7188, %r7182, %r7183, 25;
	shf.l.wrap.b32 	%r7189, %r7183, %r7182, 25;
	mov.b64 	%rd11247, {%r7189, %r7188};
	xor.b64  	%rd11248, %rd11246, %rd11247;
	xor.b64  	%rd11249, %rd11227, %rd21584;
	xor.b64  	%rd11250, %rd11227, %rd11200;
	and.b64  	%rd11251, %rd11250, %rd11249;
	xor.b64  	%rd11252, %rd11251, %rd11227;
	add.s64 	%rd11253, %rd11242, %rd11252;
	add.s64 	%rd11254, %rd11253, %rd11248;
	add.s32 	%r7190, %r14414, 3;
	mul.wide.s32 	%rd11255, %r7190, 8;
	add.s64 	%rd11256, %rd21334, %rd11255;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7191,%dummy}, %rd11243;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7192}, %rd11243;
	}
	shf.r.wrap.b32 	%r7193, %r7192, %r7191, 14;
	shf.r.wrap.b32 	%r7194, %r7191, %r7192, 14;
	mov.b64 	%rd11257, {%r7194, %r7193};
	shf.r.wrap.b32 	%r7195, %r7192, %r7191, 18;
	shf.r.wrap.b32 	%r7196, %r7191, %r7192, 18;
	mov.b64 	%rd11258, {%r7196, %r7195};
	xor.b64  	%rd11259, %rd11258, %rd11257;
	shf.l.wrap.b32 	%r7197, %r7191, %r7192, 23;
	shf.l.wrap.b32 	%r7198, %r7192, %r7191, 23;
	mov.b64 	%rd11260, {%r7198, %r7197};
	xor.b64  	%rd11261, %rd11259, %rd11260;
	xor.b64  	%rd11262, %rd11216, %rd11189;
	and.b64  	%rd11263, %rd11243, %rd11262;
	xor.b64  	%rd11264, %rd11263, %rd11189;
	add.s64 	%rd11265, %rd21595, %rd21588;
	ld.const.u64 	%rd11266, [%rd11256];
	add.s64 	%rd11267, %rd11265, %rd11266;
	add.s64 	%rd11268, %rd11267, %rd11264;
	add.s64 	%rd11269, %rd11268, %rd11261;
	add.s64 	%rd11270, %rd11269, %rd21584;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7199,%dummy}, %rd11254;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7200}, %rd11254;
	}
	shf.r.wrap.b32 	%r7201, %r7200, %r7199, 28;
	shf.r.wrap.b32 	%r7202, %r7199, %r7200, 28;
	mov.b64 	%rd11271, {%r7202, %r7201};
	shf.l.wrap.b32 	%r7203, %r7199, %r7200, 30;
	shf.l.wrap.b32 	%r7204, %r7200, %r7199, 30;
	mov.b64 	%rd11272, {%r7204, %r7203};
	xor.b64  	%rd11273, %rd11272, %rd11271;
	shf.l.wrap.b32 	%r7205, %r7199, %r7200, 25;
	shf.l.wrap.b32 	%r7206, %r7200, %r7199, 25;
	mov.b64 	%rd11274, {%r7206, %r7205};
	xor.b64  	%rd11275, %rd11273, %rd11274;
	xor.b64  	%rd11276, %rd11254, %rd11200;
	xor.b64  	%rd11277, %rd11254, %rd11227;
	and.b64  	%rd11278, %rd11277, %rd11276;
	xor.b64  	%rd11279, %rd11278, %rd11254;
	add.s64 	%rd11280, %rd11269, %rd11279;
	add.s64 	%rd11281, %rd11280, %rd11275;
	add.s32 	%r7207, %r14414, 4;
	mul.wide.s32 	%rd11282, %r7207, 8;
	add.s64 	%rd11283, %rd21334, %rd11282;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7208,%dummy}, %rd11270;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7209}, %rd11270;
	}
	shf.r.wrap.b32 	%r7210, %r7209, %r7208, 14;
	shf.r.wrap.b32 	%r7211, %r7208, %r7209, 14;
	mov.b64 	%rd11284, {%r7211, %r7210};
	shf.r.wrap.b32 	%r7212, %r7209, %r7208, 18;
	shf.r.wrap.b32 	%r7213, %r7208, %r7209, 18;
	mov.b64 	%rd11285, {%r7213, %r7212};
	xor.b64  	%rd11286, %rd11285, %rd11284;
	shf.l.wrap.b32 	%r7214, %r7208, %r7209, 23;
	shf.l.wrap.b32 	%r7215, %r7209, %r7208, 23;
	mov.b64 	%rd11287, {%r7215, %r7214};
	xor.b64  	%rd11288, %rd11286, %rd11287;
	xor.b64  	%rd11289, %rd11243, %rd11216;
	and.b64  	%rd11290, %rd11270, %rd11289;
	xor.b64  	%rd11291, %rd11290, %rd11216;
	add.s64 	%rd11292, %rd11189, %rd21596;
	ld.const.u64 	%rd11293, [%rd11283];
	add.s64 	%rd11294, %rd11292, %rd11293;
	add.s64 	%rd11295, %rd11294, %rd11291;
	add.s64 	%rd11296, %rd11295, %rd11288;
	add.s64 	%rd11297, %rd11296, %rd11200;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7216,%dummy}, %rd11281;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7217}, %rd11281;
	}
	shf.r.wrap.b32 	%r7218, %r7217, %r7216, 28;
	shf.r.wrap.b32 	%r7219, %r7216, %r7217, 28;
	mov.b64 	%rd11298, {%r7219, %r7218};
	shf.l.wrap.b32 	%r7220, %r7216, %r7217, 30;
	shf.l.wrap.b32 	%r7221, %r7217, %r7216, 30;
	mov.b64 	%rd11299, {%r7221, %r7220};
	xor.b64  	%rd11300, %rd11299, %rd11298;
	shf.l.wrap.b32 	%r7222, %r7216, %r7217, 25;
	shf.l.wrap.b32 	%r7223, %r7217, %r7216, 25;
	mov.b64 	%rd11301, {%r7223, %r7222};
	xor.b64  	%rd11302, %rd11300, %rd11301;
	xor.b64  	%rd11303, %rd11281, %rd11227;
	xor.b64  	%rd11304, %rd11281, %rd11254;
	and.b64  	%rd11305, %rd11304, %rd11303;
	xor.b64  	%rd11306, %rd11305, %rd11281;
	add.s64 	%rd11307, %rd11296, %rd11306;
	add.s64 	%rd11308, %rd11307, %rd11302;
	add.s32 	%r7224, %r14414, 5;
	mul.wide.s32 	%rd11309, %r7224, 8;
	add.s64 	%rd11310, %rd21334, %rd11309;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7225,%dummy}, %rd11297;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7226}, %rd11297;
	}
	shf.r.wrap.b32 	%r7227, %r7226, %r7225, 14;
	shf.r.wrap.b32 	%r7228, %r7225, %r7226, 14;
	mov.b64 	%rd11311, {%r7228, %r7227};
	shf.r.wrap.b32 	%r7229, %r7226, %r7225, 18;
	shf.r.wrap.b32 	%r7230, %r7225, %r7226, 18;
	mov.b64 	%rd11312, {%r7230, %r7229};
	xor.b64  	%rd11313, %rd11312, %rd11311;
	shf.l.wrap.b32 	%r7231, %r7225, %r7226, 23;
	shf.l.wrap.b32 	%r7232, %r7226, %r7225, 23;
	mov.b64 	%rd11314, {%r7232, %r7231};
	xor.b64  	%rd11315, %rd11313, %rd11314;
	xor.b64  	%rd11316, %rd11270, %rd11243;
	and.b64  	%rd11317, %rd11297, %rd11316;
	xor.b64  	%rd11318, %rd11317, %rd11243;
	add.s64 	%rd11319, %rd11216, %rd21597;
	ld.const.u64 	%rd11320, [%rd11310];
	add.s64 	%rd11321, %rd11319, %rd11320;
	add.s64 	%rd11322, %rd11321, %rd11318;
	add.s64 	%rd11323, %rd11322, %rd11315;
	add.s64 	%rd11324, %rd11323, %rd11227;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7233,%dummy}, %rd11308;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7234}, %rd11308;
	}
	shf.r.wrap.b32 	%r7235, %r7234, %r7233, 28;
	shf.r.wrap.b32 	%r7236, %r7233, %r7234, 28;
	mov.b64 	%rd11325, {%r7236, %r7235};
	shf.l.wrap.b32 	%r7237, %r7233, %r7234, 30;
	shf.l.wrap.b32 	%r7238, %r7234, %r7233, 30;
	mov.b64 	%rd11326, {%r7238, %r7237};
	xor.b64  	%rd11327, %rd11326, %rd11325;
	shf.l.wrap.b32 	%r7239, %r7233, %r7234, 25;
	shf.l.wrap.b32 	%r7240, %r7234, %r7233, 25;
	mov.b64 	%rd11328, {%r7240, %r7239};
	xor.b64  	%rd11329, %rd11327, %rd11328;
	xor.b64  	%rd11330, %rd11308, %rd11254;
	xor.b64  	%rd11331, %rd11308, %rd11281;
	and.b64  	%rd11332, %rd11331, %rd11330;
	xor.b64  	%rd11333, %rd11332, %rd11308;
	add.s64 	%rd11334, %rd11323, %rd11333;
	add.s64 	%rd11335, %rd11334, %rd11329;
	add.s32 	%r7241, %r14414, 6;
	mul.wide.s32 	%rd11336, %r7241, 8;
	add.s64 	%rd11337, %rd21334, %rd11336;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7242,%dummy}, %rd11324;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7243}, %rd11324;
	}
	shf.r.wrap.b32 	%r7244, %r7243, %r7242, 14;
	shf.r.wrap.b32 	%r7245, %r7242, %r7243, 14;
	mov.b64 	%rd11338, {%r7245, %r7244};
	shf.r.wrap.b32 	%r7246, %r7243, %r7242, 18;
	shf.r.wrap.b32 	%r7247, %r7242, %r7243, 18;
	mov.b64 	%rd11339, {%r7247, %r7246};
	xor.b64  	%rd11340, %rd11339, %rd11338;
	shf.l.wrap.b32 	%r7248, %r7242, %r7243, 23;
	shf.l.wrap.b32 	%r7249, %r7243, %r7242, 23;
	mov.b64 	%rd11341, {%r7249, %r7248};
	xor.b64  	%rd11342, %rd11340, %rd11341;
	xor.b64  	%rd11343, %rd11297, %rd11270;
	and.b64  	%rd11344, %rd11324, %rd11343;
	xor.b64  	%rd11345, %rd11344, %rd11270;
	add.s64 	%rd11346, %rd11243, %rd21598;
	ld.const.u64 	%rd11347, [%rd11337];
	add.s64 	%rd11348, %rd11346, %rd11347;
	add.s64 	%rd11349, %rd11348, %rd11345;
	add.s64 	%rd11350, %rd11349, %rd11342;
	add.s64 	%rd11351, %rd11350, %rd11254;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7250,%dummy}, %rd11335;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7251}, %rd11335;
	}
	shf.r.wrap.b32 	%r7252, %r7251, %r7250, 28;
	shf.r.wrap.b32 	%r7253, %r7250, %r7251, 28;
	mov.b64 	%rd11352, {%r7253, %r7252};
	shf.l.wrap.b32 	%r7254, %r7250, %r7251, 30;
	shf.l.wrap.b32 	%r7255, %r7251, %r7250, 30;
	mov.b64 	%rd11353, {%r7255, %r7254};
	xor.b64  	%rd11354, %rd11353, %rd11352;
	shf.l.wrap.b32 	%r7256, %r7250, %r7251, 25;
	shf.l.wrap.b32 	%r7257, %r7251, %r7250, 25;
	mov.b64 	%rd11355, {%r7257, %r7256};
	xor.b64  	%rd11356, %rd11354, %rd11355;
	xor.b64  	%rd11357, %rd11335, %rd11281;
	xor.b64  	%rd11358, %rd11335, %rd11308;
	and.b64  	%rd11359, %rd11358, %rd11357;
	xor.b64  	%rd11360, %rd11359, %rd11335;
	add.s64 	%rd11361, %rd11350, %rd11360;
	add.s64 	%rd11362, %rd11361, %rd11356;
	add.s32 	%r7258, %r14414, 7;
	mul.wide.s32 	%rd11363, %r7258, 8;
	add.s64 	%rd11364, %rd21334, %rd11363;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7259,%dummy}, %rd11351;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7260}, %rd11351;
	}
	shf.r.wrap.b32 	%r7261, %r7260, %r7259, 14;
	shf.r.wrap.b32 	%r7262, %r7259, %r7260, 14;
	mov.b64 	%rd11365, {%r7262, %r7261};
	shf.r.wrap.b32 	%r7263, %r7260, %r7259, 18;
	shf.r.wrap.b32 	%r7264, %r7259, %r7260, 18;
	mov.b64 	%rd11366, {%r7264, %r7263};
	xor.b64  	%rd11367, %rd11366, %rd11365;
	shf.l.wrap.b32 	%r7265, %r7259, %r7260, 23;
	shf.l.wrap.b32 	%r7266, %r7260, %r7259, 23;
	mov.b64 	%rd11368, {%r7266, %r7265};
	xor.b64  	%rd11369, %rd11367, %rd11368;
	xor.b64  	%rd11370, %rd11324, %rd11297;
	and.b64  	%rd11371, %rd11351, %rd11370;
	xor.b64  	%rd11372, %rd11371, %rd11297;
	add.s64 	%rd11373, %rd11270, %rd21599;
	ld.const.u64 	%rd11374, [%rd11364];
	add.s64 	%rd11375, %rd11373, %rd11374;
	add.s64 	%rd11376, %rd11375, %rd11372;
	add.s64 	%rd11377, %rd11376, %rd11369;
	add.s64 	%rd11378, %rd11377, %rd11281;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7267,%dummy}, %rd11362;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7268}, %rd11362;
	}
	shf.r.wrap.b32 	%r7269, %r7268, %r7267, 28;
	shf.r.wrap.b32 	%r7270, %r7267, %r7268, 28;
	mov.b64 	%rd11379, {%r7270, %r7269};
	shf.l.wrap.b32 	%r7271, %r7267, %r7268, 30;
	shf.l.wrap.b32 	%r7272, %r7268, %r7267, 30;
	mov.b64 	%rd11380, {%r7272, %r7271};
	xor.b64  	%rd11381, %rd11380, %rd11379;
	shf.l.wrap.b32 	%r7273, %r7267, %r7268, 25;
	shf.l.wrap.b32 	%r7274, %r7268, %r7267, 25;
	mov.b64 	%rd11382, {%r7274, %r7273};
	xor.b64  	%rd11383, %rd11381, %rd11382;
	xor.b64  	%rd11384, %rd11362, %rd11308;
	xor.b64  	%rd11385, %rd11362, %rd11335;
	and.b64  	%rd11386, %rd11385, %rd11384;
	xor.b64  	%rd11387, %rd11386, %rd11362;
	add.s64 	%rd11388, %rd11377, %rd11387;
	add.s64 	%rd11389, %rd11388, %rd11383;
	add.s32 	%r7275, %r14414, 8;
	mul.wide.s32 	%rd11390, %r7275, 8;
	add.s64 	%rd11391, %rd21334, %rd11390;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7276,%dummy}, %rd11378;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7277}, %rd11378;
	}
	shf.r.wrap.b32 	%r7278, %r7277, %r7276, 14;
	shf.r.wrap.b32 	%r7279, %r7276, %r7277, 14;
	mov.b64 	%rd11392, {%r7279, %r7278};
	shf.r.wrap.b32 	%r7280, %r7277, %r7276, 18;
	shf.r.wrap.b32 	%r7281, %r7276, %r7277, 18;
	mov.b64 	%rd11393, {%r7281, %r7280};
	xor.b64  	%rd11394, %rd11393, %rd11392;
	shf.l.wrap.b32 	%r7282, %r7276, %r7277, 23;
	shf.l.wrap.b32 	%r7283, %r7277, %r7276, 23;
	mov.b64 	%rd11395, {%r7283, %r7282};
	xor.b64  	%rd11396, %rd11394, %rd11395;
	xor.b64  	%rd11397, %rd11351, %rd11324;
	and.b64  	%rd11398, %rd11378, %rd11397;
	xor.b64  	%rd11399, %rd11398, %rd11324;
	add.s64 	%rd11400, %rd11297, %rd21583;
	ld.const.u64 	%rd11401, [%rd11391];
	add.s64 	%rd11402, %rd11400, %rd11401;
	add.s64 	%rd11403, %rd11402, %rd11399;
	add.s64 	%rd11404, %rd11403, %rd11396;
	add.s64 	%rd11405, %rd11404, %rd11308;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7284,%dummy}, %rd11389;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7285}, %rd11389;
	}
	shf.r.wrap.b32 	%r7286, %r7285, %r7284, 28;
	shf.r.wrap.b32 	%r7287, %r7284, %r7285, 28;
	mov.b64 	%rd11406, {%r7287, %r7286};
	shf.l.wrap.b32 	%r7288, %r7284, %r7285, 30;
	shf.l.wrap.b32 	%r7289, %r7285, %r7284, 30;
	mov.b64 	%rd11407, {%r7289, %r7288};
	xor.b64  	%rd11408, %rd11407, %rd11406;
	shf.l.wrap.b32 	%r7290, %r7284, %r7285, 25;
	shf.l.wrap.b32 	%r7291, %r7285, %r7284, 25;
	mov.b64 	%rd11409, {%r7291, %r7290};
	xor.b64  	%rd11410, %rd11408, %rd11409;
	xor.b64  	%rd11411, %rd11389, %rd11335;
	xor.b64  	%rd11412, %rd11389, %rd11362;
	and.b64  	%rd11413, %rd11412, %rd11411;
	xor.b64  	%rd11414, %rd11413, %rd11389;
	add.s64 	%rd11415, %rd11404, %rd11414;
	add.s64 	%rd11416, %rd11415, %rd11410;
	add.s32 	%r7292, %r14414, 9;
	mul.wide.s32 	%rd11417, %r7292, 8;
	add.s64 	%rd11418, %rd21334, %rd11417;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7293,%dummy}, %rd11405;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7294}, %rd11405;
	}
	shf.r.wrap.b32 	%r7295, %r7294, %r7293, 14;
	shf.r.wrap.b32 	%r7296, %r7293, %r7294, 14;
	mov.b64 	%rd11419, {%r7296, %r7295};
	shf.r.wrap.b32 	%r7297, %r7294, %r7293, 18;
	shf.r.wrap.b32 	%r7298, %r7293, %r7294, 18;
	mov.b64 	%rd11420, {%r7298, %r7297};
	xor.b64  	%rd11421, %rd11420, %rd11419;
	shf.l.wrap.b32 	%r7299, %r7293, %r7294, 23;
	shf.l.wrap.b32 	%r7300, %r7294, %r7293, 23;
	mov.b64 	%rd11422, {%r7300, %r7299};
	xor.b64  	%rd11423, %rd11421, %rd11422;
	xor.b64  	%rd11424, %rd11378, %rd11351;
	and.b64  	%rd11425, %rd11405, %rd11424;
	xor.b64  	%rd11426, %rd11425, %rd11351;
	add.s64 	%rd11427, %rd11324, %rd21582;
	ld.const.u64 	%rd11428, [%rd11418];
	add.s64 	%rd11429, %rd11427, %rd11428;
	add.s64 	%rd11430, %rd11429, %rd11426;
	add.s64 	%rd11431, %rd11430, %rd11423;
	add.s64 	%rd11432, %rd11431, %rd11335;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7301,%dummy}, %rd11416;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7302}, %rd11416;
	}
	shf.r.wrap.b32 	%r7303, %r7302, %r7301, 28;
	shf.r.wrap.b32 	%r7304, %r7301, %r7302, 28;
	mov.b64 	%rd11433, {%r7304, %r7303};
	shf.l.wrap.b32 	%r7305, %r7301, %r7302, 30;
	shf.l.wrap.b32 	%r7306, %r7302, %r7301, 30;
	mov.b64 	%rd11434, {%r7306, %r7305};
	xor.b64  	%rd11435, %rd11434, %rd11433;
	shf.l.wrap.b32 	%r7307, %r7301, %r7302, 25;
	shf.l.wrap.b32 	%r7308, %r7302, %r7301, 25;
	mov.b64 	%rd11436, {%r7308, %r7307};
	xor.b64  	%rd11437, %rd11435, %rd11436;
	xor.b64  	%rd11438, %rd11416, %rd11362;
	xor.b64  	%rd11439, %rd11416, %rd11389;
	and.b64  	%rd11440, %rd11439, %rd11438;
	xor.b64  	%rd11441, %rd11440, %rd11416;
	add.s64 	%rd11442, %rd11431, %rd11441;
	add.s64 	%rd11443, %rd11442, %rd11437;
	add.s32 	%r7309, %r14414, 10;
	mul.wide.s32 	%rd11444, %r7309, 8;
	add.s64 	%rd11445, %rd21334, %rd11444;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7310,%dummy}, %rd11432;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7311}, %rd11432;
	}
	shf.r.wrap.b32 	%r7312, %r7311, %r7310, 14;
	shf.r.wrap.b32 	%r7313, %r7310, %r7311, 14;
	mov.b64 	%rd11446, {%r7313, %r7312};
	shf.r.wrap.b32 	%r7314, %r7311, %r7310, 18;
	shf.r.wrap.b32 	%r7315, %r7310, %r7311, 18;
	mov.b64 	%rd11447, {%r7315, %r7314};
	xor.b64  	%rd11448, %rd11447, %rd11446;
	shf.l.wrap.b32 	%r7316, %r7310, %r7311, 23;
	shf.l.wrap.b32 	%r7317, %r7311, %r7310, 23;
	mov.b64 	%rd11449, {%r7317, %r7316};
	xor.b64  	%rd11450, %rd11448, %rd11449;
	xor.b64  	%rd11451, %rd11405, %rd11378;
	and.b64  	%rd11452, %rd11432, %rd11451;
	xor.b64  	%rd11453, %rd11452, %rd11378;
	add.s64 	%rd11454, %rd11351, %rd21581;
	ld.const.u64 	%rd11455, [%rd11445];
	add.s64 	%rd11456, %rd11454, %rd11455;
	add.s64 	%rd11457, %rd11456, %rd11453;
	add.s64 	%rd11458, %rd11457, %rd11450;
	add.s64 	%rd11459, %rd11458, %rd11362;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7318,%dummy}, %rd11443;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7319}, %rd11443;
	}
	shf.r.wrap.b32 	%r7320, %r7319, %r7318, 28;
	shf.r.wrap.b32 	%r7321, %r7318, %r7319, 28;
	mov.b64 	%rd11460, {%r7321, %r7320};
	shf.l.wrap.b32 	%r7322, %r7318, %r7319, 30;
	shf.l.wrap.b32 	%r7323, %r7319, %r7318, 30;
	mov.b64 	%rd11461, {%r7323, %r7322};
	xor.b64  	%rd11462, %rd11461, %rd11460;
	shf.l.wrap.b32 	%r7324, %r7318, %r7319, 25;
	shf.l.wrap.b32 	%r7325, %r7319, %r7318, 25;
	mov.b64 	%rd11463, {%r7325, %r7324};
	xor.b64  	%rd11464, %rd11462, %rd11463;
	xor.b64  	%rd11465, %rd11443, %rd11389;
	xor.b64  	%rd11466, %rd11443, %rd11416;
	and.b64  	%rd11467, %rd11466, %rd11465;
	xor.b64  	%rd11468, %rd11467, %rd11443;
	add.s64 	%rd11469, %rd11458, %rd11468;
	add.s64 	%rd11470, %rd11469, %rd11464;
	add.s32 	%r7326, %r14414, 11;
	mul.wide.s32 	%rd11471, %r7326, 8;
	add.s64 	%rd11472, %rd21334, %rd11471;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7327,%dummy}, %rd11459;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7328}, %rd11459;
	}
	shf.r.wrap.b32 	%r7329, %r7328, %r7327, 14;
	shf.r.wrap.b32 	%r7330, %r7327, %r7328, 14;
	mov.b64 	%rd11473, {%r7330, %r7329};
	shf.r.wrap.b32 	%r7331, %r7328, %r7327, 18;
	shf.r.wrap.b32 	%r7332, %r7327, %r7328, 18;
	mov.b64 	%rd11474, {%r7332, %r7331};
	xor.b64  	%rd11475, %rd11474, %rd11473;
	shf.l.wrap.b32 	%r7333, %r7327, %r7328, 23;
	shf.l.wrap.b32 	%r7334, %r7328, %r7327, 23;
	mov.b64 	%rd11476, {%r7334, %r7333};
	xor.b64  	%rd11477, %rd11475, %rd11476;
	xor.b64  	%rd11478, %rd11432, %rd11405;
	and.b64  	%rd11479, %rd11459, %rd11478;
	xor.b64  	%rd11480, %rd11479, %rd11405;
	add.s64 	%rd11481, %rd11378, %rd21580;
	ld.const.u64 	%rd11482, [%rd11472];
	add.s64 	%rd11483, %rd11481, %rd11482;
	add.s64 	%rd11484, %rd11483, %rd11480;
	add.s64 	%rd11485, %rd11484, %rd11477;
	add.s64 	%rd11486, %rd11485, %rd11389;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7335,%dummy}, %rd11470;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7336}, %rd11470;
	}
	shf.r.wrap.b32 	%r7337, %r7336, %r7335, 28;
	shf.r.wrap.b32 	%r7338, %r7335, %r7336, 28;
	mov.b64 	%rd11487, {%r7338, %r7337};
	shf.l.wrap.b32 	%r7339, %r7335, %r7336, 30;
	shf.l.wrap.b32 	%r7340, %r7336, %r7335, 30;
	mov.b64 	%rd11488, {%r7340, %r7339};
	xor.b64  	%rd11489, %rd11488, %rd11487;
	shf.l.wrap.b32 	%r7341, %r7335, %r7336, 25;
	shf.l.wrap.b32 	%r7342, %r7336, %r7335, 25;
	mov.b64 	%rd11490, {%r7342, %r7341};
	xor.b64  	%rd11491, %rd11489, %rd11490;
	xor.b64  	%rd11492, %rd11470, %rd11416;
	xor.b64  	%rd11493, %rd11470, %rd11443;
	and.b64  	%rd11494, %rd11493, %rd11492;
	xor.b64  	%rd11495, %rd11494, %rd11470;
	add.s64 	%rd11496, %rd11485, %rd11495;
	add.s64 	%rd11497, %rd11496, %rd11491;
	add.s32 	%r7343, %r14414, 12;
	mul.wide.s32 	%rd11498, %r7343, 8;
	add.s64 	%rd11499, %rd21334, %rd11498;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7344,%dummy}, %rd11486;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7345}, %rd11486;
	}
	shf.r.wrap.b32 	%r7346, %r7345, %r7344, 14;
	shf.r.wrap.b32 	%r7347, %r7344, %r7345, 14;
	mov.b64 	%rd11500, {%r7347, %r7346};
	shf.r.wrap.b32 	%r7348, %r7345, %r7344, 18;
	shf.r.wrap.b32 	%r7349, %r7344, %r7345, 18;
	mov.b64 	%rd11501, {%r7349, %r7348};
	xor.b64  	%rd11502, %rd11501, %rd11500;
	shf.l.wrap.b32 	%r7350, %r7344, %r7345, 23;
	shf.l.wrap.b32 	%r7351, %r7345, %r7344, 23;
	mov.b64 	%rd11503, {%r7351, %r7350};
	xor.b64  	%rd11504, %rd11502, %rd11503;
	xor.b64  	%rd11505, %rd11459, %rd11432;
	and.b64  	%rd11506, %rd11486, %rd11505;
	xor.b64  	%rd11507, %rd11506, %rd11432;
	add.s64 	%rd11508, %rd11405, %rd21579;
	ld.const.u64 	%rd11509, [%rd11499];
	add.s64 	%rd11510, %rd11508, %rd11509;
	add.s64 	%rd11511, %rd11510, %rd11507;
	add.s64 	%rd11512, %rd11511, %rd11504;
	add.s64 	%rd21591, %rd11512, %rd11416;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7352,%dummy}, %rd11497;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7353}, %rd11497;
	}
	shf.r.wrap.b32 	%r7354, %r7353, %r7352, 28;
	shf.r.wrap.b32 	%r7355, %r7352, %r7353, 28;
	mov.b64 	%rd11513, {%r7355, %r7354};
	shf.l.wrap.b32 	%r7356, %r7352, %r7353, 30;
	shf.l.wrap.b32 	%r7357, %r7353, %r7352, 30;
	mov.b64 	%rd11514, {%r7357, %r7356};
	xor.b64  	%rd11515, %rd11514, %rd11513;
	shf.l.wrap.b32 	%r7358, %r7352, %r7353, 25;
	shf.l.wrap.b32 	%r7359, %r7353, %r7352, 25;
	mov.b64 	%rd11516, {%r7359, %r7358};
	xor.b64  	%rd11517, %rd11515, %rd11516;
	xor.b64  	%rd11518, %rd11497, %rd11443;
	xor.b64  	%rd11519, %rd11497, %rd11470;
	and.b64  	%rd11520, %rd11519, %rd11518;
	xor.b64  	%rd11521, %rd11520, %rd11497;
	add.s64 	%rd11522, %rd11512, %rd11521;
	add.s64 	%rd21587, %rd11522, %rd11517;
	add.s32 	%r7360, %r14414, 13;
	mul.wide.s32 	%rd11523, %r7360, 8;
	add.s64 	%rd11524, %rd21334, %rd11523;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7361,%dummy}, %rd21591;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7362}, %rd21591;
	}
	shf.r.wrap.b32 	%r7363, %r7362, %r7361, 14;
	shf.r.wrap.b32 	%r7364, %r7361, %r7362, 14;
	mov.b64 	%rd11525, {%r7364, %r7363};
	shf.r.wrap.b32 	%r7365, %r7362, %r7361, 18;
	shf.r.wrap.b32 	%r7366, %r7361, %r7362, 18;
	mov.b64 	%rd11526, {%r7366, %r7365};
	xor.b64  	%rd11527, %rd11526, %rd11525;
	shf.l.wrap.b32 	%r7367, %r7361, %r7362, 23;
	shf.l.wrap.b32 	%r7368, %r7362, %r7361, 23;
	mov.b64 	%rd11528, {%r7368, %r7367};
	xor.b64  	%rd11529, %rd11527, %rd11528;
	xor.b64  	%rd11530, %rd11486, %rd11459;
	and.b64  	%rd11531, %rd21591, %rd11530;
	xor.b64  	%rd11532, %rd11531, %rd11459;
	add.s64 	%rd11533, %rd11432, %rd21578;
	ld.const.u64 	%rd11534, [%rd11524];
	add.s64 	%rd11535, %rd11533, %rd11534;
	add.s64 	%rd11536, %rd11535, %rd11532;
	add.s64 	%rd11537, %rd11536, %rd11529;
	add.s64 	%rd21590, %rd11537, %rd11443;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7369,%dummy}, %rd21587;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7370}, %rd21587;
	}
	shf.r.wrap.b32 	%r7371, %r7370, %r7369, 28;
	shf.r.wrap.b32 	%r7372, %r7369, %r7370, 28;
	mov.b64 	%rd11538, {%r7372, %r7371};
	shf.l.wrap.b32 	%r7373, %r7369, %r7370, 30;
	shf.l.wrap.b32 	%r7374, %r7370, %r7369, 30;
	mov.b64 	%rd11539, {%r7374, %r7373};
	xor.b64  	%rd11540, %rd11539, %rd11538;
	shf.l.wrap.b32 	%r7375, %r7369, %r7370, 25;
	shf.l.wrap.b32 	%r7376, %r7370, %r7369, 25;
	mov.b64 	%rd11541, {%r7376, %r7375};
	xor.b64  	%rd11542, %rd11540, %rd11541;
	xor.b64  	%rd11543, %rd21587, %rd11470;
	xor.b64  	%rd11544, %rd21587, %rd11497;
	and.b64  	%rd11545, %rd11544, %rd11543;
	xor.b64  	%rd11546, %rd11545, %rd21587;
	add.s64 	%rd11547, %rd11537, %rd11546;
	add.s64 	%rd21586, %rd11547, %rd11542;
	add.s32 	%r7377, %r14414, 14;
	mul.wide.s32 	%rd11548, %r7377, 8;
	add.s64 	%rd11549, %rd21334, %rd11548;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7378,%dummy}, %rd21590;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7379}, %rd21590;
	}
	shf.r.wrap.b32 	%r7380, %r7379, %r7378, 14;
	shf.r.wrap.b32 	%r7381, %r7378, %r7379, 14;
	mov.b64 	%rd11550, {%r7381, %r7380};
	shf.r.wrap.b32 	%r7382, %r7379, %r7378, 18;
	shf.r.wrap.b32 	%r7383, %r7378, %r7379, 18;
	mov.b64 	%rd11551, {%r7383, %r7382};
	xor.b64  	%rd11552, %rd11551, %rd11550;
	shf.l.wrap.b32 	%r7384, %r7378, %r7379, 23;
	shf.l.wrap.b32 	%r7385, %r7379, %r7378, 23;
	mov.b64 	%rd11553, {%r7385, %r7384};
	xor.b64  	%rd11554, %rd11552, %rd11553;
	xor.b64  	%rd11555, %rd21591, %rd11486;
	and.b64  	%rd11556, %rd21590, %rd11555;
	xor.b64  	%rd11557, %rd11556, %rd11486;
	add.s64 	%rd11558, %rd11459, %rd21577;
	ld.const.u64 	%rd11559, [%rd11549];
	add.s64 	%rd11560, %rd11558, %rd11559;
	add.s64 	%rd11561, %rd11560, %rd11557;
	add.s64 	%rd11562, %rd11561, %rd11554;
	add.s64 	%rd21589, %rd11562, %rd11470;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7386,%dummy}, %rd21586;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7387}, %rd21586;
	}
	shf.r.wrap.b32 	%r7388, %r7387, %r7386, 28;
	shf.r.wrap.b32 	%r7389, %r7386, %r7387, 28;
	mov.b64 	%rd11563, {%r7389, %r7388};
	shf.l.wrap.b32 	%r7390, %r7386, %r7387, 30;
	shf.l.wrap.b32 	%r7391, %r7387, %r7386, 30;
	mov.b64 	%rd11564, {%r7391, %r7390};
	xor.b64  	%rd11565, %rd11564, %rd11563;
	shf.l.wrap.b32 	%r7392, %r7386, %r7387, 25;
	shf.l.wrap.b32 	%r7393, %r7387, %r7386, 25;
	mov.b64 	%rd11566, {%r7393, %r7392};
	xor.b64  	%rd11567, %rd11565, %rd11566;
	xor.b64  	%rd11568, %rd21586, %rd11497;
	xor.b64  	%rd11569, %rd21586, %rd21587;
	and.b64  	%rd11570, %rd11569, %rd11568;
	xor.b64  	%rd11571, %rd11570, %rd21586;
	add.s64 	%rd11572, %rd11562, %rd11571;
	add.s64 	%rd21585, %rd11572, %rd11567;
	add.s32 	%r7394, %r14414, 15;
	mul.wide.s32 	%rd11573, %r7394, 8;
	add.s64 	%rd11574, %rd21334, %rd11573;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7395,%dummy}, %rd21589;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7396}, %rd21589;
	}
	shf.r.wrap.b32 	%r7397, %r7396, %r7395, 14;
	shf.r.wrap.b32 	%r7398, %r7395, %r7396, 14;
	mov.b64 	%rd11575, {%r7398, %r7397};
	shf.r.wrap.b32 	%r7399, %r7396, %r7395, 18;
	shf.r.wrap.b32 	%r7400, %r7395, %r7396, 18;
	mov.b64 	%rd11576, {%r7400, %r7399};
	xor.b64  	%rd11577, %rd11576, %rd11575;
	shf.l.wrap.b32 	%r7401, %r7395, %r7396, 23;
	shf.l.wrap.b32 	%r7402, %r7396, %r7395, 23;
	mov.b64 	%rd11578, {%r7402, %r7401};
	xor.b64  	%rd11579, %rd11577, %rd11578;
	xor.b64  	%rd11580, %rd21590, %rd21591;
	and.b64  	%rd11581, %rd21589, %rd11580;
	xor.b64  	%rd11582, %rd11581, %rd21591;
	add.s64 	%rd11583, %rd11486, %rd21576;
	ld.const.u64 	%rd11584, [%rd11574];
	add.s64 	%rd11585, %rd11583, %rd11584;
	add.s64 	%rd11586, %rd11585, %rd11582;
	add.s64 	%rd11587, %rd11586, %rd11579;
	add.s64 	%rd21588, %rd11587, %rd11497;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r7403,%dummy}, %rd21585;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r7404}, %rd21585;
	}
	shf.r.wrap.b32 	%r7405, %r7404, %r7403, 28;
	shf.r.wrap.b32 	%r7406, %r7403, %r7404, 28;
	mov.b64 	%rd11588, {%r7406, %r7405};
	shf.l.wrap.b32 	%r7407, %r7403, %r7404, 30;
	shf.l.wrap.b32 	%r7408, %r7404, %r7403, 30;
	mov.b64 	%rd11589, {%r7408, %r7407};
	xor.b64  	%rd11590, %rd11589, %rd11588;
	shf.l.wrap.b32 	%r7409, %r7403, %r7404, 25;
	shf.l.wrap.b32 	%r7410, %r7404, %r7403, 25;
	mov.b64 	%rd11591, {%r7410, %r7409};
	xor.b64  	%rd11592, %rd11590, %rd11591;
	xor.b64  	%rd11593, %rd21585, %rd21587;
	xor.b64  	%rd11594, %rd21585, %rd21586;
	and.b64  	%rd11595, %rd11594, %rd11593;
	xor.b64  	%rd11596, %rd11595, %rd21585;
	add.s64 	%rd11597, %rd11587, %rd11596;
	add.s64 	%rd21584, %rd11597, %rd11592;
	add.s32 	%r14414, %r14414, 16;
	setp.lt.s32	%p124, %r14414, 80;
	@%p124 bra 	BB3_194;

	add.s64 	%rd11598, %rd858, %rd21584;
	st.local.u64 	[%rd1], %rd11598;
	add.s64 	%rd11599, %rd860, %rd21585;
	st.local.u64 	[%rd1+8], %rd11599;
	add.s64 	%rd11600, %rd859, %rd21586;
	st.local.u64 	[%rd1+16], %rd11600;
	add.s64 	%rd11601, %rd857, %rd21587;
	st.local.u64 	[%rd1+24], %rd11601;
	add.s64 	%rd11602, %rd853, %rd21588;
	st.local.u64 	[%rd1+32], %rd11602;
	add.s64 	%rd11603, %rd855, %rd21589;
	st.local.u64 	[%rd1+40], %rd11603;
	add.s64 	%rd11604, %rd854, %rd21590;
	st.local.u64 	[%rd1+48], %rd11604;
	add.s64 	%rd11605, %rd856, %rd21591;
	st.local.u64 	[%rd1+56], %rd11605;
	mov.u32 	%r7411, 64;
	sub.s32 	%r281, %r7411, %r261;
	setp.lt.s32	%p125, %r281, 1;
	@%p125 bra 	BB3_234;

	and.b32  	%r282, %r259, 3;
	setp.eq.s32	%p126, %r282, 0;
	mov.u32 	%r14418, 0;
	@%p126 bra 	BB3_202;

	setp.eq.s32	%p127, %r282, 1;
	mov.u32 	%r14416, 0;
	@%p127 bra 	BB3_201;

	setp.eq.s32	%p128, %r282, 2;
	mov.u32 	%r14415, 0;
	@%p128 bra 	BB3_200;

	xor.b32  	%r7416, %r261, 7;
	cvt.u64.u32	%rd11606, %r7416;
	add.s64 	%rd11607, %rd446, %rd11606;
	ld.local.u8 	%rs163, [%rd11607];
	st.local.u8 	[%rd835], %rs163;
	mov.u32 	%r14415, 1;

BB3_200:
	add.s32 	%r7417, %r14415, %r261;
	xor.b32  	%r7418, %r7417, 7;
	cvt.s64.s32	%rd11608, %r7418;
	add.s64 	%rd11609, %rd446, %rd11608;
	ld.local.u8 	%rs164, [%rd11609];
	xor.b32  	%r7419, %r14415, 7;
	cvt.u64.u32	%rd11610, %r7419;
	add.s64 	%rd11611, %rd179, %rd11610;
	st.local.u8 	[%rd11611], %rs164;
	add.s32 	%r14416, %r14415, 1;

BB3_201:
	add.s32 	%r7420, %r14416, %r261;
	xor.b32  	%r7421, %r7420, 7;
	cvt.s64.s32	%rd11612, %r7421;
	add.s64 	%rd11613, %rd446, %rd11612;
	ld.local.u8 	%rs165, [%rd11613];
	xor.b32  	%r7422, %r14416, 7;
	cvt.s64.s32	%rd11614, %r7422;
	add.s64 	%rd11615, %rd179, %rd11614;
	st.local.u8 	[%rd11615], %rs165;
	add.s32 	%r14418, %r14416, 1;

BB3_202:
	and.b32  	%r7423, %r259, 124;
	setp.eq.s32	%p129, %r7423, 64;
	@%p129 bra 	BB3_234;

BB3_203:
	add.s32 	%r7424, %r14418, %r261;
	xor.b32  	%r7425, %r7424, 7;
	cvt.s64.s32	%rd11616, %r7425;
	add.s64 	%rd11617, %rd446, %rd11616;
	ld.local.u8 	%rs166, [%rd11617];
	xor.b32  	%r7426, %r14418, 7;
	cvt.s64.s32	%rd11618, %r7426;
	add.s64 	%rd11619, %rd179, %rd11618;
	st.local.u8 	[%rd11619], %rs166;
	add.s32 	%r7427, %r14418, 1;
	add.s32 	%r7428, %r7427, %r261;
	xor.b32  	%r7429, %r7428, 7;
	cvt.s64.s32	%rd11620, %r7429;
	add.s64 	%rd11621, %rd446, %rd11620;
	ld.local.u8 	%rs167, [%rd11621];
	xor.b32  	%r7430, %r7427, 7;
	cvt.s64.s32	%rd11622, %r7430;
	add.s64 	%rd11623, %rd179, %rd11622;
	st.local.u8 	[%rd11623], %rs167;
	add.s32 	%r7431, %r14418, 2;
	add.s32 	%r7432, %r7431, %r261;
	xor.b32  	%r7433, %r7432, 7;
	cvt.s64.s32	%rd11624, %r7433;
	add.s64 	%rd11625, %rd446, %rd11624;
	ld.local.u8 	%rs168, [%rd11625];
	xor.b32  	%r7434, %r7431, 7;
	cvt.s64.s32	%rd11626, %r7434;
	add.s64 	%rd11627, %rd179, %rd11626;
	st.local.u8 	[%rd11627], %rs168;
	add.s32 	%r7435, %r14418, 3;
	add.s32 	%r7436, %r7435, %r261;
	xor.b32  	%r7437, %r7436, 7;
	cvt.s64.s32	%rd11628, %r7437;
	add.s64 	%rd11629, %rd446, %rd11628;
	ld.local.u8 	%rs169, [%rd11629];
	xor.b32  	%r7438, %r7435, 7;
	cvt.s64.s32	%rd11630, %r7438;
	add.s64 	%rd11631, %rd179, %rd11630;
	st.local.u8 	[%rd11631], %rs169;
	add.s32 	%r14418, %r14418, 4;
	setp.lt.s32	%p130, %r14418, %r281;
	@%p130 bra 	BB3_203;

BB3_234:
	shr.u32 	%r14405, %r14405, 1;
	setp.ne.s32	%p150, %r14405, 0;
	@%p150 bra 	BB3_182;

BB3_235:
	ld.local.u32 	%r8358, [%rd1+192];
	and.b32  	%r335, %r8358, 127;
	sub.s32 	%r336, %r2861, %r335;
	and.b32  	%r337, %r336, 3;
	setp.eq.s32	%p151, %r337, 0;
	mov.u32 	%r14443, %r335;
	@%p151 bra 	BB3_241;

	setp.eq.s32	%p152, %r337, 1;
	mov.u32 	%r14441, %r335;
	@%p152 bra 	BB3_240;

	setp.eq.s32	%p153, %r337, 2;
	mov.u32 	%r14440, %r335;
	@%p153 bra 	BB3_239;

	xor.b32  	%r8360, %r335, 7;
	cvt.u64.u32	%rd12871, %r8360;
	add.s64 	%rd12872, %rd179, %rd12871;
	mov.u16 	%rs249, 0;
	st.local.u8 	[%rd12872], %rs249;
	add.s32 	%r14440, %r335, 1;

BB3_239:
	xor.b32  	%r8361, %r14440, 7;
	cvt.s64.s32	%rd12873, %r8361;
	add.s64 	%rd12874, %rd179, %rd12873;
	mov.u16 	%rs250, 0;
	st.local.u8 	[%rd12874], %rs250;
	add.s32 	%r14441, %r14440, 1;

BB3_240:
	xor.b32  	%r8362, %r14441, 7;
	cvt.s64.s32	%rd12875, %r8362;
	add.s64 	%rd12876, %rd179, %rd12875;
	mov.u16 	%rs251, 0;
	st.local.u8 	[%rd12876], %rs251;
	add.s32 	%r14443, %r14441, 1;

BB3_241:
	setp.lt.u32	%p154, %r336, 4;
	@%p154 bra 	BB3_243;

BB3_242:
	xor.b32  	%r8363, %r14443, 7;
	cvt.s64.s32	%rd12877, %r8363;
	add.s64 	%rd12878, %rd179, %rd12877;
	mov.u16 	%rs252, 0;
	st.local.u8 	[%rd12878], %rs252;
	add.s32 	%r8364, %r14443, 1;
	xor.b32  	%r8365, %r8364, 7;
	cvt.s64.s32	%rd12879, %r8365;
	add.s64 	%rd12880, %rd179, %rd12879;
	st.local.u8 	[%rd12880], %rs252;
	add.s32 	%r8366, %r14443, 2;
	xor.b32  	%r8367, %r8366, 7;
	cvt.s64.s32	%rd12881, %r8367;
	add.s64 	%rd12882, %rd179, %rd12881;
	st.local.u8 	[%rd12882], %rs252;
	add.s32 	%r8368, %r14443, 3;
	xor.b32  	%r8369, %r8368, 7;
	cvt.s64.s32	%rd12883, %r8369;
	add.s64 	%rd12884, %rd179, %rd12883;
	st.local.u8 	[%rd12884], %rs252;
	add.s32 	%r14443, %r14443, 4;
	setp.lt.s32	%p155, %r14443, 128;
	@%p155 bra 	BB3_242;

BB3_243:
	mov.u16 	%rs309, 128;
	xor.b32  	%r8370, %r335, 7;
	cvt.u64.u32	%rd12885, %r8370;
	add.s64 	%rd12886, %rd179, %rd12885;
	st.local.u8 	[%rd12886], %rs309;
	ld.local.u64 	%rd21670, [%rd1+64];
	setp.gt.u32	%p156, %r335, 111;
	@%p156 bra 	BB3_245;
	bra.uni 	BB3_244;

BB3_245:
	shr.u64 	%rd12887, %rd21670, 32;
	ld.local.u64 	%rd12888, [%rd1+72];
	shr.u64 	%rd12889, %rd12888, 32;
	ld.local.u64 	%rd12890, [%rd1+80];
	shr.u64 	%rd12891, %rd12890, 32;
	ld.local.u64 	%rd12892, [%rd1+88];
	shr.u64 	%rd12893, %rd12892, 32;
	ld.local.u64 	%rd12894, [%rd1+96];
	shr.u64 	%rd12895, %rd12894, 32;
	ld.local.u64 	%rd12896, [%rd1+104];
	shr.u64 	%rd12897, %rd12896, 32;
	ld.local.u64 	%rd12898, [%rd1+112];
	shr.u64 	%rd12899, %rd12898, 32;
	ld.local.u64 	%rd12900, [%rd1+120];
	shr.u64 	%rd12901, %rd12900, 32;
	ld.local.u64 	%rd12902, [%rd1+128];
	shr.u64 	%rd12903, %rd12902, 32;
	ld.local.u64 	%rd12904, [%rd1+136];
	shr.u64 	%rd12905, %rd12904, 32;
	ld.local.u64 	%rd12906, [%rd1+144];
	shr.u64 	%rd12907, %rd12906, 32;
	ld.local.u64 	%rd12908, [%rd1+152];
	shr.u64 	%rd12909, %rd12908, 32;
	ld.local.u64 	%rd12910, [%rd1+160];
	shr.u64 	%rd12911, %rd12910, 32;
	ld.local.u64 	%rd12912, [%rd1+168];
	shr.u64 	%rd12913, %rd12912, 32;
	ld.local.u64 	%rd12914, [%rd1+176];
	shr.u64 	%rd12915, %rd12914, 32;
	ld.local.u64 	%rd12916, [%rd1+184];
	shr.u64 	%rd12917, %rd12916, 32;
	bfi.b64 	%rd21640, %rd12887, %rd21670, 32, 32;
	bfi.b64 	%rd21641, %rd12889, %rd12888, 32, 32;
	bfi.b64 	%rd21642, %rd12891, %rd12890, 32, 32;
	bfi.b64 	%rd21643, %rd12893, %rd12892, 32, 32;
	bfi.b64 	%rd21644, %rd12895, %rd12894, 32, 32;
	bfi.b64 	%rd21645, %rd12897, %rd12896, 32, 32;
	bfi.b64 	%rd21646, %rd12899, %rd12898, 32, 32;
	bfi.b64 	%rd21647, %rd12901, %rd12900, 32, 32;
	bfi.b64 	%rd21631, %rd12903, %rd12902, 32, 32;
	bfi.b64 	%rd21630, %rd12905, %rd12904, 32, 32;
	bfi.b64 	%rd21629, %rd12907, %rd12906, 32, 32;
	bfi.b64 	%rd21628, %rd12909, %rd12908, 32, 32;
	bfi.b64 	%rd21627, %rd12911, %rd12910, 32, 32;
	bfi.b64 	%rd21626, %rd12913, %rd12912, 32, 32;
	bfi.b64 	%rd21625, %rd12915, %rd12914, 32, 32;
	bfi.b64 	%rd21624, %rd12917, %rd12916, 32, 32;
	ld.local.u64 	%rd1036, [%rd1+32];
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8372,%dummy}, %rd1036;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8373}, %rd1036;
	}
	shf.r.wrap.b32 	%r8374, %r8373, %r8372, 14;
	shf.r.wrap.b32 	%r8375, %r8372, %r8373, 14;
	mov.b64 	%rd12918, {%r8375, %r8374};
	shf.r.wrap.b32 	%r8376, %r8373, %r8372, 18;
	shf.r.wrap.b32 	%r8377, %r8372, %r8373, 18;
	mov.b64 	%rd12919, {%r8377, %r8376};
	xor.b64  	%rd12920, %rd12919, %rd12918;
	shf.l.wrap.b32 	%r8378, %r8372, %r8373, 23;
	shf.l.wrap.b32 	%r8379, %r8373, %r8372, 23;
	mov.b64 	%rd12921, {%r8379, %r8378};
	xor.b64  	%rd12922, %rd12920, %rd12921;
	ld.local.u64 	%rd1037, [%rd1+48];
	ld.local.u64 	%rd1038, [%rd1+40];
	xor.b64  	%rd12923, %rd1037, %rd1038;
	and.b64  	%rd12924, %rd12923, %rd1036;
	xor.b64  	%rd12925, %rd12924, %rd1037;
	ld.local.u64 	%rd1039, [%rd1+56];
	add.s64 	%rd12926, %rd1039, %rd21640;
	add.s64 	%rd12927, %rd12926, %rd21454;
	add.s64 	%rd12928, %rd12927, %rd12925;
	add.s64 	%rd12929, %rd12928, %rd12922;
	ld.local.u64 	%rd1040, [%rd1+24];
	add.s64 	%rd12930, %rd12929, %rd1040;
	ld.local.u64 	%rd1041, [%rd1];
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8380,%dummy}, %rd1041;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8381}, %rd1041;
	}
	shf.r.wrap.b32 	%r8382, %r8381, %r8380, 28;
	shf.r.wrap.b32 	%r8383, %r8380, %r8381, 28;
	mov.b64 	%rd12931, {%r8383, %r8382};
	shf.l.wrap.b32 	%r8384, %r8380, %r8381, 30;
	shf.l.wrap.b32 	%r8385, %r8381, %r8380, 30;
	mov.b64 	%rd12932, {%r8385, %r8384};
	xor.b64  	%rd12933, %rd12932, %rd12931;
	shf.l.wrap.b32 	%r8386, %r8380, %r8381, 25;
	shf.l.wrap.b32 	%r8387, %r8381, %r8380, 25;
	mov.b64 	%rd12934, {%r8387, %r8386};
	xor.b64  	%rd12935, %rd12933, %rd12934;
	ld.local.u64 	%rd1042, [%rd1+16];
	xor.b64  	%rd12936, %rd1042, %rd1041;
	ld.local.u64 	%rd1043, [%rd1+8];
	xor.b64  	%rd12937, %rd1043, %rd1041;
	and.b64  	%rd12938, %rd12936, %rd12937;
	xor.b64  	%rd12939, %rd12938, %rd1041;
	add.s64 	%rd12940, %rd12929, %rd12939;
	add.s64 	%rd12941, %rd12940, %rd12935;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8388,%dummy}, %rd12930;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8389}, %rd12930;
	}
	shf.r.wrap.b32 	%r8390, %r8389, %r8388, 14;
	shf.r.wrap.b32 	%r8391, %r8388, %r8389, 14;
	mov.b64 	%rd12942, {%r8391, %r8390};
	shf.r.wrap.b32 	%r8392, %r8389, %r8388, 18;
	shf.r.wrap.b32 	%r8393, %r8388, %r8389, 18;
	mov.b64 	%rd12943, {%r8393, %r8392};
	xor.b64  	%rd12944, %rd12943, %rd12942;
	shf.l.wrap.b32 	%r8394, %r8388, %r8389, 23;
	shf.l.wrap.b32 	%r8395, %r8389, %r8388, 23;
	mov.b64 	%rd12945, {%r8395, %r8394};
	xor.b64  	%rd12946, %rd12944, %rd12945;
	xor.b64  	%rd12947, %rd1038, %rd1036;
	and.b64  	%rd12948, %rd12930, %rd12947;
	xor.b64  	%rd12949, %rd12948, %rd1038;
	add.s64 	%rd12950, %rd1037, %rd21641;
	add.s64 	%rd12951, %rd12950, %rd21453;
	add.s64 	%rd12952, %rd12951, %rd12949;
	add.s64 	%rd12953, %rd12952, %rd12946;
	add.s64 	%rd12954, %rd12953, %rd1042;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8396,%dummy}, %rd12941;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8397}, %rd12941;
	}
	shf.r.wrap.b32 	%r8398, %r8397, %r8396, 28;
	shf.r.wrap.b32 	%r8399, %r8396, %r8397, 28;
	mov.b64 	%rd12955, {%r8399, %r8398};
	shf.l.wrap.b32 	%r8400, %r8396, %r8397, 30;
	shf.l.wrap.b32 	%r8401, %r8397, %r8396, 30;
	mov.b64 	%rd12956, {%r8401, %r8400};
	xor.b64  	%rd12957, %rd12956, %rd12955;
	shf.l.wrap.b32 	%r8402, %r8396, %r8397, 25;
	shf.l.wrap.b32 	%r8403, %r8397, %r8396, 25;
	mov.b64 	%rd12958, {%r8403, %r8402};
	xor.b64  	%rd12959, %rd12957, %rd12958;
	xor.b64  	%rd12960, %rd12941, %rd1043;
	xor.b64  	%rd12961, %rd12941, %rd1041;
	and.b64  	%rd12962, %rd12961, %rd12960;
	xor.b64  	%rd12963, %rd12962, %rd12941;
	add.s64 	%rd12964, %rd12953, %rd12963;
	add.s64 	%rd12965, %rd12964, %rd12959;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8404,%dummy}, %rd12954;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8405}, %rd12954;
	}
	shf.r.wrap.b32 	%r8406, %r8405, %r8404, 14;
	shf.r.wrap.b32 	%r8407, %r8404, %r8405, 14;
	mov.b64 	%rd12966, {%r8407, %r8406};
	shf.r.wrap.b32 	%r8408, %r8405, %r8404, 18;
	shf.r.wrap.b32 	%r8409, %r8404, %r8405, 18;
	mov.b64 	%rd12967, {%r8409, %r8408};
	xor.b64  	%rd12968, %rd12967, %rd12966;
	shf.l.wrap.b32 	%r8410, %r8404, %r8405, 23;
	shf.l.wrap.b32 	%r8411, %r8405, %r8404, 23;
	mov.b64 	%rd12969, {%r8411, %r8410};
	xor.b64  	%rd12970, %rd12968, %rd12969;
	xor.b64  	%rd12971, %rd12930, %rd1036;
	and.b64  	%rd12972, %rd12954, %rd12971;
	xor.b64  	%rd12973, %rd12972, %rd1036;
	add.s64 	%rd12974, %rd1038, %rd21642;
	add.s64 	%rd12975, %rd12974, %rd21452;
	add.s64 	%rd12976, %rd12975, %rd12973;
	add.s64 	%rd12977, %rd12976, %rd12970;
	add.s64 	%rd12978, %rd12977, %rd1043;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8412,%dummy}, %rd12965;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8413}, %rd12965;
	}
	shf.r.wrap.b32 	%r8414, %r8413, %r8412, 28;
	shf.r.wrap.b32 	%r8415, %r8412, %r8413, 28;
	mov.b64 	%rd12979, {%r8415, %r8414};
	shf.l.wrap.b32 	%r8416, %r8412, %r8413, 30;
	shf.l.wrap.b32 	%r8417, %r8413, %r8412, 30;
	mov.b64 	%rd12980, {%r8417, %r8416};
	xor.b64  	%rd12981, %rd12980, %rd12979;
	shf.l.wrap.b32 	%r8418, %r8412, %r8413, 25;
	shf.l.wrap.b32 	%r8419, %r8413, %r8412, 25;
	mov.b64 	%rd12982, {%r8419, %r8418};
	xor.b64  	%rd12983, %rd12981, %rd12982;
	xor.b64  	%rd12984, %rd12965, %rd1041;
	xor.b64  	%rd12985, %rd12965, %rd12941;
	and.b64  	%rd12986, %rd12985, %rd12984;
	xor.b64  	%rd12987, %rd12986, %rd12965;
	add.s64 	%rd12988, %rd12977, %rd12987;
	add.s64 	%rd12989, %rd12988, %rd12983;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8420,%dummy}, %rd12978;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8421}, %rd12978;
	}
	shf.r.wrap.b32 	%r8422, %r8421, %r8420, 14;
	shf.r.wrap.b32 	%r8423, %r8420, %r8421, 14;
	mov.b64 	%rd12990, {%r8423, %r8422};
	shf.r.wrap.b32 	%r8424, %r8421, %r8420, 18;
	shf.r.wrap.b32 	%r8425, %r8420, %r8421, 18;
	mov.b64 	%rd12991, {%r8425, %r8424};
	xor.b64  	%rd12992, %rd12991, %rd12990;
	shf.l.wrap.b32 	%r8426, %r8420, %r8421, 23;
	shf.l.wrap.b32 	%r8427, %r8421, %r8420, 23;
	mov.b64 	%rd12993, {%r8427, %r8426};
	xor.b64  	%rd12994, %rd12992, %rd12993;
	xor.b64  	%rd12995, %rd12954, %rd12930;
	and.b64  	%rd12996, %rd12978, %rd12995;
	xor.b64  	%rd12997, %rd12996, %rd12930;
	add.s64 	%rd12998, %rd1036, %rd21643;
	add.s64 	%rd12999, %rd12998, %rd21451;
	add.s64 	%rd13000, %rd12999, %rd12997;
	add.s64 	%rd13001, %rd13000, %rd12994;
	add.s64 	%rd13002, %rd13001, %rd1041;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8428,%dummy}, %rd12989;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8429}, %rd12989;
	}
	shf.r.wrap.b32 	%r8430, %r8429, %r8428, 28;
	shf.r.wrap.b32 	%r8431, %r8428, %r8429, 28;
	mov.b64 	%rd13003, {%r8431, %r8430};
	shf.l.wrap.b32 	%r8432, %r8428, %r8429, 30;
	shf.l.wrap.b32 	%r8433, %r8429, %r8428, 30;
	mov.b64 	%rd13004, {%r8433, %r8432};
	xor.b64  	%rd13005, %rd13004, %rd13003;
	shf.l.wrap.b32 	%r8434, %r8428, %r8429, 25;
	shf.l.wrap.b32 	%r8435, %r8429, %r8428, 25;
	mov.b64 	%rd13006, {%r8435, %r8434};
	xor.b64  	%rd13007, %rd13005, %rd13006;
	xor.b64  	%rd13008, %rd12989, %rd12941;
	xor.b64  	%rd13009, %rd12989, %rd12965;
	and.b64  	%rd13010, %rd13009, %rd13008;
	xor.b64  	%rd13011, %rd13010, %rd12989;
	add.s64 	%rd13012, %rd13001, %rd13011;
	add.s64 	%rd13013, %rd13012, %rd13007;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8436,%dummy}, %rd13002;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8437}, %rd13002;
	}
	shf.r.wrap.b32 	%r8438, %r8437, %r8436, 14;
	shf.r.wrap.b32 	%r8439, %r8436, %r8437, 14;
	mov.b64 	%rd13014, {%r8439, %r8438};
	shf.r.wrap.b32 	%r8440, %r8437, %r8436, 18;
	shf.r.wrap.b32 	%r8441, %r8436, %r8437, 18;
	mov.b64 	%rd13015, {%r8441, %r8440};
	xor.b64  	%rd13016, %rd13015, %rd13014;
	shf.l.wrap.b32 	%r8442, %r8436, %r8437, 23;
	shf.l.wrap.b32 	%r8443, %r8437, %r8436, 23;
	mov.b64 	%rd13017, {%r8443, %r8442};
	xor.b64  	%rd13018, %rd13016, %rd13017;
	xor.b64  	%rd13019, %rd12978, %rd12954;
	and.b64  	%rd13020, %rd13002, %rd13019;
	xor.b64  	%rd13021, %rd13020, %rd12954;
	add.s64 	%rd13022, %rd12930, %rd21644;
	add.s64 	%rd13023, %rd13022, %rd21450;
	add.s64 	%rd13024, %rd13023, %rd13021;
	add.s64 	%rd13025, %rd13024, %rd13018;
	add.s64 	%rd13026, %rd13025, %rd12941;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8444,%dummy}, %rd13013;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8445}, %rd13013;
	}
	shf.r.wrap.b32 	%r8446, %r8445, %r8444, 28;
	shf.r.wrap.b32 	%r8447, %r8444, %r8445, 28;
	mov.b64 	%rd13027, {%r8447, %r8446};
	shf.l.wrap.b32 	%r8448, %r8444, %r8445, 30;
	shf.l.wrap.b32 	%r8449, %r8445, %r8444, 30;
	mov.b64 	%rd13028, {%r8449, %r8448};
	xor.b64  	%rd13029, %rd13028, %rd13027;
	shf.l.wrap.b32 	%r8450, %r8444, %r8445, 25;
	shf.l.wrap.b32 	%r8451, %r8445, %r8444, 25;
	mov.b64 	%rd13030, {%r8451, %r8450};
	xor.b64  	%rd13031, %rd13029, %rd13030;
	xor.b64  	%rd13032, %rd13013, %rd12965;
	xor.b64  	%rd13033, %rd13013, %rd12989;
	and.b64  	%rd13034, %rd13033, %rd13032;
	xor.b64  	%rd13035, %rd13034, %rd13013;
	add.s64 	%rd13036, %rd13025, %rd13035;
	add.s64 	%rd13037, %rd13036, %rd13031;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8452,%dummy}, %rd13026;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8453}, %rd13026;
	}
	shf.r.wrap.b32 	%r8454, %r8453, %r8452, 14;
	shf.r.wrap.b32 	%r8455, %r8452, %r8453, 14;
	mov.b64 	%rd13038, {%r8455, %r8454};
	shf.r.wrap.b32 	%r8456, %r8453, %r8452, 18;
	shf.r.wrap.b32 	%r8457, %r8452, %r8453, 18;
	mov.b64 	%rd13039, {%r8457, %r8456};
	xor.b64  	%rd13040, %rd13039, %rd13038;
	shf.l.wrap.b32 	%r8458, %r8452, %r8453, 23;
	shf.l.wrap.b32 	%r8459, %r8453, %r8452, 23;
	mov.b64 	%rd13041, {%r8459, %r8458};
	xor.b64  	%rd13042, %rd13040, %rd13041;
	xor.b64  	%rd13043, %rd13002, %rd12978;
	and.b64  	%rd13044, %rd13026, %rd13043;
	xor.b64  	%rd13045, %rd13044, %rd12978;
	add.s64 	%rd13046, %rd12954, %rd21645;
	add.s64 	%rd13047, %rd13046, %rd21449;
	add.s64 	%rd13048, %rd13047, %rd13045;
	add.s64 	%rd13049, %rd13048, %rd13042;
	add.s64 	%rd13050, %rd13049, %rd12965;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8460,%dummy}, %rd13037;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8461}, %rd13037;
	}
	shf.r.wrap.b32 	%r8462, %r8461, %r8460, 28;
	shf.r.wrap.b32 	%r8463, %r8460, %r8461, 28;
	mov.b64 	%rd13051, {%r8463, %r8462};
	shf.l.wrap.b32 	%r8464, %r8460, %r8461, 30;
	shf.l.wrap.b32 	%r8465, %r8461, %r8460, 30;
	mov.b64 	%rd13052, {%r8465, %r8464};
	xor.b64  	%rd13053, %rd13052, %rd13051;
	shf.l.wrap.b32 	%r8466, %r8460, %r8461, 25;
	shf.l.wrap.b32 	%r8467, %r8461, %r8460, 25;
	mov.b64 	%rd13054, {%r8467, %r8466};
	xor.b64  	%rd13055, %rd13053, %rd13054;
	xor.b64  	%rd13056, %rd13037, %rd12989;
	xor.b64  	%rd13057, %rd13037, %rd13013;
	and.b64  	%rd13058, %rd13057, %rd13056;
	xor.b64  	%rd13059, %rd13058, %rd13037;
	add.s64 	%rd13060, %rd13049, %rd13059;
	add.s64 	%rd13061, %rd13060, %rd13055;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8468,%dummy}, %rd13050;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8469}, %rd13050;
	}
	shf.r.wrap.b32 	%r8470, %r8469, %r8468, 14;
	shf.r.wrap.b32 	%r8471, %r8468, %r8469, 14;
	mov.b64 	%rd13062, {%r8471, %r8470};
	shf.r.wrap.b32 	%r8472, %r8469, %r8468, 18;
	shf.r.wrap.b32 	%r8473, %r8468, %r8469, 18;
	mov.b64 	%rd13063, {%r8473, %r8472};
	xor.b64  	%rd13064, %rd13063, %rd13062;
	shf.l.wrap.b32 	%r8474, %r8468, %r8469, 23;
	shf.l.wrap.b32 	%r8475, %r8469, %r8468, 23;
	mov.b64 	%rd13065, {%r8475, %r8474};
	xor.b64  	%rd13066, %rd13064, %rd13065;
	xor.b64  	%rd13067, %rd13026, %rd13002;
	and.b64  	%rd13068, %rd13050, %rd13067;
	xor.b64  	%rd13069, %rd13068, %rd13002;
	add.s64 	%rd13070, %rd12978, %rd21646;
	add.s64 	%rd13071, %rd13070, %rd21448;
	add.s64 	%rd13072, %rd13071, %rd13069;
	add.s64 	%rd13073, %rd13072, %rd13066;
	add.s64 	%rd13074, %rd13073, %rd12989;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8476,%dummy}, %rd13061;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8477}, %rd13061;
	}
	shf.r.wrap.b32 	%r8478, %r8477, %r8476, 28;
	shf.r.wrap.b32 	%r8479, %r8476, %r8477, 28;
	mov.b64 	%rd13075, {%r8479, %r8478};
	shf.l.wrap.b32 	%r8480, %r8476, %r8477, 30;
	shf.l.wrap.b32 	%r8481, %r8477, %r8476, 30;
	mov.b64 	%rd13076, {%r8481, %r8480};
	xor.b64  	%rd13077, %rd13076, %rd13075;
	shf.l.wrap.b32 	%r8482, %r8476, %r8477, 25;
	shf.l.wrap.b32 	%r8483, %r8477, %r8476, 25;
	mov.b64 	%rd13078, {%r8483, %r8482};
	xor.b64  	%rd13079, %rd13077, %rd13078;
	xor.b64  	%rd13080, %rd13061, %rd13013;
	xor.b64  	%rd13081, %rd13061, %rd13037;
	and.b64  	%rd13082, %rd13081, %rd13080;
	xor.b64  	%rd13083, %rd13082, %rd13061;
	add.s64 	%rd13084, %rd13073, %rd13083;
	add.s64 	%rd13085, %rd13084, %rd13079;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8484,%dummy}, %rd13074;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8485}, %rd13074;
	}
	shf.r.wrap.b32 	%r8486, %r8485, %r8484, 14;
	shf.r.wrap.b32 	%r8487, %r8484, %r8485, 14;
	mov.b64 	%rd13086, {%r8487, %r8486};
	shf.r.wrap.b32 	%r8488, %r8485, %r8484, 18;
	shf.r.wrap.b32 	%r8489, %r8484, %r8485, 18;
	mov.b64 	%rd13087, {%r8489, %r8488};
	xor.b64  	%rd13088, %rd13087, %rd13086;
	shf.l.wrap.b32 	%r8490, %r8484, %r8485, 23;
	shf.l.wrap.b32 	%r8491, %r8485, %r8484, 23;
	mov.b64 	%rd13089, {%r8491, %r8490};
	xor.b64  	%rd13090, %rd13088, %rd13089;
	xor.b64  	%rd13091, %rd13050, %rd13026;
	and.b64  	%rd13092, %rd13074, %rd13091;
	xor.b64  	%rd13093, %rd13092, %rd13026;
	add.s64 	%rd13094, %rd13002, %rd21647;
	add.s64 	%rd13095, %rd13094, %rd21447;
	add.s64 	%rd13096, %rd13095, %rd13093;
	add.s64 	%rd13097, %rd13096, %rd13090;
	add.s64 	%rd13098, %rd13097, %rd13013;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8492,%dummy}, %rd13085;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8493}, %rd13085;
	}
	shf.r.wrap.b32 	%r8494, %r8493, %r8492, 28;
	shf.r.wrap.b32 	%r8495, %r8492, %r8493, 28;
	mov.b64 	%rd13099, {%r8495, %r8494};
	shf.l.wrap.b32 	%r8496, %r8492, %r8493, 30;
	shf.l.wrap.b32 	%r8497, %r8493, %r8492, 30;
	mov.b64 	%rd13100, {%r8497, %r8496};
	xor.b64  	%rd13101, %rd13100, %rd13099;
	shf.l.wrap.b32 	%r8498, %r8492, %r8493, 25;
	shf.l.wrap.b32 	%r8499, %r8493, %r8492, 25;
	mov.b64 	%rd13102, {%r8499, %r8498};
	xor.b64  	%rd13103, %rd13101, %rd13102;
	xor.b64  	%rd13104, %rd13085, %rd13037;
	xor.b64  	%rd13105, %rd13085, %rd13061;
	and.b64  	%rd13106, %rd13105, %rd13104;
	xor.b64  	%rd13107, %rd13106, %rd13085;
	add.s64 	%rd13108, %rd13097, %rd13107;
	add.s64 	%rd13109, %rd13108, %rd13103;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8500,%dummy}, %rd13098;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8501}, %rd13098;
	}
	shf.r.wrap.b32 	%r8502, %r8501, %r8500, 14;
	shf.r.wrap.b32 	%r8503, %r8500, %r8501, 14;
	mov.b64 	%rd13110, {%r8503, %r8502};
	shf.r.wrap.b32 	%r8504, %r8501, %r8500, 18;
	shf.r.wrap.b32 	%r8505, %r8500, %r8501, 18;
	mov.b64 	%rd13111, {%r8505, %r8504};
	xor.b64  	%rd13112, %rd13111, %rd13110;
	shf.l.wrap.b32 	%r8506, %r8500, %r8501, 23;
	shf.l.wrap.b32 	%r8507, %r8501, %r8500, 23;
	mov.b64 	%rd13113, {%r8507, %r8506};
	xor.b64  	%rd13114, %rd13112, %rd13113;
	xor.b64  	%rd13115, %rd13074, %rd13050;
	and.b64  	%rd13116, %rd13098, %rd13115;
	xor.b64  	%rd13117, %rd13116, %rd13050;
	add.s64 	%rd13118, %rd13026, %rd21631;
	add.s64 	%rd13119, %rd13118, %rd21446;
	add.s64 	%rd13120, %rd13119, %rd13117;
	add.s64 	%rd13121, %rd13120, %rd13114;
	add.s64 	%rd13122, %rd13121, %rd13037;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8508,%dummy}, %rd13109;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8509}, %rd13109;
	}
	shf.r.wrap.b32 	%r8510, %r8509, %r8508, 28;
	shf.r.wrap.b32 	%r8511, %r8508, %r8509, 28;
	mov.b64 	%rd13123, {%r8511, %r8510};
	shf.l.wrap.b32 	%r8512, %r8508, %r8509, 30;
	shf.l.wrap.b32 	%r8513, %r8509, %r8508, 30;
	mov.b64 	%rd13124, {%r8513, %r8512};
	xor.b64  	%rd13125, %rd13124, %rd13123;
	shf.l.wrap.b32 	%r8514, %r8508, %r8509, 25;
	shf.l.wrap.b32 	%r8515, %r8509, %r8508, 25;
	mov.b64 	%rd13126, {%r8515, %r8514};
	xor.b64  	%rd13127, %rd13125, %rd13126;
	xor.b64  	%rd13128, %rd13109, %rd13061;
	xor.b64  	%rd13129, %rd13109, %rd13085;
	and.b64  	%rd13130, %rd13129, %rd13128;
	xor.b64  	%rd13131, %rd13130, %rd13109;
	add.s64 	%rd13132, %rd13121, %rd13131;
	add.s64 	%rd13133, %rd13132, %rd13127;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8516,%dummy}, %rd13122;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8517}, %rd13122;
	}
	shf.r.wrap.b32 	%r8518, %r8517, %r8516, 14;
	shf.r.wrap.b32 	%r8519, %r8516, %r8517, 14;
	mov.b64 	%rd13134, {%r8519, %r8518};
	shf.r.wrap.b32 	%r8520, %r8517, %r8516, 18;
	shf.r.wrap.b32 	%r8521, %r8516, %r8517, 18;
	mov.b64 	%rd13135, {%r8521, %r8520};
	xor.b64  	%rd13136, %rd13135, %rd13134;
	shf.l.wrap.b32 	%r8522, %r8516, %r8517, 23;
	shf.l.wrap.b32 	%r8523, %r8517, %r8516, 23;
	mov.b64 	%rd13137, {%r8523, %r8522};
	xor.b64  	%rd13138, %rd13136, %rd13137;
	xor.b64  	%rd13139, %rd13098, %rd13074;
	and.b64  	%rd13140, %rd13122, %rd13139;
	xor.b64  	%rd13141, %rd13140, %rd13074;
	add.s64 	%rd13142, %rd13050, %rd21630;
	add.s64 	%rd13143, %rd13142, %rd21445;
	add.s64 	%rd13144, %rd13143, %rd13141;
	add.s64 	%rd13145, %rd13144, %rd13138;
	add.s64 	%rd13146, %rd13145, %rd13061;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8524,%dummy}, %rd13133;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8525}, %rd13133;
	}
	shf.r.wrap.b32 	%r8526, %r8525, %r8524, 28;
	shf.r.wrap.b32 	%r8527, %r8524, %r8525, 28;
	mov.b64 	%rd13147, {%r8527, %r8526};
	shf.l.wrap.b32 	%r8528, %r8524, %r8525, 30;
	shf.l.wrap.b32 	%r8529, %r8525, %r8524, 30;
	mov.b64 	%rd13148, {%r8529, %r8528};
	xor.b64  	%rd13149, %rd13148, %rd13147;
	shf.l.wrap.b32 	%r8530, %r8524, %r8525, 25;
	shf.l.wrap.b32 	%r8531, %r8525, %r8524, 25;
	mov.b64 	%rd13150, {%r8531, %r8530};
	xor.b64  	%rd13151, %rd13149, %rd13150;
	xor.b64  	%rd13152, %rd13133, %rd13085;
	xor.b64  	%rd13153, %rd13133, %rd13109;
	and.b64  	%rd13154, %rd13153, %rd13152;
	xor.b64  	%rd13155, %rd13154, %rd13133;
	add.s64 	%rd13156, %rd13145, %rd13155;
	add.s64 	%rd13157, %rd13156, %rd13151;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8532,%dummy}, %rd13146;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8533}, %rd13146;
	}
	shf.r.wrap.b32 	%r8534, %r8533, %r8532, 14;
	shf.r.wrap.b32 	%r8535, %r8532, %r8533, 14;
	mov.b64 	%rd13158, {%r8535, %r8534};
	shf.r.wrap.b32 	%r8536, %r8533, %r8532, 18;
	shf.r.wrap.b32 	%r8537, %r8532, %r8533, 18;
	mov.b64 	%rd13159, {%r8537, %r8536};
	xor.b64  	%rd13160, %rd13159, %rd13158;
	shf.l.wrap.b32 	%r8538, %r8532, %r8533, 23;
	shf.l.wrap.b32 	%r8539, %r8533, %r8532, 23;
	mov.b64 	%rd13161, {%r8539, %r8538};
	xor.b64  	%rd13162, %rd13160, %rd13161;
	xor.b64  	%rd13163, %rd13122, %rd13098;
	and.b64  	%rd13164, %rd13146, %rd13163;
	xor.b64  	%rd13165, %rd13164, %rd13098;
	add.s64 	%rd13166, %rd13074, %rd21629;
	add.s64 	%rd13167, %rd13166, %rd21444;
	add.s64 	%rd13168, %rd13167, %rd13165;
	add.s64 	%rd13169, %rd13168, %rd13162;
	add.s64 	%rd13170, %rd13169, %rd13085;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8540,%dummy}, %rd13157;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8541}, %rd13157;
	}
	shf.r.wrap.b32 	%r8542, %r8541, %r8540, 28;
	shf.r.wrap.b32 	%r8543, %r8540, %r8541, 28;
	mov.b64 	%rd13171, {%r8543, %r8542};
	shf.l.wrap.b32 	%r8544, %r8540, %r8541, 30;
	shf.l.wrap.b32 	%r8545, %r8541, %r8540, 30;
	mov.b64 	%rd13172, {%r8545, %r8544};
	xor.b64  	%rd13173, %rd13172, %rd13171;
	shf.l.wrap.b32 	%r8546, %r8540, %r8541, 25;
	shf.l.wrap.b32 	%r8547, %r8541, %r8540, 25;
	mov.b64 	%rd13174, {%r8547, %r8546};
	xor.b64  	%rd13175, %rd13173, %rd13174;
	xor.b64  	%rd13176, %rd13157, %rd13109;
	xor.b64  	%rd13177, %rd13157, %rd13133;
	and.b64  	%rd13178, %rd13177, %rd13176;
	xor.b64  	%rd13179, %rd13178, %rd13157;
	add.s64 	%rd13180, %rd13169, %rd13179;
	add.s64 	%rd13181, %rd13180, %rd13175;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8548,%dummy}, %rd13170;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8549}, %rd13170;
	}
	shf.r.wrap.b32 	%r8550, %r8549, %r8548, 14;
	shf.r.wrap.b32 	%r8551, %r8548, %r8549, 14;
	mov.b64 	%rd13182, {%r8551, %r8550};
	shf.r.wrap.b32 	%r8552, %r8549, %r8548, 18;
	shf.r.wrap.b32 	%r8553, %r8548, %r8549, 18;
	mov.b64 	%rd13183, {%r8553, %r8552};
	xor.b64  	%rd13184, %rd13183, %rd13182;
	shf.l.wrap.b32 	%r8554, %r8548, %r8549, 23;
	shf.l.wrap.b32 	%r8555, %r8549, %r8548, 23;
	mov.b64 	%rd13185, {%r8555, %r8554};
	xor.b64  	%rd13186, %rd13184, %rd13185;
	xor.b64  	%rd13187, %rd13146, %rd13122;
	and.b64  	%rd13188, %rd13170, %rd13187;
	xor.b64  	%rd13189, %rd13188, %rd13122;
	add.s64 	%rd13190, %rd13098, %rd21628;
	add.s64 	%rd13191, %rd13190, %rd21443;
	add.s64 	%rd13192, %rd13191, %rd13189;
	add.s64 	%rd13193, %rd13192, %rd13186;
	add.s64 	%rd13194, %rd13193, %rd13109;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8556,%dummy}, %rd13181;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8557}, %rd13181;
	}
	shf.r.wrap.b32 	%r8558, %r8557, %r8556, 28;
	shf.r.wrap.b32 	%r8559, %r8556, %r8557, 28;
	mov.b64 	%rd13195, {%r8559, %r8558};
	shf.l.wrap.b32 	%r8560, %r8556, %r8557, 30;
	shf.l.wrap.b32 	%r8561, %r8557, %r8556, 30;
	mov.b64 	%rd13196, {%r8561, %r8560};
	xor.b64  	%rd13197, %rd13196, %rd13195;
	shf.l.wrap.b32 	%r8562, %r8556, %r8557, 25;
	shf.l.wrap.b32 	%r8563, %r8557, %r8556, 25;
	mov.b64 	%rd13198, {%r8563, %r8562};
	xor.b64  	%rd13199, %rd13197, %rd13198;
	xor.b64  	%rd13200, %rd13181, %rd13133;
	xor.b64  	%rd13201, %rd13181, %rd13157;
	and.b64  	%rd13202, %rd13201, %rd13200;
	xor.b64  	%rd13203, %rd13202, %rd13181;
	add.s64 	%rd13204, %rd13193, %rd13203;
	add.s64 	%rd13205, %rd13204, %rd13199;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8564,%dummy}, %rd13194;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8565}, %rd13194;
	}
	shf.r.wrap.b32 	%r8566, %r8565, %r8564, 14;
	shf.r.wrap.b32 	%r8567, %r8564, %r8565, 14;
	mov.b64 	%rd13206, {%r8567, %r8566};
	shf.r.wrap.b32 	%r8568, %r8565, %r8564, 18;
	shf.r.wrap.b32 	%r8569, %r8564, %r8565, 18;
	mov.b64 	%rd13207, {%r8569, %r8568};
	xor.b64  	%rd13208, %rd13207, %rd13206;
	shf.l.wrap.b32 	%r8570, %r8564, %r8565, 23;
	shf.l.wrap.b32 	%r8571, %r8565, %r8564, 23;
	mov.b64 	%rd13209, {%r8571, %r8570};
	xor.b64  	%rd13210, %rd13208, %rd13209;
	xor.b64  	%rd13211, %rd13170, %rd13146;
	and.b64  	%rd13212, %rd13194, %rd13211;
	xor.b64  	%rd13213, %rd13212, %rd13146;
	add.s64 	%rd13214, %rd13122, %rd21627;
	add.s64 	%rd13215, %rd13214, %rd21442;
	add.s64 	%rd13216, %rd13215, %rd13213;
	add.s64 	%rd13217, %rd13216, %rd13210;
	add.s64 	%rd21639, %rd13217, %rd13133;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8572,%dummy}, %rd13205;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8573}, %rd13205;
	}
	shf.r.wrap.b32 	%r8574, %r8573, %r8572, 28;
	shf.r.wrap.b32 	%r8575, %r8572, %r8573, 28;
	mov.b64 	%rd13218, {%r8575, %r8574};
	shf.l.wrap.b32 	%r8576, %r8572, %r8573, 30;
	shf.l.wrap.b32 	%r8577, %r8573, %r8572, 30;
	mov.b64 	%rd13219, {%r8577, %r8576};
	xor.b64  	%rd13220, %rd13219, %rd13218;
	shf.l.wrap.b32 	%r8578, %r8572, %r8573, 25;
	shf.l.wrap.b32 	%r8579, %r8573, %r8572, 25;
	mov.b64 	%rd13221, {%r8579, %r8578};
	xor.b64  	%rd13222, %rd13220, %rd13221;
	xor.b64  	%rd13223, %rd13205, %rd13157;
	xor.b64  	%rd13224, %rd13205, %rd13181;
	and.b64  	%rd13225, %rd13224, %rd13223;
	xor.b64  	%rd13226, %rd13225, %rd13205;
	add.s64 	%rd13227, %rd13217, %rd13226;
	add.s64 	%rd21635, %rd13227, %rd13222;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8580,%dummy}, %rd21639;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8581}, %rd21639;
	}
	shf.r.wrap.b32 	%r8582, %r8581, %r8580, 14;
	shf.r.wrap.b32 	%r8583, %r8580, %r8581, 14;
	mov.b64 	%rd13228, {%r8583, %r8582};
	shf.r.wrap.b32 	%r8584, %r8581, %r8580, 18;
	shf.r.wrap.b32 	%r8585, %r8580, %r8581, 18;
	mov.b64 	%rd13229, {%r8585, %r8584};
	xor.b64  	%rd13230, %rd13229, %rd13228;
	shf.l.wrap.b32 	%r8586, %r8580, %r8581, 23;
	shf.l.wrap.b32 	%r8587, %r8581, %r8580, 23;
	mov.b64 	%rd13231, {%r8587, %r8586};
	xor.b64  	%rd13232, %rd13230, %rd13231;
	xor.b64  	%rd13233, %rd13194, %rd13170;
	and.b64  	%rd13234, %rd21639, %rd13233;
	xor.b64  	%rd13235, %rd13234, %rd13170;
	add.s64 	%rd13236, %rd13146, %rd21626;
	add.s64 	%rd13237, %rd13236, %rd21441;
	add.s64 	%rd13238, %rd13237, %rd13235;
	add.s64 	%rd13239, %rd13238, %rd13232;
	add.s64 	%rd21638, %rd13239, %rd13157;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8588,%dummy}, %rd21635;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8589}, %rd21635;
	}
	shf.r.wrap.b32 	%r8590, %r8589, %r8588, 28;
	shf.r.wrap.b32 	%r8591, %r8588, %r8589, 28;
	mov.b64 	%rd13240, {%r8591, %r8590};
	shf.l.wrap.b32 	%r8592, %r8588, %r8589, 30;
	shf.l.wrap.b32 	%r8593, %r8589, %r8588, 30;
	mov.b64 	%rd13241, {%r8593, %r8592};
	xor.b64  	%rd13242, %rd13241, %rd13240;
	shf.l.wrap.b32 	%r8594, %r8588, %r8589, 25;
	shf.l.wrap.b32 	%r8595, %r8589, %r8588, 25;
	mov.b64 	%rd13243, {%r8595, %r8594};
	xor.b64  	%rd13244, %rd13242, %rd13243;
	xor.b64  	%rd13245, %rd21635, %rd13181;
	xor.b64  	%rd13246, %rd21635, %rd13205;
	and.b64  	%rd13247, %rd13246, %rd13245;
	xor.b64  	%rd13248, %rd13247, %rd21635;
	add.s64 	%rd13249, %rd13239, %rd13248;
	add.s64 	%rd21634, %rd13249, %rd13244;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8596,%dummy}, %rd21638;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8597}, %rd21638;
	}
	shf.r.wrap.b32 	%r8598, %r8597, %r8596, 14;
	shf.r.wrap.b32 	%r8599, %r8596, %r8597, 14;
	mov.b64 	%rd13250, {%r8599, %r8598};
	shf.r.wrap.b32 	%r8600, %r8597, %r8596, 18;
	shf.r.wrap.b32 	%r8601, %r8596, %r8597, 18;
	mov.b64 	%rd13251, {%r8601, %r8600};
	xor.b64  	%rd13252, %rd13251, %rd13250;
	shf.l.wrap.b32 	%r8602, %r8596, %r8597, 23;
	shf.l.wrap.b32 	%r8603, %r8597, %r8596, 23;
	mov.b64 	%rd13253, {%r8603, %r8602};
	xor.b64  	%rd13254, %rd13252, %rd13253;
	xor.b64  	%rd13255, %rd21639, %rd13194;
	and.b64  	%rd13256, %rd21638, %rd13255;
	xor.b64  	%rd13257, %rd13256, %rd13194;
	add.s64 	%rd13258, %rd13170, %rd21625;
	add.s64 	%rd13259, %rd13258, %rd21440;
	add.s64 	%rd13260, %rd13259, %rd13257;
	add.s64 	%rd13261, %rd13260, %rd13254;
	add.s64 	%rd21637, %rd13261, %rd13181;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8604,%dummy}, %rd21634;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8605}, %rd21634;
	}
	shf.r.wrap.b32 	%r8606, %r8605, %r8604, 28;
	shf.r.wrap.b32 	%r8607, %r8604, %r8605, 28;
	mov.b64 	%rd13262, {%r8607, %r8606};
	shf.l.wrap.b32 	%r8608, %r8604, %r8605, 30;
	shf.l.wrap.b32 	%r8609, %r8605, %r8604, 30;
	mov.b64 	%rd13263, {%r8609, %r8608};
	xor.b64  	%rd13264, %rd13263, %rd13262;
	shf.l.wrap.b32 	%r8610, %r8604, %r8605, 25;
	shf.l.wrap.b32 	%r8611, %r8605, %r8604, 25;
	mov.b64 	%rd13265, {%r8611, %r8610};
	xor.b64  	%rd13266, %rd13264, %rd13265;
	xor.b64  	%rd13267, %rd21634, %rd13205;
	xor.b64  	%rd13268, %rd21634, %rd21635;
	and.b64  	%rd13269, %rd13268, %rd13267;
	xor.b64  	%rd13270, %rd13269, %rd21634;
	add.s64 	%rd13271, %rd13261, %rd13270;
	add.s64 	%rd21633, %rd13271, %rd13266;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8612,%dummy}, %rd21637;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8613}, %rd21637;
	}
	shf.r.wrap.b32 	%r8614, %r8613, %r8612, 14;
	shf.r.wrap.b32 	%r8615, %r8612, %r8613, 14;
	mov.b64 	%rd13272, {%r8615, %r8614};
	shf.r.wrap.b32 	%r8616, %r8613, %r8612, 18;
	shf.r.wrap.b32 	%r8617, %r8612, %r8613, 18;
	mov.b64 	%rd13273, {%r8617, %r8616};
	xor.b64  	%rd13274, %rd13273, %rd13272;
	shf.l.wrap.b32 	%r8618, %r8612, %r8613, 23;
	shf.l.wrap.b32 	%r8619, %r8613, %r8612, 23;
	mov.b64 	%rd13275, {%r8619, %r8618};
	xor.b64  	%rd13276, %rd13274, %rd13275;
	xor.b64  	%rd13277, %rd21638, %rd21639;
	and.b64  	%rd13278, %rd21637, %rd13277;
	xor.b64  	%rd13279, %rd13278, %rd21639;
	add.s64 	%rd13280, %rd13194, %rd21624;
	add.s64 	%rd13281, %rd13280, %rd21439;
	add.s64 	%rd13282, %rd13281, %rd13279;
	add.s64 	%rd13283, %rd13282, %rd13276;
	add.s64 	%rd21636, %rd13283, %rd13205;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8620,%dummy}, %rd21633;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8621}, %rd21633;
	}
	shf.r.wrap.b32 	%r8622, %r8621, %r8620, 28;
	shf.r.wrap.b32 	%r8623, %r8620, %r8621, 28;
	mov.b64 	%rd13284, {%r8623, %r8622};
	shf.l.wrap.b32 	%r8624, %r8620, %r8621, 30;
	shf.l.wrap.b32 	%r8625, %r8621, %r8620, 30;
	mov.b64 	%rd13285, {%r8625, %r8624};
	xor.b64  	%rd13286, %rd13285, %rd13284;
	shf.l.wrap.b32 	%r8626, %r8620, %r8621, 25;
	shf.l.wrap.b32 	%r8627, %r8621, %r8620, 25;
	mov.b64 	%rd13287, {%r8627, %r8626};
	xor.b64  	%rd13288, %rd13286, %rd13287;
	xor.b64  	%rd13289, %rd21633, %rd21635;
	xor.b64  	%rd13290, %rd21633, %rd21634;
	and.b64  	%rd13291, %rd13290, %rd13289;
	xor.b64  	%rd13292, %rd13291, %rd21633;
	add.s64 	%rd13293, %rd13283, %rd13292;
	add.s64 	%rd21632, %rd13293, %rd13288;
	mov.u32 	%r14444, 16;

BB3_246:
	shr.u64 	%rd13294, %rd21625, 6;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8628,%dummy}, %rd21625;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8629}, %rd21625;
	}
	shf.r.wrap.b32 	%r8630, %r8629, %r8628, 19;
	shf.r.wrap.b32 	%r8631, %r8628, %r8629, 19;
	mov.b64 	%rd13295, {%r8631, %r8630};
	xor.b64  	%rd13296, %rd13295, %rd13294;
	shf.l.wrap.b32 	%r8632, %r8628, %r8629, 3;
	shf.l.wrap.b32 	%r8633, %r8629, %r8628, 3;
	mov.b64 	%rd13297, {%r8633, %r8632};
	xor.b64  	%rd13298, %rd13296, %rd13297;
	shr.u64 	%rd13299, %rd21641, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8634,%dummy}, %rd21641;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8635}, %rd21641;
	}
	shf.r.wrap.b32 	%r8636, %r8635, %r8634, 1;
	shf.r.wrap.b32 	%r8637, %r8634, %r8635, 1;
	mov.b64 	%rd13300, {%r8637, %r8636};
	xor.b64  	%rd13301, %rd13300, %rd13299;
	shf.r.wrap.b32 	%r8638, %r8635, %r8634, 8;
	shf.r.wrap.b32 	%r8639, %r8634, %r8635, 8;
	mov.b64 	%rd13302, {%r8639, %r8638};
	xor.b64  	%rd13303, %rd13301, %rd13302;
	add.s64 	%rd13304, %rd21630, %rd21640;
	add.s64 	%rd13305, %rd13304, %rd13298;
	add.s64 	%rd21640, %rd13305, %rd13303;
	shr.u64 	%rd13306, %rd21624, 6;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8640,%dummy}, %rd21624;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8641}, %rd21624;
	}
	shf.r.wrap.b32 	%r8642, %r8641, %r8640, 19;
	shf.r.wrap.b32 	%r8643, %r8640, %r8641, 19;
	mov.b64 	%rd13307, {%r8643, %r8642};
	xor.b64  	%rd13308, %rd13307, %rd13306;
	shf.l.wrap.b32 	%r8644, %r8640, %r8641, 3;
	shf.l.wrap.b32 	%r8645, %r8641, %r8640, 3;
	mov.b64 	%rd13309, {%r8645, %r8644};
	xor.b64  	%rd13310, %rd13308, %rd13309;
	shr.u64 	%rd13311, %rd21642, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8646,%dummy}, %rd21642;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8647}, %rd21642;
	}
	shf.r.wrap.b32 	%r8648, %r8647, %r8646, 1;
	shf.r.wrap.b32 	%r8649, %r8646, %r8647, 1;
	mov.b64 	%rd13312, {%r8649, %r8648};
	xor.b64  	%rd13313, %rd13312, %rd13311;
	shf.r.wrap.b32 	%r8650, %r8647, %r8646, 8;
	shf.r.wrap.b32 	%r8651, %r8646, %r8647, 8;
	mov.b64 	%rd13314, {%r8651, %r8650};
	xor.b64  	%rd13315, %rd13313, %rd13314;
	add.s64 	%rd13316, %rd21629, %rd21641;
	add.s64 	%rd13317, %rd13316, %rd13310;
	add.s64 	%rd21641, %rd13317, %rd13315;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8652,%dummy}, %rd21640;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8653}, %rd21640;
	}
	shf.r.wrap.b32 	%r8654, %r8653, %r8652, 19;
	shf.r.wrap.b32 	%r8655, %r8652, %r8653, 19;
	mov.b64 	%rd13318, {%r8655, %r8654};
	shf.l.wrap.b32 	%r8656, %r8652, %r8653, 3;
	shf.l.wrap.b32 	%r8657, %r8653, %r8652, 3;
	mov.b64 	%rd13319, {%r8657, %r8656};
	shr.u64 	%rd13320, %rd21640, 6;
	xor.b64  	%rd13321, %rd13318, %rd13320;
	xor.b64  	%rd13322, %rd13321, %rd13319;
	shr.u64 	%rd13323, %rd21643, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8658,%dummy}, %rd21643;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8659}, %rd21643;
	}
	shf.r.wrap.b32 	%r8660, %r8659, %r8658, 1;
	shf.r.wrap.b32 	%r8661, %r8658, %r8659, 1;
	mov.b64 	%rd13324, {%r8661, %r8660};
	xor.b64  	%rd13325, %rd13324, %rd13323;
	shf.r.wrap.b32 	%r8662, %r8659, %r8658, 8;
	shf.r.wrap.b32 	%r8663, %r8658, %r8659, 8;
	mov.b64 	%rd13326, {%r8663, %r8662};
	xor.b64  	%rd13327, %rd13325, %rd13326;
	add.s64 	%rd13328, %rd21628, %rd21642;
	add.s64 	%rd13329, %rd13328, %rd13322;
	add.s64 	%rd21642, %rd13329, %rd13327;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8664,%dummy}, %rd21641;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8665}, %rd21641;
	}
	shf.r.wrap.b32 	%r8666, %r8665, %r8664, 19;
	shf.r.wrap.b32 	%r8667, %r8664, %r8665, 19;
	mov.b64 	%rd13330, {%r8667, %r8666};
	shf.l.wrap.b32 	%r8668, %r8664, %r8665, 3;
	shf.l.wrap.b32 	%r8669, %r8665, %r8664, 3;
	mov.b64 	%rd13331, {%r8669, %r8668};
	shr.u64 	%rd13332, %rd21641, 6;
	xor.b64  	%rd13333, %rd13330, %rd13332;
	xor.b64  	%rd13334, %rd13333, %rd13331;
	shr.u64 	%rd13335, %rd21644, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8670,%dummy}, %rd21644;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8671}, %rd21644;
	}
	shf.r.wrap.b32 	%r8672, %r8671, %r8670, 1;
	shf.r.wrap.b32 	%r8673, %r8670, %r8671, 1;
	mov.b64 	%rd13336, {%r8673, %r8672};
	xor.b64  	%rd13337, %rd13336, %rd13335;
	shf.r.wrap.b32 	%r8674, %r8671, %r8670, 8;
	shf.r.wrap.b32 	%r8675, %r8670, %r8671, 8;
	mov.b64 	%rd13338, {%r8675, %r8674};
	xor.b64  	%rd13339, %rd13337, %rd13338;
	add.s64 	%rd13340, %rd21627, %rd21643;
	add.s64 	%rd13341, %rd13340, %rd13334;
	add.s64 	%rd21643, %rd13341, %rd13339;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8676,%dummy}, %rd21642;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8677}, %rd21642;
	}
	shf.r.wrap.b32 	%r8678, %r8677, %r8676, 19;
	shf.r.wrap.b32 	%r8679, %r8676, %r8677, 19;
	mov.b64 	%rd13342, {%r8679, %r8678};
	shf.l.wrap.b32 	%r8680, %r8676, %r8677, 3;
	shf.l.wrap.b32 	%r8681, %r8677, %r8676, 3;
	mov.b64 	%rd13343, {%r8681, %r8680};
	shr.u64 	%rd13344, %rd21642, 6;
	xor.b64  	%rd13345, %rd13342, %rd13344;
	xor.b64  	%rd13346, %rd13345, %rd13343;
	shr.u64 	%rd13347, %rd21645, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8682,%dummy}, %rd21645;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8683}, %rd21645;
	}
	shf.r.wrap.b32 	%r8684, %r8683, %r8682, 1;
	shf.r.wrap.b32 	%r8685, %r8682, %r8683, 1;
	mov.b64 	%rd13348, {%r8685, %r8684};
	xor.b64  	%rd13349, %rd13348, %rd13347;
	shf.r.wrap.b32 	%r8686, %r8683, %r8682, 8;
	shf.r.wrap.b32 	%r8687, %r8682, %r8683, 8;
	mov.b64 	%rd13350, {%r8687, %r8686};
	xor.b64  	%rd13351, %rd13349, %rd13350;
	add.s64 	%rd13352, %rd21626, %rd21644;
	add.s64 	%rd13353, %rd13352, %rd13346;
	add.s64 	%rd21644, %rd13353, %rd13351;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8688,%dummy}, %rd21643;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8689}, %rd21643;
	}
	shf.r.wrap.b32 	%r8690, %r8689, %r8688, 19;
	shf.r.wrap.b32 	%r8691, %r8688, %r8689, 19;
	mov.b64 	%rd13354, {%r8691, %r8690};
	shf.l.wrap.b32 	%r8692, %r8688, %r8689, 3;
	shf.l.wrap.b32 	%r8693, %r8689, %r8688, 3;
	mov.b64 	%rd13355, {%r8693, %r8692};
	shr.u64 	%rd13356, %rd21643, 6;
	xor.b64  	%rd13357, %rd13354, %rd13356;
	xor.b64  	%rd13358, %rd13357, %rd13355;
	shr.u64 	%rd13359, %rd21646, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8694,%dummy}, %rd21646;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8695}, %rd21646;
	}
	shf.r.wrap.b32 	%r8696, %r8695, %r8694, 1;
	shf.r.wrap.b32 	%r8697, %r8694, %r8695, 1;
	mov.b64 	%rd13360, {%r8697, %r8696};
	xor.b64  	%rd13361, %rd13360, %rd13359;
	shf.r.wrap.b32 	%r8698, %r8695, %r8694, 8;
	shf.r.wrap.b32 	%r8699, %r8694, %r8695, 8;
	mov.b64 	%rd13362, {%r8699, %r8698};
	xor.b64  	%rd13363, %rd13361, %rd13362;
	add.s64 	%rd13364, %rd21625, %rd21645;
	add.s64 	%rd13365, %rd13364, %rd13358;
	add.s64 	%rd21645, %rd13365, %rd13363;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8700,%dummy}, %rd21644;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8701}, %rd21644;
	}
	shf.r.wrap.b32 	%r8702, %r8701, %r8700, 19;
	shf.r.wrap.b32 	%r8703, %r8700, %r8701, 19;
	mov.b64 	%rd13366, {%r8703, %r8702};
	shf.l.wrap.b32 	%r8704, %r8700, %r8701, 3;
	shf.l.wrap.b32 	%r8705, %r8701, %r8700, 3;
	mov.b64 	%rd13367, {%r8705, %r8704};
	shr.u64 	%rd13368, %rd21644, 6;
	xor.b64  	%rd13369, %rd13366, %rd13368;
	xor.b64  	%rd13370, %rd13369, %rd13367;
	shr.u64 	%rd13371, %rd21647, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8706,%dummy}, %rd21647;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8707}, %rd21647;
	}
	shf.r.wrap.b32 	%r8708, %r8707, %r8706, 1;
	shf.r.wrap.b32 	%r8709, %r8706, %r8707, 1;
	mov.b64 	%rd13372, {%r8709, %r8708};
	xor.b64  	%rd13373, %rd13372, %rd13371;
	shf.r.wrap.b32 	%r8710, %r8707, %r8706, 8;
	shf.r.wrap.b32 	%r8711, %r8706, %r8707, 8;
	mov.b64 	%rd13374, {%r8711, %r8710};
	xor.b64  	%rd13375, %rd13373, %rd13374;
	add.s64 	%rd13376, %rd21624, %rd21646;
	add.s64 	%rd13377, %rd13376, %rd13370;
	add.s64 	%rd21646, %rd13377, %rd13375;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8712,%dummy}, %rd21645;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8713}, %rd21645;
	}
	shf.r.wrap.b32 	%r8714, %r8713, %r8712, 19;
	shf.r.wrap.b32 	%r8715, %r8712, %r8713, 19;
	mov.b64 	%rd13378, {%r8715, %r8714};
	shf.l.wrap.b32 	%r8716, %r8712, %r8713, 3;
	shf.l.wrap.b32 	%r8717, %r8713, %r8712, 3;
	mov.b64 	%rd13379, {%r8717, %r8716};
	shr.u64 	%rd13380, %rd21645, 6;
	xor.b64  	%rd13381, %rd13378, %rd13380;
	xor.b64  	%rd13382, %rd13381, %rd13379;
	shr.u64 	%rd13383, %rd21631, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8718,%dummy}, %rd21631;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8719}, %rd21631;
	}
	shf.r.wrap.b32 	%r8720, %r8719, %r8718, 1;
	shf.r.wrap.b32 	%r8721, %r8718, %r8719, 1;
	mov.b64 	%rd13384, {%r8721, %r8720};
	xor.b64  	%rd13385, %rd13384, %rd13383;
	shf.r.wrap.b32 	%r8722, %r8719, %r8718, 8;
	shf.r.wrap.b32 	%r8723, %r8718, %r8719, 8;
	mov.b64 	%rd13386, {%r8723, %r8722};
	xor.b64  	%rd13387, %rd13385, %rd13386;
	add.s64 	%rd13388, %rd21640, %rd21647;
	add.s64 	%rd13389, %rd13388, %rd13382;
	add.s64 	%rd21647, %rd13389, %rd13387;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8724,%dummy}, %rd21646;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8725}, %rd21646;
	}
	shf.r.wrap.b32 	%r8726, %r8725, %r8724, 19;
	shf.r.wrap.b32 	%r8727, %r8724, %r8725, 19;
	mov.b64 	%rd13390, {%r8727, %r8726};
	shf.l.wrap.b32 	%r8728, %r8724, %r8725, 3;
	shf.l.wrap.b32 	%r8729, %r8725, %r8724, 3;
	mov.b64 	%rd13391, {%r8729, %r8728};
	shr.u64 	%rd13392, %rd21646, 6;
	xor.b64  	%rd13393, %rd13390, %rd13392;
	xor.b64  	%rd13394, %rd13393, %rd13391;
	shr.u64 	%rd13395, %rd21630, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8730,%dummy}, %rd21630;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8731}, %rd21630;
	}
	shf.r.wrap.b32 	%r8732, %r8731, %r8730, 1;
	shf.r.wrap.b32 	%r8733, %r8730, %r8731, 1;
	mov.b64 	%rd13396, {%r8733, %r8732};
	xor.b64  	%rd13397, %rd13396, %rd13395;
	shf.r.wrap.b32 	%r8734, %r8731, %r8730, 8;
	shf.r.wrap.b32 	%r8735, %r8730, %r8731, 8;
	mov.b64 	%rd13398, {%r8735, %r8734};
	xor.b64  	%rd13399, %rd13397, %rd13398;
	add.s64 	%rd13400, %rd21641, %rd21631;
	add.s64 	%rd13401, %rd13400, %rd13394;
	add.s64 	%rd21631, %rd13401, %rd13399;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8736,%dummy}, %rd21647;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8737}, %rd21647;
	}
	shf.r.wrap.b32 	%r8738, %r8737, %r8736, 19;
	shf.r.wrap.b32 	%r8739, %r8736, %r8737, 19;
	mov.b64 	%rd13402, {%r8739, %r8738};
	shf.l.wrap.b32 	%r8740, %r8736, %r8737, 3;
	shf.l.wrap.b32 	%r8741, %r8737, %r8736, 3;
	mov.b64 	%rd13403, {%r8741, %r8740};
	shr.u64 	%rd13404, %rd21647, 6;
	xor.b64  	%rd13405, %rd13402, %rd13404;
	xor.b64  	%rd13406, %rd13405, %rd13403;
	shr.u64 	%rd13407, %rd21629, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8742,%dummy}, %rd21629;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8743}, %rd21629;
	}
	shf.r.wrap.b32 	%r8744, %r8743, %r8742, 1;
	shf.r.wrap.b32 	%r8745, %r8742, %r8743, 1;
	mov.b64 	%rd13408, {%r8745, %r8744};
	xor.b64  	%rd13409, %rd13408, %rd13407;
	shf.r.wrap.b32 	%r8746, %r8743, %r8742, 8;
	shf.r.wrap.b32 	%r8747, %r8742, %r8743, 8;
	mov.b64 	%rd13410, {%r8747, %r8746};
	xor.b64  	%rd13411, %rd13409, %rd13410;
	add.s64 	%rd13412, %rd21642, %rd21630;
	add.s64 	%rd13413, %rd13412, %rd13406;
	add.s64 	%rd21630, %rd13413, %rd13411;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8748,%dummy}, %rd21631;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8749}, %rd21631;
	}
	shf.r.wrap.b32 	%r8750, %r8749, %r8748, 19;
	shf.r.wrap.b32 	%r8751, %r8748, %r8749, 19;
	mov.b64 	%rd13414, {%r8751, %r8750};
	shf.l.wrap.b32 	%r8752, %r8748, %r8749, 3;
	shf.l.wrap.b32 	%r8753, %r8749, %r8748, 3;
	mov.b64 	%rd13415, {%r8753, %r8752};
	shr.u64 	%rd13416, %rd21631, 6;
	xor.b64  	%rd13417, %rd13414, %rd13416;
	xor.b64  	%rd13418, %rd13417, %rd13415;
	shr.u64 	%rd13419, %rd21628, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8754,%dummy}, %rd21628;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8755}, %rd21628;
	}
	shf.r.wrap.b32 	%r8756, %r8755, %r8754, 1;
	shf.r.wrap.b32 	%r8757, %r8754, %r8755, 1;
	mov.b64 	%rd13420, {%r8757, %r8756};
	xor.b64  	%rd13421, %rd13420, %rd13419;
	shf.r.wrap.b32 	%r8758, %r8755, %r8754, 8;
	shf.r.wrap.b32 	%r8759, %r8754, %r8755, 8;
	mov.b64 	%rd13422, {%r8759, %r8758};
	xor.b64  	%rd13423, %rd13421, %rd13422;
	add.s64 	%rd13424, %rd21643, %rd21629;
	add.s64 	%rd13425, %rd13424, %rd13418;
	add.s64 	%rd21629, %rd13425, %rd13423;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8760,%dummy}, %rd21630;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8761}, %rd21630;
	}
	shf.r.wrap.b32 	%r8762, %r8761, %r8760, 19;
	shf.r.wrap.b32 	%r8763, %r8760, %r8761, 19;
	mov.b64 	%rd13426, {%r8763, %r8762};
	shf.l.wrap.b32 	%r8764, %r8760, %r8761, 3;
	shf.l.wrap.b32 	%r8765, %r8761, %r8760, 3;
	mov.b64 	%rd13427, {%r8765, %r8764};
	shr.u64 	%rd13428, %rd21630, 6;
	xor.b64  	%rd13429, %rd13426, %rd13428;
	xor.b64  	%rd13430, %rd13429, %rd13427;
	shr.u64 	%rd13431, %rd21627, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8766,%dummy}, %rd21627;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8767}, %rd21627;
	}
	shf.r.wrap.b32 	%r8768, %r8767, %r8766, 1;
	shf.r.wrap.b32 	%r8769, %r8766, %r8767, 1;
	mov.b64 	%rd13432, {%r8769, %r8768};
	xor.b64  	%rd13433, %rd13432, %rd13431;
	shf.r.wrap.b32 	%r8770, %r8767, %r8766, 8;
	shf.r.wrap.b32 	%r8771, %r8766, %r8767, 8;
	mov.b64 	%rd13434, {%r8771, %r8770};
	xor.b64  	%rd13435, %rd13433, %rd13434;
	add.s64 	%rd13436, %rd21644, %rd21628;
	add.s64 	%rd13437, %rd13436, %rd13430;
	add.s64 	%rd21628, %rd13437, %rd13435;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8772,%dummy}, %rd21629;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8773}, %rd21629;
	}
	shf.r.wrap.b32 	%r8774, %r8773, %r8772, 19;
	shf.r.wrap.b32 	%r8775, %r8772, %r8773, 19;
	mov.b64 	%rd13438, {%r8775, %r8774};
	shf.l.wrap.b32 	%r8776, %r8772, %r8773, 3;
	shf.l.wrap.b32 	%r8777, %r8773, %r8772, 3;
	mov.b64 	%rd13439, {%r8777, %r8776};
	shr.u64 	%rd13440, %rd21629, 6;
	xor.b64  	%rd13441, %rd13438, %rd13440;
	xor.b64  	%rd13442, %rd13441, %rd13439;
	shr.u64 	%rd13443, %rd21626, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8778,%dummy}, %rd21626;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8779}, %rd21626;
	}
	shf.r.wrap.b32 	%r8780, %r8779, %r8778, 1;
	shf.r.wrap.b32 	%r8781, %r8778, %r8779, 1;
	mov.b64 	%rd13444, {%r8781, %r8780};
	xor.b64  	%rd13445, %rd13444, %rd13443;
	shf.r.wrap.b32 	%r8782, %r8779, %r8778, 8;
	shf.r.wrap.b32 	%r8783, %r8778, %r8779, 8;
	mov.b64 	%rd13446, {%r8783, %r8782};
	xor.b64  	%rd13447, %rd13445, %rd13446;
	add.s64 	%rd13448, %rd21645, %rd21627;
	add.s64 	%rd13449, %rd13448, %rd13442;
	add.s64 	%rd21627, %rd13449, %rd13447;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8784,%dummy}, %rd21628;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8785}, %rd21628;
	}
	shf.r.wrap.b32 	%r8786, %r8785, %r8784, 19;
	shf.r.wrap.b32 	%r8787, %r8784, %r8785, 19;
	mov.b64 	%rd13450, {%r8787, %r8786};
	shf.l.wrap.b32 	%r8788, %r8784, %r8785, 3;
	shf.l.wrap.b32 	%r8789, %r8785, %r8784, 3;
	mov.b64 	%rd13451, {%r8789, %r8788};
	shr.u64 	%rd13452, %rd21628, 6;
	xor.b64  	%rd13453, %rd13450, %rd13452;
	xor.b64  	%rd13454, %rd13453, %rd13451;
	shr.u64 	%rd13455, %rd21625, 7;
	shf.r.wrap.b32 	%r8790, %r8629, %r8628, 1;
	shf.r.wrap.b32 	%r8791, %r8628, %r8629, 1;
	mov.b64 	%rd13456, {%r8791, %r8790};
	xor.b64  	%rd13457, %rd13456, %rd13455;
	shf.r.wrap.b32 	%r8792, %r8629, %r8628, 8;
	shf.r.wrap.b32 	%r8793, %r8628, %r8629, 8;
	mov.b64 	%rd13458, {%r8793, %r8792};
	xor.b64  	%rd13459, %rd13457, %rd13458;
	add.s64 	%rd13460, %rd21646, %rd21626;
	add.s64 	%rd13461, %rd13460, %rd13454;
	add.s64 	%rd21626, %rd13461, %rd13459;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8794,%dummy}, %rd21627;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8795}, %rd21627;
	}
	shf.r.wrap.b32 	%r8796, %r8795, %r8794, 19;
	shf.r.wrap.b32 	%r8797, %r8794, %r8795, 19;
	mov.b64 	%rd13462, {%r8797, %r8796};
	shf.l.wrap.b32 	%r8798, %r8794, %r8795, 3;
	shf.l.wrap.b32 	%r8799, %r8795, %r8794, 3;
	mov.b64 	%rd13463, {%r8799, %r8798};
	shr.u64 	%rd13464, %rd21627, 6;
	xor.b64  	%rd13465, %rd13462, %rd13464;
	xor.b64  	%rd13466, %rd13465, %rd13463;
	shr.u64 	%rd13467, %rd21624, 7;
	shf.r.wrap.b32 	%r8800, %r8641, %r8640, 1;
	shf.r.wrap.b32 	%r8801, %r8640, %r8641, 1;
	mov.b64 	%rd13468, {%r8801, %r8800};
	xor.b64  	%rd13469, %rd13468, %rd13467;
	shf.r.wrap.b32 	%r8802, %r8641, %r8640, 8;
	shf.r.wrap.b32 	%r8803, %r8640, %r8641, 8;
	mov.b64 	%rd13470, {%r8803, %r8802};
	xor.b64  	%rd13471, %rd13469, %rd13470;
	add.s64 	%rd13472, %rd21647, %rd21625;
	add.s64 	%rd13473, %rd13472, %rd13466;
	add.s64 	%rd21625, %rd13473, %rd13471;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8804,%dummy}, %rd21626;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8805}, %rd21626;
	}
	shf.r.wrap.b32 	%r8806, %r8805, %r8804, 19;
	shf.r.wrap.b32 	%r8807, %r8804, %r8805, 19;
	mov.b64 	%rd13474, {%r8807, %r8806};
	shf.l.wrap.b32 	%r8808, %r8804, %r8805, 3;
	shf.l.wrap.b32 	%r8809, %r8805, %r8804, 3;
	mov.b64 	%rd13475, {%r8809, %r8808};
	shr.u64 	%rd13476, %rd21626, 6;
	xor.b64  	%rd13477, %rd13474, %rd13476;
	xor.b64  	%rd13478, %rd13477, %rd13475;
	shf.r.wrap.b32 	%r8810, %r8653, %r8652, 1;
	shf.r.wrap.b32 	%r8811, %r8652, %r8653, 1;
	mov.b64 	%rd13479, {%r8811, %r8810};
	shf.r.wrap.b32 	%r8812, %r8653, %r8652, 8;
	shf.r.wrap.b32 	%r8813, %r8652, %r8653, 8;
	mov.b64 	%rd13480, {%r8813, %r8812};
	shr.u64 	%rd13481, %rd21640, 7;
	xor.b64  	%rd13482, %rd13479, %rd13481;
	xor.b64  	%rd13483, %rd13482, %rd13480;
	add.s64 	%rd13484, %rd21631, %rd21624;
	add.s64 	%rd13485, %rd13484, %rd13478;
	add.s64 	%rd21624, %rd13485, %rd13483;
	mul.wide.s32 	%rd13486, %r14444, 8;
	mov.u64 	%rd13487, k_sha512;
	add.s64 	%rd13488, %rd13487, %rd13486;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8814,%dummy}, %rd21636;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8815}, %rd21636;
	}
	shf.r.wrap.b32 	%r8816, %r8815, %r8814, 18;
	shf.r.wrap.b32 	%r8817, %r8814, %r8815, 18;
	mov.b64 	%rd13489, {%r8817, %r8816};
	shf.r.wrap.b32 	%r8818, %r8815, %r8814, 14;
	shf.r.wrap.b32 	%r8819, %r8814, %r8815, 14;
	mov.b64 	%rd13490, {%r8819, %r8818};
	xor.b64  	%rd13491, %rd13489, %rd13490;
	shf.l.wrap.b32 	%r8820, %r8814, %r8815, 23;
	shf.l.wrap.b32 	%r8821, %r8815, %r8814, 23;
	mov.b64 	%rd13492, {%r8821, %r8820};
	xor.b64  	%rd13493, %rd13491, %rd13492;
	xor.b64  	%rd13494, %rd21637, %rd21638;
	and.b64  	%rd13495, %rd13494, %rd21636;
	xor.b64  	%rd13496, %rd13495, %rd21638;
	add.s64 	%rd13497, %rd13496, %rd21639;
	add.s64 	%rd13498, %rd13497, %rd21640;
	ld.const.u64 	%rd13499, [%rd13488];
	add.s64 	%rd13500, %rd13498, %rd13499;
	add.s64 	%rd13501, %rd13500, %rd13493;
	add.s64 	%rd13502, %rd13501, %rd21635;
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8822}, %rd21632;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8823,%dummy}, %rd21632;
	}
	shf.l.wrap.b32 	%r8824, %r8823, %r8822, 30;
	shf.l.wrap.b32 	%r8825, %r8822, %r8823, 30;
	mov.b64 	%rd13503, {%r8825, %r8824};
	shf.r.wrap.b32 	%r8826, %r8822, %r8823, 28;
	shf.r.wrap.b32 	%r8827, %r8823, %r8822, 28;
	mov.b64 	%rd13504, {%r8827, %r8826};
	xor.b64  	%rd13505, %rd13503, %rd13504;
	shf.l.wrap.b32 	%r8828, %r8823, %r8822, 25;
	shf.l.wrap.b32 	%r8829, %r8822, %r8823, 25;
	mov.b64 	%rd13506, {%r8829, %r8828};
	xor.b64  	%rd13507, %rd13505, %rd13506;
	xor.b64  	%rd13508, %rd21632, %rd21633;
	xor.b64  	%rd13509, %rd21632, %rd21634;
	and.b64  	%rd13510, %rd13508, %rd13509;
	xor.b64  	%rd13511, %rd13510, %rd21632;
	add.s64 	%rd13512, %rd13501, %rd13511;
	add.s64 	%rd13513, %rd13512, %rd13507;
	add.s32 	%r8830, %r14444, 1;
	mul.wide.s32 	%rd13514, %r8830, 8;
	add.s64 	%rd13515, %rd13487, %rd13514;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8831,%dummy}, %rd13502;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8832}, %rd13502;
	}
	shf.r.wrap.b32 	%r8833, %r8832, %r8831, 14;
	shf.r.wrap.b32 	%r8834, %r8831, %r8832, 14;
	mov.b64 	%rd13516, {%r8834, %r8833};
	shf.r.wrap.b32 	%r8835, %r8832, %r8831, 18;
	shf.r.wrap.b32 	%r8836, %r8831, %r8832, 18;
	mov.b64 	%rd13517, {%r8836, %r8835};
	xor.b64  	%rd13518, %rd13517, %rd13516;
	shf.l.wrap.b32 	%r8837, %r8831, %r8832, 23;
	shf.l.wrap.b32 	%r8838, %r8832, %r8831, 23;
	mov.b64 	%rd13519, {%r8838, %r8837};
	xor.b64  	%rd13520, %rd13518, %rd13519;
	xor.b64  	%rd13521, %rd21636, %rd21637;
	and.b64  	%rd13522, %rd13502, %rd13521;
	xor.b64  	%rd13523, %rd13522, %rd21637;
	add.s64 	%rd13524, %rd21641, %rd21638;
	ld.const.u64 	%rd13525, [%rd13515];
	add.s64 	%rd13526, %rd13524, %rd13525;
	add.s64 	%rd13527, %rd13526, %rd13523;
	add.s64 	%rd13528, %rd13527, %rd13520;
	add.s64 	%rd13529, %rd13528, %rd21634;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8839,%dummy}, %rd13513;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8840}, %rd13513;
	}
	shf.r.wrap.b32 	%r8841, %r8840, %r8839, 28;
	shf.r.wrap.b32 	%r8842, %r8839, %r8840, 28;
	mov.b64 	%rd13530, {%r8842, %r8841};
	shf.l.wrap.b32 	%r8843, %r8839, %r8840, 30;
	shf.l.wrap.b32 	%r8844, %r8840, %r8839, 30;
	mov.b64 	%rd13531, {%r8844, %r8843};
	xor.b64  	%rd13532, %rd13531, %rd13530;
	shf.l.wrap.b32 	%r8845, %r8839, %r8840, 25;
	shf.l.wrap.b32 	%r8846, %r8840, %r8839, 25;
	mov.b64 	%rd13533, {%r8846, %r8845};
	xor.b64  	%rd13534, %rd13532, %rd13533;
	xor.b64  	%rd13535, %rd13513, %rd21633;
	xor.b64  	%rd13536, %rd13513, %rd21632;
	and.b64  	%rd13537, %rd13536, %rd13535;
	xor.b64  	%rd13538, %rd13537, %rd13513;
	add.s64 	%rd13539, %rd13528, %rd13538;
	add.s64 	%rd13540, %rd13539, %rd13534;
	add.s32 	%r8847, %r14444, 2;
	mul.wide.s32 	%rd13541, %r8847, 8;
	add.s64 	%rd13542, %rd13487, %rd13541;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8848,%dummy}, %rd13529;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8849}, %rd13529;
	}
	shf.r.wrap.b32 	%r8850, %r8849, %r8848, 14;
	shf.r.wrap.b32 	%r8851, %r8848, %r8849, 14;
	mov.b64 	%rd13543, {%r8851, %r8850};
	shf.r.wrap.b32 	%r8852, %r8849, %r8848, 18;
	shf.r.wrap.b32 	%r8853, %r8848, %r8849, 18;
	mov.b64 	%rd13544, {%r8853, %r8852};
	xor.b64  	%rd13545, %rd13544, %rd13543;
	shf.l.wrap.b32 	%r8854, %r8848, %r8849, 23;
	shf.l.wrap.b32 	%r8855, %r8849, %r8848, 23;
	mov.b64 	%rd13546, {%r8855, %r8854};
	xor.b64  	%rd13547, %rd13545, %rd13546;
	xor.b64  	%rd13548, %rd13502, %rd21636;
	and.b64  	%rd13549, %rd13529, %rd13548;
	xor.b64  	%rd13550, %rd13549, %rd21636;
	add.s64 	%rd13551, %rd21642, %rd21637;
	ld.const.u64 	%rd13552, [%rd13542];
	add.s64 	%rd13553, %rd13551, %rd13552;
	add.s64 	%rd13554, %rd13553, %rd13550;
	add.s64 	%rd13555, %rd13554, %rd13547;
	add.s64 	%rd13556, %rd13555, %rd21633;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8856,%dummy}, %rd13540;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8857}, %rd13540;
	}
	shf.r.wrap.b32 	%r8858, %r8857, %r8856, 28;
	shf.r.wrap.b32 	%r8859, %r8856, %r8857, 28;
	mov.b64 	%rd13557, {%r8859, %r8858};
	shf.l.wrap.b32 	%r8860, %r8856, %r8857, 30;
	shf.l.wrap.b32 	%r8861, %r8857, %r8856, 30;
	mov.b64 	%rd13558, {%r8861, %r8860};
	xor.b64  	%rd13559, %rd13558, %rd13557;
	shf.l.wrap.b32 	%r8862, %r8856, %r8857, 25;
	shf.l.wrap.b32 	%r8863, %r8857, %r8856, 25;
	mov.b64 	%rd13560, {%r8863, %r8862};
	xor.b64  	%rd13561, %rd13559, %rd13560;
	xor.b64  	%rd13562, %rd13540, %rd21632;
	xor.b64  	%rd13563, %rd13540, %rd13513;
	and.b64  	%rd13564, %rd13563, %rd13562;
	xor.b64  	%rd13565, %rd13564, %rd13540;
	add.s64 	%rd13566, %rd13555, %rd13565;
	add.s64 	%rd13567, %rd13566, %rd13561;
	add.s32 	%r8864, %r14444, 3;
	mul.wide.s32 	%rd13568, %r8864, 8;
	add.s64 	%rd13569, %rd13487, %rd13568;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8865,%dummy}, %rd13556;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8866}, %rd13556;
	}
	shf.r.wrap.b32 	%r8867, %r8866, %r8865, 14;
	shf.r.wrap.b32 	%r8868, %r8865, %r8866, 14;
	mov.b64 	%rd13570, {%r8868, %r8867};
	shf.r.wrap.b32 	%r8869, %r8866, %r8865, 18;
	shf.r.wrap.b32 	%r8870, %r8865, %r8866, 18;
	mov.b64 	%rd13571, {%r8870, %r8869};
	xor.b64  	%rd13572, %rd13571, %rd13570;
	shf.l.wrap.b32 	%r8871, %r8865, %r8866, 23;
	shf.l.wrap.b32 	%r8872, %r8866, %r8865, 23;
	mov.b64 	%rd13573, {%r8872, %r8871};
	xor.b64  	%rd13574, %rd13572, %rd13573;
	xor.b64  	%rd13575, %rd13529, %rd13502;
	and.b64  	%rd13576, %rd13556, %rd13575;
	xor.b64  	%rd13577, %rd13576, %rd13502;
	add.s64 	%rd13578, %rd21643, %rd21636;
	ld.const.u64 	%rd13579, [%rd13569];
	add.s64 	%rd13580, %rd13578, %rd13579;
	add.s64 	%rd13581, %rd13580, %rd13577;
	add.s64 	%rd13582, %rd13581, %rd13574;
	add.s64 	%rd13583, %rd13582, %rd21632;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8873,%dummy}, %rd13567;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8874}, %rd13567;
	}
	shf.r.wrap.b32 	%r8875, %r8874, %r8873, 28;
	shf.r.wrap.b32 	%r8876, %r8873, %r8874, 28;
	mov.b64 	%rd13584, {%r8876, %r8875};
	shf.l.wrap.b32 	%r8877, %r8873, %r8874, 30;
	shf.l.wrap.b32 	%r8878, %r8874, %r8873, 30;
	mov.b64 	%rd13585, {%r8878, %r8877};
	xor.b64  	%rd13586, %rd13585, %rd13584;
	shf.l.wrap.b32 	%r8879, %r8873, %r8874, 25;
	shf.l.wrap.b32 	%r8880, %r8874, %r8873, 25;
	mov.b64 	%rd13587, {%r8880, %r8879};
	xor.b64  	%rd13588, %rd13586, %rd13587;
	xor.b64  	%rd13589, %rd13567, %rd13513;
	xor.b64  	%rd13590, %rd13567, %rd13540;
	and.b64  	%rd13591, %rd13590, %rd13589;
	xor.b64  	%rd13592, %rd13591, %rd13567;
	add.s64 	%rd13593, %rd13582, %rd13592;
	add.s64 	%rd13594, %rd13593, %rd13588;
	add.s32 	%r8881, %r14444, 4;
	mul.wide.s32 	%rd13595, %r8881, 8;
	add.s64 	%rd13596, %rd13487, %rd13595;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8882,%dummy}, %rd13583;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8883}, %rd13583;
	}
	shf.r.wrap.b32 	%r8884, %r8883, %r8882, 14;
	shf.r.wrap.b32 	%r8885, %r8882, %r8883, 14;
	mov.b64 	%rd13597, {%r8885, %r8884};
	shf.r.wrap.b32 	%r8886, %r8883, %r8882, 18;
	shf.r.wrap.b32 	%r8887, %r8882, %r8883, 18;
	mov.b64 	%rd13598, {%r8887, %r8886};
	xor.b64  	%rd13599, %rd13598, %rd13597;
	shf.l.wrap.b32 	%r8888, %r8882, %r8883, 23;
	shf.l.wrap.b32 	%r8889, %r8883, %r8882, 23;
	mov.b64 	%rd13600, {%r8889, %r8888};
	xor.b64  	%rd13601, %rd13599, %rd13600;
	xor.b64  	%rd13602, %rd13556, %rd13529;
	and.b64  	%rd13603, %rd13583, %rd13602;
	xor.b64  	%rd13604, %rd13603, %rd13529;
	add.s64 	%rd13605, %rd13502, %rd21644;
	ld.const.u64 	%rd13606, [%rd13596];
	add.s64 	%rd13607, %rd13605, %rd13606;
	add.s64 	%rd13608, %rd13607, %rd13604;
	add.s64 	%rd13609, %rd13608, %rd13601;
	add.s64 	%rd13610, %rd13609, %rd13513;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8890,%dummy}, %rd13594;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8891}, %rd13594;
	}
	shf.r.wrap.b32 	%r8892, %r8891, %r8890, 28;
	shf.r.wrap.b32 	%r8893, %r8890, %r8891, 28;
	mov.b64 	%rd13611, {%r8893, %r8892};
	shf.l.wrap.b32 	%r8894, %r8890, %r8891, 30;
	shf.l.wrap.b32 	%r8895, %r8891, %r8890, 30;
	mov.b64 	%rd13612, {%r8895, %r8894};
	xor.b64  	%rd13613, %rd13612, %rd13611;
	shf.l.wrap.b32 	%r8896, %r8890, %r8891, 25;
	shf.l.wrap.b32 	%r8897, %r8891, %r8890, 25;
	mov.b64 	%rd13614, {%r8897, %r8896};
	xor.b64  	%rd13615, %rd13613, %rd13614;
	xor.b64  	%rd13616, %rd13594, %rd13540;
	xor.b64  	%rd13617, %rd13594, %rd13567;
	and.b64  	%rd13618, %rd13617, %rd13616;
	xor.b64  	%rd13619, %rd13618, %rd13594;
	add.s64 	%rd13620, %rd13609, %rd13619;
	add.s64 	%rd13621, %rd13620, %rd13615;
	add.s32 	%r8898, %r14444, 5;
	mul.wide.s32 	%rd13622, %r8898, 8;
	add.s64 	%rd13623, %rd13487, %rd13622;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8899,%dummy}, %rd13610;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8900}, %rd13610;
	}
	shf.r.wrap.b32 	%r8901, %r8900, %r8899, 14;
	shf.r.wrap.b32 	%r8902, %r8899, %r8900, 14;
	mov.b64 	%rd13624, {%r8902, %r8901};
	shf.r.wrap.b32 	%r8903, %r8900, %r8899, 18;
	shf.r.wrap.b32 	%r8904, %r8899, %r8900, 18;
	mov.b64 	%rd13625, {%r8904, %r8903};
	xor.b64  	%rd13626, %rd13625, %rd13624;
	shf.l.wrap.b32 	%r8905, %r8899, %r8900, 23;
	shf.l.wrap.b32 	%r8906, %r8900, %r8899, 23;
	mov.b64 	%rd13627, {%r8906, %r8905};
	xor.b64  	%rd13628, %rd13626, %rd13627;
	xor.b64  	%rd13629, %rd13583, %rd13556;
	and.b64  	%rd13630, %rd13610, %rd13629;
	xor.b64  	%rd13631, %rd13630, %rd13556;
	add.s64 	%rd13632, %rd13529, %rd21645;
	ld.const.u64 	%rd13633, [%rd13623];
	add.s64 	%rd13634, %rd13632, %rd13633;
	add.s64 	%rd13635, %rd13634, %rd13631;
	add.s64 	%rd13636, %rd13635, %rd13628;
	add.s64 	%rd13637, %rd13636, %rd13540;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8907,%dummy}, %rd13621;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8908}, %rd13621;
	}
	shf.r.wrap.b32 	%r8909, %r8908, %r8907, 28;
	shf.r.wrap.b32 	%r8910, %r8907, %r8908, 28;
	mov.b64 	%rd13638, {%r8910, %r8909};
	shf.l.wrap.b32 	%r8911, %r8907, %r8908, 30;
	shf.l.wrap.b32 	%r8912, %r8908, %r8907, 30;
	mov.b64 	%rd13639, {%r8912, %r8911};
	xor.b64  	%rd13640, %rd13639, %rd13638;
	shf.l.wrap.b32 	%r8913, %r8907, %r8908, 25;
	shf.l.wrap.b32 	%r8914, %r8908, %r8907, 25;
	mov.b64 	%rd13641, {%r8914, %r8913};
	xor.b64  	%rd13642, %rd13640, %rd13641;
	xor.b64  	%rd13643, %rd13621, %rd13567;
	xor.b64  	%rd13644, %rd13621, %rd13594;
	and.b64  	%rd13645, %rd13644, %rd13643;
	xor.b64  	%rd13646, %rd13645, %rd13621;
	add.s64 	%rd13647, %rd13636, %rd13646;
	add.s64 	%rd13648, %rd13647, %rd13642;
	add.s32 	%r8915, %r14444, 6;
	mul.wide.s32 	%rd13649, %r8915, 8;
	add.s64 	%rd13650, %rd13487, %rd13649;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8916,%dummy}, %rd13637;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8917}, %rd13637;
	}
	shf.r.wrap.b32 	%r8918, %r8917, %r8916, 14;
	shf.r.wrap.b32 	%r8919, %r8916, %r8917, 14;
	mov.b64 	%rd13651, {%r8919, %r8918};
	shf.r.wrap.b32 	%r8920, %r8917, %r8916, 18;
	shf.r.wrap.b32 	%r8921, %r8916, %r8917, 18;
	mov.b64 	%rd13652, {%r8921, %r8920};
	xor.b64  	%rd13653, %rd13652, %rd13651;
	shf.l.wrap.b32 	%r8922, %r8916, %r8917, 23;
	shf.l.wrap.b32 	%r8923, %r8917, %r8916, 23;
	mov.b64 	%rd13654, {%r8923, %r8922};
	xor.b64  	%rd13655, %rd13653, %rd13654;
	xor.b64  	%rd13656, %rd13610, %rd13583;
	and.b64  	%rd13657, %rd13637, %rd13656;
	xor.b64  	%rd13658, %rd13657, %rd13583;
	add.s64 	%rd13659, %rd13556, %rd21646;
	ld.const.u64 	%rd13660, [%rd13650];
	add.s64 	%rd13661, %rd13659, %rd13660;
	add.s64 	%rd13662, %rd13661, %rd13658;
	add.s64 	%rd13663, %rd13662, %rd13655;
	add.s64 	%rd13664, %rd13663, %rd13567;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8924,%dummy}, %rd13648;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8925}, %rd13648;
	}
	shf.r.wrap.b32 	%r8926, %r8925, %r8924, 28;
	shf.r.wrap.b32 	%r8927, %r8924, %r8925, 28;
	mov.b64 	%rd13665, {%r8927, %r8926};
	shf.l.wrap.b32 	%r8928, %r8924, %r8925, 30;
	shf.l.wrap.b32 	%r8929, %r8925, %r8924, 30;
	mov.b64 	%rd13666, {%r8929, %r8928};
	xor.b64  	%rd13667, %rd13666, %rd13665;
	shf.l.wrap.b32 	%r8930, %r8924, %r8925, 25;
	shf.l.wrap.b32 	%r8931, %r8925, %r8924, 25;
	mov.b64 	%rd13668, {%r8931, %r8930};
	xor.b64  	%rd13669, %rd13667, %rd13668;
	xor.b64  	%rd13670, %rd13648, %rd13594;
	xor.b64  	%rd13671, %rd13648, %rd13621;
	and.b64  	%rd13672, %rd13671, %rd13670;
	xor.b64  	%rd13673, %rd13672, %rd13648;
	add.s64 	%rd13674, %rd13663, %rd13673;
	add.s64 	%rd13675, %rd13674, %rd13669;
	add.s32 	%r8932, %r14444, 7;
	mul.wide.s32 	%rd13676, %r8932, 8;
	add.s64 	%rd13677, %rd13487, %rd13676;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8933,%dummy}, %rd13664;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8934}, %rd13664;
	}
	shf.r.wrap.b32 	%r8935, %r8934, %r8933, 14;
	shf.r.wrap.b32 	%r8936, %r8933, %r8934, 14;
	mov.b64 	%rd13678, {%r8936, %r8935};
	shf.r.wrap.b32 	%r8937, %r8934, %r8933, 18;
	shf.r.wrap.b32 	%r8938, %r8933, %r8934, 18;
	mov.b64 	%rd13679, {%r8938, %r8937};
	xor.b64  	%rd13680, %rd13679, %rd13678;
	shf.l.wrap.b32 	%r8939, %r8933, %r8934, 23;
	shf.l.wrap.b32 	%r8940, %r8934, %r8933, 23;
	mov.b64 	%rd13681, {%r8940, %r8939};
	xor.b64  	%rd13682, %rd13680, %rd13681;
	xor.b64  	%rd13683, %rd13637, %rd13610;
	and.b64  	%rd13684, %rd13664, %rd13683;
	xor.b64  	%rd13685, %rd13684, %rd13610;
	add.s64 	%rd13686, %rd13583, %rd21647;
	ld.const.u64 	%rd13687, [%rd13677];
	add.s64 	%rd13688, %rd13686, %rd13687;
	add.s64 	%rd13689, %rd13688, %rd13685;
	add.s64 	%rd13690, %rd13689, %rd13682;
	add.s64 	%rd13691, %rd13690, %rd13594;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8941,%dummy}, %rd13675;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8942}, %rd13675;
	}
	shf.r.wrap.b32 	%r8943, %r8942, %r8941, 28;
	shf.r.wrap.b32 	%r8944, %r8941, %r8942, 28;
	mov.b64 	%rd13692, {%r8944, %r8943};
	shf.l.wrap.b32 	%r8945, %r8941, %r8942, 30;
	shf.l.wrap.b32 	%r8946, %r8942, %r8941, 30;
	mov.b64 	%rd13693, {%r8946, %r8945};
	xor.b64  	%rd13694, %rd13693, %rd13692;
	shf.l.wrap.b32 	%r8947, %r8941, %r8942, 25;
	shf.l.wrap.b32 	%r8948, %r8942, %r8941, 25;
	mov.b64 	%rd13695, {%r8948, %r8947};
	xor.b64  	%rd13696, %rd13694, %rd13695;
	xor.b64  	%rd13697, %rd13675, %rd13621;
	xor.b64  	%rd13698, %rd13675, %rd13648;
	and.b64  	%rd13699, %rd13698, %rd13697;
	xor.b64  	%rd13700, %rd13699, %rd13675;
	add.s64 	%rd13701, %rd13690, %rd13700;
	add.s64 	%rd13702, %rd13701, %rd13696;
	add.s32 	%r8949, %r14444, 8;
	mul.wide.s32 	%rd13703, %r8949, 8;
	add.s64 	%rd13704, %rd13487, %rd13703;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8950,%dummy}, %rd13691;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8951}, %rd13691;
	}
	shf.r.wrap.b32 	%r8952, %r8951, %r8950, 14;
	shf.r.wrap.b32 	%r8953, %r8950, %r8951, 14;
	mov.b64 	%rd13705, {%r8953, %r8952};
	shf.r.wrap.b32 	%r8954, %r8951, %r8950, 18;
	shf.r.wrap.b32 	%r8955, %r8950, %r8951, 18;
	mov.b64 	%rd13706, {%r8955, %r8954};
	xor.b64  	%rd13707, %rd13706, %rd13705;
	shf.l.wrap.b32 	%r8956, %r8950, %r8951, 23;
	shf.l.wrap.b32 	%r8957, %r8951, %r8950, 23;
	mov.b64 	%rd13708, {%r8957, %r8956};
	xor.b64  	%rd13709, %rd13707, %rd13708;
	xor.b64  	%rd13710, %rd13664, %rd13637;
	and.b64  	%rd13711, %rd13691, %rd13710;
	xor.b64  	%rd13712, %rd13711, %rd13637;
	add.s64 	%rd13713, %rd13610, %rd21631;
	ld.const.u64 	%rd13714, [%rd13704];
	add.s64 	%rd13715, %rd13713, %rd13714;
	add.s64 	%rd13716, %rd13715, %rd13712;
	add.s64 	%rd13717, %rd13716, %rd13709;
	add.s64 	%rd13718, %rd13717, %rd13621;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8958,%dummy}, %rd13702;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8959}, %rd13702;
	}
	shf.r.wrap.b32 	%r8960, %r8959, %r8958, 28;
	shf.r.wrap.b32 	%r8961, %r8958, %r8959, 28;
	mov.b64 	%rd13719, {%r8961, %r8960};
	shf.l.wrap.b32 	%r8962, %r8958, %r8959, 30;
	shf.l.wrap.b32 	%r8963, %r8959, %r8958, 30;
	mov.b64 	%rd13720, {%r8963, %r8962};
	xor.b64  	%rd13721, %rd13720, %rd13719;
	shf.l.wrap.b32 	%r8964, %r8958, %r8959, 25;
	shf.l.wrap.b32 	%r8965, %r8959, %r8958, 25;
	mov.b64 	%rd13722, {%r8965, %r8964};
	xor.b64  	%rd13723, %rd13721, %rd13722;
	xor.b64  	%rd13724, %rd13702, %rd13648;
	xor.b64  	%rd13725, %rd13702, %rd13675;
	and.b64  	%rd13726, %rd13725, %rd13724;
	xor.b64  	%rd13727, %rd13726, %rd13702;
	add.s64 	%rd13728, %rd13717, %rd13727;
	add.s64 	%rd13729, %rd13728, %rd13723;
	add.s32 	%r8966, %r14444, 9;
	mul.wide.s32 	%rd13730, %r8966, 8;
	add.s64 	%rd13731, %rd13487, %rd13730;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8967,%dummy}, %rd13718;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8968}, %rd13718;
	}
	shf.r.wrap.b32 	%r8969, %r8968, %r8967, 14;
	shf.r.wrap.b32 	%r8970, %r8967, %r8968, 14;
	mov.b64 	%rd13732, {%r8970, %r8969};
	shf.r.wrap.b32 	%r8971, %r8968, %r8967, 18;
	shf.r.wrap.b32 	%r8972, %r8967, %r8968, 18;
	mov.b64 	%rd13733, {%r8972, %r8971};
	xor.b64  	%rd13734, %rd13733, %rd13732;
	shf.l.wrap.b32 	%r8973, %r8967, %r8968, 23;
	shf.l.wrap.b32 	%r8974, %r8968, %r8967, 23;
	mov.b64 	%rd13735, {%r8974, %r8973};
	xor.b64  	%rd13736, %rd13734, %rd13735;
	xor.b64  	%rd13737, %rd13691, %rd13664;
	and.b64  	%rd13738, %rd13718, %rd13737;
	xor.b64  	%rd13739, %rd13738, %rd13664;
	add.s64 	%rd13740, %rd13637, %rd21630;
	ld.const.u64 	%rd13741, [%rd13731];
	add.s64 	%rd13742, %rd13740, %rd13741;
	add.s64 	%rd13743, %rd13742, %rd13739;
	add.s64 	%rd13744, %rd13743, %rd13736;
	add.s64 	%rd13745, %rd13744, %rd13648;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8975,%dummy}, %rd13729;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8976}, %rd13729;
	}
	shf.r.wrap.b32 	%r8977, %r8976, %r8975, 28;
	shf.r.wrap.b32 	%r8978, %r8975, %r8976, 28;
	mov.b64 	%rd13746, {%r8978, %r8977};
	shf.l.wrap.b32 	%r8979, %r8975, %r8976, 30;
	shf.l.wrap.b32 	%r8980, %r8976, %r8975, 30;
	mov.b64 	%rd13747, {%r8980, %r8979};
	xor.b64  	%rd13748, %rd13747, %rd13746;
	shf.l.wrap.b32 	%r8981, %r8975, %r8976, 25;
	shf.l.wrap.b32 	%r8982, %r8976, %r8975, 25;
	mov.b64 	%rd13749, {%r8982, %r8981};
	xor.b64  	%rd13750, %rd13748, %rd13749;
	xor.b64  	%rd13751, %rd13729, %rd13675;
	xor.b64  	%rd13752, %rd13729, %rd13702;
	and.b64  	%rd13753, %rd13752, %rd13751;
	xor.b64  	%rd13754, %rd13753, %rd13729;
	add.s64 	%rd13755, %rd13744, %rd13754;
	add.s64 	%rd13756, %rd13755, %rd13750;
	add.s32 	%r8983, %r14444, 10;
	mul.wide.s32 	%rd13757, %r8983, 8;
	add.s64 	%rd13758, %rd13487, %rd13757;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8984,%dummy}, %rd13745;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8985}, %rd13745;
	}
	shf.r.wrap.b32 	%r8986, %r8985, %r8984, 14;
	shf.r.wrap.b32 	%r8987, %r8984, %r8985, 14;
	mov.b64 	%rd13759, {%r8987, %r8986};
	shf.r.wrap.b32 	%r8988, %r8985, %r8984, 18;
	shf.r.wrap.b32 	%r8989, %r8984, %r8985, 18;
	mov.b64 	%rd13760, {%r8989, %r8988};
	xor.b64  	%rd13761, %rd13760, %rd13759;
	shf.l.wrap.b32 	%r8990, %r8984, %r8985, 23;
	shf.l.wrap.b32 	%r8991, %r8985, %r8984, 23;
	mov.b64 	%rd13762, {%r8991, %r8990};
	xor.b64  	%rd13763, %rd13761, %rd13762;
	xor.b64  	%rd13764, %rd13718, %rd13691;
	and.b64  	%rd13765, %rd13745, %rd13764;
	xor.b64  	%rd13766, %rd13765, %rd13691;
	add.s64 	%rd13767, %rd13664, %rd21629;
	ld.const.u64 	%rd13768, [%rd13758];
	add.s64 	%rd13769, %rd13767, %rd13768;
	add.s64 	%rd13770, %rd13769, %rd13766;
	add.s64 	%rd13771, %rd13770, %rd13763;
	add.s64 	%rd13772, %rd13771, %rd13675;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r8992,%dummy}, %rd13756;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r8993}, %rd13756;
	}
	shf.r.wrap.b32 	%r8994, %r8993, %r8992, 28;
	shf.r.wrap.b32 	%r8995, %r8992, %r8993, 28;
	mov.b64 	%rd13773, {%r8995, %r8994};
	shf.l.wrap.b32 	%r8996, %r8992, %r8993, 30;
	shf.l.wrap.b32 	%r8997, %r8993, %r8992, 30;
	mov.b64 	%rd13774, {%r8997, %r8996};
	xor.b64  	%rd13775, %rd13774, %rd13773;
	shf.l.wrap.b32 	%r8998, %r8992, %r8993, 25;
	shf.l.wrap.b32 	%r8999, %r8993, %r8992, 25;
	mov.b64 	%rd13776, {%r8999, %r8998};
	xor.b64  	%rd13777, %rd13775, %rd13776;
	xor.b64  	%rd13778, %rd13756, %rd13702;
	xor.b64  	%rd13779, %rd13756, %rd13729;
	and.b64  	%rd13780, %rd13779, %rd13778;
	xor.b64  	%rd13781, %rd13780, %rd13756;
	add.s64 	%rd13782, %rd13771, %rd13781;
	add.s64 	%rd13783, %rd13782, %rd13777;
	add.s32 	%r9000, %r14444, 11;
	mul.wide.s32 	%rd13784, %r9000, 8;
	add.s64 	%rd13785, %rd13487, %rd13784;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9001,%dummy}, %rd13772;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9002}, %rd13772;
	}
	shf.r.wrap.b32 	%r9003, %r9002, %r9001, 14;
	shf.r.wrap.b32 	%r9004, %r9001, %r9002, 14;
	mov.b64 	%rd13786, {%r9004, %r9003};
	shf.r.wrap.b32 	%r9005, %r9002, %r9001, 18;
	shf.r.wrap.b32 	%r9006, %r9001, %r9002, 18;
	mov.b64 	%rd13787, {%r9006, %r9005};
	xor.b64  	%rd13788, %rd13787, %rd13786;
	shf.l.wrap.b32 	%r9007, %r9001, %r9002, 23;
	shf.l.wrap.b32 	%r9008, %r9002, %r9001, 23;
	mov.b64 	%rd13789, {%r9008, %r9007};
	xor.b64  	%rd13790, %rd13788, %rd13789;
	xor.b64  	%rd13791, %rd13745, %rd13718;
	and.b64  	%rd13792, %rd13772, %rd13791;
	xor.b64  	%rd13793, %rd13792, %rd13718;
	add.s64 	%rd13794, %rd13691, %rd21628;
	ld.const.u64 	%rd13795, [%rd13785];
	add.s64 	%rd13796, %rd13794, %rd13795;
	add.s64 	%rd13797, %rd13796, %rd13793;
	add.s64 	%rd13798, %rd13797, %rd13790;
	add.s64 	%rd13799, %rd13798, %rd13702;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9009,%dummy}, %rd13783;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9010}, %rd13783;
	}
	shf.r.wrap.b32 	%r9011, %r9010, %r9009, 28;
	shf.r.wrap.b32 	%r9012, %r9009, %r9010, 28;
	mov.b64 	%rd13800, {%r9012, %r9011};
	shf.l.wrap.b32 	%r9013, %r9009, %r9010, 30;
	shf.l.wrap.b32 	%r9014, %r9010, %r9009, 30;
	mov.b64 	%rd13801, {%r9014, %r9013};
	xor.b64  	%rd13802, %rd13801, %rd13800;
	shf.l.wrap.b32 	%r9015, %r9009, %r9010, 25;
	shf.l.wrap.b32 	%r9016, %r9010, %r9009, 25;
	mov.b64 	%rd13803, {%r9016, %r9015};
	xor.b64  	%rd13804, %rd13802, %rd13803;
	xor.b64  	%rd13805, %rd13783, %rd13729;
	xor.b64  	%rd13806, %rd13783, %rd13756;
	and.b64  	%rd13807, %rd13806, %rd13805;
	xor.b64  	%rd13808, %rd13807, %rd13783;
	add.s64 	%rd13809, %rd13798, %rd13808;
	add.s64 	%rd13810, %rd13809, %rd13804;
	add.s32 	%r9017, %r14444, 12;
	mul.wide.s32 	%rd13811, %r9017, 8;
	add.s64 	%rd13812, %rd13487, %rd13811;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9018,%dummy}, %rd13799;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9019}, %rd13799;
	}
	shf.r.wrap.b32 	%r9020, %r9019, %r9018, 14;
	shf.r.wrap.b32 	%r9021, %r9018, %r9019, 14;
	mov.b64 	%rd13813, {%r9021, %r9020};
	shf.r.wrap.b32 	%r9022, %r9019, %r9018, 18;
	shf.r.wrap.b32 	%r9023, %r9018, %r9019, 18;
	mov.b64 	%rd13814, {%r9023, %r9022};
	xor.b64  	%rd13815, %rd13814, %rd13813;
	shf.l.wrap.b32 	%r9024, %r9018, %r9019, 23;
	shf.l.wrap.b32 	%r9025, %r9019, %r9018, 23;
	mov.b64 	%rd13816, {%r9025, %r9024};
	xor.b64  	%rd13817, %rd13815, %rd13816;
	xor.b64  	%rd13818, %rd13772, %rd13745;
	and.b64  	%rd13819, %rd13799, %rd13818;
	xor.b64  	%rd13820, %rd13819, %rd13745;
	add.s64 	%rd13821, %rd13718, %rd21627;
	ld.const.u64 	%rd13822, [%rd13812];
	add.s64 	%rd13823, %rd13821, %rd13822;
	add.s64 	%rd13824, %rd13823, %rd13820;
	add.s64 	%rd13825, %rd13824, %rd13817;
	add.s64 	%rd21639, %rd13825, %rd13729;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9026,%dummy}, %rd13810;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9027}, %rd13810;
	}
	shf.r.wrap.b32 	%r9028, %r9027, %r9026, 28;
	shf.r.wrap.b32 	%r9029, %r9026, %r9027, 28;
	mov.b64 	%rd13826, {%r9029, %r9028};
	shf.l.wrap.b32 	%r9030, %r9026, %r9027, 30;
	shf.l.wrap.b32 	%r9031, %r9027, %r9026, 30;
	mov.b64 	%rd13827, {%r9031, %r9030};
	xor.b64  	%rd13828, %rd13827, %rd13826;
	shf.l.wrap.b32 	%r9032, %r9026, %r9027, 25;
	shf.l.wrap.b32 	%r9033, %r9027, %r9026, 25;
	mov.b64 	%rd13829, {%r9033, %r9032};
	xor.b64  	%rd13830, %rd13828, %rd13829;
	xor.b64  	%rd13831, %rd13810, %rd13756;
	xor.b64  	%rd13832, %rd13810, %rd13783;
	and.b64  	%rd13833, %rd13832, %rd13831;
	xor.b64  	%rd13834, %rd13833, %rd13810;
	add.s64 	%rd13835, %rd13825, %rd13834;
	add.s64 	%rd21635, %rd13835, %rd13830;
	add.s32 	%r9034, %r14444, 13;
	mul.wide.s32 	%rd13836, %r9034, 8;
	add.s64 	%rd13837, %rd13487, %rd13836;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9035,%dummy}, %rd21639;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9036}, %rd21639;
	}
	shf.r.wrap.b32 	%r9037, %r9036, %r9035, 14;
	shf.r.wrap.b32 	%r9038, %r9035, %r9036, 14;
	mov.b64 	%rd13838, {%r9038, %r9037};
	shf.r.wrap.b32 	%r9039, %r9036, %r9035, 18;
	shf.r.wrap.b32 	%r9040, %r9035, %r9036, 18;
	mov.b64 	%rd13839, {%r9040, %r9039};
	xor.b64  	%rd13840, %rd13839, %rd13838;
	shf.l.wrap.b32 	%r9041, %r9035, %r9036, 23;
	shf.l.wrap.b32 	%r9042, %r9036, %r9035, 23;
	mov.b64 	%rd13841, {%r9042, %r9041};
	xor.b64  	%rd13842, %rd13840, %rd13841;
	xor.b64  	%rd13843, %rd13799, %rd13772;
	and.b64  	%rd13844, %rd21639, %rd13843;
	xor.b64  	%rd13845, %rd13844, %rd13772;
	add.s64 	%rd13846, %rd13745, %rd21626;
	ld.const.u64 	%rd13847, [%rd13837];
	add.s64 	%rd13848, %rd13846, %rd13847;
	add.s64 	%rd13849, %rd13848, %rd13845;
	add.s64 	%rd13850, %rd13849, %rd13842;
	add.s64 	%rd21638, %rd13850, %rd13756;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9043,%dummy}, %rd21635;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9044}, %rd21635;
	}
	shf.r.wrap.b32 	%r9045, %r9044, %r9043, 28;
	shf.r.wrap.b32 	%r9046, %r9043, %r9044, 28;
	mov.b64 	%rd13851, {%r9046, %r9045};
	shf.l.wrap.b32 	%r9047, %r9043, %r9044, 30;
	shf.l.wrap.b32 	%r9048, %r9044, %r9043, 30;
	mov.b64 	%rd13852, {%r9048, %r9047};
	xor.b64  	%rd13853, %rd13852, %rd13851;
	shf.l.wrap.b32 	%r9049, %r9043, %r9044, 25;
	shf.l.wrap.b32 	%r9050, %r9044, %r9043, 25;
	mov.b64 	%rd13854, {%r9050, %r9049};
	xor.b64  	%rd13855, %rd13853, %rd13854;
	xor.b64  	%rd13856, %rd21635, %rd13783;
	xor.b64  	%rd13857, %rd21635, %rd13810;
	and.b64  	%rd13858, %rd13857, %rd13856;
	xor.b64  	%rd13859, %rd13858, %rd21635;
	add.s64 	%rd13860, %rd13850, %rd13859;
	add.s64 	%rd21634, %rd13860, %rd13855;
	add.s32 	%r9051, %r14444, 14;
	mul.wide.s32 	%rd13861, %r9051, 8;
	add.s64 	%rd13862, %rd13487, %rd13861;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9052,%dummy}, %rd21638;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9053}, %rd21638;
	}
	shf.r.wrap.b32 	%r9054, %r9053, %r9052, 14;
	shf.r.wrap.b32 	%r9055, %r9052, %r9053, 14;
	mov.b64 	%rd13863, {%r9055, %r9054};
	shf.r.wrap.b32 	%r9056, %r9053, %r9052, 18;
	shf.r.wrap.b32 	%r9057, %r9052, %r9053, 18;
	mov.b64 	%rd13864, {%r9057, %r9056};
	xor.b64  	%rd13865, %rd13864, %rd13863;
	shf.l.wrap.b32 	%r9058, %r9052, %r9053, 23;
	shf.l.wrap.b32 	%r9059, %r9053, %r9052, 23;
	mov.b64 	%rd13866, {%r9059, %r9058};
	xor.b64  	%rd13867, %rd13865, %rd13866;
	xor.b64  	%rd13868, %rd21639, %rd13799;
	and.b64  	%rd13869, %rd21638, %rd13868;
	xor.b64  	%rd13870, %rd13869, %rd13799;
	add.s64 	%rd13871, %rd13772, %rd21625;
	ld.const.u64 	%rd13872, [%rd13862];
	add.s64 	%rd13873, %rd13871, %rd13872;
	add.s64 	%rd13874, %rd13873, %rd13870;
	add.s64 	%rd13875, %rd13874, %rd13867;
	add.s64 	%rd21637, %rd13875, %rd13783;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9060,%dummy}, %rd21634;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9061}, %rd21634;
	}
	shf.r.wrap.b32 	%r9062, %r9061, %r9060, 28;
	shf.r.wrap.b32 	%r9063, %r9060, %r9061, 28;
	mov.b64 	%rd13876, {%r9063, %r9062};
	shf.l.wrap.b32 	%r9064, %r9060, %r9061, 30;
	shf.l.wrap.b32 	%r9065, %r9061, %r9060, 30;
	mov.b64 	%rd13877, {%r9065, %r9064};
	xor.b64  	%rd13878, %rd13877, %rd13876;
	shf.l.wrap.b32 	%r9066, %r9060, %r9061, 25;
	shf.l.wrap.b32 	%r9067, %r9061, %r9060, 25;
	mov.b64 	%rd13879, {%r9067, %r9066};
	xor.b64  	%rd13880, %rd13878, %rd13879;
	xor.b64  	%rd13881, %rd21634, %rd13810;
	xor.b64  	%rd13882, %rd21634, %rd21635;
	and.b64  	%rd13883, %rd13882, %rd13881;
	xor.b64  	%rd13884, %rd13883, %rd21634;
	add.s64 	%rd13885, %rd13875, %rd13884;
	add.s64 	%rd21633, %rd13885, %rd13880;
	add.s32 	%r9068, %r14444, 15;
	mul.wide.s32 	%rd13886, %r9068, 8;
	add.s64 	%rd13887, %rd13487, %rd13886;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9069,%dummy}, %rd21637;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9070}, %rd21637;
	}
	shf.r.wrap.b32 	%r9071, %r9070, %r9069, 14;
	shf.r.wrap.b32 	%r9072, %r9069, %r9070, 14;
	mov.b64 	%rd13888, {%r9072, %r9071};
	shf.r.wrap.b32 	%r9073, %r9070, %r9069, 18;
	shf.r.wrap.b32 	%r9074, %r9069, %r9070, 18;
	mov.b64 	%rd13889, {%r9074, %r9073};
	xor.b64  	%rd13890, %rd13889, %rd13888;
	shf.l.wrap.b32 	%r9075, %r9069, %r9070, 23;
	shf.l.wrap.b32 	%r9076, %r9070, %r9069, 23;
	mov.b64 	%rd13891, {%r9076, %r9075};
	xor.b64  	%rd13892, %rd13890, %rd13891;
	xor.b64  	%rd13893, %rd21638, %rd21639;
	and.b64  	%rd13894, %rd21637, %rd13893;
	xor.b64  	%rd13895, %rd13894, %rd21639;
	add.s64 	%rd13896, %rd13799, %rd21624;
	ld.const.u64 	%rd13897, [%rd13887];
	add.s64 	%rd13898, %rd13896, %rd13897;
	add.s64 	%rd13899, %rd13898, %rd13895;
	add.s64 	%rd13900, %rd13899, %rd13892;
	add.s64 	%rd21636, %rd13900, %rd13810;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9077,%dummy}, %rd21633;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9078}, %rd21633;
	}
	shf.r.wrap.b32 	%r9079, %r9078, %r9077, 28;
	shf.r.wrap.b32 	%r9080, %r9077, %r9078, 28;
	mov.b64 	%rd13901, {%r9080, %r9079};
	shf.l.wrap.b32 	%r9081, %r9077, %r9078, 30;
	shf.l.wrap.b32 	%r9082, %r9078, %r9077, 30;
	mov.b64 	%rd13902, {%r9082, %r9081};
	xor.b64  	%rd13903, %rd13902, %rd13901;
	shf.l.wrap.b32 	%r9083, %r9077, %r9078, 25;
	shf.l.wrap.b32 	%r9084, %r9078, %r9077, 25;
	mov.b64 	%rd13904, {%r9084, %r9083};
	xor.b64  	%rd13905, %rd13903, %rd13904;
	xor.b64  	%rd13906, %rd21633, %rd21635;
	xor.b64  	%rd13907, %rd21633, %rd21634;
	and.b64  	%rd13908, %rd13907, %rd13906;
	xor.b64  	%rd13909, %rd13908, %rd21633;
	add.s64 	%rd13910, %rd13900, %rd13909;
	add.s64 	%rd21632, %rd13910, %rd13905;
	add.s32 	%r14444, %r14444, 16;
	setp.lt.s32	%p157, %r14444, 80;
	@%p157 bra 	BB3_246;

	add.s64 	%rd21655, %rd1041, %rd21632;
	st.local.u64 	[%rd1], %rd21655;
	add.s64 	%rd21654, %rd1043, %rd21633;
	st.local.u64 	[%rd1+8], %rd21654;
	add.s64 	%rd21653, %rd1042, %rd21634;
	st.local.u64 	[%rd1+16], %rd21653;
	add.s64 	%rd21652, %rd1040, %rd21635;
	st.local.u64 	[%rd1+24], %rd21652;
	add.s64 	%rd21651, %rd1036, %rd21636;
	st.local.u64 	[%rd1+32], %rd21651;
	add.s64 	%rd21650, %rd1038, %rd21637;
	st.local.u64 	[%rd1+40], %rd21650;
	add.s64 	%rd21649, %rd1037, %rd21638;
	st.local.u64 	[%rd1+48], %rd21649;
	add.s64 	%rd21648, %rd1039, %rd21639;
	st.local.u64 	[%rd1+56], %rd21648;
	mov.u64 	%rd21656, 0;
	st.local.u64 	[%rd1+64], %rd21656;
	st.local.u64 	[%rd1+72], %rd21656;
	st.local.u64 	[%rd1+80], %rd21656;
	st.local.u64 	[%rd1+88], %rd21656;
	st.local.u64 	[%rd1+96], %rd21656;
	st.local.u64 	[%rd1+104], %rd21656;
	st.local.u64 	[%rd1+112], %rd21656;
	st.local.u64 	[%rd1+120], %rd21656;
	st.local.u64 	[%rd1+128], %rd21656;
	st.local.u64 	[%rd1+136], %rd21656;
	st.local.u64 	[%rd1+144], %rd21656;
	st.local.u64 	[%rd1+152], %rd21656;
	st.local.u64 	[%rd1+160], %rd21656;
	st.local.u64 	[%rd1+168], %rd21656;
	st.local.u64 	[%rd1+176], %rd21656;
	st.local.u64 	[%rd1+184], %rd21656;
	mov.u64 	%rd21657, %rd21656;
	mov.u64 	%rd21658, %rd21656;
	mov.u64 	%rd21659, %rd21656;
	mov.u64 	%rd21660, %rd21656;
	mov.u64 	%rd21661, %rd21656;
	mov.u64 	%rd21662, %rd21656;
	mov.u64 	%rd21663, %rd21656;
	mov.u64 	%rd21664, %rd21656;
	mov.u64 	%rd21665, %rd21656;
	mov.u64 	%rd21666, %rd21656;
	mov.u64 	%rd21667, %rd21656;
	mov.u64 	%rd21668, %rd21656;
	mov.u64 	%rd21669, %rd21656;
	mov.u64 	%rd21670, %rd21656;
	bra.uni 	BB3_248;

BB3_244:
	ld.local.u64 	%rd21669, [%rd1+72];
	ld.local.u64 	%rd21668, [%rd1+80];
	ld.local.u64 	%rd21667, [%rd1+88];
	ld.local.u64 	%rd21666, [%rd1+96];
	ld.local.u64 	%rd21665, [%rd1+104];
	ld.local.u64 	%rd21664, [%rd1+112];
	ld.local.u64 	%rd21663, [%rd1+120];
	ld.local.u64 	%rd21662, [%rd1+128];
	ld.local.u64 	%rd21661, [%rd1+136];
	ld.local.u64 	%rd21660, [%rd1+144];
	ld.local.u64 	%rd21659, [%rd1+152];
	ld.local.u64 	%rd21658, [%rd1+160];
	ld.local.u64 	%rd21657, [%rd1+168];
	ld.local.u64 	%rd21656, [%rd1+176];
	ld.local.u64 	%rd21655, [%rd1];
	ld.local.u64 	%rd21654, [%rd1+8];
	ld.local.u64 	%rd21653, [%rd1+16];
	ld.local.u64 	%rd21652, [%rd1+24];
	ld.local.u64 	%rd21651, [%rd1+32];
	ld.local.u64 	%rd21650, [%rd1+40];
	ld.local.u64 	%rd21649, [%rd1+48];
	ld.local.u64 	%rd21648, [%rd1+56];

BB3_248:
	ld.local.u32 	%r9086, [%rd1+192];
	shl.b32 	%r9087, %r9086, 3;
	cvt.s64.s32	%rd13926, %r9087;
	st.local.u64 	[%rd1+184], %rd13926;
	shr.u64 	%rd13927, %rd21670, 32;
	shr.u64 	%rd13928, %rd21669, 32;
	shr.u64 	%rd13929, %rd21668, 32;
	shr.u64 	%rd13930, %rd21667, 32;
	shr.u64 	%rd13931, %rd21666, 32;
	shr.u64 	%rd13932, %rd21665, 32;
	shr.u64 	%rd13933, %rd21664, 32;
	shr.u64 	%rd13934, %rd21663, 32;
	shr.u64 	%rd13935, %rd21662, 32;
	shr.u64 	%rd13936, %rd21661, 32;
	shr.u64 	%rd13937, %rd21660, 32;
	shr.u64 	%rd13938, %rd21659, 32;
	shr.u64 	%rd13939, %rd21658, 32;
	shr.u64 	%rd13940, %rd21657, 32;
	shr.u64 	%rd13941, %rd21656, 32;
	shr.u64 	%rd13942, %rd13926, 32;
	bfi.b64 	%rd21687, %rd13927, %rd21670, 32, 32;
	bfi.b64 	%rd21688, %rd13928, %rd21669, 32, 32;
	bfi.b64 	%rd21689, %rd13929, %rd21668, 32, 32;
	bfi.b64 	%rd21690, %rd13930, %rd21667, 32, 32;
	bfi.b64 	%rd21691, %rd13931, %rd21666, 32, 32;
	bfi.b64 	%rd21692, %rd13932, %rd21665, 32, 32;
	bfi.b64 	%rd21693, %rd13933, %rd21664, 32, 32;
	bfi.b64 	%rd21694, %rd13934, %rd21663, 32, 32;
	bfi.b64 	%rd21678, %rd13935, %rd21662, 32, 32;
	bfi.b64 	%rd21677, %rd13936, %rd21661, 32, 32;
	bfi.b64 	%rd21676, %rd13937, %rd21660, 32, 32;
	bfi.b64 	%rd21675, %rd13938, %rd21659, 32, 32;
	bfi.b64 	%rd21674, %rd13939, %rd21658, 32, 32;
	bfi.b64 	%rd21673, %rd13940, %rd21657, 32, 32;
	bfi.b64 	%rd21672, %rd13941, %rd21656, 32, 32;
	cvt.u32.u64	%r9088, %rd13942;
	mov.b64	%rd21671, {%r9087, %r9088};
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9089,%dummy}, %rd21651;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9090}, %rd21651;
	}
	shf.r.wrap.b32 	%r9091, %r9090, %r9089, 18;
	shf.r.wrap.b32 	%r9092, %r9089, %r9090, 18;
	mov.b64 	%rd13943, {%r9092, %r9091};
	shf.r.wrap.b32 	%r9093, %r9090, %r9089, 14;
	shf.r.wrap.b32 	%r9094, %r9089, %r9090, 14;
	mov.b64 	%rd13944, {%r9094, %r9093};
	xor.b64  	%rd13945, %rd13943, %rd13944;
	shf.l.wrap.b32 	%r9095, %r9089, %r9090, 23;
	shf.l.wrap.b32 	%r9096, %r9090, %r9089, 23;
	mov.b64 	%rd13946, {%r9096, %r9095};
	xor.b64  	%rd13947, %rd13945, %rd13946;
	xor.b64  	%rd13948, %rd21649, %rd21650;
	and.b64  	%rd13949, %rd13948, %rd21651;
	xor.b64  	%rd13950, %rd13949, %rd21649;
	add.s64 	%rd13951, %rd21648, %rd21687;
	add.s64 	%rd13952, %rd13951, %rd21454;
	add.s64 	%rd13953, %rd13952, %rd13950;
	add.s64 	%rd13954, %rd13953, %rd13947;
	add.s64 	%rd13955, %rd13954, %rd21652;
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9097}, %rd21655;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9098,%dummy}, %rd21655;
	}
	shf.l.wrap.b32 	%r9099, %r9098, %r9097, 30;
	shf.l.wrap.b32 	%r9100, %r9097, %r9098, 30;
	mov.b64 	%rd13956, {%r9100, %r9099};
	shf.r.wrap.b32 	%r9101, %r9097, %r9098, 28;
	shf.r.wrap.b32 	%r9102, %r9098, %r9097, 28;
	mov.b64 	%rd13957, {%r9102, %r9101};
	xor.b64  	%rd13958, %rd13956, %rd13957;
	shf.l.wrap.b32 	%r9103, %r9098, %r9097, 25;
	shf.l.wrap.b32 	%r9104, %r9097, %r9098, 25;
	mov.b64 	%rd13959, {%r9104, %r9103};
	xor.b64  	%rd13960, %rd13958, %rd13959;
	xor.b64  	%rd13961, %rd21654, %rd21655;
	xor.b64  	%rd13962, %rd21653, %rd21655;
	and.b64  	%rd13963, %rd13962, %rd13961;
	xor.b64  	%rd13964, %rd13963, %rd21655;
	add.s64 	%rd13965, %rd13954, %rd13964;
	add.s64 	%rd13966, %rd13965, %rd13960;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9105,%dummy}, %rd13955;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9106}, %rd13955;
	}
	shf.r.wrap.b32 	%r9107, %r9106, %r9105, 14;
	shf.r.wrap.b32 	%r9108, %r9105, %r9106, 14;
	mov.b64 	%rd13967, {%r9108, %r9107};
	shf.r.wrap.b32 	%r9109, %r9106, %r9105, 18;
	shf.r.wrap.b32 	%r9110, %r9105, %r9106, 18;
	mov.b64 	%rd13968, {%r9110, %r9109};
	xor.b64  	%rd13969, %rd13968, %rd13967;
	shf.l.wrap.b32 	%r9111, %r9105, %r9106, 23;
	shf.l.wrap.b32 	%r9112, %r9106, %r9105, 23;
	mov.b64 	%rd13970, {%r9112, %r9111};
	xor.b64  	%rd13971, %rd13969, %rd13970;
	xor.b64  	%rd13972, %rd21650, %rd21651;
	and.b64  	%rd13973, %rd13955, %rd13972;
	xor.b64  	%rd13974, %rd13973, %rd21650;
	add.s64 	%rd13975, %rd21649, %rd21688;
	add.s64 	%rd13976, %rd13975, %rd21453;
	add.s64 	%rd13977, %rd13976, %rd13974;
	add.s64 	%rd13978, %rd13977, %rd13971;
	add.s64 	%rd13979, %rd13978, %rd21653;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9113,%dummy}, %rd13966;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9114}, %rd13966;
	}
	shf.r.wrap.b32 	%r9115, %r9114, %r9113, 28;
	shf.r.wrap.b32 	%r9116, %r9113, %r9114, 28;
	mov.b64 	%rd13980, {%r9116, %r9115};
	shf.l.wrap.b32 	%r9117, %r9113, %r9114, 30;
	shf.l.wrap.b32 	%r9118, %r9114, %r9113, 30;
	mov.b64 	%rd13981, {%r9118, %r9117};
	xor.b64  	%rd13982, %rd13981, %rd13980;
	shf.l.wrap.b32 	%r9119, %r9113, %r9114, 25;
	shf.l.wrap.b32 	%r9120, %r9114, %r9113, 25;
	mov.b64 	%rd13983, {%r9120, %r9119};
	xor.b64  	%rd13984, %rd13982, %rd13983;
	xor.b64  	%rd13985, %rd13966, %rd21654;
	xor.b64  	%rd13986, %rd13966, %rd21655;
	and.b64  	%rd13987, %rd13986, %rd13985;
	xor.b64  	%rd13988, %rd13987, %rd13966;
	add.s64 	%rd13989, %rd13978, %rd13988;
	add.s64 	%rd13990, %rd13989, %rd13984;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9121,%dummy}, %rd13979;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9122}, %rd13979;
	}
	shf.r.wrap.b32 	%r9123, %r9122, %r9121, 14;
	shf.r.wrap.b32 	%r9124, %r9121, %r9122, 14;
	mov.b64 	%rd13991, {%r9124, %r9123};
	shf.r.wrap.b32 	%r9125, %r9122, %r9121, 18;
	shf.r.wrap.b32 	%r9126, %r9121, %r9122, 18;
	mov.b64 	%rd13992, {%r9126, %r9125};
	xor.b64  	%rd13993, %rd13992, %rd13991;
	shf.l.wrap.b32 	%r9127, %r9121, %r9122, 23;
	shf.l.wrap.b32 	%r9128, %r9122, %r9121, 23;
	mov.b64 	%rd13994, {%r9128, %r9127};
	xor.b64  	%rd13995, %rd13993, %rd13994;
	xor.b64  	%rd13996, %rd13955, %rd21651;
	and.b64  	%rd13997, %rd13979, %rd13996;
	xor.b64  	%rd13998, %rd13997, %rd21651;
	add.s64 	%rd13999, %rd21650, %rd21689;
	add.s64 	%rd14000, %rd13999, %rd21452;
	add.s64 	%rd14001, %rd14000, %rd13998;
	add.s64 	%rd14002, %rd14001, %rd13995;
	add.s64 	%rd14003, %rd14002, %rd21654;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9129,%dummy}, %rd13990;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9130}, %rd13990;
	}
	shf.r.wrap.b32 	%r9131, %r9130, %r9129, 28;
	shf.r.wrap.b32 	%r9132, %r9129, %r9130, 28;
	mov.b64 	%rd14004, {%r9132, %r9131};
	shf.l.wrap.b32 	%r9133, %r9129, %r9130, 30;
	shf.l.wrap.b32 	%r9134, %r9130, %r9129, 30;
	mov.b64 	%rd14005, {%r9134, %r9133};
	xor.b64  	%rd14006, %rd14005, %rd14004;
	shf.l.wrap.b32 	%r9135, %r9129, %r9130, 25;
	shf.l.wrap.b32 	%r9136, %r9130, %r9129, 25;
	mov.b64 	%rd14007, {%r9136, %r9135};
	xor.b64  	%rd14008, %rd14006, %rd14007;
	xor.b64  	%rd14009, %rd13990, %rd21655;
	xor.b64  	%rd14010, %rd13990, %rd13966;
	and.b64  	%rd14011, %rd14010, %rd14009;
	xor.b64  	%rd14012, %rd14011, %rd13990;
	add.s64 	%rd14013, %rd14002, %rd14012;
	add.s64 	%rd14014, %rd14013, %rd14008;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9137,%dummy}, %rd14003;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9138}, %rd14003;
	}
	shf.r.wrap.b32 	%r9139, %r9138, %r9137, 14;
	shf.r.wrap.b32 	%r9140, %r9137, %r9138, 14;
	mov.b64 	%rd14015, {%r9140, %r9139};
	shf.r.wrap.b32 	%r9141, %r9138, %r9137, 18;
	shf.r.wrap.b32 	%r9142, %r9137, %r9138, 18;
	mov.b64 	%rd14016, {%r9142, %r9141};
	xor.b64  	%rd14017, %rd14016, %rd14015;
	shf.l.wrap.b32 	%r9143, %r9137, %r9138, 23;
	shf.l.wrap.b32 	%r9144, %r9138, %r9137, 23;
	mov.b64 	%rd14018, {%r9144, %r9143};
	xor.b64  	%rd14019, %rd14017, %rd14018;
	xor.b64  	%rd14020, %rd13979, %rd13955;
	and.b64  	%rd14021, %rd14003, %rd14020;
	xor.b64  	%rd14022, %rd14021, %rd13955;
	add.s64 	%rd14023, %rd21651, %rd21690;
	add.s64 	%rd14024, %rd14023, %rd21451;
	add.s64 	%rd14025, %rd14024, %rd14022;
	add.s64 	%rd14026, %rd14025, %rd14019;
	add.s64 	%rd14027, %rd14026, %rd21655;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9145,%dummy}, %rd14014;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9146}, %rd14014;
	}
	shf.r.wrap.b32 	%r9147, %r9146, %r9145, 28;
	shf.r.wrap.b32 	%r9148, %r9145, %r9146, 28;
	mov.b64 	%rd14028, {%r9148, %r9147};
	shf.l.wrap.b32 	%r9149, %r9145, %r9146, 30;
	shf.l.wrap.b32 	%r9150, %r9146, %r9145, 30;
	mov.b64 	%rd14029, {%r9150, %r9149};
	xor.b64  	%rd14030, %rd14029, %rd14028;
	shf.l.wrap.b32 	%r9151, %r9145, %r9146, 25;
	shf.l.wrap.b32 	%r9152, %r9146, %r9145, 25;
	mov.b64 	%rd14031, {%r9152, %r9151};
	xor.b64  	%rd14032, %rd14030, %rd14031;
	xor.b64  	%rd14033, %rd14014, %rd13966;
	xor.b64  	%rd14034, %rd14014, %rd13990;
	and.b64  	%rd14035, %rd14034, %rd14033;
	xor.b64  	%rd14036, %rd14035, %rd14014;
	add.s64 	%rd14037, %rd14026, %rd14036;
	add.s64 	%rd14038, %rd14037, %rd14032;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9153,%dummy}, %rd14027;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9154}, %rd14027;
	}
	shf.r.wrap.b32 	%r9155, %r9154, %r9153, 14;
	shf.r.wrap.b32 	%r9156, %r9153, %r9154, 14;
	mov.b64 	%rd14039, {%r9156, %r9155};
	shf.r.wrap.b32 	%r9157, %r9154, %r9153, 18;
	shf.r.wrap.b32 	%r9158, %r9153, %r9154, 18;
	mov.b64 	%rd14040, {%r9158, %r9157};
	xor.b64  	%rd14041, %rd14040, %rd14039;
	shf.l.wrap.b32 	%r9159, %r9153, %r9154, 23;
	shf.l.wrap.b32 	%r9160, %r9154, %r9153, 23;
	mov.b64 	%rd14042, {%r9160, %r9159};
	xor.b64  	%rd14043, %rd14041, %rd14042;
	xor.b64  	%rd14044, %rd14003, %rd13979;
	and.b64  	%rd14045, %rd14027, %rd14044;
	xor.b64  	%rd14046, %rd14045, %rd13979;
	add.s64 	%rd14047, %rd13955, %rd21691;
	add.s64 	%rd14048, %rd14047, %rd21450;
	add.s64 	%rd14049, %rd14048, %rd14046;
	add.s64 	%rd14050, %rd14049, %rd14043;
	add.s64 	%rd14051, %rd14050, %rd13966;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9161,%dummy}, %rd14038;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9162}, %rd14038;
	}
	shf.r.wrap.b32 	%r9163, %r9162, %r9161, 28;
	shf.r.wrap.b32 	%r9164, %r9161, %r9162, 28;
	mov.b64 	%rd14052, {%r9164, %r9163};
	shf.l.wrap.b32 	%r9165, %r9161, %r9162, 30;
	shf.l.wrap.b32 	%r9166, %r9162, %r9161, 30;
	mov.b64 	%rd14053, {%r9166, %r9165};
	xor.b64  	%rd14054, %rd14053, %rd14052;
	shf.l.wrap.b32 	%r9167, %r9161, %r9162, 25;
	shf.l.wrap.b32 	%r9168, %r9162, %r9161, 25;
	mov.b64 	%rd14055, {%r9168, %r9167};
	xor.b64  	%rd14056, %rd14054, %rd14055;
	xor.b64  	%rd14057, %rd14038, %rd13990;
	xor.b64  	%rd14058, %rd14038, %rd14014;
	and.b64  	%rd14059, %rd14058, %rd14057;
	xor.b64  	%rd14060, %rd14059, %rd14038;
	add.s64 	%rd14061, %rd14050, %rd14060;
	add.s64 	%rd14062, %rd14061, %rd14056;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9169,%dummy}, %rd14051;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9170}, %rd14051;
	}
	shf.r.wrap.b32 	%r9171, %r9170, %r9169, 14;
	shf.r.wrap.b32 	%r9172, %r9169, %r9170, 14;
	mov.b64 	%rd14063, {%r9172, %r9171};
	shf.r.wrap.b32 	%r9173, %r9170, %r9169, 18;
	shf.r.wrap.b32 	%r9174, %r9169, %r9170, 18;
	mov.b64 	%rd14064, {%r9174, %r9173};
	xor.b64  	%rd14065, %rd14064, %rd14063;
	shf.l.wrap.b32 	%r9175, %r9169, %r9170, 23;
	shf.l.wrap.b32 	%r9176, %r9170, %r9169, 23;
	mov.b64 	%rd14066, {%r9176, %r9175};
	xor.b64  	%rd14067, %rd14065, %rd14066;
	xor.b64  	%rd14068, %rd14027, %rd14003;
	and.b64  	%rd14069, %rd14051, %rd14068;
	xor.b64  	%rd14070, %rd14069, %rd14003;
	add.s64 	%rd14071, %rd13979, %rd21692;
	add.s64 	%rd14072, %rd14071, %rd21449;
	add.s64 	%rd14073, %rd14072, %rd14070;
	add.s64 	%rd14074, %rd14073, %rd14067;
	add.s64 	%rd14075, %rd14074, %rd13990;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9177,%dummy}, %rd14062;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9178}, %rd14062;
	}
	shf.r.wrap.b32 	%r9179, %r9178, %r9177, 28;
	shf.r.wrap.b32 	%r9180, %r9177, %r9178, 28;
	mov.b64 	%rd14076, {%r9180, %r9179};
	shf.l.wrap.b32 	%r9181, %r9177, %r9178, 30;
	shf.l.wrap.b32 	%r9182, %r9178, %r9177, 30;
	mov.b64 	%rd14077, {%r9182, %r9181};
	xor.b64  	%rd14078, %rd14077, %rd14076;
	shf.l.wrap.b32 	%r9183, %r9177, %r9178, 25;
	shf.l.wrap.b32 	%r9184, %r9178, %r9177, 25;
	mov.b64 	%rd14079, {%r9184, %r9183};
	xor.b64  	%rd14080, %rd14078, %rd14079;
	xor.b64  	%rd14081, %rd14062, %rd14014;
	xor.b64  	%rd14082, %rd14062, %rd14038;
	and.b64  	%rd14083, %rd14082, %rd14081;
	xor.b64  	%rd14084, %rd14083, %rd14062;
	add.s64 	%rd14085, %rd14074, %rd14084;
	add.s64 	%rd14086, %rd14085, %rd14080;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9185,%dummy}, %rd14075;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9186}, %rd14075;
	}
	shf.r.wrap.b32 	%r9187, %r9186, %r9185, 14;
	shf.r.wrap.b32 	%r9188, %r9185, %r9186, 14;
	mov.b64 	%rd14087, {%r9188, %r9187};
	shf.r.wrap.b32 	%r9189, %r9186, %r9185, 18;
	shf.r.wrap.b32 	%r9190, %r9185, %r9186, 18;
	mov.b64 	%rd14088, {%r9190, %r9189};
	xor.b64  	%rd14089, %rd14088, %rd14087;
	shf.l.wrap.b32 	%r9191, %r9185, %r9186, 23;
	shf.l.wrap.b32 	%r9192, %r9186, %r9185, 23;
	mov.b64 	%rd14090, {%r9192, %r9191};
	xor.b64  	%rd14091, %rd14089, %rd14090;
	xor.b64  	%rd14092, %rd14051, %rd14027;
	and.b64  	%rd14093, %rd14075, %rd14092;
	xor.b64  	%rd14094, %rd14093, %rd14027;
	add.s64 	%rd14095, %rd14003, %rd21693;
	add.s64 	%rd14096, %rd14095, %rd21448;
	add.s64 	%rd14097, %rd14096, %rd14094;
	add.s64 	%rd14098, %rd14097, %rd14091;
	add.s64 	%rd14099, %rd14098, %rd14014;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9193,%dummy}, %rd14086;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9194}, %rd14086;
	}
	shf.r.wrap.b32 	%r9195, %r9194, %r9193, 28;
	shf.r.wrap.b32 	%r9196, %r9193, %r9194, 28;
	mov.b64 	%rd14100, {%r9196, %r9195};
	shf.l.wrap.b32 	%r9197, %r9193, %r9194, 30;
	shf.l.wrap.b32 	%r9198, %r9194, %r9193, 30;
	mov.b64 	%rd14101, {%r9198, %r9197};
	xor.b64  	%rd14102, %rd14101, %rd14100;
	shf.l.wrap.b32 	%r9199, %r9193, %r9194, 25;
	shf.l.wrap.b32 	%r9200, %r9194, %r9193, 25;
	mov.b64 	%rd14103, {%r9200, %r9199};
	xor.b64  	%rd14104, %rd14102, %rd14103;
	xor.b64  	%rd14105, %rd14086, %rd14038;
	xor.b64  	%rd14106, %rd14086, %rd14062;
	and.b64  	%rd14107, %rd14106, %rd14105;
	xor.b64  	%rd14108, %rd14107, %rd14086;
	add.s64 	%rd14109, %rd14098, %rd14108;
	add.s64 	%rd14110, %rd14109, %rd14104;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9201,%dummy}, %rd14099;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9202}, %rd14099;
	}
	shf.r.wrap.b32 	%r9203, %r9202, %r9201, 14;
	shf.r.wrap.b32 	%r9204, %r9201, %r9202, 14;
	mov.b64 	%rd14111, {%r9204, %r9203};
	shf.r.wrap.b32 	%r9205, %r9202, %r9201, 18;
	shf.r.wrap.b32 	%r9206, %r9201, %r9202, 18;
	mov.b64 	%rd14112, {%r9206, %r9205};
	xor.b64  	%rd14113, %rd14112, %rd14111;
	shf.l.wrap.b32 	%r9207, %r9201, %r9202, 23;
	shf.l.wrap.b32 	%r9208, %r9202, %r9201, 23;
	mov.b64 	%rd14114, {%r9208, %r9207};
	xor.b64  	%rd14115, %rd14113, %rd14114;
	xor.b64  	%rd14116, %rd14075, %rd14051;
	and.b64  	%rd14117, %rd14099, %rd14116;
	xor.b64  	%rd14118, %rd14117, %rd14051;
	add.s64 	%rd14119, %rd14027, %rd21694;
	add.s64 	%rd14120, %rd14119, %rd21447;
	add.s64 	%rd14121, %rd14120, %rd14118;
	add.s64 	%rd14122, %rd14121, %rd14115;
	add.s64 	%rd14123, %rd14122, %rd14038;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9209,%dummy}, %rd14110;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9210}, %rd14110;
	}
	shf.r.wrap.b32 	%r9211, %r9210, %r9209, 28;
	shf.r.wrap.b32 	%r9212, %r9209, %r9210, 28;
	mov.b64 	%rd14124, {%r9212, %r9211};
	shf.l.wrap.b32 	%r9213, %r9209, %r9210, 30;
	shf.l.wrap.b32 	%r9214, %r9210, %r9209, 30;
	mov.b64 	%rd14125, {%r9214, %r9213};
	xor.b64  	%rd14126, %rd14125, %rd14124;
	shf.l.wrap.b32 	%r9215, %r9209, %r9210, 25;
	shf.l.wrap.b32 	%r9216, %r9210, %r9209, 25;
	mov.b64 	%rd14127, {%r9216, %r9215};
	xor.b64  	%rd14128, %rd14126, %rd14127;
	xor.b64  	%rd14129, %rd14110, %rd14062;
	xor.b64  	%rd14130, %rd14110, %rd14086;
	and.b64  	%rd14131, %rd14130, %rd14129;
	xor.b64  	%rd14132, %rd14131, %rd14110;
	add.s64 	%rd14133, %rd14122, %rd14132;
	add.s64 	%rd14134, %rd14133, %rd14128;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9217,%dummy}, %rd14123;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9218}, %rd14123;
	}
	shf.r.wrap.b32 	%r9219, %r9218, %r9217, 14;
	shf.r.wrap.b32 	%r9220, %r9217, %r9218, 14;
	mov.b64 	%rd14135, {%r9220, %r9219};
	shf.r.wrap.b32 	%r9221, %r9218, %r9217, 18;
	shf.r.wrap.b32 	%r9222, %r9217, %r9218, 18;
	mov.b64 	%rd14136, {%r9222, %r9221};
	xor.b64  	%rd14137, %rd14136, %rd14135;
	shf.l.wrap.b32 	%r9223, %r9217, %r9218, 23;
	shf.l.wrap.b32 	%r9224, %r9218, %r9217, 23;
	mov.b64 	%rd14138, {%r9224, %r9223};
	xor.b64  	%rd14139, %rd14137, %rd14138;
	xor.b64  	%rd14140, %rd14099, %rd14075;
	and.b64  	%rd14141, %rd14123, %rd14140;
	xor.b64  	%rd14142, %rd14141, %rd14075;
	add.s64 	%rd14143, %rd14051, %rd21678;
	add.s64 	%rd14144, %rd14143, %rd21446;
	add.s64 	%rd14145, %rd14144, %rd14142;
	add.s64 	%rd14146, %rd14145, %rd14139;
	add.s64 	%rd14147, %rd14146, %rd14062;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9225,%dummy}, %rd14134;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9226}, %rd14134;
	}
	shf.r.wrap.b32 	%r9227, %r9226, %r9225, 28;
	shf.r.wrap.b32 	%r9228, %r9225, %r9226, 28;
	mov.b64 	%rd14148, {%r9228, %r9227};
	shf.l.wrap.b32 	%r9229, %r9225, %r9226, 30;
	shf.l.wrap.b32 	%r9230, %r9226, %r9225, 30;
	mov.b64 	%rd14149, {%r9230, %r9229};
	xor.b64  	%rd14150, %rd14149, %rd14148;
	shf.l.wrap.b32 	%r9231, %r9225, %r9226, 25;
	shf.l.wrap.b32 	%r9232, %r9226, %r9225, 25;
	mov.b64 	%rd14151, {%r9232, %r9231};
	xor.b64  	%rd14152, %rd14150, %rd14151;
	xor.b64  	%rd14153, %rd14134, %rd14086;
	xor.b64  	%rd14154, %rd14134, %rd14110;
	and.b64  	%rd14155, %rd14154, %rd14153;
	xor.b64  	%rd14156, %rd14155, %rd14134;
	add.s64 	%rd14157, %rd14146, %rd14156;
	add.s64 	%rd14158, %rd14157, %rd14152;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9233,%dummy}, %rd14147;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9234}, %rd14147;
	}
	shf.r.wrap.b32 	%r9235, %r9234, %r9233, 14;
	shf.r.wrap.b32 	%r9236, %r9233, %r9234, 14;
	mov.b64 	%rd14159, {%r9236, %r9235};
	shf.r.wrap.b32 	%r9237, %r9234, %r9233, 18;
	shf.r.wrap.b32 	%r9238, %r9233, %r9234, 18;
	mov.b64 	%rd14160, {%r9238, %r9237};
	xor.b64  	%rd14161, %rd14160, %rd14159;
	shf.l.wrap.b32 	%r9239, %r9233, %r9234, 23;
	shf.l.wrap.b32 	%r9240, %r9234, %r9233, 23;
	mov.b64 	%rd14162, {%r9240, %r9239};
	xor.b64  	%rd14163, %rd14161, %rd14162;
	xor.b64  	%rd14164, %rd14123, %rd14099;
	and.b64  	%rd14165, %rd14147, %rd14164;
	xor.b64  	%rd14166, %rd14165, %rd14099;
	add.s64 	%rd14167, %rd14075, %rd21677;
	add.s64 	%rd14168, %rd14167, %rd21445;
	add.s64 	%rd14169, %rd14168, %rd14166;
	add.s64 	%rd14170, %rd14169, %rd14163;
	add.s64 	%rd14171, %rd14170, %rd14086;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9241,%dummy}, %rd14158;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9242}, %rd14158;
	}
	shf.r.wrap.b32 	%r9243, %r9242, %r9241, 28;
	shf.r.wrap.b32 	%r9244, %r9241, %r9242, 28;
	mov.b64 	%rd14172, {%r9244, %r9243};
	shf.l.wrap.b32 	%r9245, %r9241, %r9242, 30;
	shf.l.wrap.b32 	%r9246, %r9242, %r9241, 30;
	mov.b64 	%rd14173, {%r9246, %r9245};
	xor.b64  	%rd14174, %rd14173, %rd14172;
	shf.l.wrap.b32 	%r9247, %r9241, %r9242, 25;
	shf.l.wrap.b32 	%r9248, %r9242, %r9241, 25;
	mov.b64 	%rd14175, {%r9248, %r9247};
	xor.b64  	%rd14176, %rd14174, %rd14175;
	xor.b64  	%rd14177, %rd14158, %rd14110;
	xor.b64  	%rd14178, %rd14158, %rd14134;
	and.b64  	%rd14179, %rd14178, %rd14177;
	xor.b64  	%rd14180, %rd14179, %rd14158;
	add.s64 	%rd14181, %rd14170, %rd14180;
	add.s64 	%rd14182, %rd14181, %rd14176;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9249,%dummy}, %rd14171;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9250}, %rd14171;
	}
	shf.r.wrap.b32 	%r9251, %r9250, %r9249, 14;
	shf.r.wrap.b32 	%r9252, %r9249, %r9250, 14;
	mov.b64 	%rd14183, {%r9252, %r9251};
	shf.r.wrap.b32 	%r9253, %r9250, %r9249, 18;
	shf.r.wrap.b32 	%r9254, %r9249, %r9250, 18;
	mov.b64 	%rd14184, {%r9254, %r9253};
	xor.b64  	%rd14185, %rd14184, %rd14183;
	shf.l.wrap.b32 	%r9255, %r9249, %r9250, 23;
	shf.l.wrap.b32 	%r9256, %r9250, %r9249, 23;
	mov.b64 	%rd14186, {%r9256, %r9255};
	xor.b64  	%rd14187, %rd14185, %rd14186;
	xor.b64  	%rd14188, %rd14147, %rd14123;
	and.b64  	%rd14189, %rd14171, %rd14188;
	xor.b64  	%rd14190, %rd14189, %rd14123;
	add.s64 	%rd14191, %rd14099, %rd21676;
	add.s64 	%rd14192, %rd14191, %rd21444;
	add.s64 	%rd14193, %rd14192, %rd14190;
	add.s64 	%rd14194, %rd14193, %rd14187;
	add.s64 	%rd14195, %rd14194, %rd14110;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9257,%dummy}, %rd14182;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9258}, %rd14182;
	}
	shf.r.wrap.b32 	%r9259, %r9258, %r9257, 28;
	shf.r.wrap.b32 	%r9260, %r9257, %r9258, 28;
	mov.b64 	%rd14196, {%r9260, %r9259};
	shf.l.wrap.b32 	%r9261, %r9257, %r9258, 30;
	shf.l.wrap.b32 	%r9262, %r9258, %r9257, 30;
	mov.b64 	%rd14197, {%r9262, %r9261};
	xor.b64  	%rd14198, %rd14197, %rd14196;
	shf.l.wrap.b32 	%r9263, %r9257, %r9258, 25;
	shf.l.wrap.b32 	%r9264, %r9258, %r9257, 25;
	mov.b64 	%rd14199, {%r9264, %r9263};
	xor.b64  	%rd14200, %rd14198, %rd14199;
	xor.b64  	%rd14201, %rd14182, %rd14134;
	xor.b64  	%rd14202, %rd14182, %rd14158;
	and.b64  	%rd14203, %rd14202, %rd14201;
	xor.b64  	%rd14204, %rd14203, %rd14182;
	add.s64 	%rd14205, %rd14194, %rd14204;
	add.s64 	%rd14206, %rd14205, %rd14200;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9265,%dummy}, %rd14195;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9266}, %rd14195;
	}
	shf.r.wrap.b32 	%r9267, %r9266, %r9265, 14;
	shf.r.wrap.b32 	%r9268, %r9265, %r9266, 14;
	mov.b64 	%rd14207, {%r9268, %r9267};
	shf.r.wrap.b32 	%r9269, %r9266, %r9265, 18;
	shf.r.wrap.b32 	%r9270, %r9265, %r9266, 18;
	mov.b64 	%rd14208, {%r9270, %r9269};
	xor.b64  	%rd14209, %rd14208, %rd14207;
	shf.l.wrap.b32 	%r9271, %r9265, %r9266, 23;
	shf.l.wrap.b32 	%r9272, %r9266, %r9265, 23;
	mov.b64 	%rd14210, {%r9272, %r9271};
	xor.b64  	%rd14211, %rd14209, %rd14210;
	xor.b64  	%rd14212, %rd14171, %rd14147;
	and.b64  	%rd14213, %rd14195, %rd14212;
	xor.b64  	%rd14214, %rd14213, %rd14147;
	add.s64 	%rd14215, %rd14123, %rd21675;
	add.s64 	%rd14216, %rd14215, %rd21443;
	add.s64 	%rd14217, %rd14216, %rd14214;
	add.s64 	%rd14218, %rd14217, %rd14211;
	add.s64 	%rd14219, %rd14218, %rd14134;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9273,%dummy}, %rd14206;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9274}, %rd14206;
	}
	shf.r.wrap.b32 	%r9275, %r9274, %r9273, 28;
	shf.r.wrap.b32 	%r9276, %r9273, %r9274, 28;
	mov.b64 	%rd14220, {%r9276, %r9275};
	shf.l.wrap.b32 	%r9277, %r9273, %r9274, 30;
	shf.l.wrap.b32 	%r9278, %r9274, %r9273, 30;
	mov.b64 	%rd14221, {%r9278, %r9277};
	xor.b64  	%rd14222, %rd14221, %rd14220;
	shf.l.wrap.b32 	%r9279, %r9273, %r9274, 25;
	shf.l.wrap.b32 	%r9280, %r9274, %r9273, 25;
	mov.b64 	%rd14223, {%r9280, %r9279};
	xor.b64  	%rd14224, %rd14222, %rd14223;
	xor.b64  	%rd14225, %rd14206, %rd14158;
	xor.b64  	%rd14226, %rd14206, %rd14182;
	and.b64  	%rd14227, %rd14226, %rd14225;
	xor.b64  	%rd14228, %rd14227, %rd14206;
	add.s64 	%rd14229, %rd14218, %rd14228;
	add.s64 	%rd14230, %rd14229, %rd14224;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9281,%dummy}, %rd14219;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9282}, %rd14219;
	}
	shf.r.wrap.b32 	%r9283, %r9282, %r9281, 14;
	shf.r.wrap.b32 	%r9284, %r9281, %r9282, 14;
	mov.b64 	%rd14231, {%r9284, %r9283};
	shf.r.wrap.b32 	%r9285, %r9282, %r9281, 18;
	shf.r.wrap.b32 	%r9286, %r9281, %r9282, 18;
	mov.b64 	%rd14232, {%r9286, %r9285};
	xor.b64  	%rd14233, %rd14232, %rd14231;
	shf.l.wrap.b32 	%r9287, %r9281, %r9282, 23;
	shf.l.wrap.b32 	%r9288, %r9282, %r9281, 23;
	mov.b64 	%rd14234, {%r9288, %r9287};
	xor.b64  	%rd14235, %rd14233, %rd14234;
	xor.b64  	%rd14236, %rd14195, %rd14171;
	and.b64  	%rd14237, %rd14219, %rd14236;
	xor.b64  	%rd14238, %rd14237, %rd14171;
	add.s64 	%rd14239, %rd14147, %rd21674;
	add.s64 	%rd14240, %rd14239, %rd21442;
	add.s64 	%rd14241, %rd14240, %rd14238;
	add.s64 	%rd14242, %rd14241, %rd14235;
	add.s64 	%rd21686, %rd14242, %rd14158;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9289,%dummy}, %rd14230;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9290}, %rd14230;
	}
	shf.r.wrap.b32 	%r9291, %r9290, %r9289, 28;
	shf.r.wrap.b32 	%r9292, %r9289, %r9290, 28;
	mov.b64 	%rd14243, {%r9292, %r9291};
	shf.l.wrap.b32 	%r9293, %r9289, %r9290, 30;
	shf.l.wrap.b32 	%r9294, %r9290, %r9289, 30;
	mov.b64 	%rd14244, {%r9294, %r9293};
	xor.b64  	%rd14245, %rd14244, %rd14243;
	shf.l.wrap.b32 	%r9295, %r9289, %r9290, 25;
	shf.l.wrap.b32 	%r9296, %r9290, %r9289, 25;
	mov.b64 	%rd14246, {%r9296, %r9295};
	xor.b64  	%rd14247, %rd14245, %rd14246;
	xor.b64  	%rd14248, %rd14230, %rd14182;
	xor.b64  	%rd14249, %rd14230, %rd14206;
	and.b64  	%rd14250, %rd14249, %rd14248;
	xor.b64  	%rd14251, %rd14250, %rd14230;
	add.s64 	%rd14252, %rd14242, %rd14251;
	add.s64 	%rd21682, %rd14252, %rd14247;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9297,%dummy}, %rd21686;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9298}, %rd21686;
	}
	shf.r.wrap.b32 	%r9299, %r9298, %r9297, 14;
	shf.r.wrap.b32 	%r9300, %r9297, %r9298, 14;
	mov.b64 	%rd14253, {%r9300, %r9299};
	shf.r.wrap.b32 	%r9301, %r9298, %r9297, 18;
	shf.r.wrap.b32 	%r9302, %r9297, %r9298, 18;
	mov.b64 	%rd14254, {%r9302, %r9301};
	xor.b64  	%rd14255, %rd14254, %rd14253;
	shf.l.wrap.b32 	%r9303, %r9297, %r9298, 23;
	shf.l.wrap.b32 	%r9304, %r9298, %r9297, 23;
	mov.b64 	%rd14256, {%r9304, %r9303};
	xor.b64  	%rd14257, %rd14255, %rd14256;
	xor.b64  	%rd14258, %rd14219, %rd14195;
	and.b64  	%rd14259, %rd21686, %rd14258;
	xor.b64  	%rd14260, %rd14259, %rd14195;
	add.s64 	%rd14261, %rd14171, %rd21673;
	add.s64 	%rd14262, %rd14261, %rd21441;
	add.s64 	%rd14263, %rd14262, %rd14260;
	add.s64 	%rd14264, %rd14263, %rd14257;
	add.s64 	%rd21685, %rd14264, %rd14182;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9305,%dummy}, %rd21682;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9306}, %rd21682;
	}
	shf.r.wrap.b32 	%r9307, %r9306, %r9305, 28;
	shf.r.wrap.b32 	%r9308, %r9305, %r9306, 28;
	mov.b64 	%rd14265, {%r9308, %r9307};
	shf.l.wrap.b32 	%r9309, %r9305, %r9306, 30;
	shf.l.wrap.b32 	%r9310, %r9306, %r9305, 30;
	mov.b64 	%rd14266, {%r9310, %r9309};
	xor.b64  	%rd14267, %rd14266, %rd14265;
	shf.l.wrap.b32 	%r9311, %r9305, %r9306, 25;
	shf.l.wrap.b32 	%r9312, %r9306, %r9305, 25;
	mov.b64 	%rd14268, {%r9312, %r9311};
	xor.b64  	%rd14269, %rd14267, %rd14268;
	xor.b64  	%rd14270, %rd21682, %rd14206;
	xor.b64  	%rd14271, %rd21682, %rd14230;
	and.b64  	%rd14272, %rd14271, %rd14270;
	xor.b64  	%rd14273, %rd14272, %rd21682;
	add.s64 	%rd14274, %rd14264, %rd14273;
	add.s64 	%rd21681, %rd14274, %rd14269;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9313,%dummy}, %rd21685;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9314}, %rd21685;
	}
	shf.r.wrap.b32 	%r9315, %r9314, %r9313, 14;
	shf.r.wrap.b32 	%r9316, %r9313, %r9314, 14;
	mov.b64 	%rd14275, {%r9316, %r9315};
	shf.r.wrap.b32 	%r9317, %r9314, %r9313, 18;
	shf.r.wrap.b32 	%r9318, %r9313, %r9314, 18;
	mov.b64 	%rd14276, {%r9318, %r9317};
	xor.b64  	%rd14277, %rd14276, %rd14275;
	shf.l.wrap.b32 	%r9319, %r9313, %r9314, 23;
	shf.l.wrap.b32 	%r9320, %r9314, %r9313, 23;
	mov.b64 	%rd14278, {%r9320, %r9319};
	xor.b64  	%rd14279, %rd14277, %rd14278;
	xor.b64  	%rd14280, %rd21686, %rd14219;
	and.b64  	%rd14281, %rd21685, %rd14280;
	xor.b64  	%rd14282, %rd14281, %rd14219;
	add.s64 	%rd14283, %rd14195, %rd21672;
	add.s64 	%rd14284, %rd14283, %rd21440;
	add.s64 	%rd14285, %rd14284, %rd14282;
	add.s64 	%rd14286, %rd14285, %rd14279;
	add.s64 	%rd21684, %rd14286, %rd14206;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9321,%dummy}, %rd21681;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9322}, %rd21681;
	}
	shf.r.wrap.b32 	%r9323, %r9322, %r9321, 28;
	shf.r.wrap.b32 	%r9324, %r9321, %r9322, 28;
	mov.b64 	%rd14287, {%r9324, %r9323};
	shf.l.wrap.b32 	%r9325, %r9321, %r9322, 30;
	shf.l.wrap.b32 	%r9326, %r9322, %r9321, 30;
	mov.b64 	%rd14288, {%r9326, %r9325};
	xor.b64  	%rd14289, %rd14288, %rd14287;
	shf.l.wrap.b32 	%r9327, %r9321, %r9322, 25;
	shf.l.wrap.b32 	%r9328, %r9322, %r9321, 25;
	mov.b64 	%rd14290, {%r9328, %r9327};
	xor.b64  	%rd14291, %rd14289, %rd14290;
	xor.b64  	%rd14292, %rd21681, %rd14230;
	xor.b64  	%rd14293, %rd21681, %rd21682;
	and.b64  	%rd14294, %rd14293, %rd14292;
	xor.b64  	%rd14295, %rd14294, %rd21681;
	add.s64 	%rd14296, %rd14286, %rd14295;
	add.s64 	%rd21680, %rd14296, %rd14291;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9329,%dummy}, %rd21684;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9330}, %rd21684;
	}
	shf.r.wrap.b32 	%r9331, %r9330, %r9329, 14;
	shf.r.wrap.b32 	%r9332, %r9329, %r9330, 14;
	mov.b64 	%rd14297, {%r9332, %r9331};
	shf.r.wrap.b32 	%r9333, %r9330, %r9329, 18;
	shf.r.wrap.b32 	%r9334, %r9329, %r9330, 18;
	mov.b64 	%rd14298, {%r9334, %r9333};
	xor.b64  	%rd14299, %rd14298, %rd14297;
	shf.l.wrap.b32 	%r9335, %r9329, %r9330, 23;
	shf.l.wrap.b32 	%r9336, %r9330, %r9329, 23;
	mov.b64 	%rd14300, {%r9336, %r9335};
	xor.b64  	%rd14301, %rd14299, %rd14300;
	xor.b64  	%rd14302, %rd21685, %rd21686;
	and.b64  	%rd14303, %rd21684, %rd14302;
	xor.b64  	%rd14304, %rd14303, %rd21686;
	add.s64 	%rd14305, %rd14219, %rd21671;
	add.s64 	%rd14306, %rd14305, %rd21439;
	add.s64 	%rd14307, %rd14306, %rd14304;
	add.s64 	%rd14308, %rd14307, %rd14301;
	add.s64 	%rd21683, %rd14308, %rd14230;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9337,%dummy}, %rd21680;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9338}, %rd21680;
	}
	shf.r.wrap.b32 	%r9339, %r9338, %r9337, 28;
	shf.r.wrap.b32 	%r9340, %r9337, %r9338, 28;
	mov.b64 	%rd14309, {%r9340, %r9339};
	shf.l.wrap.b32 	%r9341, %r9337, %r9338, 30;
	shf.l.wrap.b32 	%r9342, %r9338, %r9337, 30;
	mov.b64 	%rd14310, {%r9342, %r9341};
	xor.b64  	%rd14311, %rd14310, %rd14309;
	shf.l.wrap.b32 	%r9343, %r9337, %r9338, 25;
	shf.l.wrap.b32 	%r9344, %r9338, %r9337, 25;
	mov.b64 	%rd14312, {%r9344, %r9343};
	xor.b64  	%rd14313, %rd14311, %rd14312;
	xor.b64  	%rd14314, %rd21680, %rd21682;
	xor.b64  	%rd14315, %rd21680, %rd21681;
	and.b64  	%rd14316, %rd14315, %rd14314;
	xor.b64  	%rd14317, %rd14316, %rd21680;
	add.s64 	%rd14318, %rd14308, %rd14317;
	add.s64 	%rd21679, %rd14318, %rd14313;
	mov.u32 	%r14445, 16;

BB3_249:
	mov.u64 	%rd21335, k_sha512;
	shr.u64 	%rd14319, %rd21672, 6;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9345,%dummy}, %rd21672;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9346}, %rd21672;
	}
	shf.r.wrap.b32 	%r9347, %r9346, %r9345, 19;
	shf.r.wrap.b32 	%r9348, %r9345, %r9346, 19;
	mov.b64 	%rd14320, {%r9348, %r9347};
	xor.b64  	%rd14321, %rd14320, %rd14319;
	shf.l.wrap.b32 	%r9349, %r9345, %r9346, 3;
	shf.l.wrap.b32 	%r9350, %r9346, %r9345, 3;
	mov.b64 	%rd14322, {%r9350, %r9349};
	xor.b64  	%rd14323, %rd14321, %rd14322;
	shr.u64 	%rd14324, %rd21688, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9351,%dummy}, %rd21688;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9352}, %rd21688;
	}
	shf.r.wrap.b32 	%r9353, %r9352, %r9351, 1;
	shf.r.wrap.b32 	%r9354, %r9351, %r9352, 1;
	mov.b64 	%rd14325, {%r9354, %r9353};
	xor.b64  	%rd14326, %rd14325, %rd14324;
	shf.r.wrap.b32 	%r9355, %r9352, %r9351, 8;
	shf.r.wrap.b32 	%r9356, %r9351, %r9352, 8;
	mov.b64 	%rd14327, {%r9356, %r9355};
	xor.b64  	%rd14328, %rd14326, %rd14327;
	add.s64 	%rd14329, %rd21677, %rd21687;
	add.s64 	%rd14330, %rd14329, %rd14323;
	add.s64 	%rd21687, %rd14330, %rd14328;
	shr.u64 	%rd14331, %rd21671, 6;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9357,%dummy}, %rd21671;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9358}, %rd21671;
	}
	shf.r.wrap.b32 	%r9359, %r9358, %r9357, 19;
	shf.r.wrap.b32 	%r9360, %r9357, %r9358, 19;
	mov.b64 	%rd14332, {%r9360, %r9359};
	xor.b64  	%rd14333, %rd14332, %rd14331;
	shf.l.wrap.b32 	%r9361, %r9357, %r9358, 3;
	shf.l.wrap.b32 	%r9362, %r9358, %r9357, 3;
	mov.b64 	%rd14334, {%r9362, %r9361};
	xor.b64  	%rd14335, %rd14333, %rd14334;
	shr.u64 	%rd14336, %rd21689, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9363,%dummy}, %rd21689;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9364}, %rd21689;
	}
	shf.r.wrap.b32 	%r9365, %r9364, %r9363, 1;
	shf.r.wrap.b32 	%r9366, %r9363, %r9364, 1;
	mov.b64 	%rd14337, {%r9366, %r9365};
	xor.b64  	%rd14338, %rd14337, %rd14336;
	shf.r.wrap.b32 	%r9367, %r9364, %r9363, 8;
	shf.r.wrap.b32 	%r9368, %r9363, %r9364, 8;
	mov.b64 	%rd14339, {%r9368, %r9367};
	xor.b64  	%rd14340, %rd14338, %rd14339;
	add.s64 	%rd14341, %rd21676, %rd21688;
	add.s64 	%rd14342, %rd14341, %rd14335;
	add.s64 	%rd21688, %rd14342, %rd14340;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9369,%dummy}, %rd21687;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9370}, %rd21687;
	}
	shf.r.wrap.b32 	%r9371, %r9370, %r9369, 19;
	shf.r.wrap.b32 	%r9372, %r9369, %r9370, 19;
	mov.b64 	%rd14343, {%r9372, %r9371};
	shf.l.wrap.b32 	%r9373, %r9369, %r9370, 3;
	shf.l.wrap.b32 	%r9374, %r9370, %r9369, 3;
	mov.b64 	%rd14344, {%r9374, %r9373};
	shr.u64 	%rd14345, %rd21687, 6;
	xor.b64  	%rd14346, %rd14343, %rd14345;
	xor.b64  	%rd14347, %rd14346, %rd14344;
	shr.u64 	%rd14348, %rd21690, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9375,%dummy}, %rd21690;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9376}, %rd21690;
	}
	shf.r.wrap.b32 	%r9377, %r9376, %r9375, 1;
	shf.r.wrap.b32 	%r9378, %r9375, %r9376, 1;
	mov.b64 	%rd14349, {%r9378, %r9377};
	xor.b64  	%rd14350, %rd14349, %rd14348;
	shf.r.wrap.b32 	%r9379, %r9376, %r9375, 8;
	shf.r.wrap.b32 	%r9380, %r9375, %r9376, 8;
	mov.b64 	%rd14351, {%r9380, %r9379};
	xor.b64  	%rd14352, %rd14350, %rd14351;
	add.s64 	%rd14353, %rd21675, %rd21689;
	add.s64 	%rd14354, %rd14353, %rd14347;
	add.s64 	%rd21689, %rd14354, %rd14352;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9381,%dummy}, %rd21688;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9382}, %rd21688;
	}
	shf.r.wrap.b32 	%r9383, %r9382, %r9381, 19;
	shf.r.wrap.b32 	%r9384, %r9381, %r9382, 19;
	mov.b64 	%rd14355, {%r9384, %r9383};
	shf.l.wrap.b32 	%r9385, %r9381, %r9382, 3;
	shf.l.wrap.b32 	%r9386, %r9382, %r9381, 3;
	mov.b64 	%rd14356, {%r9386, %r9385};
	shr.u64 	%rd14357, %rd21688, 6;
	xor.b64  	%rd14358, %rd14355, %rd14357;
	xor.b64  	%rd14359, %rd14358, %rd14356;
	shr.u64 	%rd14360, %rd21691, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9387,%dummy}, %rd21691;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9388}, %rd21691;
	}
	shf.r.wrap.b32 	%r9389, %r9388, %r9387, 1;
	shf.r.wrap.b32 	%r9390, %r9387, %r9388, 1;
	mov.b64 	%rd14361, {%r9390, %r9389};
	xor.b64  	%rd14362, %rd14361, %rd14360;
	shf.r.wrap.b32 	%r9391, %r9388, %r9387, 8;
	shf.r.wrap.b32 	%r9392, %r9387, %r9388, 8;
	mov.b64 	%rd14363, {%r9392, %r9391};
	xor.b64  	%rd14364, %rd14362, %rd14363;
	add.s64 	%rd14365, %rd21674, %rd21690;
	add.s64 	%rd14366, %rd14365, %rd14359;
	add.s64 	%rd21690, %rd14366, %rd14364;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9393,%dummy}, %rd21689;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9394}, %rd21689;
	}
	shf.r.wrap.b32 	%r9395, %r9394, %r9393, 19;
	shf.r.wrap.b32 	%r9396, %r9393, %r9394, 19;
	mov.b64 	%rd14367, {%r9396, %r9395};
	shf.l.wrap.b32 	%r9397, %r9393, %r9394, 3;
	shf.l.wrap.b32 	%r9398, %r9394, %r9393, 3;
	mov.b64 	%rd14368, {%r9398, %r9397};
	shr.u64 	%rd14369, %rd21689, 6;
	xor.b64  	%rd14370, %rd14367, %rd14369;
	xor.b64  	%rd14371, %rd14370, %rd14368;
	shr.u64 	%rd14372, %rd21692, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9399,%dummy}, %rd21692;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9400}, %rd21692;
	}
	shf.r.wrap.b32 	%r9401, %r9400, %r9399, 1;
	shf.r.wrap.b32 	%r9402, %r9399, %r9400, 1;
	mov.b64 	%rd14373, {%r9402, %r9401};
	xor.b64  	%rd14374, %rd14373, %rd14372;
	shf.r.wrap.b32 	%r9403, %r9400, %r9399, 8;
	shf.r.wrap.b32 	%r9404, %r9399, %r9400, 8;
	mov.b64 	%rd14375, {%r9404, %r9403};
	xor.b64  	%rd14376, %rd14374, %rd14375;
	add.s64 	%rd14377, %rd21673, %rd21691;
	add.s64 	%rd14378, %rd14377, %rd14371;
	add.s64 	%rd21691, %rd14378, %rd14376;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9405,%dummy}, %rd21690;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9406}, %rd21690;
	}
	shf.r.wrap.b32 	%r9407, %r9406, %r9405, 19;
	shf.r.wrap.b32 	%r9408, %r9405, %r9406, 19;
	mov.b64 	%rd14379, {%r9408, %r9407};
	shf.l.wrap.b32 	%r9409, %r9405, %r9406, 3;
	shf.l.wrap.b32 	%r9410, %r9406, %r9405, 3;
	mov.b64 	%rd14380, {%r9410, %r9409};
	shr.u64 	%rd14381, %rd21690, 6;
	xor.b64  	%rd14382, %rd14379, %rd14381;
	xor.b64  	%rd14383, %rd14382, %rd14380;
	shr.u64 	%rd14384, %rd21693, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9411,%dummy}, %rd21693;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9412}, %rd21693;
	}
	shf.r.wrap.b32 	%r9413, %r9412, %r9411, 1;
	shf.r.wrap.b32 	%r9414, %r9411, %r9412, 1;
	mov.b64 	%rd14385, {%r9414, %r9413};
	xor.b64  	%rd14386, %rd14385, %rd14384;
	shf.r.wrap.b32 	%r9415, %r9412, %r9411, 8;
	shf.r.wrap.b32 	%r9416, %r9411, %r9412, 8;
	mov.b64 	%rd14387, {%r9416, %r9415};
	xor.b64  	%rd14388, %rd14386, %rd14387;
	add.s64 	%rd14389, %rd21672, %rd21692;
	add.s64 	%rd14390, %rd14389, %rd14383;
	add.s64 	%rd21692, %rd14390, %rd14388;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9417,%dummy}, %rd21691;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9418}, %rd21691;
	}
	shf.r.wrap.b32 	%r9419, %r9418, %r9417, 19;
	shf.r.wrap.b32 	%r9420, %r9417, %r9418, 19;
	mov.b64 	%rd14391, {%r9420, %r9419};
	shf.l.wrap.b32 	%r9421, %r9417, %r9418, 3;
	shf.l.wrap.b32 	%r9422, %r9418, %r9417, 3;
	mov.b64 	%rd14392, {%r9422, %r9421};
	shr.u64 	%rd14393, %rd21691, 6;
	xor.b64  	%rd14394, %rd14391, %rd14393;
	xor.b64  	%rd14395, %rd14394, %rd14392;
	shr.u64 	%rd14396, %rd21694, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9423,%dummy}, %rd21694;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9424}, %rd21694;
	}
	shf.r.wrap.b32 	%r9425, %r9424, %r9423, 1;
	shf.r.wrap.b32 	%r9426, %r9423, %r9424, 1;
	mov.b64 	%rd14397, {%r9426, %r9425};
	xor.b64  	%rd14398, %rd14397, %rd14396;
	shf.r.wrap.b32 	%r9427, %r9424, %r9423, 8;
	shf.r.wrap.b32 	%r9428, %r9423, %r9424, 8;
	mov.b64 	%rd14399, {%r9428, %r9427};
	xor.b64  	%rd14400, %rd14398, %rd14399;
	add.s64 	%rd14401, %rd21671, %rd21693;
	add.s64 	%rd14402, %rd14401, %rd14395;
	add.s64 	%rd21693, %rd14402, %rd14400;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9429,%dummy}, %rd21692;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9430}, %rd21692;
	}
	shf.r.wrap.b32 	%r9431, %r9430, %r9429, 19;
	shf.r.wrap.b32 	%r9432, %r9429, %r9430, 19;
	mov.b64 	%rd14403, {%r9432, %r9431};
	shf.l.wrap.b32 	%r9433, %r9429, %r9430, 3;
	shf.l.wrap.b32 	%r9434, %r9430, %r9429, 3;
	mov.b64 	%rd14404, {%r9434, %r9433};
	shr.u64 	%rd14405, %rd21692, 6;
	xor.b64  	%rd14406, %rd14403, %rd14405;
	xor.b64  	%rd14407, %rd14406, %rd14404;
	shr.u64 	%rd14408, %rd21678, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9435,%dummy}, %rd21678;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9436}, %rd21678;
	}
	shf.r.wrap.b32 	%r9437, %r9436, %r9435, 1;
	shf.r.wrap.b32 	%r9438, %r9435, %r9436, 1;
	mov.b64 	%rd14409, {%r9438, %r9437};
	xor.b64  	%rd14410, %rd14409, %rd14408;
	shf.r.wrap.b32 	%r9439, %r9436, %r9435, 8;
	shf.r.wrap.b32 	%r9440, %r9435, %r9436, 8;
	mov.b64 	%rd14411, {%r9440, %r9439};
	xor.b64  	%rd14412, %rd14410, %rd14411;
	add.s64 	%rd14413, %rd21687, %rd21694;
	add.s64 	%rd14414, %rd14413, %rd14407;
	add.s64 	%rd21694, %rd14414, %rd14412;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9441,%dummy}, %rd21693;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9442}, %rd21693;
	}
	shf.r.wrap.b32 	%r9443, %r9442, %r9441, 19;
	shf.r.wrap.b32 	%r9444, %r9441, %r9442, 19;
	mov.b64 	%rd14415, {%r9444, %r9443};
	shf.l.wrap.b32 	%r9445, %r9441, %r9442, 3;
	shf.l.wrap.b32 	%r9446, %r9442, %r9441, 3;
	mov.b64 	%rd14416, {%r9446, %r9445};
	shr.u64 	%rd14417, %rd21693, 6;
	xor.b64  	%rd14418, %rd14415, %rd14417;
	xor.b64  	%rd14419, %rd14418, %rd14416;
	shr.u64 	%rd14420, %rd21677, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9447,%dummy}, %rd21677;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9448}, %rd21677;
	}
	shf.r.wrap.b32 	%r9449, %r9448, %r9447, 1;
	shf.r.wrap.b32 	%r9450, %r9447, %r9448, 1;
	mov.b64 	%rd14421, {%r9450, %r9449};
	xor.b64  	%rd14422, %rd14421, %rd14420;
	shf.r.wrap.b32 	%r9451, %r9448, %r9447, 8;
	shf.r.wrap.b32 	%r9452, %r9447, %r9448, 8;
	mov.b64 	%rd14423, {%r9452, %r9451};
	xor.b64  	%rd14424, %rd14422, %rd14423;
	add.s64 	%rd14425, %rd21688, %rd21678;
	add.s64 	%rd14426, %rd14425, %rd14419;
	add.s64 	%rd21678, %rd14426, %rd14424;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9453,%dummy}, %rd21694;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9454}, %rd21694;
	}
	shf.r.wrap.b32 	%r9455, %r9454, %r9453, 19;
	shf.r.wrap.b32 	%r9456, %r9453, %r9454, 19;
	mov.b64 	%rd14427, {%r9456, %r9455};
	shf.l.wrap.b32 	%r9457, %r9453, %r9454, 3;
	shf.l.wrap.b32 	%r9458, %r9454, %r9453, 3;
	mov.b64 	%rd14428, {%r9458, %r9457};
	shr.u64 	%rd14429, %rd21694, 6;
	xor.b64  	%rd14430, %rd14427, %rd14429;
	xor.b64  	%rd14431, %rd14430, %rd14428;
	shr.u64 	%rd14432, %rd21676, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9459,%dummy}, %rd21676;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9460}, %rd21676;
	}
	shf.r.wrap.b32 	%r9461, %r9460, %r9459, 1;
	shf.r.wrap.b32 	%r9462, %r9459, %r9460, 1;
	mov.b64 	%rd14433, {%r9462, %r9461};
	xor.b64  	%rd14434, %rd14433, %rd14432;
	shf.r.wrap.b32 	%r9463, %r9460, %r9459, 8;
	shf.r.wrap.b32 	%r9464, %r9459, %r9460, 8;
	mov.b64 	%rd14435, {%r9464, %r9463};
	xor.b64  	%rd14436, %rd14434, %rd14435;
	add.s64 	%rd14437, %rd21689, %rd21677;
	add.s64 	%rd14438, %rd14437, %rd14431;
	add.s64 	%rd21677, %rd14438, %rd14436;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9465,%dummy}, %rd21678;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9466}, %rd21678;
	}
	shf.r.wrap.b32 	%r9467, %r9466, %r9465, 19;
	shf.r.wrap.b32 	%r9468, %r9465, %r9466, 19;
	mov.b64 	%rd14439, {%r9468, %r9467};
	shf.l.wrap.b32 	%r9469, %r9465, %r9466, 3;
	shf.l.wrap.b32 	%r9470, %r9466, %r9465, 3;
	mov.b64 	%rd14440, {%r9470, %r9469};
	shr.u64 	%rd14441, %rd21678, 6;
	xor.b64  	%rd14442, %rd14439, %rd14441;
	xor.b64  	%rd14443, %rd14442, %rd14440;
	shr.u64 	%rd14444, %rd21675, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9471,%dummy}, %rd21675;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9472}, %rd21675;
	}
	shf.r.wrap.b32 	%r9473, %r9472, %r9471, 1;
	shf.r.wrap.b32 	%r9474, %r9471, %r9472, 1;
	mov.b64 	%rd14445, {%r9474, %r9473};
	xor.b64  	%rd14446, %rd14445, %rd14444;
	shf.r.wrap.b32 	%r9475, %r9472, %r9471, 8;
	shf.r.wrap.b32 	%r9476, %r9471, %r9472, 8;
	mov.b64 	%rd14447, {%r9476, %r9475};
	xor.b64  	%rd14448, %rd14446, %rd14447;
	add.s64 	%rd14449, %rd21690, %rd21676;
	add.s64 	%rd14450, %rd14449, %rd14443;
	add.s64 	%rd21676, %rd14450, %rd14448;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9477,%dummy}, %rd21677;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9478}, %rd21677;
	}
	shf.r.wrap.b32 	%r9479, %r9478, %r9477, 19;
	shf.r.wrap.b32 	%r9480, %r9477, %r9478, 19;
	mov.b64 	%rd14451, {%r9480, %r9479};
	shf.l.wrap.b32 	%r9481, %r9477, %r9478, 3;
	shf.l.wrap.b32 	%r9482, %r9478, %r9477, 3;
	mov.b64 	%rd14452, {%r9482, %r9481};
	shr.u64 	%rd14453, %rd21677, 6;
	xor.b64  	%rd14454, %rd14451, %rd14453;
	xor.b64  	%rd14455, %rd14454, %rd14452;
	shr.u64 	%rd14456, %rd21674, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9483,%dummy}, %rd21674;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9484}, %rd21674;
	}
	shf.r.wrap.b32 	%r9485, %r9484, %r9483, 1;
	shf.r.wrap.b32 	%r9486, %r9483, %r9484, 1;
	mov.b64 	%rd14457, {%r9486, %r9485};
	xor.b64  	%rd14458, %rd14457, %rd14456;
	shf.r.wrap.b32 	%r9487, %r9484, %r9483, 8;
	shf.r.wrap.b32 	%r9488, %r9483, %r9484, 8;
	mov.b64 	%rd14459, {%r9488, %r9487};
	xor.b64  	%rd14460, %rd14458, %rd14459;
	add.s64 	%rd14461, %rd21691, %rd21675;
	add.s64 	%rd14462, %rd14461, %rd14455;
	add.s64 	%rd21675, %rd14462, %rd14460;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9489,%dummy}, %rd21676;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9490}, %rd21676;
	}
	shf.r.wrap.b32 	%r9491, %r9490, %r9489, 19;
	shf.r.wrap.b32 	%r9492, %r9489, %r9490, 19;
	mov.b64 	%rd14463, {%r9492, %r9491};
	shf.l.wrap.b32 	%r9493, %r9489, %r9490, 3;
	shf.l.wrap.b32 	%r9494, %r9490, %r9489, 3;
	mov.b64 	%rd14464, {%r9494, %r9493};
	shr.u64 	%rd14465, %rd21676, 6;
	xor.b64  	%rd14466, %rd14463, %rd14465;
	xor.b64  	%rd14467, %rd14466, %rd14464;
	shr.u64 	%rd14468, %rd21673, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9495,%dummy}, %rd21673;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9496}, %rd21673;
	}
	shf.r.wrap.b32 	%r9497, %r9496, %r9495, 1;
	shf.r.wrap.b32 	%r9498, %r9495, %r9496, 1;
	mov.b64 	%rd14469, {%r9498, %r9497};
	xor.b64  	%rd14470, %rd14469, %rd14468;
	shf.r.wrap.b32 	%r9499, %r9496, %r9495, 8;
	shf.r.wrap.b32 	%r9500, %r9495, %r9496, 8;
	mov.b64 	%rd14471, {%r9500, %r9499};
	xor.b64  	%rd14472, %rd14470, %rd14471;
	add.s64 	%rd14473, %rd21692, %rd21674;
	add.s64 	%rd14474, %rd14473, %rd14467;
	add.s64 	%rd21674, %rd14474, %rd14472;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9501,%dummy}, %rd21675;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9502}, %rd21675;
	}
	shf.r.wrap.b32 	%r9503, %r9502, %r9501, 19;
	shf.r.wrap.b32 	%r9504, %r9501, %r9502, 19;
	mov.b64 	%rd14475, {%r9504, %r9503};
	shf.l.wrap.b32 	%r9505, %r9501, %r9502, 3;
	shf.l.wrap.b32 	%r9506, %r9502, %r9501, 3;
	mov.b64 	%rd14476, {%r9506, %r9505};
	shr.u64 	%rd14477, %rd21675, 6;
	xor.b64  	%rd14478, %rd14475, %rd14477;
	xor.b64  	%rd14479, %rd14478, %rd14476;
	shr.u64 	%rd14480, %rd21672, 7;
	shf.r.wrap.b32 	%r9507, %r9346, %r9345, 1;
	shf.r.wrap.b32 	%r9508, %r9345, %r9346, 1;
	mov.b64 	%rd14481, {%r9508, %r9507};
	xor.b64  	%rd14482, %rd14481, %rd14480;
	shf.r.wrap.b32 	%r9509, %r9346, %r9345, 8;
	shf.r.wrap.b32 	%r9510, %r9345, %r9346, 8;
	mov.b64 	%rd14483, {%r9510, %r9509};
	xor.b64  	%rd14484, %rd14482, %rd14483;
	add.s64 	%rd14485, %rd21693, %rd21673;
	add.s64 	%rd14486, %rd14485, %rd14479;
	add.s64 	%rd21673, %rd14486, %rd14484;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9511,%dummy}, %rd21674;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9512}, %rd21674;
	}
	shf.r.wrap.b32 	%r9513, %r9512, %r9511, 19;
	shf.r.wrap.b32 	%r9514, %r9511, %r9512, 19;
	mov.b64 	%rd14487, {%r9514, %r9513};
	shf.l.wrap.b32 	%r9515, %r9511, %r9512, 3;
	shf.l.wrap.b32 	%r9516, %r9512, %r9511, 3;
	mov.b64 	%rd14488, {%r9516, %r9515};
	shr.u64 	%rd14489, %rd21674, 6;
	xor.b64  	%rd14490, %rd14487, %rd14489;
	xor.b64  	%rd14491, %rd14490, %rd14488;
	shr.u64 	%rd14492, %rd21671, 7;
	shf.r.wrap.b32 	%r9517, %r9358, %r9357, 1;
	shf.r.wrap.b32 	%r9518, %r9357, %r9358, 1;
	mov.b64 	%rd14493, {%r9518, %r9517};
	xor.b64  	%rd14494, %rd14493, %rd14492;
	shf.r.wrap.b32 	%r9519, %r9358, %r9357, 8;
	shf.r.wrap.b32 	%r9520, %r9357, %r9358, 8;
	mov.b64 	%rd14495, {%r9520, %r9519};
	xor.b64  	%rd14496, %rd14494, %rd14495;
	add.s64 	%rd14497, %rd21694, %rd21672;
	add.s64 	%rd14498, %rd14497, %rd14491;
	add.s64 	%rd21672, %rd14498, %rd14496;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9521,%dummy}, %rd21673;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9522}, %rd21673;
	}
	shf.r.wrap.b32 	%r9523, %r9522, %r9521, 19;
	shf.r.wrap.b32 	%r9524, %r9521, %r9522, 19;
	mov.b64 	%rd14499, {%r9524, %r9523};
	shf.l.wrap.b32 	%r9525, %r9521, %r9522, 3;
	shf.l.wrap.b32 	%r9526, %r9522, %r9521, 3;
	mov.b64 	%rd14500, {%r9526, %r9525};
	shr.u64 	%rd14501, %rd21673, 6;
	xor.b64  	%rd14502, %rd14499, %rd14501;
	xor.b64  	%rd14503, %rd14502, %rd14500;
	shf.r.wrap.b32 	%r9527, %r9370, %r9369, 1;
	shf.r.wrap.b32 	%r9528, %r9369, %r9370, 1;
	mov.b64 	%rd14504, {%r9528, %r9527};
	shf.r.wrap.b32 	%r9529, %r9370, %r9369, 8;
	shf.r.wrap.b32 	%r9530, %r9369, %r9370, 8;
	mov.b64 	%rd14505, {%r9530, %r9529};
	shr.u64 	%rd14506, %rd21687, 7;
	xor.b64  	%rd14507, %rd14504, %rd14506;
	xor.b64  	%rd14508, %rd14507, %rd14505;
	add.s64 	%rd14509, %rd21678, %rd21671;
	add.s64 	%rd14510, %rd14509, %rd14503;
	add.s64 	%rd21671, %rd14510, %rd14508;
	mul.wide.s32 	%rd14511, %r14445, 8;
	add.s64 	%rd14513, %rd21335, %rd14511;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9531,%dummy}, %rd21683;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9532}, %rd21683;
	}
	shf.r.wrap.b32 	%r9533, %r9532, %r9531, 18;
	shf.r.wrap.b32 	%r9534, %r9531, %r9532, 18;
	mov.b64 	%rd14514, {%r9534, %r9533};
	shf.r.wrap.b32 	%r9535, %r9532, %r9531, 14;
	shf.r.wrap.b32 	%r9536, %r9531, %r9532, 14;
	mov.b64 	%rd14515, {%r9536, %r9535};
	xor.b64  	%rd14516, %rd14514, %rd14515;
	shf.l.wrap.b32 	%r9537, %r9531, %r9532, 23;
	shf.l.wrap.b32 	%r9538, %r9532, %r9531, 23;
	mov.b64 	%rd14517, {%r9538, %r9537};
	xor.b64  	%rd14518, %rd14516, %rd14517;
	xor.b64  	%rd14519, %rd21684, %rd21685;
	and.b64  	%rd14520, %rd14519, %rd21683;
	xor.b64  	%rd14521, %rd14520, %rd21685;
	add.s64 	%rd14522, %rd14521, %rd21686;
	add.s64 	%rd14523, %rd14522, %rd21687;
	ld.const.u64 	%rd14524, [%rd14513];
	add.s64 	%rd14525, %rd14523, %rd14524;
	add.s64 	%rd14526, %rd14525, %rd14518;
	add.s64 	%rd14527, %rd14526, %rd21682;
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9539}, %rd21679;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9540,%dummy}, %rd21679;
	}
	shf.l.wrap.b32 	%r9541, %r9540, %r9539, 30;
	shf.l.wrap.b32 	%r9542, %r9539, %r9540, 30;
	mov.b64 	%rd14528, {%r9542, %r9541};
	shf.r.wrap.b32 	%r9543, %r9539, %r9540, 28;
	shf.r.wrap.b32 	%r9544, %r9540, %r9539, 28;
	mov.b64 	%rd14529, {%r9544, %r9543};
	xor.b64  	%rd14530, %rd14528, %rd14529;
	shf.l.wrap.b32 	%r9545, %r9540, %r9539, 25;
	shf.l.wrap.b32 	%r9546, %r9539, %r9540, 25;
	mov.b64 	%rd14531, {%r9546, %r9545};
	xor.b64  	%rd14532, %rd14530, %rd14531;
	xor.b64  	%rd14533, %rd21679, %rd21680;
	xor.b64  	%rd14534, %rd21679, %rd21681;
	and.b64  	%rd14535, %rd14533, %rd14534;
	xor.b64  	%rd14536, %rd14535, %rd21679;
	add.s64 	%rd14537, %rd14526, %rd14536;
	add.s64 	%rd14538, %rd14537, %rd14532;
	add.s32 	%r9547, %r14445, 1;
	mul.wide.s32 	%rd14539, %r9547, 8;
	add.s64 	%rd14540, %rd21335, %rd14539;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9548,%dummy}, %rd14527;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9549}, %rd14527;
	}
	shf.r.wrap.b32 	%r9550, %r9549, %r9548, 14;
	shf.r.wrap.b32 	%r9551, %r9548, %r9549, 14;
	mov.b64 	%rd14541, {%r9551, %r9550};
	shf.r.wrap.b32 	%r9552, %r9549, %r9548, 18;
	shf.r.wrap.b32 	%r9553, %r9548, %r9549, 18;
	mov.b64 	%rd14542, {%r9553, %r9552};
	xor.b64  	%rd14543, %rd14542, %rd14541;
	shf.l.wrap.b32 	%r9554, %r9548, %r9549, 23;
	shf.l.wrap.b32 	%r9555, %r9549, %r9548, 23;
	mov.b64 	%rd14544, {%r9555, %r9554};
	xor.b64  	%rd14545, %rd14543, %rd14544;
	xor.b64  	%rd14546, %rd21683, %rd21684;
	and.b64  	%rd14547, %rd14527, %rd14546;
	xor.b64  	%rd14548, %rd14547, %rd21684;
	add.s64 	%rd14549, %rd21688, %rd21685;
	ld.const.u64 	%rd14550, [%rd14540];
	add.s64 	%rd14551, %rd14549, %rd14550;
	add.s64 	%rd14552, %rd14551, %rd14548;
	add.s64 	%rd14553, %rd14552, %rd14545;
	add.s64 	%rd14554, %rd14553, %rd21681;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9556,%dummy}, %rd14538;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9557}, %rd14538;
	}
	shf.r.wrap.b32 	%r9558, %r9557, %r9556, 28;
	shf.r.wrap.b32 	%r9559, %r9556, %r9557, 28;
	mov.b64 	%rd14555, {%r9559, %r9558};
	shf.l.wrap.b32 	%r9560, %r9556, %r9557, 30;
	shf.l.wrap.b32 	%r9561, %r9557, %r9556, 30;
	mov.b64 	%rd14556, {%r9561, %r9560};
	xor.b64  	%rd14557, %rd14556, %rd14555;
	shf.l.wrap.b32 	%r9562, %r9556, %r9557, 25;
	shf.l.wrap.b32 	%r9563, %r9557, %r9556, 25;
	mov.b64 	%rd14558, {%r9563, %r9562};
	xor.b64  	%rd14559, %rd14557, %rd14558;
	xor.b64  	%rd14560, %rd14538, %rd21680;
	xor.b64  	%rd14561, %rd14538, %rd21679;
	and.b64  	%rd14562, %rd14561, %rd14560;
	xor.b64  	%rd14563, %rd14562, %rd14538;
	add.s64 	%rd14564, %rd14553, %rd14563;
	add.s64 	%rd14565, %rd14564, %rd14559;
	add.s32 	%r9564, %r14445, 2;
	mul.wide.s32 	%rd14566, %r9564, 8;
	add.s64 	%rd14567, %rd21335, %rd14566;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9565,%dummy}, %rd14554;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9566}, %rd14554;
	}
	shf.r.wrap.b32 	%r9567, %r9566, %r9565, 14;
	shf.r.wrap.b32 	%r9568, %r9565, %r9566, 14;
	mov.b64 	%rd14568, {%r9568, %r9567};
	shf.r.wrap.b32 	%r9569, %r9566, %r9565, 18;
	shf.r.wrap.b32 	%r9570, %r9565, %r9566, 18;
	mov.b64 	%rd14569, {%r9570, %r9569};
	xor.b64  	%rd14570, %rd14569, %rd14568;
	shf.l.wrap.b32 	%r9571, %r9565, %r9566, 23;
	shf.l.wrap.b32 	%r9572, %r9566, %r9565, 23;
	mov.b64 	%rd14571, {%r9572, %r9571};
	xor.b64  	%rd14572, %rd14570, %rd14571;
	xor.b64  	%rd14573, %rd14527, %rd21683;
	and.b64  	%rd14574, %rd14554, %rd14573;
	xor.b64  	%rd14575, %rd14574, %rd21683;
	add.s64 	%rd14576, %rd21689, %rd21684;
	ld.const.u64 	%rd14577, [%rd14567];
	add.s64 	%rd14578, %rd14576, %rd14577;
	add.s64 	%rd14579, %rd14578, %rd14575;
	add.s64 	%rd14580, %rd14579, %rd14572;
	add.s64 	%rd14581, %rd14580, %rd21680;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9573,%dummy}, %rd14565;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9574}, %rd14565;
	}
	shf.r.wrap.b32 	%r9575, %r9574, %r9573, 28;
	shf.r.wrap.b32 	%r9576, %r9573, %r9574, 28;
	mov.b64 	%rd14582, {%r9576, %r9575};
	shf.l.wrap.b32 	%r9577, %r9573, %r9574, 30;
	shf.l.wrap.b32 	%r9578, %r9574, %r9573, 30;
	mov.b64 	%rd14583, {%r9578, %r9577};
	xor.b64  	%rd14584, %rd14583, %rd14582;
	shf.l.wrap.b32 	%r9579, %r9573, %r9574, 25;
	shf.l.wrap.b32 	%r9580, %r9574, %r9573, 25;
	mov.b64 	%rd14585, {%r9580, %r9579};
	xor.b64  	%rd14586, %rd14584, %rd14585;
	xor.b64  	%rd14587, %rd14565, %rd21679;
	xor.b64  	%rd14588, %rd14565, %rd14538;
	and.b64  	%rd14589, %rd14588, %rd14587;
	xor.b64  	%rd14590, %rd14589, %rd14565;
	add.s64 	%rd14591, %rd14580, %rd14590;
	add.s64 	%rd14592, %rd14591, %rd14586;
	add.s32 	%r9581, %r14445, 3;
	mul.wide.s32 	%rd14593, %r9581, 8;
	add.s64 	%rd14594, %rd21335, %rd14593;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9582,%dummy}, %rd14581;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9583}, %rd14581;
	}
	shf.r.wrap.b32 	%r9584, %r9583, %r9582, 14;
	shf.r.wrap.b32 	%r9585, %r9582, %r9583, 14;
	mov.b64 	%rd14595, {%r9585, %r9584};
	shf.r.wrap.b32 	%r9586, %r9583, %r9582, 18;
	shf.r.wrap.b32 	%r9587, %r9582, %r9583, 18;
	mov.b64 	%rd14596, {%r9587, %r9586};
	xor.b64  	%rd14597, %rd14596, %rd14595;
	shf.l.wrap.b32 	%r9588, %r9582, %r9583, 23;
	shf.l.wrap.b32 	%r9589, %r9583, %r9582, 23;
	mov.b64 	%rd14598, {%r9589, %r9588};
	xor.b64  	%rd14599, %rd14597, %rd14598;
	xor.b64  	%rd14600, %rd14554, %rd14527;
	and.b64  	%rd14601, %rd14581, %rd14600;
	xor.b64  	%rd14602, %rd14601, %rd14527;
	add.s64 	%rd14603, %rd21690, %rd21683;
	ld.const.u64 	%rd14604, [%rd14594];
	add.s64 	%rd14605, %rd14603, %rd14604;
	add.s64 	%rd14606, %rd14605, %rd14602;
	add.s64 	%rd14607, %rd14606, %rd14599;
	add.s64 	%rd14608, %rd14607, %rd21679;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9590,%dummy}, %rd14592;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9591}, %rd14592;
	}
	shf.r.wrap.b32 	%r9592, %r9591, %r9590, 28;
	shf.r.wrap.b32 	%r9593, %r9590, %r9591, 28;
	mov.b64 	%rd14609, {%r9593, %r9592};
	shf.l.wrap.b32 	%r9594, %r9590, %r9591, 30;
	shf.l.wrap.b32 	%r9595, %r9591, %r9590, 30;
	mov.b64 	%rd14610, {%r9595, %r9594};
	xor.b64  	%rd14611, %rd14610, %rd14609;
	shf.l.wrap.b32 	%r9596, %r9590, %r9591, 25;
	shf.l.wrap.b32 	%r9597, %r9591, %r9590, 25;
	mov.b64 	%rd14612, {%r9597, %r9596};
	xor.b64  	%rd14613, %rd14611, %rd14612;
	xor.b64  	%rd14614, %rd14592, %rd14538;
	xor.b64  	%rd14615, %rd14592, %rd14565;
	and.b64  	%rd14616, %rd14615, %rd14614;
	xor.b64  	%rd14617, %rd14616, %rd14592;
	add.s64 	%rd14618, %rd14607, %rd14617;
	add.s64 	%rd14619, %rd14618, %rd14613;
	add.s32 	%r9598, %r14445, 4;
	mul.wide.s32 	%rd14620, %r9598, 8;
	add.s64 	%rd14621, %rd21335, %rd14620;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9599,%dummy}, %rd14608;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9600}, %rd14608;
	}
	shf.r.wrap.b32 	%r9601, %r9600, %r9599, 14;
	shf.r.wrap.b32 	%r9602, %r9599, %r9600, 14;
	mov.b64 	%rd14622, {%r9602, %r9601};
	shf.r.wrap.b32 	%r9603, %r9600, %r9599, 18;
	shf.r.wrap.b32 	%r9604, %r9599, %r9600, 18;
	mov.b64 	%rd14623, {%r9604, %r9603};
	xor.b64  	%rd14624, %rd14623, %rd14622;
	shf.l.wrap.b32 	%r9605, %r9599, %r9600, 23;
	shf.l.wrap.b32 	%r9606, %r9600, %r9599, 23;
	mov.b64 	%rd14625, {%r9606, %r9605};
	xor.b64  	%rd14626, %rd14624, %rd14625;
	xor.b64  	%rd14627, %rd14581, %rd14554;
	and.b64  	%rd14628, %rd14608, %rd14627;
	xor.b64  	%rd14629, %rd14628, %rd14554;
	add.s64 	%rd14630, %rd14527, %rd21691;
	ld.const.u64 	%rd14631, [%rd14621];
	add.s64 	%rd14632, %rd14630, %rd14631;
	add.s64 	%rd14633, %rd14632, %rd14629;
	add.s64 	%rd14634, %rd14633, %rd14626;
	add.s64 	%rd14635, %rd14634, %rd14538;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9607,%dummy}, %rd14619;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9608}, %rd14619;
	}
	shf.r.wrap.b32 	%r9609, %r9608, %r9607, 28;
	shf.r.wrap.b32 	%r9610, %r9607, %r9608, 28;
	mov.b64 	%rd14636, {%r9610, %r9609};
	shf.l.wrap.b32 	%r9611, %r9607, %r9608, 30;
	shf.l.wrap.b32 	%r9612, %r9608, %r9607, 30;
	mov.b64 	%rd14637, {%r9612, %r9611};
	xor.b64  	%rd14638, %rd14637, %rd14636;
	shf.l.wrap.b32 	%r9613, %r9607, %r9608, 25;
	shf.l.wrap.b32 	%r9614, %r9608, %r9607, 25;
	mov.b64 	%rd14639, {%r9614, %r9613};
	xor.b64  	%rd14640, %rd14638, %rd14639;
	xor.b64  	%rd14641, %rd14619, %rd14565;
	xor.b64  	%rd14642, %rd14619, %rd14592;
	and.b64  	%rd14643, %rd14642, %rd14641;
	xor.b64  	%rd14644, %rd14643, %rd14619;
	add.s64 	%rd14645, %rd14634, %rd14644;
	add.s64 	%rd14646, %rd14645, %rd14640;
	add.s32 	%r9615, %r14445, 5;
	mul.wide.s32 	%rd14647, %r9615, 8;
	add.s64 	%rd14648, %rd21335, %rd14647;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9616,%dummy}, %rd14635;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9617}, %rd14635;
	}
	shf.r.wrap.b32 	%r9618, %r9617, %r9616, 14;
	shf.r.wrap.b32 	%r9619, %r9616, %r9617, 14;
	mov.b64 	%rd14649, {%r9619, %r9618};
	shf.r.wrap.b32 	%r9620, %r9617, %r9616, 18;
	shf.r.wrap.b32 	%r9621, %r9616, %r9617, 18;
	mov.b64 	%rd14650, {%r9621, %r9620};
	xor.b64  	%rd14651, %rd14650, %rd14649;
	shf.l.wrap.b32 	%r9622, %r9616, %r9617, 23;
	shf.l.wrap.b32 	%r9623, %r9617, %r9616, 23;
	mov.b64 	%rd14652, {%r9623, %r9622};
	xor.b64  	%rd14653, %rd14651, %rd14652;
	xor.b64  	%rd14654, %rd14608, %rd14581;
	and.b64  	%rd14655, %rd14635, %rd14654;
	xor.b64  	%rd14656, %rd14655, %rd14581;
	add.s64 	%rd14657, %rd14554, %rd21692;
	ld.const.u64 	%rd14658, [%rd14648];
	add.s64 	%rd14659, %rd14657, %rd14658;
	add.s64 	%rd14660, %rd14659, %rd14656;
	add.s64 	%rd14661, %rd14660, %rd14653;
	add.s64 	%rd14662, %rd14661, %rd14565;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9624,%dummy}, %rd14646;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9625}, %rd14646;
	}
	shf.r.wrap.b32 	%r9626, %r9625, %r9624, 28;
	shf.r.wrap.b32 	%r9627, %r9624, %r9625, 28;
	mov.b64 	%rd14663, {%r9627, %r9626};
	shf.l.wrap.b32 	%r9628, %r9624, %r9625, 30;
	shf.l.wrap.b32 	%r9629, %r9625, %r9624, 30;
	mov.b64 	%rd14664, {%r9629, %r9628};
	xor.b64  	%rd14665, %rd14664, %rd14663;
	shf.l.wrap.b32 	%r9630, %r9624, %r9625, 25;
	shf.l.wrap.b32 	%r9631, %r9625, %r9624, 25;
	mov.b64 	%rd14666, {%r9631, %r9630};
	xor.b64  	%rd14667, %rd14665, %rd14666;
	xor.b64  	%rd14668, %rd14646, %rd14592;
	xor.b64  	%rd14669, %rd14646, %rd14619;
	and.b64  	%rd14670, %rd14669, %rd14668;
	xor.b64  	%rd14671, %rd14670, %rd14646;
	add.s64 	%rd14672, %rd14661, %rd14671;
	add.s64 	%rd14673, %rd14672, %rd14667;
	add.s32 	%r9632, %r14445, 6;
	mul.wide.s32 	%rd14674, %r9632, 8;
	add.s64 	%rd14675, %rd21335, %rd14674;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9633,%dummy}, %rd14662;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9634}, %rd14662;
	}
	shf.r.wrap.b32 	%r9635, %r9634, %r9633, 14;
	shf.r.wrap.b32 	%r9636, %r9633, %r9634, 14;
	mov.b64 	%rd14676, {%r9636, %r9635};
	shf.r.wrap.b32 	%r9637, %r9634, %r9633, 18;
	shf.r.wrap.b32 	%r9638, %r9633, %r9634, 18;
	mov.b64 	%rd14677, {%r9638, %r9637};
	xor.b64  	%rd14678, %rd14677, %rd14676;
	shf.l.wrap.b32 	%r9639, %r9633, %r9634, 23;
	shf.l.wrap.b32 	%r9640, %r9634, %r9633, 23;
	mov.b64 	%rd14679, {%r9640, %r9639};
	xor.b64  	%rd14680, %rd14678, %rd14679;
	xor.b64  	%rd14681, %rd14635, %rd14608;
	and.b64  	%rd14682, %rd14662, %rd14681;
	xor.b64  	%rd14683, %rd14682, %rd14608;
	add.s64 	%rd14684, %rd14581, %rd21693;
	ld.const.u64 	%rd14685, [%rd14675];
	add.s64 	%rd14686, %rd14684, %rd14685;
	add.s64 	%rd14687, %rd14686, %rd14683;
	add.s64 	%rd14688, %rd14687, %rd14680;
	add.s64 	%rd14689, %rd14688, %rd14592;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9641,%dummy}, %rd14673;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9642}, %rd14673;
	}
	shf.r.wrap.b32 	%r9643, %r9642, %r9641, 28;
	shf.r.wrap.b32 	%r9644, %r9641, %r9642, 28;
	mov.b64 	%rd14690, {%r9644, %r9643};
	shf.l.wrap.b32 	%r9645, %r9641, %r9642, 30;
	shf.l.wrap.b32 	%r9646, %r9642, %r9641, 30;
	mov.b64 	%rd14691, {%r9646, %r9645};
	xor.b64  	%rd14692, %rd14691, %rd14690;
	shf.l.wrap.b32 	%r9647, %r9641, %r9642, 25;
	shf.l.wrap.b32 	%r9648, %r9642, %r9641, 25;
	mov.b64 	%rd14693, {%r9648, %r9647};
	xor.b64  	%rd14694, %rd14692, %rd14693;
	xor.b64  	%rd14695, %rd14673, %rd14619;
	xor.b64  	%rd14696, %rd14673, %rd14646;
	and.b64  	%rd14697, %rd14696, %rd14695;
	xor.b64  	%rd14698, %rd14697, %rd14673;
	add.s64 	%rd14699, %rd14688, %rd14698;
	add.s64 	%rd14700, %rd14699, %rd14694;
	add.s32 	%r9649, %r14445, 7;
	mul.wide.s32 	%rd14701, %r9649, 8;
	add.s64 	%rd14702, %rd21335, %rd14701;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9650,%dummy}, %rd14689;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9651}, %rd14689;
	}
	shf.r.wrap.b32 	%r9652, %r9651, %r9650, 14;
	shf.r.wrap.b32 	%r9653, %r9650, %r9651, 14;
	mov.b64 	%rd14703, {%r9653, %r9652};
	shf.r.wrap.b32 	%r9654, %r9651, %r9650, 18;
	shf.r.wrap.b32 	%r9655, %r9650, %r9651, 18;
	mov.b64 	%rd14704, {%r9655, %r9654};
	xor.b64  	%rd14705, %rd14704, %rd14703;
	shf.l.wrap.b32 	%r9656, %r9650, %r9651, 23;
	shf.l.wrap.b32 	%r9657, %r9651, %r9650, 23;
	mov.b64 	%rd14706, {%r9657, %r9656};
	xor.b64  	%rd14707, %rd14705, %rd14706;
	xor.b64  	%rd14708, %rd14662, %rd14635;
	and.b64  	%rd14709, %rd14689, %rd14708;
	xor.b64  	%rd14710, %rd14709, %rd14635;
	add.s64 	%rd14711, %rd14608, %rd21694;
	ld.const.u64 	%rd14712, [%rd14702];
	add.s64 	%rd14713, %rd14711, %rd14712;
	add.s64 	%rd14714, %rd14713, %rd14710;
	add.s64 	%rd14715, %rd14714, %rd14707;
	add.s64 	%rd14716, %rd14715, %rd14619;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9658,%dummy}, %rd14700;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9659}, %rd14700;
	}
	shf.r.wrap.b32 	%r9660, %r9659, %r9658, 28;
	shf.r.wrap.b32 	%r9661, %r9658, %r9659, 28;
	mov.b64 	%rd14717, {%r9661, %r9660};
	shf.l.wrap.b32 	%r9662, %r9658, %r9659, 30;
	shf.l.wrap.b32 	%r9663, %r9659, %r9658, 30;
	mov.b64 	%rd14718, {%r9663, %r9662};
	xor.b64  	%rd14719, %rd14718, %rd14717;
	shf.l.wrap.b32 	%r9664, %r9658, %r9659, 25;
	shf.l.wrap.b32 	%r9665, %r9659, %r9658, 25;
	mov.b64 	%rd14720, {%r9665, %r9664};
	xor.b64  	%rd14721, %rd14719, %rd14720;
	xor.b64  	%rd14722, %rd14700, %rd14646;
	xor.b64  	%rd14723, %rd14700, %rd14673;
	and.b64  	%rd14724, %rd14723, %rd14722;
	xor.b64  	%rd14725, %rd14724, %rd14700;
	add.s64 	%rd14726, %rd14715, %rd14725;
	add.s64 	%rd14727, %rd14726, %rd14721;
	add.s32 	%r9666, %r14445, 8;
	mul.wide.s32 	%rd14728, %r9666, 8;
	add.s64 	%rd14729, %rd21335, %rd14728;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9667,%dummy}, %rd14716;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9668}, %rd14716;
	}
	shf.r.wrap.b32 	%r9669, %r9668, %r9667, 14;
	shf.r.wrap.b32 	%r9670, %r9667, %r9668, 14;
	mov.b64 	%rd14730, {%r9670, %r9669};
	shf.r.wrap.b32 	%r9671, %r9668, %r9667, 18;
	shf.r.wrap.b32 	%r9672, %r9667, %r9668, 18;
	mov.b64 	%rd14731, {%r9672, %r9671};
	xor.b64  	%rd14732, %rd14731, %rd14730;
	shf.l.wrap.b32 	%r9673, %r9667, %r9668, 23;
	shf.l.wrap.b32 	%r9674, %r9668, %r9667, 23;
	mov.b64 	%rd14733, {%r9674, %r9673};
	xor.b64  	%rd14734, %rd14732, %rd14733;
	xor.b64  	%rd14735, %rd14689, %rd14662;
	and.b64  	%rd14736, %rd14716, %rd14735;
	xor.b64  	%rd14737, %rd14736, %rd14662;
	add.s64 	%rd14738, %rd14635, %rd21678;
	ld.const.u64 	%rd14739, [%rd14729];
	add.s64 	%rd14740, %rd14738, %rd14739;
	add.s64 	%rd14741, %rd14740, %rd14737;
	add.s64 	%rd14742, %rd14741, %rd14734;
	add.s64 	%rd14743, %rd14742, %rd14646;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9675,%dummy}, %rd14727;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9676}, %rd14727;
	}
	shf.r.wrap.b32 	%r9677, %r9676, %r9675, 28;
	shf.r.wrap.b32 	%r9678, %r9675, %r9676, 28;
	mov.b64 	%rd14744, {%r9678, %r9677};
	shf.l.wrap.b32 	%r9679, %r9675, %r9676, 30;
	shf.l.wrap.b32 	%r9680, %r9676, %r9675, 30;
	mov.b64 	%rd14745, {%r9680, %r9679};
	xor.b64  	%rd14746, %rd14745, %rd14744;
	shf.l.wrap.b32 	%r9681, %r9675, %r9676, 25;
	shf.l.wrap.b32 	%r9682, %r9676, %r9675, 25;
	mov.b64 	%rd14747, {%r9682, %r9681};
	xor.b64  	%rd14748, %rd14746, %rd14747;
	xor.b64  	%rd14749, %rd14727, %rd14673;
	xor.b64  	%rd14750, %rd14727, %rd14700;
	and.b64  	%rd14751, %rd14750, %rd14749;
	xor.b64  	%rd14752, %rd14751, %rd14727;
	add.s64 	%rd14753, %rd14742, %rd14752;
	add.s64 	%rd14754, %rd14753, %rd14748;
	add.s32 	%r9683, %r14445, 9;
	mul.wide.s32 	%rd14755, %r9683, 8;
	add.s64 	%rd14756, %rd21335, %rd14755;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9684,%dummy}, %rd14743;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9685}, %rd14743;
	}
	shf.r.wrap.b32 	%r9686, %r9685, %r9684, 14;
	shf.r.wrap.b32 	%r9687, %r9684, %r9685, 14;
	mov.b64 	%rd14757, {%r9687, %r9686};
	shf.r.wrap.b32 	%r9688, %r9685, %r9684, 18;
	shf.r.wrap.b32 	%r9689, %r9684, %r9685, 18;
	mov.b64 	%rd14758, {%r9689, %r9688};
	xor.b64  	%rd14759, %rd14758, %rd14757;
	shf.l.wrap.b32 	%r9690, %r9684, %r9685, 23;
	shf.l.wrap.b32 	%r9691, %r9685, %r9684, 23;
	mov.b64 	%rd14760, {%r9691, %r9690};
	xor.b64  	%rd14761, %rd14759, %rd14760;
	xor.b64  	%rd14762, %rd14716, %rd14689;
	and.b64  	%rd14763, %rd14743, %rd14762;
	xor.b64  	%rd14764, %rd14763, %rd14689;
	add.s64 	%rd14765, %rd14662, %rd21677;
	ld.const.u64 	%rd14766, [%rd14756];
	add.s64 	%rd14767, %rd14765, %rd14766;
	add.s64 	%rd14768, %rd14767, %rd14764;
	add.s64 	%rd14769, %rd14768, %rd14761;
	add.s64 	%rd14770, %rd14769, %rd14673;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9692,%dummy}, %rd14754;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9693}, %rd14754;
	}
	shf.r.wrap.b32 	%r9694, %r9693, %r9692, 28;
	shf.r.wrap.b32 	%r9695, %r9692, %r9693, 28;
	mov.b64 	%rd14771, {%r9695, %r9694};
	shf.l.wrap.b32 	%r9696, %r9692, %r9693, 30;
	shf.l.wrap.b32 	%r9697, %r9693, %r9692, 30;
	mov.b64 	%rd14772, {%r9697, %r9696};
	xor.b64  	%rd14773, %rd14772, %rd14771;
	shf.l.wrap.b32 	%r9698, %r9692, %r9693, 25;
	shf.l.wrap.b32 	%r9699, %r9693, %r9692, 25;
	mov.b64 	%rd14774, {%r9699, %r9698};
	xor.b64  	%rd14775, %rd14773, %rd14774;
	xor.b64  	%rd14776, %rd14754, %rd14700;
	xor.b64  	%rd14777, %rd14754, %rd14727;
	and.b64  	%rd14778, %rd14777, %rd14776;
	xor.b64  	%rd14779, %rd14778, %rd14754;
	add.s64 	%rd14780, %rd14769, %rd14779;
	add.s64 	%rd14781, %rd14780, %rd14775;
	add.s32 	%r9700, %r14445, 10;
	mul.wide.s32 	%rd14782, %r9700, 8;
	add.s64 	%rd14783, %rd21335, %rd14782;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9701,%dummy}, %rd14770;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9702}, %rd14770;
	}
	shf.r.wrap.b32 	%r9703, %r9702, %r9701, 14;
	shf.r.wrap.b32 	%r9704, %r9701, %r9702, 14;
	mov.b64 	%rd14784, {%r9704, %r9703};
	shf.r.wrap.b32 	%r9705, %r9702, %r9701, 18;
	shf.r.wrap.b32 	%r9706, %r9701, %r9702, 18;
	mov.b64 	%rd14785, {%r9706, %r9705};
	xor.b64  	%rd14786, %rd14785, %rd14784;
	shf.l.wrap.b32 	%r9707, %r9701, %r9702, 23;
	shf.l.wrap.b32 	%r9708, %r9702, %r9701, 23;
	mov.b64 	%rd14787, {%r9708, %r9707};
	xor.b64  	%rd14788, %rd14786, %rd14787;
	xor.b64  	%rd14789, %rd14743, %rd14716;
	and.b64  	%rd14790, %rd14770, %rd14789;
	xor.b64  	%rd14791, %rd14790, %rd14716;
	add.s64 	%rd14792, %rd14689, %rd21676;
	ld.const.u64 	%rd14793, [%rd14783];
	add.s64 	%rd14794, %rd14792, %rd14793;
	add.s64 	%rd14795, %rd14794, %rd14791;
	add.s64 	%rd14796, %rd14795, %rd14788;
	add.s64 	%rd14797, %rd14796, %rd14700;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9709,%dummy}, %rd14781;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9710}, %rd14781;
	}
	shf.r.wrap.b32 	%r9711, %r9710, %r9709, 28;
	shf.r.wrap.b32 	%r9712, %r9709, %r9710, 28;
	mov.b64 	%rd14798, {%r9712, %r9711};
	shf.l.wrap.b32 	%r9713, %r9709, %r9710, 30;
	shf.l.wrap.b32 	%r9714, %r9710, %r9709, 30;
	mov.b64 	%rd14799, {%r9714, %r9713};
	xor.b64  	%rd14800, %rd14799, %rd14798;
	shf.l.wrap.b32 	%r9715, %r9709, %r9710, 25;
	shf.l.wrap.b32 	%r9716, %r9710, %r9709, 25;
	mov.b64 	%rd14801, {%r9716, %r9715};
	xor.b64  	%rd14802, %rd14800, %rd14801;
	xor.b64  	%rd14803, %rd14781, %rd14727;
	xor.b64  	%rd14804, %rd14781, %rd14754;
	and.b64  	%rd14805, %rd14804, %rd14803;
	xor.b64  	%rd14806, %rd14805, %rd14781;
	add.s64 	%rd14807, %rd14796, %rd14806;
	add.s64 	%rd14808, %rd14807, %rd14802;
	add.s32 	%r9717, %r14445, 11;
	mul.wide.s32 	%rd14809, %r9717, 8;
	add.s64 	%rd14810, %rd21335, %rd14809;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9718,%dummy}, %rd14797;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9719}, %rd14797;
	}
	shf.r.wrap.b32 	%r9720, %r9719, %r9718, 14;
	shf.r.wrap.b32 	%r9721, %r9718, %r9719, 14;
	mov.b64 	%rd14811, {%r9721, %r9720};
	shf.r.wrap.b32 	%r9722, %r9719, %r9718, 18;
	shf.r.wrap.b32 	%r9723, %r9718, %r9719, 18;
	mov.b64 	%rd14812, {%r9723, %r9722};
	xor.b64  	%rd14813, %rd14812, %rd14811;
	shf.l.wrap.b32 	%r9724, %r9718, %r9719, 23;
	shf.l.wrap.b32 	%r9725, %r9719, %r9718, 23;
	mov.b64 	%rd14814, {%r9725, %r9724};
	xor.b64  	%rd14815, %rd14813, %rd14814;
	xor.b64  	%rd14816, %rd14770, %rd14743;
	and.b64  	%rd14817, %rd14797, %rd14816;
	xor.b64  	%rd14818, %rd14817, %rd14743;
	add.s64 	%rd14819, %rd14716, %rd21675;
	ld.const.u64 	%rd14820, [%rd14810];
	add.s64 	%rd14821, %rd14819, %rd14820;
	add.s64 	%rd14822, %rd14821, %rd14818;
	add.s64 	%rd14823, %rd14822, %rd14815;
	add.s64 	%rd14824, %rd14823, %rd14727;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9726,%dummy}, %rd14808;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9727}, %rd14808;
	}
	shf.r.wrap.b32 	%r9728, %r9727, %r9726, 28;
	shf.r.wrap.b32 	%r9729, %r9726, %r9727, 28;
	mov.b64 	%rd14825, {%r9729, %r9728};
	shf.l.wrap.b32 	%r9730, %r9726, %r9727, 30;
	shf.l.wrap.b32 	%r9731, %r9727, %r9726, 30;
	mov.b64 	%rd14826, {%r9731, %r9730};
	xor.b64  	%rd14827, %rd14826, %rd14825;
	shf.l.wrap.b32 	%r9732, %r9726, %r9727, 25;
	shf.l.wrap.b32 	%r9733, %r9727, %r9726, 25;
	mov.b64 	%rd14828, {%r9733, %r9732};
	xor.b64  	%rd14829, %rd14827, %rd14828;
	xor.b64  	%rd14830, %rd14808, %rd14754;
	xor.b64  	%rd14831, %rd14808, %rd14781;
	and.b64  	%rd14832, %rd14831, %rd14830;
	xor.b64  	%rd14833, %rd14832, %rd14808;
	add.s64 	%rd14834, %rd14823, %rd14833;
	add.s64 	%rd14835, %rd14834, %rd14829;
	add.s32 	%r9734, %r14445, 12;
	mul.wide.s32 	%rd14836, %r9734, 8;
	add.s64 	%rd14837, %rd21335, %rd14836;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9735,%dummy}, %rd14824;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9736}, %rd14824;
	}
	shf.r.wrap.b32 	%r9737, %r9736, %r9735, 14;
	shf.r.wrap.b32 	%r9738, %r9735, %r9736, 14;
	mov.b64 	%rd14838, {%r9738, %r9737};
	shf.r.wrap.b32 	%r9739, %r9736, %r9735, 18;
	shf.r.wrap.b32 	%r9740, %r9735, %r9736, 18;
	mov.b64 	%rd14839, {%r9740, %r9739};
	xor.b64  	%rd14840, %rd14839, %rd14838;
	shf.l.wrap.b32 	%r9741, %r9735, %r9736, 23;
	shf.l.wrap.b32 	%r9742, %r9736, %r9735, 23;
	mov.b64 	%rd14841, {%r9742, %r9741};
	xor.b64  	%rd14842, %rd14840, %rd14841;
	xor.b64  	%rd14843, %rd14797, %rd14770;
	and.b64  	%rd14844, %rd14824, %rd14843;
	xor.b64  	%rd14845, %rd14844, %rd14770;
	add.s64 	%rd14846, %rd14743, %rd21674;
	ld.const.u64 	%rd14847, [%rd14837];
	add.s64 	%rd14848, %rd14846, %rd14847;
	add.s64 	%rd14849, %rd14848, %rd14845;
	add.s64 	%rd14850, %rd14849, %rd14842;
	add.s64 	%rd21686, %rd14850, %rd14754;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9743,%dummy}, %rd14835;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9744}, %rd14835;
	}
	shf.r.wrap.b32 	%r9745, %r9744, %r9743, 28;
	shf.r.wrap.b32 	%r9746, %r9743, %r9744, 28;
	mov.b64 	%rd14851, {%r9746, %r9745};
	shf.l.wrap.b32 	%r9747, %r9743, %r9744, 30;
	shf.l.wrap.b32 	%r9748, %r9744, %r9743, 30;
	mov.b64 	%rd14852, {%r9748, %r9747};
	xor.b64  	%rd14853, %rd14852, %rd14851;
	shf.l.wrap.b32 	%r9749, %r9743, %r9744, 25;
	shf.l.wrap.b32 	%r9750, %r9744, %r9743, 25;
	mov.b64 	%rd14854, {%r9750, %r9749};
	xor.b64  	%rd14855, %rd14853, %rd14854;
	xor.b64  	%rd14856, %rd14835, %rd14781;
	xor.b64  	%rd14857, %rd14835, %rd14808;
	and.b64  	%rd14858, %rd14857, %rd14856;
	xor.b64  	%rd14859, %rd14858, %rd14835;
	add.s64 	%rd14860, %rd14850, %rd14859;
	add.s64 	%rd21682, %rd14860, %rd14855;
	add.s32 	%r9751, %r14445, 13;
	mul.wide.s32 	%rd14861, %r9751, 8;
	add.s64 	%rd14862, %rd21335, %rd14861;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9752,%dummy}, %rd21686;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9753}, %rd21686;
	}
	shf.r.wrap.b32 	%r9754, %r9753, %r9752, 14;
	shf.r.wrap.b32 	%r9755, %r9752, %r9753, 14;
	mov.b64 	%rd14863, {%r9755, %r9754};
	shf.r.wrap.b32 	%r9756, %r9753, %r9752, 18;
	shf.r.wrap.b32 	%r9757, %r9752, %r9753, 18;
	mov.b64 	%rd14864, {%r9757, %r9756};
	xor.b64  	%rd14865, %rd14864, %rd14863;
	shf.l.wrap.b32 	%r9758, %r9752, %r9753, 23;
	shf.l.wrap.b32 	%r9759, %r9753, %r9752, 23;
	mov.b64 	%rd14866, {%r9759, %r9758};
	xor.b64  	%rd14867, %rd14865, %rd14866;
	xor.b64  	%rd14868, %rd14824, %rd14797;
	and.b64  	%rd14869, %rd21686, %rd14868;
	xor.b64  	%rd14870, %rd14869, %rd14797;
	add.s64 	%rd14871, %rd14770, %rd21673;
	ld.const.u64 	%rd14872, [%rd14862];
	add.s64 	%rd14873, %rd14871, %rd14872;
	add.s64 	%rd14874, %rd14873, %rd14870;
	add.s64 	%rd14875, %rd14874, %rd14867;
	add.s64 	%rd21685, %rd14875, %rd14781;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9760,%dummy}, %rd21682;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9761}, %rd21682;
	}
	shf.r.wrap.b32 	%r9762, %r9761, %r9760, 28;
	shf.r.wrap.b32 	%r9763, %r9760, %r9761, 28;
	mov.b64 	%rd14876, {%r9763, %r9762};
	shf.l.wrap.b32 	%r9764, %r9760, %r9761, 30;
	shf.l.wrap.b32 	%r9765, %r9761, %r9760, 30;
	mov.b64 	%rd14877, {%r9765, %r9764};
	xor.b64  	%rd14878, %rd14877, %rd14876;
	shf.l.wrap.b32 	%r9766, %r9760, %r9761, 25;
	shf.l.wrap.b32 	%r9767, %r9761, %r9760, 25;
	mov.b64 	%rd14879, {%r9767, %r9766};
	xor.b64  	%rd14880, %rd14878, %rd14879;
	xor.b64  	%rd14881, %rd21682, %rd14808;
	xor.b64  	%rd14882, %rd21682, %rd14835;
	and.b64  	%rd14883, %rd14882, %rd14881;
	xor.b64  	%rd14884, %rd14883, %rd21682;
	add.s64 	%rd14885, %rd14875, %rd14884;
	add.s64 	%rd21681, %rd14885, %rd14880;
	add.s32 	%r9768, %r14445, 14;
	mul.wide.s32 	%rd14886, %r9768, 8;
	add.s64 	%rd14887, %rd21335, %rd14886;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9769,%dummy}, %rd21685;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9770}, %rd21685;
	}
	shf.r.wrap.b32 	%r9771, %r9770, %r9769, 14;
	shf.r.wrap.b32 	%r9772, %r9769, %r9770, 14;
	mov.b64 	%rd14888, {%r9772, %r9771};
	shf.r.wrap.b32 	%r9773, %r9770, %r9769, 18;
	shf.r.wrap.b32 	%r9774, %r9769, %r9770, 18;
	mov.b64 	%rd14889, {%r9774, %r9773};
	xor.b64  	%rd14890, %rd14889, %rd14888;
	shf.l.wrap.b32 	%r9775, %r9769, %r9770, 23;
	shf.l.wrap.b32 	%r9776, %r9770, %r9769, 23;
	mov.b64 	%rd14891, {%r9776, %r9775};
	xor.b64  	%rd14892, %rd14890, %rd14891;
	xor.b64  	%rd14893, %rd21686, %rd14824;
	and.b64  	%rd14894, %rd21685, %rd14893;
	xor.b64  	%rd14895, %rd14894, %rd14824;
	add.s64 	%rd14896, %rd14797, %rd21672;
	ld.const.u64 	%rd14897, [%rd14887];
	add.s64 	%rd14898, %rd14896, %rd14897;
	add.s64 	%rd14899, %rd14898, %rd14895;
	add.s64 	%rd14900, %rd14899, %rd14892;
	add.s64 	%rd21684, %rd14900, %rd14808;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9777,%dummy}, %rd21681;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9778}, %rd21681;
	}
	shf.r.wrap.b32 	%r9779, %r9778, %r9777, 28;
	shf.r.wrap.b32 	%r9780, %r9777, %r9778, 28;
	mov.b64 	%rd14901, {%r9780, %r9779};
	shf.l.wrap.b32 	%r9781, %r9777, %r9778, 30;
	shf.l.wrap.b32 	%r9782, %r9778, %r9777, 30;
	mov.b64 	%rd14902, {%r9782, %r9781};
	xor.b64  	%rd14903, %rd14902, %rd14901;
	shf.l.wrap.b32 	%r9783, %r9777, %r9778, 25;
	shf.l.wrap.b32 	%r9784, %r9778, %r9777, 25;
	mov.b64 	%rd14904, {%r9784, %r9783};
	xor.b64  	%rd14905, %rd14903, %rd14904;
	xor.b64  	%rd14906, %rd21681, %rd14835;
	xor.b64  	%rd14907, %rd21681, %rd21682;
	and.b64  	%rd14908, %rd14907, %rd14906;
	xor.b64  	%rd14909, %rd14908, %rd21681;
	add.s64 	%rd14910, %rd14900, %rd14909;
	add.s64 	%rd21680, %rd14910, %rd14905;
	add.s32 	%r9785, %r14445, 15;
	mul.wide.s32 	%rd14911, %r9785, 8;
	add.s64 	%rd14912, %rd21335, %rd14911;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9786,%dummy}, %rd21684;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9787}, %rd21684;
	}
	shf.r.wrap.b32 	%r9788, %r9787, %r9786, 14;
	shf.r.wrap.b32 	%r9789, %r9786, %r9787, 14;
	mov.b64 	%rd14913, {%r9789, %r9788};
	shf.r.wrap.b32 	%r9790, %r9787, %r9786, 18;
	shf.r.wrap.b32 	%r9791, %r9786, %r9787, 18;
	mov.b64 	%rd14914, {%r9791, %r9790};
	xor.b64  	%rd14915, %rd14914, %rd14913;
	shf.l.wrap.b32 	%r9792, %r9786, %r9787, 23;
	shf.l.wrap.b32 	%r9793, %r9787, %r9786, 23;
	mov.b64 	%rd14916, {%r9793, %r9792};
	xor.b64  	%rd14917, %rd14915, %rd14916;
	xor.b64  	%rd14918, %rd21685, %rd21686;
	and.b64  	%rd14919, %rd21684, %rd14918;
	xor.b64  	%rd14920, %rd14919, %rd21686;
	add.s64 	%rd14921, %rd14824, %rd21671;
	ld.const.u64 	%rd14922, [%rd14912];
	add.s64 	%rd14923, %rd14921, %rd14922;
	add.s64 	%rd14924, %rd14923, %rd14920;
	add.s64 	%rd14925, %rd14924, %rd14917;
	add.s64 	%rd21683, %rd14925, %rd14835;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9794,%dummy}, %rd21680;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9795}, %rd21680;
	}
	shf.r.wrap.b32 	%r9796, %r9795, %r9794, 28;
	shf.r.wrap.b32 	%r9797, %r9794, %r9795, 28;
	mov.b64 	%rd14926, {%r9797, %r9796};
	shf.l.wrap.b32 	%r9798, %r9794, %r9795, 30;
	shf.l.wrap.b32 	%r9799, %r9795, %r9794, 30;
	mov.b64 	%rd14927, {%r9799, %r9798};
	xor.b64  	%rd14928, %rd14927, %rd14926;
	shf.l.wrap.b32 	%r9800, %r9794, %r9795, 25;
	shf.l.wrap.b32 	%r9801, %r9795, %r9794, 25;
	mov.b64 	%rd14929, {%r9801, %r9800};
	xor.b64  	%rd14930, %rd14928, %rd14929;
	xor.b64  	%rd14931, %rd21680, %rd21682;
	xor.b64  	%rd14932, %rd21680, %rd21681;
	and.b64  	%rd14933, %rd14932, %rd14931;
	xor.b64  	%rd14934, %rd14933, %rd21680;
	add.s64 	%rd14935, %rd14925, %rd14934;
	add.s64 	%rd21679, %rd14935, %rd14930;
	add.s32 	%r14445, %r14445, 16;
	setp.lt.s32	%p158, %r14445, 80;
	@%p158 bra 	BB3_249;

	setp.eq.s32	%p221, %r2, 0;
	ld.param.u64 	%rd21330, [m01800_init_param_4];
	mov.u64 	%rd21329, 6620516959819538809;
	mov.u64 	%rd21328, 2270897969802886507;
	mov.u64 	%rd21320, -7276294671716946913;
	mov.u64 	%rd21319, 5840696475078001361;
	mov.u64 	%rd21318, -6534734903238641935;
	mov.u64 	%rd21317, 4354685564936845355;
	mov.u64 	%rd21316, -4942790177534073029;
	mov.u64 	%rd21315, 7640891576956012808;
	mov.u32 	%r351, 0;
	mul.wide.s32 	%rd14936, %r1, 672;
	add.s64 	%rd14937, %rd21330, %rd14936;
	add.s64 	%rd1203, %rd21655, %rd21679;
	st.global.u64 	[%rd14937], %rd1203;
	add.s64 	%rd14938, %rd21654, %rd21680;
	st.global.u64 	[%rd14937+8], %rd14938;
	add.s64 	%rd14939, %rd21653, %rd21681;
	st.global.u64 	[%rd14937+16], %rd14939;
	add.s64 	%rd14940, %rd21652, %rd21682;
	st.global.u64 	[%rd14937+24], %rd14940;
	add.s64 	%rd14941, %rd21651, %rd21683;
	st.global.u64 	[%rd14937+32], %rd14941;
	add.s64 	%rd14942, %rd21650, %rd21684;
	st.global.u64 	[%rd14937+40], %rd14942;
	add.s64 	%rd14943, %rd21649, %rd21685;
	st.global.u64 	[%rd14937+48], %rd14943;
	add.s64 	%rd14944, %rd21648, %rd21686;
	st.global.u64 	[%rd14937+56], %rd14944;
	st.local.u64 	[%rd1], %rd21315;
	st.local.u64 	[%rd1+8], %rd21316;
	st.local.u64 	[%rd1+16], %rd21317;
	st.local.u64 	[%rd1+24], %rd21318;
	st.local.u64 	[%rd1+32], %rd21319;
	st.local.u64 	[%rd1+40], %rd21320;
	st.local.u64 	[%rd1+48], %rd21328;
	st.local.u64 	[%rd1+56], %rd21329;
	st.local.u32 	[%rd1+192], %r351;
	@%p221 bra 	BB3_283;

	and.b32  	%r350, %r2, 3;
	add.u64 	%rd1204, %SPL, 0;
	add.s64 	%rd1205, %rd1204, 7;
	add.s64 	%rd1206, %rd179, 7;
	mov.u32 	%r351, 0;
	mov.u32 	%r14447, %r351;
	mov.u32 	%r14448, %r351;

BB3_252:
	add.s32 	%r9806, %r14447, %r2;
	st.local.u32 	[%rd1+192], %r9806;
	add.s32 	%r354, %r351, %r2;
	setp.lt.s32	%p160, %r354, 128;
	@%p160 bra 	BB3_273;
	bra.uni 	BB3_253;

BB3_273:
	setp.lt.s32	%p173, %r2, 1;
	@%p173 bra 	BB3_282;

	setp.eq.s32	%p174, %r350, 0;
	mov.u32 	%r14469, 0;
	@%p174 bra 	BB3_280;

	setp.eq.s32	%p175, %r350, 1;
	mov.u32 	%r14465, 0;
	@%p175 bra 	BB3_279;

	setp.eq.s32	%p176, %r350, 2;
	mov.u32 	%r14463, 0;
	@%p176 bra 	BB3_278;

	ld.local.u8 	%rs268, [%rd1205];
	xor.b32  	%r10576, %r351, 7;
	cvt.u64.u32	%rd16039, %r10576;
	add.s64 	%rd16040, %rd179, %rd16039;
	st.local.u8 	[%rd16040], %rs268;
	add.s32 	%r351, %r351, 1;
	mov.u32 	%r14463, 1;

BB3_278:
	xor.b32  	%r10577, %r14463, 7;
	cvt.u64.u32	%rd16041, %r10577;
	add.s64 	%rd16042, %rd1204, %rd16041;
	ld.local.u8 	%rs269, [%rd16042];
	xor.b32  	%r10578, %r351, 7;
	cvt.s64.s32	%rd16043, %r10578;
	add.s64 	%rd16044, %rd179, %rd16043;
	st.local.u8 	[%rd16044], %rs269;
	add.s32 	%r351, %r351, 1;
	add.s32 	%r14465, %r14463, 1;

BB3_279:
	xor.b32  	%r10579, %r14465, 7;
	cvt.s64.s32	%rd16045, %r10579;
	add.s64 	%rd16046, %rd1204, %rd16045;
	ld.local.u8 	%rs270, [%rd16046];
	xor.b32  	%r10580, %r351, 7;
	cvt.s64.s32	%rd16047, %r10580;
	add.s64 	%rd16048, %rd179, %rd16047;
	st.local.u8 	[%rd16048], %rs270;
	add.s32 	%r351, %r351, 1;
	add.s32 	%r14469, %r14465, 1;

BB3_280:
	setp.lt.u32	%p177, %r2, 4;
	@%p177 bra 	BB3_282;

BB3_281:
	xor.b32  	%r10581, %r14469, 7;
	cvt.s64.s32	%rd16049, %r10581;
	add.s64 	%rd16050, %rd1204, %rd16049;
	ld.local.u8 	%rs271, [%rd16050];
	xor.b32  	%r10582, %r351, 7;
	cvt.s64.s32	%rd16051, %r10582;
	add.s64 	%rd16052, %rd179, %rd16051;
	st.local.u8 	[%rd16052], %rs271;
	add.s32 	%r10583, %r14469, 1;
	xor.b32  	%r10584, %r10583, 7;
	cvt.s64.s32	%rd16053, %r10584;
	add.s64 	%rd16054, %rd1204, %rd16053;
	ld.local.u8 	%rs272, [%rd16054];
	add.s32 	%r10585, %r351, 1;
	xor.b32  	%r10586, %r10585, 7;
	cvt.s64.s32	%rd16055, %r10586;
	add.s64 	%rd16056, %rd179, %rd16055;
	st.local.u8 	[%rd16056], %rs272;
	add.s32 	%r10587, %r14469, 2;
	xor.b32  	%r10588, %r10587, 7;
	cvt.s64.s32	%rd16057, %r10588;
	add.s64 	%rd16058, %rd1204, %rd16057;
	ld.local.u8 	%rs273, [%rd16058];
	add.s32 	%r10589, %r351, 2;
	xor.b32  	%r10590, %r10589, 7;
	cvt.s64.s32	%rd16059, %r10590;
	add.s64 	%rd16060, %rd179, %rd16059;
	st.local.u8 	[%rd16060], %rs273;
	add.s32 	%r10591, %r14469, 3;
	xor.b32  	%r10592, %r10591, 7;
	cvt.s64.s32	%rd16061, %r10592;
	add.s64 	%rd16062, %rd1204, %rd16061;
	ld.local.u8 	%rs274, [%rd16062];
	add.s32 	%r10593, %r351, 3;
	xor.b32  	%r10594, %r10593, 7;
	cvt.s64.s32	%rd16063, %r10594;
	add.s64 	%rd16064, %rd179, %rd16063;
	st.local.u8 	[%rd16064], %rs274;
	add.s32 	%r14469, %r14469, 4;
	setp.lt.s32	%p178, %r14469, %r2;
	add.s32 	%r351, %r351, 4;
	@%p178 bra 	BB3_281;
	bra.uni 	BB3_282;

BB3_253:
	sub.s32 	%r355, %r2861, %r351;
	mov.u32 	%r9809, 1;
	max.u32 	%r356, %r355, %r9809;
	and.b32  	%r357, %r356, 3;
	setp.eq.s32	%p161, %r357, 0;
	mov.u32 	%r14455, 0;
	@%p161 bra 	BB3_260;

	setp.eq.s32	%p162, %r357, 1;
	mov.u32 	%r14451, 0;
	@%p162 bra 	BB3_259;

	setp.eq.s32	%p163, %r357, 2;
	mov.u32 	%r9811, 0;
	@%p163 bra 	BB3_256;
	bra.uni 	BB3_257;

BB3_256:
	mov.u32 	%r9809, %r9811;
	bra.uni 	BB3_258;

BB3_257:
	ld.local.u8 	%rs254, [%rd1205];
	xor.b32  	%r9813, %r351, 7;
	cvt.u64.u32	%rd14954, %r9813;
	add.s64 	%rd14955, %rd179, %rd14954;
	st.local.u8 	[%rd14955], %rs254;
	add.s32 	%r351, %r351, 1;

BB3_258:
	xor.b32  	%r9814, %r9809, 7;
	cvt.u64.u32	%rd14956, %r9814;
	add.s64 	%rd14957, %rd1204, %rd14956;
	ld.local.u8 	%rs255, [%rd14957];
	xor.b32  	%r9815, %r351, 7;
	cvt.s64.s32	%rd14958, %r9815;
	add.s64 	%rd14959, %rd179, %rd14958;
	st.local.u8 	[%rd14959], %rs255;
	add.s32 	%r351, %r351, 1;
	add.s32 	%r14451, %r9809, 1;

BB3_259:
	xor.b32  	%r9816, %r14451, 7;
	cvt.s64.s32	%rd14960, %r9816;
	add.s64 	%rd14961, %rd1204, %rd14960;
	ld.local.u8 	%rs256, [%rd14961];
	xor.b32  	%r9817, %r351, 7;
	cvt.s64.s32	%rd14962, %r9817;
	add.s64 	%rd14963, %rd179, %rd14962;
	st.local.u8 	[%rd14963], %rs256;
	add.s32 	%r351, %r351, 1;
	add.s32 	%r14455, %r14451, 1;

BB3_260:
	setp.lt.u32	%p164, %r356, 4;
	@%p164 bra 	BB3_262;

BB3_261:
	xor.b32  	%r9818, %r14455, 7;
	cvt.s64.s32	%rd14964, %r9818;
	add.s64 	%rd14965, %rd1204, %rd14964;
	ld.local.u8 	%rs257, [%rd14965];
	xor.b32  	%r9819, %r351, 7;
	cvt.s64.s32	%rd14966, %r9819;
	add.s64 	%rd14967, %rd179, %rd14966;
	st.local.u8 	[%rd14967], %rs257;
	add.s32 	%r9820, %r14455, 1;
	xor.b32  	%r9821, %r9820, 7;
	cvt.s64.s32	%rd14968, %r9821;
	add.s64 	%rd14969, %rd1204, %rd14968;
	ld.local.u8 	%rs258, [%rd14969];
	add.s32 	%r9822, %r351, 1;
	xor.b32  	%r9823, %r9822, 7;
	cvt.s64.s32	%rd14970, %r9823;
	add.s64 	%rd14971, %rd179, %rd14970;
	st.local.u8 	[%rd14971], %rs258;
	add.s32 	%r9824, %r14455, 2;
	xor.b32  	%r9825, %r9824, 7;
	cvt.s64.s32	%rd14972, %r9825;
	add.s64 	%rd14973, %rd1204, %rd14972;
	ld.local.u8 	%rs259, [%rd14973];
	add.s32 	%r9826, %r351, 2;
	xor.b32  	%r9827, %r9826, 7;
	cvt.s64.s32	%rd14974, %r9827;
	add.s64 	%rd14975, %rd179, %rd14974;
	st.local.u8 	[%rd14975], %rs259;
	add.s32 	%r9828, %r14455, 3;
	xor.b32  	%r9829, %r9828, 7;
	cvt.s64.s32	%rd14976, %r9829;
	add.s64 	%rd14977, %rd1204, %rd14976;
	ld.local.u8 	%rs260, [%rd14977];
	add.s32 	%r9830, %r351, 3;
	xor.b32  	%r9831, %r9830, 7;
	cvt.s64.s32	%rd14978, %r9831;
	add.s64 	%rd14979, %rd179, %rd14978;
	st.local.u8 	[%rd14979], %rs260;
	add.s32 	%r14455, %r14455, 4;
	setp.lt.s32	%p165, %r14455, %r355;
	add.s32 	%r351, %r351, 4;
	@%p165 bra 	BB3_261;

BB3_262:
	ld.local.u64 	%rd14980, [%rd1+64];
	shr.u64 	%rd14981, %rd14980, 32;
	ld.local.u64 	%rd14982, [%rd1+72];
	shr.u64 	%rd14983, %rd14982, 32;
	ld.local.u64 	%rd14984, [%rd1+80];
	shr.u64 	%rd14985, %rd14984, 32;
	ld.local.u64 	%rd14986, [%rd1+88];
	shr.u64 	%rd14987, %rd14986, 32;
	ld.local.u64 	%rd14988, [%rd1+96];
	shr.u64 	%rd14989, %rd14988, 32;
	ld.local.u64 	%rd14990, [%rd1+104];
	shr.u64 	%rd14991, %rd14990, 32;
	ld.local.u64 	%rd14992, [%rd1+112];
	shr.u64 	%rd14993, %rd14992, 32;
	ld.local.u64 	%rd14994, [%rd1+120];
	shr.u64 	%rd14995, %rd14994, 32;
	ld.local.u64 	%rd14996, [%rd1+128];
	shr.u64 	%rd14997, %rd14996, 32;
	ld.local.u64 	%rd14998, [%rd1+136];
	shr.u64 	%rd14999, %rd14998, 32;
	ld.local.u64 	%rd15000, [%rd1+144];
	shr.u64 	%rd15001, %rd15000, 32;
	ld.local.u64 	%rd15002, [%rd1+152];
	shr.u64 	%rd15003, %rd15002, 32;
	ld.local.u64 	%rd15004, [%rd1+160];
	shr.u64 	%rd15005, %rd15004, 32;
	ld.local.u64 	%rd15006, [%rd1+168];
	shr.u64 	%rd15007, %rd15006, 32;
	ld.local.u64 	%rd15008, [%rd1+176];
	shr.u64 	%rd15009, %rd15008, 32;
	ld.local.u64 	%rd15010, [%rd1+184];
	shr.u64 	%rd15011, %rd15010, 32;
	bfi.b64 	%rd21711, %rd14981, %rd14980, 32, 32;
	bfi.b64 	%rd21712, %rd14983, %rd14982, 32, 32;
	bfi.b64 	%rd21713, %rd14985, %rd14984, 32, 32;
	bfi.b64 	%rd21714, %rd14987, %rd14986, 32, 32;
	bfi.b64 	%rd21715, %rd14989, %rd14988, 32, 32;
	bfi.b64 	%rd21716, %rd14991, %rd14990, 32, 32;
	bfi.b64 	%rd21717, %rd14993, %rd14992, 32, 32;
	bfi.b64 	%rd21718, %rd14995, %rd14994, 32, 32;
	bfi.b64 	%rd21702, %rd14997, %rd14996, 32, 32;
	bfi.b64 	%rd21701, %rd14999, %rd14998, 32, 32;
	bfi.b64 	%rd21700, %rd15001, %rd15000, 32, 32;
	bfi.b64 	%rd21699, %rd15003, %rd15002, 32, 32;
	bfi.b64 	%rd21698, %rd15005, %rd15004, 32, 32;
	bfi.b64 	%rd21697, %rd15007, %rd15006, 32, 32;
	bfi.b64 	%rd21696, %rd15009, %rd15008, 32, 32;
	bfi.b64 	%rd21695, %rd15011, %rd15010, 32, 32;
	ld.local.u64 	%rd1223, [%rd1+32];
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9833,%dummy}, %rd1223;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9834}, %rd1223;
	}
	shf.r.wrap.b32 	%r9835, %r9834, %r9833, 14;
	shf.r.wrap.b32 	%r9836, %r9833, %r9834, 14;
	mov.b64 	%rd15012, {%r9836, %r9835};
	shf.r.wrap.b32 	%r9837, %r9834, %r9833, 18;
	shf.r.wrap.b32 	%r9838, %r9833, %r9834, 18;
	mov.b64 	%rd15013, {%r9838, %r9837};
	xor.b64  	%rd15014, %rd15013, %rd15012;
	shf.l.wrap.b32 	%r9839, %r9833, %r9834, 23;
	shf.l.wrap.b32 	%r9840, %r9834, %r9833, 23;
	mov.b64 	%rd15015, {%r9840, %r9839};
	xor.b64  	%rd15016, %rd15014, %rd15015;
	ld.local.u64 	%rd1224, [%rd1+48];
	ld.local.u64 	%rd1225, [%rd1+40];
	xor.b64  	%rd15017, %rd1224, %rd1225;
	and.b64  	%rd15018, %rd15017, %rd1223;
	xor.b64  	%rd15019, %rd15018, %rd1224;
	ld.local.u64 	%rd1226, [%rd1+56];
	add.s64 	%rd15020, %rd1226, %rd21711;
	add.s64 	%rd15021, %rd15020, %rd21454;
	add.s64 	%rd15022, %rd15021, %rd15019;
	add.s64 	%rd15023, %rd15022, %rd15016;
	ld.local.u64 	%rd1227, [%rd1+24];
	add.s64 	%rd15024, %rd15023, %rd1227;
	ld.local.u64 	%rd1228, [%rd1];
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9841,%dummy}, %rd1228;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9842}, %rd1228;
	}
	shf.r.wrap.b32 	%r9843, %r9842, %r9841, 28;
	shf.r.wrap.b32 	%r9844, %r9841, %r9842, 28;
	mov.b64 	%rd15025, {%r9844, %r9843};
	shf.l.wrap.b32 	%r9845, %r9841, %r9842, 30;
	shf.l.wrap.b32 	%r9846, %r9842, %r9841, 30;
	mov.b64 	%rd15026, {%r9846, %r9845};
	xor.b64  	%rd15027, %rd15026, %rd15025;
	shf.l.wrap.b32 	%r9847, %r9841, %r9842, 25;
	shf.l.wrap.b32 	%r9848, %r9842, %r9841, 25;
	mov.b64 	%rd15028, {%r9848, %r9847};
	xor.b64  	%rd15029, %rd15027, %rd15028;
	ld.local.u64 	%rd1229, [%rd1+16];
	xor.b64  	%rd15030, %rd1229, %rd1228;
	ld.local.u64 	%rd1230, [%rd1+8];
	xor.b64  	%rd15031, %rd1230, %rd1228;
	and.b64  	%rd15032, %rd15030, %rd15031;
	xor.b64  	%rd15033, %rd15032, %rd1228;
	add.s64 	%rd15034, %rd15023, %rd15033;
	add.s64 	%rd15035, %rd15034, %rd15029;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9849,%dummy}, %rd15024;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9850}, %rd15024;
	}
	shf.r.wrap.b32 	%r9851, %r9850, %r9849, 14;
	shf.r.wrap.b32 	%r9852, %r9849, %r9850, 14;
	mov.b64 	%rd15036, {%r9852, %r9851};
	shf.r.wrap.b32 	%r9853, %r9850, %r9849, 18;
	shf.r.wrap.b32 	%r9854, %r9849, %r9850, 18;
	mov.b64 	%rd15037, {%r9854, %r9853};
	xor.b64  	%rd15038, %rd15037, %rd15036;
	shf.l.wrap.b32 	%r9855, %r9849, %r9850, 23;
	shf.l.wrap.b32 	%r9856, %r9850, %r9849, 23;
	mov.b64 	%rd15039, {%r9856, %r9855};
	xor.b64  	%rd15040, %rd15038, %rd15039;
	xor.b64  	%rd15041, %rd1225, %rd1223;
	and.b64  	%rd15042, %rd15024, %rd15041;
	xor.b64  	%rd15043, %rd15042, %rd1225;
	add.s64 	%rd15044, %rd1224, %rd21712;
	add.s64 	%rd15045, %rd15044, %rd21453;
	add.s64 	%rd15046, %rd15045, %rd15043;
	add.s64 	%rd15047, %rd15046, %rd15040;
	add.s64 	%rd15048, %rd15047, %rd1229;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9857,%dummy}, %rd15035;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9858}, %rd15035;
	}
	shf.r.wrap.b32 	%r9859, %r9858, %r9857, 28;
	shf.r.wrap.b32 	%r9860, %r9857, %r9858, 28;
	mov.b64 	%rd15049, {%r9860, %r9859};
	shf.l.wrap.b32 	%r9861, %r9857, %r9858, 30;
	shf.l.wrap.b32 	%r9862, %r9858, %r9857, 30;
	mov.b64 	%rd15050, {%r9862, %r9861};
	xor.b64  	%rd15051, %rd15050, %rd15049;
	shf.l.wrap.b32 	%r9863, %r9857, %r9858, 25;
	shf.l.wrap.b32 	%r9864, %r9858, %r9857, 25;
	mov.b64 	%rd15052, {%r9864, %r9863};
	xor.b64  	%rd15053, %rd15051, %rd15052;
	xor.b64  	%rd15054, %rd15035, %rd1230;
	xor.b64  	%rd15055, %rd15035, %rd1228;
	and.b64  	%rd15056, %rd15055, %rd15054;
	xor.b64  	%rd15057, %rd15056, %rd15035;
	add.s64 	%rd15058, %rd15047, %rd15057;
	add.s64 	%rd15059, %rd15058, %rd15053;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9865,%dummy}, %rd15048;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9866}, %rd15048;
	}
	shf.r.wrap.b32 	%r9867, %r9866, %r9865, 14;
	shf.r.wrap.b32 	%r9868, %r9865, %r9866, 14;
	mov.b64 	%rd15060, {%r9868, %r9867};
	shf.r.wrap.b32 	%r9869, %r9866, %r9865, 18;
	shf.r.wrap.b32 	%r9870, %r9865, %r9866, 18;
	mov.b64 	%rd15061, {%r9870, %r9869};
	xor.b64  	%rd15062, %rd15061, %rd15060;
	shf.l.wrap.b32 	%r9871, %r9865, %r9866, 23;
	shf.l.wrap.b32 	%r9872, %r9866, %r9865, 23;
	mov.b64 	%rd15063, {%r9872, %r9871};
	xor.b64  	%rd15064, %rd15062, %rd15063;
	xor.b64  	%rd15065, %rd15024, %rd1223;
	and.b64  	%rd15066, %rd15048, %rd15065;
	xor.b64  	%rd15067, %rd15066, %rd1223;
	add.s64 	%rd15068, %rd1225, %rd21713;
	add.s64 	%rd15069, %rd15068, %rd21452;
	add.s64 	%rd15070, %rd15069, %rd15067;
	add.s64 	%rd15071, %rd15070, %rd15064;
	add.s64 	%rd15072, %rd15071, %rd1230;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9873,%dummy}, %rd15059;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9874}, %rd15059;
	}
	shf.r.wrap.b32 	%r9875, %r9874, %r9873, 28;
	shf.r.wrap.b32 	%r9876, %r9873, %r9874, 28;
	mov.b64 	%rd15073, {%r9876, %r9875};
	shf.l.wrap.b32 	%r9877, %r9873, %r9874, 30;
	shf.l.wrap.b32 	%r9878, %r9874, %r9873, 30;
	mov.b64 	%rd15074, {%r9878, %r9877};
	xor.b64  	%rd15075, %rd15074, %rd15073;
	shf.l.wrap.b32 	%r9879, %r9873, %r9874, 25;
	shf.l.wrap.b32 	%r9880, %r9874, %r9873, 25;
	mov.b64 	%rd15076, {%r9880, %r9879};
	xor.b64  	%rd15077, %rd15075, %rd15076;
	xor.b64  	%rd15078, %rd15059, %rd1228;
	xor.b64  	%rd15079, %rd15059, %rd15035;
	and.b64  	%rd15080, %rd15079, %rd15078;
	xor.b64  	%rd15081, %rd15080, %rd15059;
	add.s64 	%rd15082, %rd15071, %rd15081;
	add.s64 	%rd15083, %rd15082, %rd15077;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9881,%dummy}, %rd15072;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9882}, %rd15072;
	}
	shf.r.wrap.b32 	%r9883, %r9882, %r9881, 14;
	shf.r.wrap.b32 	%r9884, %r9881, %r9882, 14;
	mov.b64 	%rd15084, {%r9884, %r9883};
	shf.r.wrap.b32 	%r9885, %r9882, %r9881, 18;
	shf.r.wrap.b32 	%r9886, %r9881, %r9882, 18;
	mov.b64 	%rd15085, {%r9886, %r9885};
	xor.b64  	%rd15086, %rd15085, %rd15084;
	shf.l.wrap.b32 	%r9887, %r9881, %r9882, 23;
	shf.l.wrap.b32 	%r9888, %r9882, %r9881, 23;
	mov.b64 	%rd15087, {%r9888, %r9887};
	xor.b64  	%rd15088, %rd15086, %rd15087;
	xor.b64  	%rd15089, %rd15048, %rd15024;
	and.b64  	%rd15090, %rd15072, %rd15089;
	xor.b64  	%rd15091, %rd15090, %rd15024;
	add.s64 	%rd15092, %rd1223, %rd21714;
	add.s64 	%rd15093, %rd15092, %rd21451;
	add.s64 	%rd15094, %rd15093, %rd15091;
	add.s64 	%rd15095, %rd15094, %rd15088;
	add.s64 	%rd15096, %rd15095, %rd1228;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9889,%dummy}, %rd15083;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9890}, %rd15083;
	}
	shf.r.wrap.b32 	%r9891, %r9890, %r9889, 28;
	shf.r.wrap.b32 	%r9892, %r9889, %r9890, 28;
	mov.b64 	%rd15097, {%r9892, %r9891};
	shf.l.wrap.b32 	%r9893, %r9889, %r9890, 30;
	shf.l.wrap.b32 	%r9894, %r9890, %r9889, 30;
	mov.b64 	%rd15098, {%r9894, %r9893};
	xor.b64  	%rd15099, %rd15098, %rd15097;
	shf.l.wrap.b32 	%r9895, %r9889, %r9890, 25;
	shf.l.wrap.b32 	%r9896, %r9890, %r9889, 25;
	mov.b64 	%rd15100, {%r9896, %r9895};
	xor.b64  	%rd15101, %rd15099, %rd15100;
	xor.b64  	%rd15102, %rd15083, %rd15035;
	xor.b64  	%rd15103, %rd15083, %rd15059;
	and.b64  	%rd15104, %rd15103, %rd15102;
	xor.b64  	%rd15105, %rd15104, %rd15083;
	add.s64 	%rd15106, %rd15095, %rd15105;
	add.s64 	%rd15107, %rd15106, %rd15101;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9897,%dummy}, %rd15096;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9898}, %rd15096;
	}
	shf.r.wrap.b32 	%r9899, %r9898, %r9897, 14;
	shf.r.wrap.b32 	%r9900, %r9897, %r9898, 14;
	mov.b64 	%rd15108, {%r9900, %r9899};
	shf.r.wrap.b32 	%r9901, %r9898, %r9897, 18;
	shf.r.wrap.b32 	%r9902, %r9897, %r9898, 18;
	mov.b64 	%rd15109, {%r9902, %r9901};
	xor.b64  	%rd15110, %rd15109, %rd15108;
	shf.l.wrap.b32 	%r9903, %r9897, %r9898, 23;
	shf.l.wrap.b32 	%r9904, %r9898, %r9897, 23;
	mov.b64 	%rd15111, {%r9904, %r9903};
	xor.b64  	%rd15112, %rd15110, %rd15111;
	xor.b64  	%rd15113, %rd15072, %rd15048;
	and.b64  	%rd15114, %rd15096, %rd15113;
	xor.b64  	%rd15115, %rd15114, %rd15048;
	add.s64 	%rd15116, %rd15024, %rd21715;
	add.s64 	%rd15117, %rd15116, %rd21450;
	add.s64 	%rd15118, %rd15117, %rd15115;
	add.s64 	%rd15119, %rd15118, %rd15112;
	add.s64 	%rd15120, %rd15119, %rd15035;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9905,%dummy}, %rd15107;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9906}, %rd15107;
	}
	shf.r.wrap.b32 	%r9907, %r9906, %r9905, 28;
	shf.r.wrap.b32 	%r9908, %r9905, %r9906, 28;
	mov.b64 	%rd15121, {%r9908, %r9907};
	shf.l.wrap.b32 	%r9909, %r9905, %r9906, 30;
	shf.l.wrap.b32 	%r9910, %r9906, %r9905, 30;
	mov.b64 	%rd15122, {%r9910, %r9909};
	xor.b64  	%rd15123, %rd15122, %rd15121;
	shf.l.wrap.b32 	%r9911, %r9905, %r9906, 25;
	shf.l.wrap.b32 	%r9912, %r9906, %r9905, 25;
	mov.b64 	%rd15124, {%r9912, %r9911};
	xor.b64  	%rd15125, %rd15123, %rd15124;
	xor.b64  	%rd15126, %rd15107, %rd15059;
	xor.b64  	%rd15127, %rd15107, %rd15083;
	and.b64  	%rd15128, %rd15127, %rd15126;
	xor.b64  	%rd15129, %rd15128, %rd15107;
	add.s64 	%rd15130, %rd15119, %rd15129;
	add.s64 	%rd15131, %rd15130, %rd15125;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9913,%dummy}, %rd15120;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9914}, %rd15120;
	}
	shf.r.wrap.b32 	%r9915, %r9914, %r9913, 14;
	shf.r.wrap.b32 	%r9916, %r9913, %r9914, 14;
	mov.b64 	%rd15132, {%r9916, %r9915};
	shf.r.wrap.b32 	%r9917, %r9914, %r9913, 18;
	shf.r.wrap.b32 	%r9918, %r9913, %r9914, 18;
	mov.b64 	%rd15133, {%r9918, %r9917};
	xor.b64  	%rd15134, %rd15133, %rd15132;
	shf.l.wrap.b32 	%r9919, %r9913, %r9914, 23;
	shf.l.wrap.b32 	%r9920, %r9914, %r9913, 23;
	mov.b64 	%rd15135, {%r9920, %r9919};
	xor.b64  	%rd15136, %rd15134, %rd15135;
	xor.b64  	%rd15137, %rd15096, %rd15072;
	and.b64  	%rd15138, %rd15120, %rd15137;
	xor.b64  	%rd15139, %rd15138, %rd15072;
	add.s64 	%rd15140, %rd15048, %rd21716;
	add.s64 	%rd15141, %rd15140, %rd21449;
	add.s64 	%rd15142, %rd15141, %rd15139;
	add.s64 	%rd15143, %rd15142, %rd15136;
	add.s64 	%rd15144, %rd15143, %rd15059;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9921,%dummy}, %rd15131;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9922}, %rd15131;
	}
	shf.r.wrap.b32 	%r9923, %r9922, %r9921, 28;
	shf.r.wrap.b32 	%r9924, %r9921, %r9922, 28;
	mov.b64 	%rd15145, {%r9924, %r9923};
	shf.l.wrap.b32 	%r9925, %r9921, %r9922, 30;
	shf.l.wrap.b32 	%r9926, %r9922, %r9921, 30;
	mov.b64 	%rd15146, {%r9926, %r9925};
	xor.b64  	%rd15147, %rd15146, %rd15145;
	shf.l.wrap.b32 	%r9927, %r9921, %r9922, 25;
	shf.l.wrap.b32 	%r9928, %r9922, %r9921, 25;
	mov.b64 	%rd15148, {%r9928, %r9927};
	xor.b64  	%rd15149, %rd15147, %rd15148;
	xor.b64  	%rd15150, %rd15131, %rd15083;
	xor.b64  	%rd15151, %rd15131, %rd15107;
	and.b64  	%rd15152, %rd15151, %rd15150;
	xor.b64  	%rd15153, %rd15152, %rd15131;
	add.s64 	%rd15154, %rd15143, %rd15153;
	add.s64 	%rd15155, %rd15154, %rd15149;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9929,%dummy}, %rd15144;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9930}, %rd15144;
	}
	shf.r.wrap.b32 	%r9931, %r9930, %r9929, 14;
	shf.r.wrap.b32 	%r9932, %r9929, %r9930, 14;
	mov.b64 	%rd15156, {%r9932, %r9931};
	shf.r.wrap.b32 	%r9933, %r9930, %r9929, 18;
	shf.r.wrap.b32 	%r9934, %r9929, %r9930, 18;
	mov.b64 	%rd15157, {%r9934, %r9933};
	xor.b64  	%rd15158, %rd15157, %rd15156;
	shf.l.wrap.b32 	%r9935, %r9929, %r9930, 23;
	shf.l.wrap.b32 	%r9936, %r9930, %r9929, 23;
	mov.b64 	%rd15159, {%r9936, %r9935};
	xor.b64  	%rd15160, %rd15158, %rd15159;
	xor.b64  	%rd15161, %rd15120, %rd15096;
	and.b64  	%rd15162, %rd15144, %rd15161;
	xor.b64  	%rd15163, %rd15162, %rd15096;
	add.s64 	%rd15164, %rd15072, %rd21717;
	add.s64 	%rd15165, %rd15164, %rd21448;
	add.s64 	%rd15166, %rd15165, %rd15163;
	add.s64 	%rd15167, %rd15166, %rd15160;
	add.s64 	%rd15168, %rd15167, %rd15083;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9937,%dummy}, %rd15155;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9938}, %rd15155;
	}
	shf.r.wrap.b32 	%r9939, %r9938, %r9937, 28;
	shf.r.wrap.b32 	%r9940, %r9937, %r9938, 28;
	mov.b64 	%rd15169, {%r9940, %r9939};
	shf.l.wrap.b32 	%r9941, %r9937, %r9938, 30;
	shf.l.wrap.b32 	%r9942, %r9938, %r9937, 30;
	mov.b64 	%rd15170, {%r9942, %r9941};
	xor.b64  	%rd15171, %rd15170, %rd15169;
	shf.l.wrap.b32 	%r9943, %r9937, %r9938, 25;
	shf.l.wrap.b32 	%r9944, %r9938, %r9937, 25;
	mov.b64 	%rd15172, {%r9944, %r9943};
	xor.b64  	%rd15173, %rd15171, %rd15172;
	xor.b64  	%rd15174, %rd15155, %rd15107;
	xor.b64  	%rd15175, %rd15155, %rd15131;
	and.b64  	%rd15176, %rd15175, %rd15174;
	xor.b64  	%rd15177, %rd15176, %rd15155;
	add.s64 	%rd15178, %rd15167, %rd15177;
	add.s64 	%rd15179, %rd15178, %rd15173;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9945,%dummy}, %rd15168;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9946}, %rd15168;
	}
	shf.r.wrap.b32 	%r9947, %r9946, %r9945, 14;
	shf.r.wrap.b32 	%r9948, %r9945, %r9946, 14;
	mov.b64 	%rd15180, {%r9948, %r9947};
	shf.r.wrap.b32 	%r9949, %r9946, %r9945, 18;
	shf.r.wrap.b32 	%r9950, %r9945, %r9946, 18;
	mov.b64 	%rd15181, {%r9950, %r9949};
	xor.b64  	%rd15182, %rd15181, %rd15180;
	shf.l.wrap.b32 	%r9951, %r9945, %r9946, 23;
	shf.l.wrap.b32 	%r9952, %r9946, %r9945, 23;
	mov.b64 	%rd15183, {%r9952, %r9951};
	xor.b64  	%rd15184, %rd15182, %rd15183;
	xor.b64  	%rd15185, %rd15144, %rd15120;
	and.b64  	%rd15186, %rd15168, %rd15185;
	xor.b64  	%rd15187, %rd15186, %rd15120;
	add.s64 	%rd15188, %rd15096, %rd21718;
	add.s64 	%rd15189, %rd15188, %rd21447;
	add.s64 	%rd15190, %rd15189, %rd15187;
	add.s64 	%rd15191, %rd15190, %rd15184;
	add.s64 	%rd15192, %rd15191, %rd15107;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9953,%dummy}, %rd15179;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9954}, %rd15179;
	}
	shf.r.wrap.b32 	%r9955, %r9954, %r9953, 28;
	shf.r.wrap.b32 	%r9956, %r9953, %r9954, 28;
	mov.b64 	%rd15193, {%r9956, %r9955};
	shf.l.wrap.b32 	%r9957, %r9953, %r9954, 30;
	shf.l.wrap.b32 	%r9958, %r9954, %r9953, 30;
	mov.b64 	%rd15194, {%r9958, %r9957};
	xor.b64  	%rd15195, %rd15194, %rd15193;
	shf.l.wrap.b32 	%r9959, %r9953, %r9954, 25;
	shf.l.wrap.b32 	%r9960, %r9954, %r9953, 25;
	mov.b64 	%rd15196, {%r9960, %r9959};
	xor.b64  	%rd15197, %rd15195, %rd15196;
	xor.b64  	%rd15198, %rd15179, %rd15131;
	xor.b64  	%rd15199, %rd15179, %rd15155;
	and.b64  	%rd15200, %rd15199, %rd15198;
	xor.b64  	%rd15201, %rd15200, %rd15179;
	add.s64 	%rd15202, %rd15191, %rd15201;
	add.s64 	%rd15203, %rd15202, %rd15197;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9961,%dummy}, %rd15192;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9962}, %rd15192;
	}
	shf.r.wrap.b32 	%r9963, %r9962, %r9961, 14;
	shf.r.wrap.b32 	%r9964, %r9961, %r9962, 14;
	mov.b64 	%rd15204, {%r9964, %r9963};
	shf.r.wrap.b32 	%r9965, %r9962, %r9961, 18;
	shf.r.wrap.b32 	%r9966, %r9961, %r9962, 18;
	mov.b64 	%rd15205, {%r9966, %r9965};
	xor.b64  	%rd15206, %rd15205, %rd15204;
	shf.l.wrap.b32 	%r9967, %r9961, %r9962, 23;
	shf.l.wrap.b32 	%r9968, %r9962, %r9961, 23;
	mov.b64 	%rd15207, {%r9968, %r9967};
	xor.b64  	%rd15208, %rd15206, %rd15207;
	xor.b64  	%rd15209, %rd15168, %rd15144;
	and.b64  	%rd15210, %rd15192, %rd15209;
	xor.b64  	%rd15211, %rd15210, %rd15144;
	add.s64 	%rd15212, %rd15120, %rd21702;
	add.s64 	%rd15213, %rd15212, %rd21446;
	add.s64 	%rd15214, %rd15213, %rd15211;
	add.s64 	%rd15215, %rd15214, %rd15208;
	add.s64 	%rd15216, %rd15215, %rd15131;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9969,%dummy}, %rd15203;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9970}, %rd15203;
	}
	shf.r.wrap.b32 	%r9971, %r9970, %r9969, 28;
	shf.r.wrap.b32 	%r9972, %r9969, %r9970, 28;
	mov.b64 	%rd15217, {%r9972, %r9971};
	shf.l.wrap.b32 	%r9973, %r9969, %r9970, 30;
	shf.l.wrap.b32 	%r9974, %r9970, %r9969, 30;
	mov.b64 	%rd15218, {%r9974, %r9973};
	xor.b64  	%rd15219, %rd15218, %rd15217;
	shf.l.wrap.b32 	%r9975, %r9969, %r9970, 25;
	shf.l.wrap.b32 	%r9976, %r9970, %r9969, 25;
	mov.b64 	%rd15220, {%r9976, %r9975};
	xor.b64  	%rd15221, %rd15219, %rd15220;
	xor.b64  	%rd15222, %rd15203, %rd15155;
	xor.b64  	%rd15223, %rd15203, %rd15179;
	and.b64  	%rd15224, %rd15223, %rd15222;
	xor.b64  	%rd15225, %rd15224, %rd15203;
	add.s64 	%rd15226, %rd15215, %rd15225;
	add.s64 	%rd15227, %rd15226, %rd15221;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9977,%dummy}, %rd15216;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9978}, %rd15216;
	}
	shf.r.wrap.b32 	%r9979, %r9978, %r9977, 14;
	shf.r.wrap.b32 	%r9980, %r9977, %r9978, 14;
	mov.b64 	%rd15228, {%r9980, %r9979};
	shf.r.wrap.b32 	%r9981, %r9978, %r9977, 18;
	shf.r.wrap.b32 	%r9982, %r9977, %r9978, 18;
	mov.b64 	%rd15229, {%r9982, %r9981};
	xor.b64  	%rd15230, %rd15229, %rd15228;
	shf.l.wrap.b32 	%r9983, %r9977, %r9978, 23;
	shf.l.wrap.b32 	%r9984, %r9978, %r9977, 23;
	mov.b64 	%rd15231, {%r9984, %r9983};
	xor.b64  	%rd15232, %rd15230, %rd15231;
	xor.b64  	%rd15233, %rd15192, %rd15168;
	and.b64  	%rd15234, %rd15216, %rd15233;
	xor.b64  	%rd15235, %rd15234, %rd15168;
	add.s64 	%rd15236, %rd15144, %rd21701;
	add.s64 	%rd15237, %rd15236, %rd21445;
	add.s64 	%rd15238, %rd15237, %rd15235;
	add.s64 	%rd15239, %rd15238, %rd15232;
	add.s64 	%rd15240, %rd15239, %rd15155;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9985,%dummy}, %rd15227;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9986}, %rd15227;
	}
	shf.r.wrap.b32 	%r9987, %r9986, %r9985, 28;
	shf.r.wrap.b32 	%r9988, %r9985, %r9986, 28;
	mov.b64 	%rd15241, {%r9988, %r9987};
	shf.l.wrap.b32 	%r9989, %r9985, %r9986, 30;
	shf.l.wrap.b32 	%r9990, %r9986, %r9985, 30;
	mov.b64 	%rd15242, {%r9990, %r9989};
	xor.b64  	%rd15243, %rd15242, %rd15241;
	shf.l.wrap.b32 	%r9991, %r9985, %r9986, 25;
	shf.l.wrap.b32 	%r9992, %r9986, %r9985, 25;
	mov.b64 	%rd15244, {%r9992, %r9991};
	xor.b64  	%rd15245, %rd15243, %rd15244;
	xor.b64  	%rd15246, %rd15227, %rd15179;
	xor.b64  	%rd15247, %rd15227, %rd15203;
	and.b64  	%rd15248, %rd15247, %rd15246;
	xor.b64  	%rd15249, %rd15248, %rd15227;
	add.s64 	%rd15250, %rd15239, %rd15249;
	add.s64 	%rd15251, %rd15250, %rd15245;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r9993,%dummy}, %rd15240;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r9994}, %rd15240;
	}
	shf.r.wrap.b32 	%r9995, %r9994, %r9993, 14;
	shf.r.wrap.b32 	%r9996, %r9993, %r9994, 14;
	mov.b64 	%rd15252, {%r9996, %r9995};
	shf.r.wrap.b32 	%r9997, %r9994, %r9993, 18;
	shf.r.wrap.b32 	%r9998, %r9993, %r9994, 18;
	mov.b64 	%rd15253, {%r9998, %r9997};
	xor.b64  	%rd15254, %rd15253, %rd15252;
	shf.l.wrap.b32 	%r9999, %r9993, %r9994, 23;
	shf.l.wrap.b32 	%r10000, %r9994, %r9993, 23;
	mov.b64 	%rd15255, {%r10000, %r9999};
	xor.b64  	%rd15256, %rd15254, %rd15255;
	xor.b64  	%rd15257, %rd15216, %rd15192;
	and.b64  	%rd15258, %rd15240, %rd15257;
	xor.b64  	%rd15259, %rd15258, %rd15192;
	add.s64 	%rd15260, %rd15168, %rd21700;
	add.s64 	%rd15261, %rd15260, %rd21444;
	add.s64 	%rd15262, %rd15261, %rd15259;
	add.s64 	%rd15263, %rd15262, %rd15256;
	add.s64 	%rd15264, %rd15263, %rd15179;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10001,%dummy}, %rd15251;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10002}, %rd15251;
	}
	shf.r.wrap.b32 	%r10003, %r10002, %r10001, 28;
	shf.r.wrap.b32 	%r10004, %r10001, %r10002, 28;
	mov.b64 	%rd15265, {%r10004, %r10003};
	shf.l.wrap.b32 	%r10005, %r10001, %r10002, 30;
	shf.l.wrap.b32 	%r10006, %r10002, %r10001, 30;
	mov.b64 	%rd15266, {%r10006, %r10005};
	xor.b64  	%rd15267, %rd15266, %rd15265;
	shf.l.wrap.b32 	%r10007, %r10001, %r10002, 25;
	shf.l.wrap.b32 	%r10008, %r10002, %r10001, 25;
	mov.b64 	%rd15268, {%r10008, %r10007};
	xor.b64  	%rd15269, %rd15267, %rd15268;
	xor.b64  	%rd15270, %rd15251, %rd15203;
	xor.b64  	%rd15271, %rd15251, %rd15227;
	and.b64  	%rd15272, %rd15271, %rd15270;
	xor.b64  	%rd15273, %rd15272, %rd15251;
	add.s64 	%rd15274, %rd15263, %rd15273;
	add.s64 	%rd15275, %rd15274, %rd15269;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10009,%dummy}, %rd15264;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10010}, %rd15264;
	}
	shf.r.wrap.b32 	%r10011, %r10010, %r10009, 14;
	shf.r.wrap.b32 	%r10012, %r10009, %r10010, 14;
	mov.b64 	%rd15276, {%r10012, %r10011};
	shf.r.wrap.b32 	%r10013, %r10010, %r10009, 18;
	shf.r.wrap.b32 	%r10014, %r10009, %r10010, 18;
	mov.b64 	%rd15277, {%r10014, %r10013};
	xor.b64  	%rd15278, %rd15277, %rd15276;
	shf.l.wrap.b32 	%r10015, %r10009, %r10010, 23;
	shf.l.wrap.b32 	%r10016, %r10010, %r10009, 23;
	mov.b64 	%rd15279, {%r10016, %r10015};
	xor.b64  	%rd15280, %rd15278, %rd15279;
	xor.b64  	%rd15281, %rd15240, %rd15216;
	and.b64  	%rd15282, %rd15264, %rd15281;
	xor.b64  	%rd15283, %rd15282, %rd15216;
	add.s64 	%rd15284, %rd15192, %rd21699;
	add.s64 	%rd15285, %rd15284, %rd21443;
	add.s64 	%rd15286, %rd15285, %rd15283;
	add.s64 	%rd15287, %rd15286, %rd15280;
	add.s64 	%rd15288, %rd15287, %rd15203;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10017,%dummy}, %rd15275;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10018}, %rd15275;
	}
	shf.r.wrap.b32 	%r10019, %r10018, %r10017, 28;
	shf.r.wrap.b32 	%r10020, %r10017, %r10018, 28;
	mov.b64 	%rd15289, {%r10020, %r10019};
	shf.l.wrap.b32 	%r10021, %r10017, %r10018, 30;
	shf.l.wrap.b32 	%r10022, %r10018, %r10017, 30;
	mov.b64 	%rd15290, {%r10022, %r10021};
	xor.b64  	%rd15291, %rd15290, %rd15289;
	shf.l.wrap.b32 	%r10023, %r10017, %r10018, 25;
	shf.l.wrap.b32 	%r10024, %r10018, %r10017, 25;
	mov.b64 	%rd15292, {%r10024, %r10023};
	xor.b64  	%rd15293, %rd15291, %rd15292;
	xor.b64  	%rd15294, %rd15275, %rd15227;
	xor.b64  	%rd15295, %rd15275, %rd15251;
	and.b64  	%rd15296, %rd15295, %rd15294;
	xor.b64  	%rd15297, %rd15296, %rd15275;
	add.s64 	%rd15298, %rd15287, %rd15297;
	add.s64 	%rd15299, %rd15298, %rd15293;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10025,%dummy}, %rd15288;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10026}, %rd15288;
	}
	shf.r.wrap.b32 	%r10027, %r10026, %r10025, 14;
	shf.r.wrap.b32 	%r10028, %r10025, %r10026, 14;
	mov.b64 	%rd15300, {%r10028, %r10027};
	shf.r.wrap.b32 	%r10029, %r10026, %r10025, 18;
	shf.r.wrap.b32 	%r10030, %r10025, %r10026, 18;
	mov.b64 	%rd15301, {%r10030, %r10029};
	xor.b64  	%rd15302, %rd15301, %rd15300;
	shf.l.wrap.b32 	%r10031, %r10025, %r10026, 23;
	shf.l.wrap.b32 	%r10032, %r10026, %r10025, 23;
	mov.b64 	%rd15303, {%r10032, %r10031};
	xor.b64  	%rd15304, %rd15302, %rd15303;
	xor.b64  	%rd15305, %rd15264, %rd15240;
	and.b64  	%rd15306, %rd15288, %rd15305;
	xor.b64  	%rd15307, %rd15306, %rd15240;
	add.s64 	%rd15308, %rd15216, %rd21698;
	add.s64 	%rd15309, %rd15308, %rd21442;
	add.s64 	%rd15310, %rd15309, %rd15307;
	add.s64 	%rd15311, %rd15310, %rd15304;
	add.s64 	%rd21710, %rd15311, %rd15227;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10033,%dummy}, %rd15299;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10034}, %rd15299;
	}
	shf.r.wrap.b32 	%r10035, %r10034, %r10033, 28;
	shf.r.wrap.b32 	%r10036, %r10033, %r10034, 28;
	mov.b64 	%rd15312, {%r10036, %r10035};
	shf.l.wrap.b32 	%r10037, %r10033, %r10034, 30;
	shf.l.wrap.b32 	%r10038, %r10034, %r10033, 30;
	mov.b64 	%rd15313, {%r10038, %r10037};
	xor.b64  	%rd15314, %rd15313, %rd15312;
	shf.l.wrap.b32 	%r10039, %r10033, %r10034, 25;
	shf.l.wrap.b32 	%r10040, %r10034, %r10033, 25;
	mov.b64 	%rd15315, {%r10040, %r10039};
	xor.b64  	%rd15316, %rd15314, %rd15315;
	xor.b64  	%rd15317, %rd15299, %rd15251;
	xor.b64  	%rd15318, %rd15299, %rd15275;
	and.b64  	%rd15319, %rd15318, %rd15317;
	xor.b64  	%rd15320, %rd15319, %rd15299;
	add.s64 	%rd15321, %rd15311, %rd15320;
	add.s64 	%rd21706, %rd15321, %rd15316;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10041,%dummy}, %rd21710;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10042}, %rd21710;
	}
	shf.r.wrap.b32 	%r10043, %r10042, %r10041, 14;
	shf.r.wrap.b32 	%r10044, %r10041, %r10042, 14;
	mov.b64 	%rd15322, {%r10044, %r10043};
	shf.r.wrap.b32 	%r10045, %r10042, %r10041, 18;
	shf.r.wrap.b32 	%r10046, %r10041, %r10042, 18;
	mov.b64 	%rd15323, {%r10046, %r10045};
	xor.b64  	%rd15324, %rd15323, %rd15322;
	shf.l.wrap.b32 	%r10047, %r10041, %r10042, 23;
	shf.l.wrap.b32 	%r10048, %r10042, %r10041, 23;
	mov.b64 	%rd15325, {%r10048, %r10047};
	xor.b64  	%rd15326, %rd15324, %rd15325;
	xor.b64  	%rd15327, %rd15288, %rd15264;
	and.b64  	%rd15328, %rd21710, %rd15327;
	xor.b64  	%rd15329, %rd15328, %rd15264;
	add.s64 	%rd15330, %rd15240, %rd21697;
	add.s64 	%rd15331, %rd15330, %rd21441;
	add.s64 	%rd15332, %rd15331, %rd15329;
	add.s64 	%rd15333, %rd15332, %rd15326;
	add.s64 	%rd21709, %rd15333, %rd15251;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10049,%dummy}, %rd21706;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10050}, %rd21706;
	}
	shf.r.wrap.b32 	%r10051, %r10050, %r10049, 28;
	shf.r.wrap.b32 	%r10052, %r10049, %r10050, 28;
	mov.b64 	%rd15334, {%r10052, %r10051};
	shf.l.wrap.b32 	%r10053, %r10049, %r10050, 30;
	shf.l.wrap.b32 	%r10054, %r10050, %r10049, 30;
	mov.b64 	%rd15335, {%r10054, %r10053};
	xor.b64  	%rd15336, %rd15335, %rd15334;
	shf.l.wrap.b32 	%r10055, %r10049, %r10050, 25;
	shf.l.wrap.b32 	%r10056, %r10050, %r10049, 25;
	mov.b64 	%rd15337, {%r10056, %r10055};
	xor.b64  	%rd15338, %rd15336, %rd15337;
	xor.b64  	%rd15339, %rd21706, %rd15275;
	xor.b64  	%rd15340, %rd21706, %rd15299;
	and.b64  	%rd15341, %rd15340, %rd15339;
	xor.b64  	%rd15342, %rd15341, %rd21706;
	add.s64 	%rd15343, %rd15333, %rd15342;
	add.s64 	%rd21705, %rd15343, %rd15338;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10057,%dummy}, %rd21709;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10058}, %rd21709;
	}
	shf.r.wrap.b32 	%r10059, %r10058, %r10057, 14;
	shf.r.wrap.b32 	%r10060, %r10057, %r10058, 14;
	mov.b64 	%rd15344, {%r10060, %r10059};
	shf.r.wrap.b32 	%r10061, %r10058, %r10057, 18;
	shf.r.wrap.b32 	%r10062, %r10057, %r10058, 18;
	mov.b64 	%rd15345, {%r10062, %r10061};
	xor.b64  	%rd15346, %rd15345, %rd15344;
	shf.l.wrap.b32 	%r10063, %r10057, %r10058, 23;
	shf.l.wrap.b32 	%r10064, %r10058, %r10057, 23;
	mov.b64 	%rd15347, {%r10064, %r10063};
	xor.b64  	%rd15348, %rd15346, %rd15347;
	xor.b64  	%rd15349, %rd21710, %rd15288;
	and.b64  	%rd15350, %rd21709, %rd15349;
	xor.b64  	%rd15351, %rd15350, %rd15288;
	add.s64 	%rd15352, %rd15264, %rd21696;
	add.s64 	%rd15353, %rd15352, %rd21440;
	add.s64 	%rd15354, %rd15353, %rd15351;
	add.s64 	%rd15355, %rd15354, %rd15348;
	add.s64 	%rd21708, %rd15355, %rd15275;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10065,%dummy}, %rd21705;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10066}, %rd21705;
	}
	shf.r.wrap.b32 	%r10067, %r10066, %r10065, 28;
	shf.r.wrap.b32 	%r10068, %r10065, %r10066, 28;
	mov.b64 	%rd15356, {%r10068, %r10067};
	shf.l.wrap.b32 	%r10069, %r10065, %r10066, 30;
	shf.l.wrap.b32 	%r10070, %r10066, %r10065, 30;
	mov.b64 	%rd15357, {%r10070, %r10069};
	xor.b64  	%rd15358, %rd15357, %rd15356;
	shf.l.wrap.b32 	%r10071, %r10065, %r10066, 25;
	shf.l.wrap.b32 	%r10072, %r10066, %r10065, 25;
	mov.b64 	%rd15359, {%r10072, %r10071};
	xor.b64  	%rd15360, %rd15358, %rd15359;
	xor.b64  	%rd15361, %rd21705, %rd15299;
	xor.b64  	%rd15362, %rd21705, %rd21706;
	and.b64  	%rd15363, %rd15362, %rd15361;
	xor.b64  	%rd15364, %rd15363, %rd21705;
	add.s64 	%rd15365, %rd15355, %rd15364;
	add.s64 	%rd21704, %rd15365, %rd15360;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10073,%dummy}, %rd21708;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10074}, %rd21708;
	}
	shf.r.wrap.b32 	%r10075, %r10074, %r10073, 14;
	shf.r.wrap.b32 	%r10076, %r10073, %r10074, 14;
	mov.b64 	%rd15366, {%r10076, %r10075};
	shf.r.wrap.b32 	%r10077, %r10074, %r10073, 18;
	shf.r.wrap.b32 	%r10078, %r10073, %r10074, 18;
	mov.b64 	%rd15367, {%r10078, %r10077};
	xor.b64  	%rd15368, %rd15367, %rd15366;
	shf.l.wrap.b32 	%r10079, %r10073, %r10074, 23;
	shf.l.wrap.b32 	%r10080, %r10074, %r10073, 23;
	mov.b64 	%rd15369, {%r10080, %r10079};
	xor.b64  	%rd15370, %rd15368, %rd15369;
	xor.b64  	%rd15371, %rd21709, %rd21710;
	and.b64  	%rd15372, %rd21708, %rd15371;
	xor.b64  	%rd15373, %rd15372, %rd21710;
	add.s64 	%rd15374, %rd15288, %rd21695;
	add.s64 	%rd15375, %rd15374, %rd21439;
	add.s64 	%rd15376, %rd15375, %rd15373;
	add.s64 	%rd15377, %rd15376, %rd15370;
	add.s64 	%rd21707, %rd15377, %rd15299;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10081,%dummy}, %rd21704;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10082}, %rd21704;
	}
	shf.r.wrap.b32 	%r10083, %r10082, %r10081, 28;
	shf.r.wrap.b32 	%r10084, %r10081, %r10082, 28;
	mov.b64 	%rd15378, {%r10084, %r10083};
	shf.l.wrap.b32 	%r10085, %r10081, %r10082, 30;
	shf.l.wrap.b32 	%r10086, %r10082, %r10081, 30;
	mov.b64 	%rd15379, {%r10086, %r10085};
	xor.b64  	%rd15380, %rd15379, %rd15378;
	shf.l.wrap.b32 	%r10087, %r10081, %r10082, 25;
	shf.l.wrap.b32 	%r10088, %r10082, %r10081, 25;
	mov.b64 	%rd15381, {%r10088, %r10087};
	xor.b64  	%rd15382, %rd15380, %rd15381;
	xor.b64  	%rd15383, %rd21704, %rd21706;
	xor.b64  	%rd15384, %rd21704, %rd21705;
	and.b64  	%rd15385, %rd15384, %rd15383;
	xor.b64  	%rd15386, %rd15385, %rd21704;
	add.s64 	%rd15387, %rd15377, %rd15386;
	add.s64 	%rd21703, %rd15387, %rd15382;
	mov.u32 	%r14457, 16;

BB3_263:
	mov.u64 	%rd21336, k_sha512;
	shr.u64 	%rd15388, %rd21696, 6;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10089,%dummy}, %rd21696;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10090}, %rd21696;
	}
	shf.r.wrap.b32 	%r10091, %r10090, %r10089, 19;
	shf.r.wrap.b32 	%r10092, %r10089, %r10090, 19;
	mov.b64 	%rd15389, {%r10092, %r10091};
	xor.b64  	%rd15390, %rd15389, %rd15388;
	shf.l.wrap.b32 	%r10093, %r10089, %r10090, 3;
	shf.l.wrap.b32 	%r10094, %r10090, %r10089, 3;
	mov.b64 	%rd15391, {%r10094, %r10093};
	xor.b64  	%rd15392, %rd15390, %rd15391;
	shr.u64 	%rd15393, %rd21712, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10095,%dummy}, %rd21712;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10096}, %rd21712;
	}
	shf.r.wrap.b32 	%r10097, %r10096, %r10095, 1;
	shf.r.wrap.b32 	%r10098, %r10095, %r10096, 1;
	mov.b64 	%rd15394, {%r10098, %r10097};
	xor.b64  	%rd15395, %rd15394, %rd15393;
	shf.r.wrap.b32 	%r10099, %r10096, %r10095, 8;
	shf.r.wrap.b32 	%r10100, %r10095, %r10096, 8;
	mov.b64 	%rd15396, {%r10100, %r10099};
	xor.b64  	%rd15397, %rd15395, %rd15396;
	add.s64 	%rd15398, %rd21711, %rd21701;
	add.s64 	%rd15399, %rd15398, %rd15392;
	add.s64 	%rd21711, %rd15399, %rd15397;
	shr.u64 	%rd15400, %rd21695, 6;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10101,%dummy}, %rd21695;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10102}, %rd21695;
	}
	shf.r.wrap.b32 	%r10103, %r10102, %r10101, 19;
	shf.r.wrap.b32 	%r10104, %r10101, %r10102, 19;
	mov.b64 	%rd15401, {%r10104, %r10103};
	xor.b64  	%rd15402, %rd15401, %rd15400;
	shf.l.wrap.b32 	%r10105, %r10101, %r10102, 3;
	shf.l.wrap.b32 	%r10106, %r10102, %r10101, 3;
	mov.b64 	%rd15403, {%r10106, %r10105};
	xor.b64  	%rd15404, %rd15402, %rd15403;
	shr.u64 	%rd15405, %rd21713, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10107,%dummy}, %rd21713;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10108}, %rd21713;
	}
	shf.r.wrap.b32 	%r10109, %r10108, %r10107, 1;
	shf.r.wrap.b32 	%r10110, %r10107, %r10108, 1;
	mov.b64 	%rd15406, {%r10110, %r10109};
	xor.b64  	%rd15407, %rd15406, %rd15405;
	shf.r.wrap.b32 	%r10111, %r10108, %r10107, 8;
	shf.r.wrap.b32 	%r10112, %r10107, %r10108, 8;
	mov.b64 	%rd15408, {%r10112, %r10111};
	xor.b64  	%rd15409, %rd15407, %rd15408;
	add.s64 	%rd15410, %rd21712, %rd21700;
	add.s64 	%rd15411, %rd15410, %rd15404;
	add.s64 	%rd21712, %rd15411, %rd15409;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10113,%dummy}, %rd21711;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10114}, %rd21711;
	}
	shf.r.wrap.b32 	%r10115, %r10114, %r10113, 19;
	shf.r.wrap.b32 	%r10116, %r10113, %r10114, 19;
	mov.b64 	%rd15412, {%r10116, %r10115};
	shf.l.wrap.b32 	%r10117, %r10113, %r10114, 3;
	shf.l.wrap.b32 	%r10118, %r10114, %r10113, 3;
	mov.b64 	%rd15413, {%r10118, %r10117};
	shr.u64 	%rd15414, %rd21711, 6;
	xor.b64  	%rd15415, %rd15412, %rd15414;
	xor.b64  	%rd15416, %rd15415, %rd15413;
	shr.u64 	%rd15417, %rd21714, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10119,%dummy}, %rd21714;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10120}, %rd21714;
	}
	shf.r.wrap.b32 	%r10121, %r10120, %r10119, 1;
	shf.r.wrap.b32 	%r10122, %r10119, %r10120, 1;
	mov.b64 	%rd15418, {%r10122, %r10121};
	xor.b64  	%rd15419, %rd15418, %rd15417;
	shf.r.wrap.b32 	%r10123, %r10120, %r10119, 8;
	shf.r.wrap.b32 	%r10124, %r10119, %r10120, 8;
	mov.b64 	%rd15420, {%r10124, %r10123};
	xor.b64  	%rd15421, %rd15419, %rd15420;
	add.s64 	%rd15422, %rd21713, %rd21699;
	add.s64 	%rd15423, %rd15422, %rd15416;
	add.s64 	%rd21713, %rd15423, %rd15421;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10125,%dummy}, %rd21712;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10126}, %rd21712;
	}
	shf.r.wrap.b32 	%r10127, %r10126, %r10125, 19;
	shf.r.wrap.b32 	%r10128, %r10125, %r10126, 19;
	mov.b64 	%rd15424, {%r10128, %r10127};
	shf.l.wrap.b32 	%r10129, %r10125, %r10126, 3;
	shf.l.wrap.b32 	%r10130, %r10126, %r10125, 3;
	mov.b64 	%rd15425, {%r10130, %r10129};
	shr.u64 	%rd15426, %rd21712, 6;
	xor.b64  	%rd15427, %rd15424, %rd15426;
	xor.b64  	%rd15428, %rd15427, %rd15425;
	shr.u64 	%rd15429, %rd21715, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10131,%dummy}, %rd21715;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10132}, %rd21715;
	}
	shf.r.wrap.b32 	%r10133, %r10132, %r10131, 1;
	shf.r.wrap.b32 	%r10134, %r10131, %r10132, 1;
	mov.b64 	%rd15430, {%r10134, %r10133};
	xor.b64  	%rd15431, %rd15430, %rd15429;
	shf.r.wrap.b32 	%r10135, %r10132, %r10131, 8;
	shf.r.wrap.b32 	%r10136, %r10131, %r10132, 8;
	mov.b64 	%rd15432, {%r10136, %r10135};
	xor.b64  	%rd15433, %rd15431, %rd15432;
	add.s64 	%rd15434, %rd21714, %rd21698;
	add.s64 	%rd15435, %rd15434, %rd15428;
	add.s64 	%rd21714, %rd15435, %rd15433;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10137,%dummy}, %rd21713;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10138}, %rd21713;
	}
	shf.r.wrap.b32 	%r10139, %r10138, %r10137, 19;
	shf.r.wrap.b32 	%r10140, %r10137, %r10138, 19;
	mov.b64 	%rd15436, {%r10140, %r10139};
	shf.l.wrap.b32 	%r10141, %r10137, %r10138, 3;
	shf.l.wrap.b32 	%r10142, %r10138, %r10137, 3;
	mov.b64 	%rd15437, {%r10142, %r10141};
	shr.u64 	%rd15438, %rd21713, 6;
	xor.b64  	%rd15439, %rd15436, %rd15438;
	xor.b64  	%rd15440, %rd15439, %rd15437;
	shr.u64 	%rd15441, %rd21716, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10143,%dummy}, %rd21716;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10144}, %rd21716;
	}
	shf.r.wrap.b32 	%r10145, %r10144, %r10143, 1;
	shf.r.wrap.b32 	%r10146, %r10143, %r10144, 1;
	mov.b64 	%rd15442, {%r10146, %r10145};
	xor.b64  	%rd15443, %rd15442, %rd15441;
	shf.r.wrap.b32 	%r10147, %r10144, %r10143, 8;
	shf.r.wrap.b32 	%r10148, %r10143, %r10144, 8;
	mov.b64 	%rd15444, {%r10148, %r10147};
	xor.b64  	%rd15445, %rd15443, %rd15444;
	add.s64 	%rd15446, %rd21715, %rd21697;
	add.s64 	%rd15447, %rd15446, %rd15440;
	add.s64 	%rd21715, %rd15447, %rd15445;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10149,%dummy}, %rd21714;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10150}, %rd21714;
	}
	shf.r.wrap.b32 	%r10151, %r10150, %r10149, 19;
	shf.r.wrap.b32 	%r10152, %r10149, %r10150, 19;
	mov.b64 	%rd15448, {%r10152, %r10151};
	shf.l.wrap.b32 	%r10153, %r10149, %r10150, 3;
	shf.l.wrap.b32 	%r10154, %r10150, %r10149, 3;
	mov.b64 	%rd15449, {%r10154, %r10153};
	shr.u64 	%rd15450, %rd21714, 6;
	xor.b64  	%rd15451, %rd15448, %rd15450;
	xor.b64  	%rd15452, %rd15451, %rd15449;
	shr.u64 	%rd15453, %rd21717, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10155,%dummy}, %rd21717;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10156}, %rd21717;
	}
	shf.r.wrap.b32 	%r10157, %r10156, %r10155, 1;
	shf.r.wrap.b32 	%r10158, %r10155, %r10156, 1;
	mov.b64 	%rd15454, {%r10158, %r10157};
	xor.b64  	%rd15455, %rd15454, %rd15453;
	shf.r.wrap.b32 	%r10159, %r10156, %r10155, 8;
	shf.r.wrap.b32 	%r10160, %r10155, %r10156, 8;
	mov.b64 	%rd15456, {%r10160, %r10159};
	xor.b64  	%rd15457, %rd15455, %rd15456;
	add.s64 	%rd15458, %rd21716, %rd21696;
	add.s64 	%rd15459, %rd15458, %rd15452;
	add.s64 	%rd21716, %rd15459, %rd15457;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10161,%dummy}, %rd21715;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10162}, %rd21715;
	}
	shf.r.wrap.b32 	%r10163, %r10162, %r10161, 19;
	shf.r.wrap.b32 	%r10164, %r10161, %r10162, 19;
	mov.b64 	%rd15460, {%r10164, %r10163};
	shf.l.wrap.b32 	%r10165, %r10161, %r10162, 3;
	shf.l.wrap.b32 	%r10166, %r10162, %r10161, 3;
	mov.b64 	%rd15461, {%r10166, %r10165};
	shr.u64 	%rd15462, %rd21715, 6;
	xor.b64  	%rd15463, %rd15460, %rd15462;
	xor.b64  	%rd15464, %rd15463, %rd15461;
	shr.u64 	%rd15465, %rd21718, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10167,%dummy}, %rd21718;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10168}, %rd21718;
	}
	shf.r.wrap.b32 	%r10169, %r10168, %r10167, 1;
	shf.r.wrap.b32 	%r10170, %r10167, %r10168, 1;
	mov.b64 	%rd15466, {%r10170, %r10169};
	xor.b64  	%rd15467, %rd15466, %rd15465;
	shf.r.wrap.b32 	%r10171, %r10168, %r10167, 8;
	shf.r.wrap.b32 	%r10172, %r10167, %r10168, 8;
	mov.b64 	%rd15468, {%r10172, %r10171};
	xor.b64  	%rd15469, %rd15467, %rd15468;
	add.s64 	%rd15470, %rd21717, %rd21695;
	add.s64 	%rd15471, %rd15470, %rd15464;
	add.s64 	%rd21717, %rd15471, %rd15469;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10173,%dummy}, %rd21716;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10174}, %rd21716;
	}
	shf.r.wrap.b32 	%r10175, %r10174, %r10173, 19;
	shf.r.wrap.b32 	%r10176, %r10173, %r10174, 19;
	mov.b64 	%rd15472, {%r10176, %r10175};
	shf.l.wrap.b32 	%r10177, %r10173, %r10174, 3;
	shf.l.wrap.b32 	%r10178, %r10174, %r10173, 3;
	mov.b64 	%rd15473, {%r10178, %r10177};
	shr.u64 	%rd15474, %rd21716, 6;
	xor.b64  	%rd15475, %rd15472, %rd15474;
	xor.b64  	%rd15476, %rd15475, %rd15473;
	shr.u64 	%rd15477, %rd21702, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10179,%dummy}, %rd21702;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10180}, %rd21702;
	}
	shf.r.wrap.b32 	%r10181, %r10180, %r10179, 1;
	shf.r.wrap.b32 	%r10182, %r10179, %r10180, 1;
	mov.b64 	%rd15478, {%r10182, %r10181};
	xor.b64  	%rd15479, %rd15478, %rd15477;
	shf.r.wrap.b32 	%r10183, %r10180, %r10179, 8;
	shf.r.wrap.b32 	%r10184, %r10179, %r10180, 8;
	mov.b64 	%rd15480, {%r10184, %r10183};
	xor.b64  	%rd15481, %rd15479, %rd15480;
	add.s64 	%rd15482, %rd21711, %rd21718;
	add.s64 	%rd15483, %rd15482, %rd15476;
	add.s64 	%rd21718, %rd15483, %rd15481;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10185,%dummy}, %rd21717;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10186}, %rd21717;
	}
	shf.r.wrap.b32 	%r10187, %r10186, %r10185, 19;
	shf.r.wrap.b32 	%r10188, %r10185, %r10186, 19;
	mov.b64 	%rd15484, {%r10188, %r10187};
	shf.l.wrap.b32 	%r10189, %r10185, %r10186, 3;
	shf.l.wrap.b32 	%r10190, %r10186, %r10185, 3;
	mov.b64 	%rd15485, {%r10190, %r10189};
	shr.u64 	%rd15486, %rd21717, 6;
	xor.b64  	%rd15487, %rd15484, %rd15486;
	xor.b64  	%rd15488, %rd15487, %rd15485;
	shr.u64 	%rd15489, %rd21701, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10191,%dummy}, %rd21701;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10192}, %rd21701;
	}
	shf.r.wrap.b32 	%r10193, %r10192, %r10191, 1;
	shf.r.wrap.b32 	%r10194, %r10191, %r10192, 1;
	mov.b64 	%rd15490, {%r10194, %r10193};
	xor.b64  	%rd15491, %rd15490, %rd15489;
	shf.r.wrap.b32 	%r10195, %r10192, %r10191, 8;
	shf.r.wrap.b32 	%r10196, %r10191, %r10192, 8;
	mov.b64 	%rd15492, {%r10196, %r10195};
	xor.b64  	%rd15493, %rd15491, %rd15492;
	add.s64 	%rd15494, %rd21712, %rd21702;
	add.s64 	%rd15495, %rd15494, %rd15488;
	add.s64 	%rd21702, %rd15495, %rd15493;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10197,%dummy}, %rd21718;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10198}, %rd21718;
	}
	shf.r.wrap.b32 	%r10199, %r10198, %r10197, 19;
	shf.r.wrap.b32 	%r10200, %r10197, %r10198, 19;
	mov.b64 	%rd15496, {%r10200, %r10199};
	shf.l.wrap.b32 	%r10201, %r10197, %r10198, 3;
	shf.l.wrap.b32 	%r10202, %r10198, %r10197, 3;
	mov.b64 	%rd15497, {%r10202, %r10201};
	shr.u64 	%rd15498, %rd21718, 6;
	xor.b64  	%rd15499, %rd15496, %rd15498;
	xor.b64  	%rd15500, %rd15499, %rd15497;
	shr.u64 	%rd15501, %rd21700, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10203,%dummy}, %rd21700;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10204}, %rd21700;
	}
	shf.r.wrap.b32 	%r10205, %r10204, %r10203, 1;
	shf.r.wrap.b32 	%r10206, %r10203, %r10204, 1;
	mov.b64 	%rd15502, {%r10206, %r10205};
	xor.b64  	%rd15503, %rd15502, %rd15501;
	shf.r.wrap.b32 	%r10207, %r10204, %r10203, 8;
	shf.r.wrap.b32 	%r10208, %r10203, %r10204, 8;
	mov.b64 	%rd15504, {%r10208, %r10207};
	xor.b64  	%rd15505, %rd15503, %rd15504;
	add.s64 	%rd15506, %rd21713, %rd21701;
	add.s64 	%rd15507, %rd15506, %rd15500;
	add.s64 	%rd21701, %rd15507, %rd15505;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10209,%dummy}, %rd21702;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10210}, %rd21702;
	}
	shf.r.wrap.b32 	%r10211, %r10210, %r10209, 19;
	shf.r.wrap.b32 	%r10212, %r10209, %r10210, 19;
	mov.b64 	%rd15508, {%r10212, %r10211};
	shf.l.wrap.b32 	%r10213, %r10209, %r10210, 3;
	shf.l.wrap.b32 	%r10214, %r10210, %r10209, 3;
	mov.b64 	%rd15509, {%r10214, %r10213};
	shr.u64 	%rd15510, %rd21702, 6;
	xor.b64  	%rd15511, %rd15508, %rd15510;
	xor.b64  	%rd15512, %rd15511, %rd15509;
	shr.u64 	%rd15513, %rd21699, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10215,%dummy}, %rd21699;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10216}, %rd21699;
	}
	shf.r.wrap.b32 	%r10217, %r10216, %r10215, 1;
	shf.r.wrap.b32 	%r10218, %r10215, %r10216, 1;
	mov.b64 	%rd15514, {%r10218, %r10217};
	xor.b64  	%rd15515, %rd15514, %rd15513;
	shf.r.wrap.b32 	%r10219, %r10216, %r10215, 8;
	shf.r.wrap.b32 	%r10220, %r10215, %r10216, 8;
	mov.b64 	%rd15516, {%r10220, %r10219};
	xor.b64  	%rd15517, %rd15515, %rd15516;
	add.s64 	%rd15518, %rd21714, %rd21700;
	add.s64 	%rd15519, %rd15518, %rd15512;
	add.s64 	%rd21700, %rd15519, %rd15517;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10221,%dummy}, %rd21701;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10222}, %rd21701;
	}
	shf.r.wrap.b32 	%r10223, %r10222, %r10221, 19;
	shf.r.wrap.b32 	%r10224, %r10221, %r10222, 19;
	mov.b64 	%rd15520, {%r10224, %r10223};
	shf.l.wrap.b32 	%r10225, %r10221, %r10222, 3;
	shf.l.wrap.b32 	%r10226, %r10222, %r10221, 3;
	mov.b64 	%rd15521, {%r10226, %r10225};
	shr.u64 	%rd15522, %rd21701, 6;
	xor.b64  	%rd15523, %rd15520, %rd15522;
	xor.b64  	%rd15524, %rd15523, %rd15521;
	shr.u64 	%rd15525, %rd21698, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10227,%dummy}, %rd21698;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10228}, %rd21698;
	}
	shf.r.wrap.b32 	%r10229, %r10228, %r10227, 1;
	shf.r.wrap.b32 	%r10230, %r10227, %r10228, 1;
	mov.b64 	%rd15526, {%r10230, %r10229};
	xor.b64  	%rd15527, %rd15526, %rd15525;
	shf.r.wrap.b32 	%r10231, %r10228, %r10227, 8;
	shf.r.wrap.b32 	%r10232, %r10227, %r10228, 8;
	mov.b64 	%rd15528, {%r10232, %r10231};
	xor.b64  	%rd15529, %rd15527, %rd15528;
	add.s64 	%rd15530, %rd21715, %rd21699;
	add.s64 	%rd15531, %rd15530, %rd15524;
	add.s64 	%rd21699, %rd15531, %rd15529;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10233,%dummy}, %rd21700;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10234}, %rd21700;
	}
	shf.r.wrap.b32 	%r10235, %r10234, %r10233, 19;
	shf.r.wrap.b32 	%r10236, %r10233, %r10234, 19;
	mov.b64 	%rd15532, {%r10236, %r10235};
	shf.l.wrap.b32 	%r10237, %r10233, %r10234, 3;
	shf.l.wrap.b32 	%r10238, %r10234, %r10233, 3;
	mov.b64 	%rd15533, {%r10238, %r10237};
	shr.u64 	%rd15534, %rd21700, 6;
	xor.b64  	%rd15535, %rd15532, %rd15534;
	xor.b64  	%rd15536, %rd15535, %rd15533;
	shr.u64 	%rd15537, %rd21697, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10239,%dummy}, %rd21697;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10240}, %rd21697;
	}
	shf.r.wrap.b32 	%r10241, %r10240, %r10239, 1;
	shf.r.wrap.b32 	%r10242, %r10239, %r10240, 1;
	mov.b64 	%rd15538, {%r10242, %r10241};
	xor.b64  	%rd15539, %rd15538, %rd15537;
	shf.r.wrap.b32 	%r10243, %r10240, %r10239, 8;
	shf.r.wrap.b32 	%r10244, %r10239, %r10240, 8;
	mov.b64 	%rd15540, {%r10244, %r10243};
	xor.b64  	%rd15541, %rd15539, %rd15540;
	add.s64 	%rd15542, %rd21716, %rd21698;
	add.s64 	%rd15543, %rd15542, %rd15536;
	add.s64 	%rd21698, %rd15543, %rd15541;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10245,%dummy}, %rd21699;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10246}, %rd21699;
	}
	shf.r.wrap.b32 	%r10247, %r10246, %r10245, 19;
	shf.r.wrap.b32 	%r10248, %r10245, %r10246, 19;
	mov.b64 	%rd15544, {%r10248, %r10247};
	shf.l.wrap.b32 	%r10249, %r10245, %r10246, 3;
	shf.l.wrap.b32 	%r10250, %r10246, %r10245, 3;
	mov.b64 	%rd15545, {%r10250, %r10249};
	shr.u64 	%rd15546, %rd21699, 6;
	xor.b64  	%rd15547, %rd15544, %rd15546;
	xor.b64  	%rd15548, %rd15547, %rd15545;
	shr.u64 	%rd15549, %rd21696, 7;
	shf.r.wrap.b32 	%r10251, %r10090, %r10089, 1;
	shf.r.wrap.b32 	%r10252, %r10089, %r10090, 1;
	mov.b64 	%rd15550, {%r10252, %r10251};
	xor.b64  	%rd15551, %rd15550, %rd15549;
	shf.r.wrap.b32 	%r10253, %r10090, %r10089, 8;
	shf.r.wrap.b32 	%r10254, %r10089, %r10090, 8;
	mov.b64 	%rd15552, {%r10254, %r10253};
	xor.b64  	%rd15553, %rd15551, %rd15552;
	add.s64 	%rd15554, %rd21717, %rd21697;
	add.s64 	%rd15555, %rd15554, %rd15548;
	add.s64 	%rd21697, %rd15555, %rd15553;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10255,%dummy}, %rd21698;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10256}, %rd21698;
	}
	shf.r.wrap.b32 	%r10257, %r10256, %r10255, 19;
	shf.r.wrap.b32 	%r10258, %r10255, %r10256, 19;
	mov.b64 	%rd15556, {%r10258, %r10257};
	shf.l.wrap.b32 	%r10259, %r10255, %r10256, 3;
	shf.l.wrap.b32 	%r10260, %r10256, %r10255, 3;
	mov.b64 	%rd15557, {%r10260, %r10259};
	shr.u64 	%rd15558, %rd21698, 6;
	xor.b64  	%rd15559, %rd15556, %rd15558;
	xor.b64  	%rd15560, %rd15559, %rd15557;
	shr.u64 	%rd15561, %rd21695, 7;
	shf.r.wrap.b32 	%r10261, %r10102, %r10101, 1;
	shf.r.wrap.b32 	%r10262, %r10101, %r10102, 1;
	mov.b64 	%rd15562, {%r10262, %r10261};
	xor.b64  	%rd15563, %rd15562, %rd15561;
	shf.r.wrap.b32 	%r10263, %r10102, %r10101, 8;
	shf.r.wrap.b32 	%r10264, %r10101, %r10102, 8;
	mov.b64 	%rd15564, {%r10264, %r10263};
	xor.b64  	%rd15565, %rd15563, %rd15564;
	add.s64 	%rd15566, %rd21718, %rd21696;
	add.s64 	%rd15567, %rd15566, %rd15560;
	add.s64 	%rd21696, %rd15567, %rd15565;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10265,%dummy}, %rd21697;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10266}, %rd21697;
	}
	shf.r.wrap.b32 	%r10267, %r10266, %r10265, 19;
	shf.r.wrap.b32 	%r10268, %r10265, %r10266, 19;
	mov.b64 	%rd15568, {%r10268, %r10267};
	shf.l.wrap.b32 	%r10269, %r10265, %r10266, 3;
	shf.l.wrap.b32 	%r10270, %r10266, %r10265, 3;
	mov.b64 	%rd15569, {%r10270, %r10269};
	shr.u64 	%rd15570, %rd21697, 6;
	xor.b64  	%rd15571, %rd15568, %rd15570;
	xor.b64  	%rd15572, %rd15571, %rd15569;
	shf.r.wrap.b32 	%r10271, %r10114, %r10113, 1;
	shf.r.wrap.b32 	%r10272, %r10113, %r10114, 1;
	mov.b64 	%rd15573, {%r10272, %r10271};
	shf.r.wrap.b32 	%r10273, %r10114, %r10113, 8;
	shf.r.wrap.b32 	%r10274, %r10113, %r10114, 8;
	mov.b64 	%rd15574, {%r10274, %r10273};
	shr.u64 	%rd15575, %rd21711, 7;
	xor.b64  	%rd15576, %rd15573, %rd15575;
	xor.b64  	%rd15577, %rd15576, %rd15574;
	add.s64 	%rd15578, %rd21702, %rd21695;
	add.s64 	%rd15579, %rd15578, %rd15572;
	add.s64 	%rd21695, %rd15579, %rd15577;
	mul.wide.s32 	%rd15580, %r14457, 8;
	add.s64 	%rd15582, %rd21336, %rd15580;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10275,%dummy}, %rd21707;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10276}, %rd21707;
	}
	shf.r.wrap.b32 	%r10277, %r10276, %r10275, 18;
	shf.r.wrap.b32 	%r10278, %r10275, %r10276, 18;
	mov.b64 	%rd15583, {%r10278, %r10277};
	shf.r.wrap.b32 	%r10279, %r10276, %r10275, 14;
	shf.r.wrap.b32 	%r10280, %r10275, %r10276, 14;
	mov.b64 	%rd15584, {%r10280, %r10279};
	xor.b64  	%rd15585, %rd15583, %rd15584;
	shf.l.wrap.b32 	%r10281, %r10275, %r10276, 23;
	shf.l.wrap.b32 	%r10282, %r10276, %r10275, 23;
	mov.b64 	%rd15586, {%r10282, %r10281};
	xor.b64  	%rd15587, %rd15585, %rd15586;
	xor.b64  	%rd15588, %rd21709, %rd21708;
	and.b64  	%rd15589, %rd15588, %rd21707;
	xor.b64  	%rd15590, %rd15589, %rd21709;
	add.s64 	%rd15591, %rd15590, %rd21710;
	add.s64 	%rd15592, %rd15591, %rd21711;
	ld.const.u64 	%rd15593, [%rd15582];
	add.s64 	%rd15594, %rd15592, %rd15593;
	add.s64 	%rd15595, %rd15594, %rd15587;
	add.s64 	%rd15596, %rd15595, %rd21706;
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10283}, %rd21703;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10284,%dummy}, %rd21703;
	}
	shf.l.wrap.b32 	%r10285, %r10284, %r10283, 30;
	shf.l.wrap.b32 	%r10286, %r10283, %r10284, 30;
	mov.b64 	%rd15597, {%r10286, %r10285};
	shf.r.wrap.b32 	%r10287, %r10283, %r10284, 28;
	shf.r.wrap.b32 	%r10288, %r10284, %r10283, 28;
	mov.b64 	%rd15598, {%r10288, %r10287};
	xor.b64  	%rd15599, %rd15597, %rd15598;
	shf.l.wrap.b32 	%r10289, %r10284, %r10283, 25;
	shf.l.wrap.b32 	%r10290, %r10283, %r10284, 25;
	mov.b64 	%rd15600, {%r10290, %r10289};
	xor.b64  	%rd15601, %rd15599, %rd15600;
	xor.b64  	%rd15602, %rd21704, %rd21703;
	xor.b64  	%rd15603, %rd21705, %rd21703;
	and.b64  	%rd15604, %rd15603, %rd15602;
	xor.b64  	%rd15605, %rd15604, %rd21703;
	add.s64 	%rd15606, %rd15595, %rd15605;
	add.s64 	%rd15607, %rd15606, %rd15601;
	add.s32 	%r10291, %r14457, 1;
	mul.wide.s32 	%rd15608, %r10291, 8;
	add.s64 	%rd15609, %rd21336, %rd15608;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10292,%dummy}, %rd15596;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10293}, %rd15596;
	}
	shf.r.wrap.b32 	%r10294, %r10293, %r10292, 14;
	shf.r.wrap.b32 	%r10295, %r10292, %r10293, 14;
	mov.b64 	%rd15610, {%r10295, %r10294};
	shf.r.wrap.b32 	%r10296, %r10293, %r10292, 18;
	shf.r.wrap.b32 	%r10297, %r10292, %r10293, 18;
	mov.b64 	%rd15611, {%r10297, %r10296};
	xor.b64  	%rd15612, %rd15611, %rd15610;
	shf.l.wrap.b32 	%r10298, %r10292, %r10293, 23;
	shf.l.wrap.b32 	%r10299, %r10293, %r10292, 23;
	mov.b64 	%rd15613, {%r10299, %r10298};
	xor.b64  	%rd15614, %rd15612, %rd15613;
	xor.b64  	%rd15615, %rd21708, %rd21707;
	and.b64  	%rd15616, %rd15596, %rd15615;
	xor.b64  	%rd15617, %rd15616, %rd21708;
	add.s64 	%rd15618, %rd21712, %rd21709;
	ld.const.u64 	%rd15619, [%rd15609];
	add.s64 	%rd15620, %rd15618, %rd15619;
	add.s64 	%rd15621, %rd15620, %rd15617;
	add.s64 	%rd15622, %rd15621, %rd15614;
	add.s64 	%rd15623, %rd15622, %rd21705;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10300,%dummy}, %rd15607;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10301}, %rd15607;
	}
	shf.r.wrap.b32 	%r10302, %r10301, %r10300, 28;
	shf.r.wrap.b32 	%r10303, %r10300, %r10301, 28;
	mov.b64 	%rd15624, {%r10303, %r10302};
	shf.l.wrap.b32 	%r10304, %r10300, %r10301, 30;
	shf.l.wrap.b32 	%r10305, %r10301, %r10300, 30;
	mov.b64 	%rd15625, {%r10305, %r10304};
	xor.b64  	%rd15626, %rd15625, %rd15624;
	shf.l.wrap.b32 	%r10306, %r10300, %r10301, 25;
	shf.l.wrap.b32 	%r10307, %r10301, %r10300, 25;
	mov.b64 	%rd15627, {%r10307, %r10306};
	xor.b64  	%rd15628, %rd15626, %rd15627;
	xor.b64  	%rd15629, %rd15607, %rd21704;
	xor.b64  	%rd15630, %rd15607, %rd21703;
	and.b64  	%rd15631, %rd15630, %rd15629;
	xor.b64  	%rd15632, %rd15631, %rd15607;
	add.s64 	%rd15633, %rd15622, %rd15632;
	add.s64 	%rd15634, %rd15633, %rd15628;
	add.s32 	%r10308, %r14457, 2;
	mul.wide.s32 	%rd15635, %r10308, 8;
	add.s64 	%rd15636, %rd21336, %rd15635;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10309,%dummy}, %rd15623;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10310}, %rd15623;
	}
	shf.r.wrap.b32 	%r10311, %r10310, %r10309, 14;
	shf.r.wrap.b32 	%r10312, %r10309, %r10310, 14;
	mov.b64 	%rd15637, {%r10312, %r10311};
	shf.r.wrap.b32 	%r10313, %r10310, %r10309, 18;
	shf.r.wrap.b32 	%r10314, %r10309, %r10310, 18;
	mov.b64 	%rd15638, {%r10314, %r10313};
	xor.b64  	%rd15639, %rd15638, %rd15637;
	shf.l.wrap.b32 	%r10315, %r10309, %r10310, 23;
	shf.l.wrap.b32 	%r10316, %r10310, %r10309, 23;
	mov.b64 	%rd15640, {%r10316, %r10315};
	xor.b64  	%rd15641, %rd15639, %rd15640;
	xor.b64  	%rd15642, %rd15596, %rd21707;
	and.b64  	%rd15643, %rd15623, %rd15642;
	xor.b64  	%rd15644, %rd15643, %rd21707;
	add.s64 	%rd15645, %rd21713, %rd21708;
	ld.const.u64 	%rd15646, [%rd15636];
	add.s64 	%rd15647, %rd15645, %rd15646;
	add.s64 	%rd15648, %rd15647, %rd15644;
	add.s64 	%rd15649, %rd15648, %rd15641;
	add.s64 	%rd15650, %rd15649, %rd21704;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10317,%dummy}, %rd15634;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10318}, %rd15634;
	}
	shf.r.wrap.b32 	%r10319, %r10318, %r10317, 28;
	shf.r.wrap.b32 	%r10320, %r10317, %r10318, 28;
	mov.b64 	%rd15651, {%r10320, %r10319};
	shf.l.wrap.b32 	%r10321, %r10317, %r10318, 30;
	shf.l.wrap.b32 	%r10322, %r10318, %r10317, 30;
	mov.b64 	%rd15652, {%r10322, %r10321};
	xor.b64  	%rd15653, %rd15652, %rd15651;
	shf.l.wrap.b32 	%r10323, %r10317, %r10318, 25;
	shf.l.wrap.b32 	%r10324, %r10318, %r10317, 25;
	mov.b64 	%rd15654, {%r10324, %r10323};
	xor.b64  	%rd15655, %rd15653, %rd15654;
	xor.b64  	%rd15656, %rd15634, %rd21703;
	xor.b64  	%rd15657, %rd15634, %rd15607;
	and.b64  	%rd15658, %rd15657, %rd15656;
	xor.b64  	%rd15659, %rd15658, %rd15634;
	add.s64 	%rd15660, %rd15649, %rd15659;
	add.s64 	%rd15661, %rd15660, %rd15655;
	add.s32 	%r10325, %r14457, 3;
	mul.wide.s32 	%rd15662, %r10325, 8;
	add.s64 	%rd15663, %rd21336, %rd15662;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10326,%dummy}, %rd15650;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10327}, %rd15650;
	}
	shf.r.wrap.b32 	%r10328, %r10327, %r10326, 14;
	shf.r.wrap.b32 	%r10329, %r10326, %r10327, 14;
	mov.b64 	%rd15664, {%r10329, %r10328};
	shf.r.wrap.b32 	%r10330, %r10327, %r10326, 18;
	shf.r.wrap.b32 	%r10331, %r10326, %r10327, 18;
	mov.b64 	%rd15665, {%r10331, %r10330};
	xor.b64  	%rd15666, %rd15665, %rd15664;
	shf.l.wrap.b32 	%r10332, %r10326, %r10327, 23;
	shf.l.wrap.b32 	%r10333, %r10327, %r10326, 23;
	mov.b64 	%rd15667, {%r10333, %r10332};
	xor.b64  	%rd15668, %rd15666, %rd15667;
	xor.b64  	%rd15669, %rd15623, %rd15596;
	and.b64  	%rd15670, %rd15650, %rd15669;
	xor.b64  	%rd15671, %rd15670, %rd15596;
	add.s64 	%rd15672, %rd21714, %rd21707;
	ld.const.u64 	%rd15673, [%rd15663];
	add.s64 	%rd15674, %rd15672, %rd15673;
	add.s64 	%rd15675, %rd15674, %rd15671;
	add.s64 	%rd15676, %rd15675, %rd15668;
	add.s64 	%rd15677, %rd15676, %rd21703;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10334,%dummy}, %rd15661;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10335}, %rd15661;
	}
	shf.r.wrap.b32 	%r10336, %r10335, %r10334, 28;
	shf.r.wrap.b32 	%r10337, %r10334, %r10335, 28;
	mov.b64 	%rd15678, {%r10337, %r10336};
	shf.l.wrap.b32 	%r10338, %r10334, %r10335, 30;
	shf.l.wrap.b32 	%r10339, %r10335, %r10334, 30;
	mov.b64 	%rd15679, {%r10339, %r10338};
	xor.b64  	%rd15680, %rd15679, %rd15678;
	shf.l.wrap.b32 	%r10340, %r10334, %r10335, 25;
	shf.l.wrap.b32 	%r10341, %r10335, %r10334, 25;
	mov.b64 	%rd15681, {%r10341, %r10340};
	xor.b64  	%rd15682, %rd15680, %rd15681;
	xor.b64  	%rd15683, %rd15661, %rd15607;
	xor.b64  	%rd15684, %rd15661, %rd15634;
	and.b64  	%rd15685, %rd15684, %rd15683;
	xor.b64  	%rd15686, %rd15685, %rd15661;
	add.s64 	%rd15687, %rd15676, %rd15686;
	add.s64 	%rd15688, %rd15687, %rd15682;
	add.s32 	%r10342, %r14457, 4;
	mul.wide.s32 	%rd15689, %r10342, 8;
	add.s64 	%rd15690, %rd21336, %rd15689;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10343,%dummy}, %rd15677;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10344}, %rd15677;
	}
	shf.r.wrap.b32 	%r10345, %r10344, %r10343, 14;
	shf.r.wrap.b32 	%r10346, %r10343, %r10344, 14;
	mov.b64 	%rd15691, {%r10346, %r10345};
	shf.r.wrap.b32 	%r10347, %r10344, %r10343, 18;
	shf.r.wrap.b32 	%r10348, %r10343, %r10344, 18;
	mov.b64 	%rd15692, {%r10348, %r10347};
	xor.b64  	%rd15693, %rd15692, %rd15691;
	shf.l.wrap.b32 	%r10349, %r10343, %r10344, 23;
	shf.l.wrap.b32 	%r10350, %r10344, %r10343, 23;
	mov.b64 	%rd15694, {%r10350, %r10349};
	xor.b64  	%rd15695, %rd15693, %rd15694;
	xor.b64  	%rd15696, %rd15650, %rd15623;
	and.b64  	%rd15697, %rd15677, %rd15696;
	xor.b64  	%rd15698, %rd15697, %rd15623;
	add.s64 	%rd15699, %rd15596, %rd21715;
	ld.const.u64 	%rd15700, [%rd15690];
	add.s64 	%rd15701, %rd15699, %rd15700;
	add.s64 	%rd15702, %rd15701, %rd15698;
	add.s64 	%rd15703, %rd15702, %rd15695;
	add.s64 	%rd15704, %rd15703, %rd15607;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10351,%dummy}, %rd15688;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10352}, %rd15688;
	}
	shf.r.wrap.b32 	%r10353, %r10352, %r10351, 28;
	shf.r.wrap.b32 	%r10354, %r10351, %r10352, 28;
	mov.b64 	%rd15705, {%r10354, %r10353};
	shf.l.wrap.b32 	%r10355, %r10351, %r10352, 30;
	shf.l.wrap.b32 	%r10356, %r10352, %r10351, 30;
	mov.b64 	%rd15706, {%r10356, %r10355};
	xor.b64  	%rd15707, %rd15706, %rd15705;
	shf.l.wrap.b32 	%r10357, %r10351, %r10352, 25;
	shf.l.wrap.b32 	%r10358, %r10352, %r10351, 25;
	mov.b64 	%rd15708, {%r10358, %r10357};
	xor.b64  	%rd15709, %rd15707, %rd15708;
	xor.b64  	%rd15710, %rd15688, %rd15634;
	xor.b64  	%rd15711, %rd15688, %rd15661;
	and.b64  	%rd15712, %rd15711, %rd15710;
	xor.b64  	%rd15713, %rd15712, %rd15688;
	add.s64 	%rd15714, %rd15703, %rd15713;
	add.s64 	%rd15715, %rd15714, %rd15709;
	add.s32 	%r10359, %r14457, 5;
	mul.wide.s32 	%rd15716, %r10359, 8;
	add.s64 	%rd15717, %rd21336, %rd15716;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10360,%dummy}, %rd15704;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10361}, %rd15704;
	}
	shf.r.wrap.b32 	%r10362, %r10361, %r10360, 14;
	shf.r.wrap.b32 	%r10363, %r10360, %r10361, 14;
	mov.b64 	%rd15718, {%r10363, %r10362};
	shf.r.wrap.b32 	%r10364, %r10361, %r10360, 18;
	shf.r.wrap.b32 	%r10365, %r10360, %r10361, 18;
	mov.b64 	%rd15719, {%r10365, %r10364};
	xor.b64  	%rd15720, %rd15719, %rd15718;
	shf.l.wrap.b32 	%r10366, %r10360, %r10361, 23;
	shf.l.wrap.b32 	%r10367, %r10361, %r10360, 23;
	mov.b64 	%rd15721, {%r10367, %r10366};
	xor.b64  	%rd15722, %rd15720, %rd15721;
	xor.b64  	%rd15723, %rd15677, %rd15650;
	and.b64  	%rd15724, %rd15704, %rd15723;
	xor.b64  	%rd15725, %rd15724, %rd15650;
	add.s64 	%rd15726, %rd15623, %rd21716;
	ld.const.u64 	%rd15727, [%rd15717];
	add.s64 	%rd15728, %rd15726, %rd15727;
	add.s64 	%rd15729, %rd15728, %rd15725;
	add.s64 	%rd15730, %rd15729, %rd15722;
	add.s64 	%rd15731, %rd15730, %rd15634;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10368,%dummy}, %rd15715;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10369}, %rd15715;
	}
	shf.r.wrap.b32 	%r10370, %r10369, %r10368, 28;
	shf.r.wrap.b32 	%r10371, %r10368, %r10369, 28;
	mov.b64 	%rd15732, {%r10371, %r10370};
	shf.l.wrap.b32 	%r10372, %r10368, %r10369, 30;
	shf.l.wrap.b32 	%r10373, %r10369, %r10368, 30;
	mov.b64 	%rd15733, {%r10373, %r10372};
	xor.b64  	%rd15734, %rd15733, %rd15732;
	shf.l.wrap.b32 	%r10374, %r10368, %r10369, 25;
	shf.l.wrap.b32 	%r10375, %r10369, %r10368, 25;
	mov.b64 	%rd15735, {%r10375, %r10374};
	xor.b64  	%rd15736, %rd15734, %rd15735;
	xor.b64  	%rd15737, %rd15715, %rd15661;
	xor.b64  	%rd15738, %rd15715, %rd15688;
	and.b64  	%rd15739, %rd15738, %rd15737;
	xor.b64  	%rd15740, %rd15739, %rd15715;
	add.s64 	%rd15741, %rd15730, %rd15740;
	add.s64 	%rd15742, %rd15741, %rd15736;
	add.s32 	%r10376, %r14457, 6;
	mul.wide.s32 	%rd15743, %r10376, 8;
	add.s64 	%rd15744, %rd21336, %rd15743;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10377,%dummy}, %rd15731;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10378}, %rd15731;
	}
	shf.r.wrap.b32 	%r10379, %r10378, %r10377, 14;
	shf.r.wrap.b32 	%r10380, %r10377, %r10378, 14;
	mov.b64 	%rd15745, {%r10380, %r10379};
	shf.r.wrap.b32 	%r10381, %r10378, %r10377, 18;
	shf.r.wrap.b32 	%r10382, %r10377, %r10378, 18;
	mov.b64 	%rd15746, {%r10382, %r10381};
	xor.b64  	%rd15747, %rd15746, %rd15745;
	shf.l.wrap.b32 	%r10383, %r10377, %r10378, 23;
	shf.l.wrap.b32 	%r10384, %r10378, %r10377, 23;
	mov.b64 	%rd15748, {%r10384, %r10383};
	xor.b64  	%rd15749, %rd15747, %rd15748;
	xor.b64  	%rd15750, %rd15704, %rd15677;
	and.b64  	%rd15751, %rd15731, %rd15750;
	xor.b64  	%rd15752, %rd15751, %rd15677;
	add.s64 	%rd15753, %rd15650, %rd21717;
	ld.const.u64 	%rd15754, [%rd15744];
	add.s64 	%rd15755, %rd15753, %rd15754;
	add.s64 	%rd15756, %rd15755, %rd15752;
	add.s64 	%rd15757, %rd15756, %rd15749;
	add.s64 	%rd15758, %rd15757, %rd15661;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10385,%dummy}, %rd15742;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10386}, %rd15742;
	}
	shf.r.wrap.b32 	%r10387, %r10386, %r10385, 28;
	shf.r.wrap.b32 	%r10388, %r10385, %r10386, 28;
	mov.b64 	%rd15759, {%r10388, %r10387};
	shf.l.wrap.b32 	%r10389, %r10385, %r10386, 30;
	shf.l.wrap.b32 	%r10390, %r10386, %r10385, 30;
	mov.b64 	%rd15760, {%r10390, %r10389};
	xor.b64  	%rd15761, %rd15760, %rd15759;
	shf.l.wrap.b32 	%r10391, %r10385, %r10386, 25;
	shf.l.wrap.b32 	%r10392, %r10386, %r10385, 25;
	mov.b64 	%rd15762, {%r10392, %r10391};
	xor.b64  	%rd15763, %rd15761, %rd15762;
	xor.b64  	%rd15764, %rd15742, %rd15688;
	xor.b64  	%rd15765, %rd15742, %rd15715;
	and.b64  	%rd15766, %rd15765, %rd15764;
	xor.b64  	%rd15767, %rd15766, %rd15742;
	add.s64 	%rd15768, %rd15757, %rd15767;
	add.s64 	%rd15769, %rd15768, %rd15763;
	add.s32 	%r10393, %r14457, 7;
	mul.wide.s32 	%rd15770, %r10393, 8;
	add.s64 	%rd15771, %rd21336, %rd15770;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10394,%dummy}, %rd15758;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10395}, %rd15758;
	}
	shf.r.wrap.b32 	%r10396, %r10395, %r10394, 14;
	shf.r.wrap.b32 	%r10397, %r10394, %r10395, 14;
	mov.b64 	%rd15772, {%r10397, %r10396};
	shf.r.wrap.b32 	%r10398, %r10395, %r10394, 18;
	shf.r.wrap.b32 	%r10399, %r10394, %r10395, 18;
	mov.b64 	%rd15773, {%r10399, %r10398};
	xor.b64  	%rd15774, %rd15773, %rd15772;
	shf.l.wrap.b32 	%r10400, %r10394, %r10395, 23;
	shf.l.wrap.b32 	%r10401, %r10395, %r10394, 23;
	mov.b64 	%rd15775, {%r10401, %r10400};
	xor.b64  	%rd15776, %rd15774, %rd15775;
	xor.b64  	%rd15777, %rd15731, %rd15704;
	and.b64  	%rd15778, %rd15758, %rd15777;
	xor.b64  	%rd15779, %rd15778, %rd15704;
	add.s64 	%rd15780, %rd15677, %rd21718;
	ld.const.u64 	%rd15781, [%rd15771];
	add.s64 	%rd15782, %rd15780, %rd15781;
	add.s64 	%rd15783, %rd15782, %rd15779;
	add.s64 	%rd15784, %rd15783, %rd15776;
	add.s64 	%rd15785, %rd15784, %rd15688;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10402,%dummy}, %rd15769;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10403}, %rd15769;
	}
	shf.r.wrap.b32 	%r10404, %r10403, %r10402, 28;
	shf.r.wrap.b32 	%r10405, %r10402, %r10403, 28;
	mov.b64 	%rd15786, {%r10405, %r10404};
	shf.l.wrap.b32 	%r10406, %r10402, %r10403, 30;
	shf.l.wrap.b32 	%r10407, %r10403, %r10402, 30;
	mov.b64 	%rd15787, {%r10407, %r10406};
	xor.b64  	%rd15788, %rd15787, %rd15786;
	shf.l.wrap.b32 	%r10408, %r10402, %r10403, 25;
	shf.l.wrap.b32 	%r10409, %r10403, %r10402, 25;
	mov.b64 	%rd15789, {%r10409, %r10408};
	xor.b64  	%rd15790, %rd15788, %rd15789;
	xor.b64  	%rd15791, %rd15769, %rd15715;
	xor.b64  	%rd15792, %rd15769, %rd15742;
	and.b64  	%rd15793, %rd15792, %rd15791;
	xor.b64  	%rd15794, %rd15793, %rd15769;
	add.s64 	%rd15795, %rd15784, %rd15794;
	add.s64 	%rd15796, %rd15795, %rd15790;
	add.s32 	%r10410, %r14457, 8;
	mul.wide.s32 	%rd15797, %r10410, 8;
	add.s64 	%rd15798, %rd21336, %rd15797;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10411,%dummy}, %rd15785;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10412}, %rd15785;
	}
	shf.r.wrap.b32 	%r10413, %r10412, %r10411, 14;
	shf.r.wrap.b32 	%r10414, %r10411, %r10412, 14;
	mov.b64 	%rd15799, {%r10414, %r10413};
	shf.r.wrap.b32 	%r10415, %r10412, %r10411, 18;
	shf.r.wrap.b32 	%r10416, %r10411, %r10412, 18;
	mov.b64 	%rd15800, {%r10416, %r10415};
	xor.b64  	%rd15801, %rd15800, %rd15799;
	shf.l.wrap.b32 	%r10417, %r10411, %r10412, 23;
	shf.l.wrap.b32 	%r10418, %r10412, %r10411, 23;
	mov.b64 	%rd15802, {%r10418, %r10417};
	xor.b64  	%rd15803, %rd15801, %rd15802;
	xor.b64  	%rd15804, %rd15758, %rd15731;
	and.b64  	%rd15805, %rd15785, %rd15804;
	xor.b64  	%rd15806, %rd15805, %rd15731;
	add.s64 	%rd15807, %rd15704, %rd21702;
	ld.const.u64 	%rd15808, [%rd15798];
	add.s64 	%rd15809, %rd15807, %rd15808;
	add.s64 	%rd15810, %rd15809, %rd15806;
	add.s64 	%rd15811, %rd15810, %rd15803;
	add.s64 	%rd15812, %rd15811, %rd15715;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10419,%dummy}, %rd15796;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10420}, %rd15796;
	}
	shf.r.wrap.b32 	%r10421, %r10420, %r10419, 28;
	shf.r.wrap.b32 	%r10422, %r10419, %r10420, 28;
	mov.b64 	%rd15813, {%r10422, %r10421};
	shf.l.wrap.b32 	%r10423, %r10419, %r10420, 30;
	shf.l.wrap.b32 	%r10424, %r10420, %r10419, 30;
	mov.b64 	%rd15814, {%r10424, %r10423};
	xor.b64  	%rd15815, %rd15814, %rd15813;
	shf.l.wrap.b32 	%r10425, %r10419, %r10420, 25;
	shf.l.wrap.b32 	%r10426, %r10420, %r10419, 25;
	mov.b64 	%rd15816, {%r10426, %r10425};
	xor.b64  	%rd15817, %rd15815, %rd15816;
	xor.b64  	%rd15818, %rd15796, %rd15742;
	xor.b64  	%rd15819, %rd15796, %rd15769;
	and.b64  	%rd15820, %rd15819, %rd15818;
	xor.b64  	%rd15821, %rd15820, %rd15796;
	add.s64 	%rd15822, %rd15811, %rd15821;
	add.s64 	%rd15823, %rd15822, %rd15817;
	add.s32 	%r10427, %r14457, 9;
	mul.wide.s32 	%rd15824, %r10427, 8;
	add.s64 	%rd15825, %rd21336, %rd15824;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10428,%dummy}, %rd15812;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10429}, %rd15812;
	}
	shf.r.wrap.b32 	%r10430, %r10429, %r10428, 14;
	shf.r.wrap.b32 	%r10431, %r10428, %r10429, 14;
	mov.b64 	%rd15826, {%r10431, %r10430};
	shf.r.wrap.b32 	%r10432, %r10429, %r10428, 18;
	shf.r.wrap.b32 	%r10433, %r10428, %r10429, 18;
	mov.b64 	%rd15827, {%r10433, %r10432};
	xor.b64  	%rd15828, %rd15827, %rd15826;
	shf.l.wrap.b32 	%r10434, %r10428, %r10429, 23;
	shf.l.wrap.b32 	%r10435, %r10429, %r10428, 23;
	mov.b64 	%rd15829, {%r10435, %r10434};
	xor.b64  	%rd15830, %rd15828, %rd15829;
	xor.b64  	%rd15831, %rd15785, %rd15758;
	and.b64  	%rd15832, %rd15812, %rd15831;
	xor.b64  	%rd15833, %rd15832, %rd15758;
	add.s64 	%rd15834, %rd15731, %rd21701;
	ld.const.u64 	%rd15835, [%rd15825];
	add.s64 	%rd15836, %rd15834, %rd15835;
	add.s64 	%rd15837, %rd15836, %rd15833;
	add.s64 	%rd15838, %rd15837, %rd15830;
	add.s64 	%rd15839, %rd15838, %rd15742;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10436,%dummy}, %rd15823;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10437}, %rd15823;
	}
	shf.r.wrap.b32 	%r10438, %r10437, %r10436, 28;
	shf.r.wrap.b32 	%r10439, %r10436, %r10437, 28;
	mov.b64 	%rd15840, {%r10439, %r10438};
	shf.l.wrap.b32 	%r10440, %r10436, %r10437, 30;
	shf.l.wrap.b32 	%r10441, %r10437, %r10436, 30;
	mov.b64 	%rd15841, {%r10441, %r10440};
	xor.b64  	%rd15842, %rd15841, %rd15840;
	shf.l.wrap.b32 	%r10442, %r10436, %r10437, 25;
	shf.l.wrap.b32 	%r10443, %r10437, %r10436, 25;
	mov.b64 	%rd15843, {%r10443, %r10442};
	xor.b64  	%rd15844, %rd15842, %rd15843;
	xor.b64  	%rd15845, %rd15823, %rd15769;
	xor.b64  	%rd15846, %rd15823, %rd15796;
	and.b64  	%rd15847, %rd15846, %rd15845;
	xor.b64  	%rd15848, %rd15847, %rd15823;
	add.s64 	%rd15849, %rd15838, %rd15848;
	add.s64 	%rd15850, %rd15849, %rd15844;
	add.s32 	%r10444, %r14457, 10;
	mul.wide.s32 	%rd15851, %r10444, 8;
	add.s64 	%rd15852, %rd21336, %rd15851;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10445,%dummy}, %rd15839;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10446}, %rd15839;
	}
	shf.r.wrap.b32 	%r10447, %r10446, %r10445, 14;
	shf.r.wrap.b32 	%r10448, %r10445, %r10446, 14;
	mov.b64 	%rd15853, {%r10448, %r10447};
	shf.r.wrap.b32 	%r10449, %r10446, %r10445, 18;
	shf.r.wrap.b32 	%r10450, %r10445, %r10446, 18;
	mov.b64 	%rd15854, {%r10450, %r10449};
	xor.b64  	%rd15855, %rd15854, %rd15853;
	shf.l.wrap.b32 	%r10451, %r10445, %r10446, 23;
	shf.l.wrap.b32 	%r10452, %r10446, %r10445, 23;
	mov.b64 	%rd15856, {%r10452, %r10451};
	xor.b64  	%rd15857, %rd15855, %rd15856;
	xor.b64  	%rd15858, %rd15812, %rd15785;
	and.b64  	%rd15859, %rd15839, %rd15858;
	xor.b64  	%rd15860, %rd15859, %rd15785;
	add.s64 	%rd15861, %rd15758, %rd21700;
	ld.const.u64 	%rd15862, [%rd15852];
	add.s64 	%rd15863, %rd15861, %rd15862;
	add.s64 	%rd15864, %rd15863, %rd15860;
	add.s64 	%rd15865, %rd15864, %rd15857;
	add.s64 	%rd15866, %rd15865, %rd15769;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10453,%dummy}, %rd15850;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10454}, %rd15850;
	}
	shf.r.wrap.b32 	%r10455, %r10454, %r10453, 28;
	shf.r.wrap.b32 	%r10456, %r10453, %r10454, 28;
	mov.b64 	%rd15867, {%r10456, %r10455};
	shf.l.wrap.b32 	%r10457, %r10453, %r10454, 30;
	shf.l.wrap.b32 	%r10458, %r10454, %r10453, 30;
	mov.b64 	%rd15868, {%r10458, %r10457};
	xor.b64  	%rd15869, %rd15868, %rd15867;
	shf.l.wrap.b32 	%r10459, %r10453, %r10454, 25;
	shf.l.wrap.b32 	%r10460, %r10454, %r10453, 25;
	mov.b64 	%rd15870, {%r10460, %r10459};
	xor.b64  	%rd15871, %rd15869, %rd15870;
	xor.b64  	%rd15872, %rd15850, %rd15796;
	xor.b64  	%rd15873, %rd15850, %rd15823;
	and.b64  	%rd15874, %rd15873, %rd15872;
	xor.b64  	%rd15875, %rd15874, %rd15850;
	add.s64 	%rd15876, %rd15865, %rd15875;
	add.s64 	%rd15877, %rd15876, %rd15871;
	add.s32 	%r10461, %r14457, 11;
	mul.wide.s32 	%rd15878, %r10461, 8;
	add.s64 	%rd15879, %rd21336, %rd15878;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10462,%dummy}, %rd15866;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10463}, %rd15866;
	}
	shf.r.wrap.b32 	%r10464, %r10463, %r10462, 14;
	shf.r.wrap.b32 	%r10465, %r10462, %r10463, 14;
	mov.b64 	%rd15880, {%r10465, %r10464};
	shf.r.wrap.b32 	%r10466, %r10463, %r10462, 18;
	shf.r.wrap.b32 	%r10467, %r10462, %r10463, 18;
	mov.b64 	%rd15881, {%r10467, %r10466};
	xor.b64  	%rd15882, %rd15881, %rd15880;
	shf.l.wrap.b32 	%r10468, %r10462, %r10463, 23;
	shf.l.wrap.b32 	%r10469, %r10463, %r10462, 23;
	mov.b64 	%rd15883, {%r10469, %r10468};
	xor.b64  	%rd15884, %rd15882, %rd15883;
	xor.b64  	%rd15885, %rd15839, %rd15812;
	and.b64  	%rd15886, %rd15866, %rd15885;
	xor.b64  	%rd15887, %rd15886, %rd15812;
	add.s64 	%rd15888, %rd15785, %rd21699;
	ld.const.u64 	%rd15889, [%rd15879];
	add.s64 	%rd15890, %rd15888, %rd15889;
	add.s64 	%rd15891, %rd15890, %rd15887;
	add.s64 	%rd15892, %rd15891, %rd15884;
	add.s64 	%rd15893, %rd15892, %rd15796;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10470,%dummy}, %rd15877;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10471}, %rd15877;
	}
	shf.r.wrap.b32 	%r10472, %r10471, %r10470, 28;
	shf.r.wrap.b32 	%r10473, %r10470, %r10471, 28;
	mov.b64 	%rd15894, {%r10473, %r10472};
	shf.l.wrap.b32 	%r10474, %r10470, %r10471, 30;
	shf.l.wrap.b32 	%r10475, %r10471, %r10470, 30;
	mov.b64 	%rd15895, {%r10475, %r10474};
	xor.b64  	%rd15896, %rd15895, %rd15894;
	shf.l.wrap.b32 	%r10476, %r10470, %r10471, 25;
	shf.l.wrap.b32 	%r10477, %r10471, %r10470, 25;
	mov.b64 	%rd15897, {%r10477, %r10476};
	xor.b64  	%rd15898, %rd15896, %rd15897;
	xor.b64  	%rd15899, %rd15877, %rd15823;
	xor.b64  	%rd15900, %rd15877, %rd15850;
	and.b64  	%rd15901, %rd15900, %rd15899;
	xor.b64  	%rd15902, %rd15901, %rd15877;
	add.s64 	%rd15903, %rd15892, %rd15902;
	add.s64 	%rd15904, %rd15903, %rd15898;
	add.s32 	%r10478, %r14457, 12;
	mul.wide.s32 	%rd15905, %r10478, 8;
	add.s64 	%rd15906, %rd21336, %rd15905;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10479,%dummy}, %rd15893;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10480}, %rd15893;
	}
	shf.r.wrap.b32 	%r10481, %r10480, %r10479, 14;
	shf.r.wrap.b32 	%r10482, %r10479, %r10480, 14;
	mov.b64 	%rd15907, {%r10482, %r10481};
	shf.r.wrap.b32 	%r10483, %r10480, %r10479, 18;
	shf.r.wrap.b32 	%r10484, %r10479, %r10480, 18;
	mov.b64 	%rd15908, {%r10484, %r10483};
	xor.b64  	%rd15909, %rd15908, %rd15907;
	shf.l.wrap.b32 	%r10485, %r10479, %r10480, 23;
	shf.l.wrap.b32 	%r10486, %r10480, %r10479, 23;
	mov.b64 	%rd15910, {%r10486, %r10485};
	xor.b64  	%rd15911, %rd15909, %rd15910;
	xor.b64  	%rd15912, %rd15866, %rd15839;
	and.b64  	%rd15913, %rd15893, %rd15912;
	xor.b64  	%rd15914, %rd15913, %rd15839;
	add.s64 	%rd15915, %rd15812, %rd21698;
	ld.const.u64 	%rd15916, [%rd15906];
	add.s64 	%rd15917, %rd15915, %rd15916;
	add.s64 	%rd15918, %rd15917, %rd15914;
	add.s64 	%rd15919, %rd15918, %rd15911;
	add.s64 	%rd21710, %rd15919, %rd15823;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10487,%dummy}, %rd15904;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10488}, %rd15904;
	}
	shf.r.wrap.b32 	%r10489, %r10488, %r10487, 28;
	shf.r.wrap.b32 	%r10490, %r10487, %r10488, 28;
	mov.b64 	%rd15920, {%r10490, %r10489};
	shf.l.wrap.b32 	%r10491, %r10487, %r10488, 30;
	shf.l.wrap.b32 	%r10492, %r10488, %r10487, 30;
	mov.b64 	%rd15921, {%r10492, %r10491};
	xor.b64  	%rd15922, %rd15921, %rd15920;
	shf.l.wrap.b32 	%r10493, %r10487, %r10488, 25;
	shf.l.wrap.b32 	%r10494, %r10488, %r10487, 25;
	mov.b64 	%rd15923, {%r10494, %r10493};
	xor.b64  	%rd15924, %rd15922, %rd15923;
	xor.b64  	%rd15925, %rd15904, %rd15850;
	xor.b64  	%rd15926, %rd15904, %rd15877;
	and.b64  	%rd15927, %rd15926, %rd15925;
	xor.b64  	%rd15928, %rd15927, %rd15904;
	add.s64 	%rd15929, %rd15919, %rd15928;
	add.s64 	%rd21706, %rd15929, %rd15924;
	add.s32 	%r10495, %r14457, 13;
	mul.wide.s32 	%rd15930, %r10495, 8;
	add.s64 	%rd15931, %rd21336, %rd15930;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10496,%dummy}, %rd21710;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10497}, %rd21710;
	}
	shf.r.wrap.b32 	%r10498, %r10497, %r10496, 14;
	shf.r.wrap.b32 	%r10499, %r10496, %r10497, 14;
	mov.b64 	%rd15932, {%r10499, %r10498};
	shf.r.wrap.b32 	%r10500, %r10497, %r10496, 18;
	shf.r.wrap.b32 	%r10501, %r10496, %r10497, 18;
	mov.b64 	%rd15933, {%r10501, %r10500};
	xor.b64  	%rd15934, %rd15933, %rd15932;
	shf.l.wrap.b32 	%r10502, %r10496, %r10497, 23;
	shf.l.wrap.b32 	%r10503, %r10497, %r10496, 23;
	mov.b64 	%rd15935, {%r10503, %r10502};
	xor.b64  	%rd15936, %rd15934, %rd15935;
	xor.b64  	%rd15937, %rd15893, %rd15866;
	and.b64  	%rd15938, %rd21710, %rd15937;
	xor.b64  	%rd15939, %rd15938, %rd15866;
	add.s64 	%rd15940, %rd15839, %rd21697;
	ld.const.u64 	%rd15941, [%rd15931];
	add.s64 	%rd15942, %rd15940, %rd15941;
	add.s64 	%rd15943, %rd15942, %rd15939;
	add.s64 	%rd15944, %rd15943, %rd15936;
	add.s64 	%rd21709, %rd15944, %rd15850;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10504,%dummy}, %rd21706;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10505}, %rd21706;
	}
	shf.r.wrap.b32 	%r10506, %r10505, %r10504, 28;
	shf.r.wrap.b32 	%r10507, %r10504, %r10505, 28;
	mov.b64 	%rd15945, {%r10507, %r10506};
	shf.l.wrap.b32 	%r10508, %r10504, %r10505, 30;
	shf.l.wrap.b32 	%r10509, %r10505, %r10504, 30;
	mov.b64 	%rd15946, {%r10509, %r10508};
	xor.b64  	%rd15947, %rd15946, %rd15945;
	shf.l.wrap.b32 	%r10510, %r10504, %r10505, 25;
	shf.l.wrap.b32 	%r10511, %r10505, %r10504, 25;
	mov.b64 	%rd15948, {%r10511, %r10510};
	xor.b64  	%rd15949, %rd15947, %rd15948;
	xor.b64  	%rd15950, %rd21706, %rd15877;
	xor.b64  	%rd15951, %rd21706, %rd15904;
	and.b64  	%rd15952, %rd15951, %rd15950;
	xor.b64  	%rd15953, %rd15952, %rd21706;
	add.s64 	%rd15954, %rd15944, %rd15953;
	add.s64 	%rd21705, %rd15954, %rd15949;
	add.s32 	%r10512, %r14457, 14;
	mul.wide.s32 	%rd15955, %r10512, 8;
	add.s64 	%rd15956, %rd21336, %rd15955;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10513,%dummy}, %rd21709;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10514}, %rd21709;
	}
	shf.r.wrap.b32 	%r10515, %r10514, %r10513, 14;
	shf.r.wrap.b32 	%r10516, %r10513, %r10514, 14;
	mov.b64 	%rd15957, {%r10516, %r10515};
	shf.r.wrap.b32 	%r10517, %r10514, %r10513, 18;
	shf.r.wrap.b32 	%r10518, %r10513, %r10514, 18;
	mov.b64 	%rd15958, {%r10518, %r10517};
	xor.b64  	%rd15959, %rd15958, %rd15957;
	shf.l.wrap.b32 	%r10519, %r10513, %r10514, 23;
	shf.l.wrap.b32 	%r10520, %r10514, %r10513, 23;
	mov.b64 	%rd15960, {%r10520, %r10519};
	xor.b64  	%rd15961, %rd15959, %rd15960;
	xor.b64  	%rd15962, %rd21710, %rd15893;
	and.b64  	%rd15963, %rd21709, %rd15962;
	xor.b64  	%rd15964, %rd15963, %rd15893;
	add.s64 	%rd15965, %rd15866, %rd21696;
	ld.const.u64 	%rd15966, [%rd15956];
	add.s64 	%rd15967, %rd15965, %rd15966;
	add.s64 	%rd15968, %rd15967, %rd15964;
	add.s64 	%rd15969, %rd15968, %rd15961;
	add.s64 	%rd21708, %rd15969, %rd15877;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10521,%dummy}, %rd21705;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10522}, %rd21705;
	}
	shf.r.wrap.b32 	%r10523, %r10522, %r10521, 28;
	shf.r.wrap.b32 	%r10524, %r10521, %r10522, 28;
	mov.b64 	%rd15970, {%r10524, %r10523};
	shf.l.wrap.b32 	%r10525, %r10521, %r10522, 30;
	shf.l.wrap.b32 	%r10526, %r10522, %r10521, 30;
	mov.b64 	%rd15971, {%r10526, %r10525};
	xor.b64  	%rd15972, %rd15971, %rd15970;
	shf.l.wrap.b32 	%r10527, %r10521, %r10522, 25;
	shf.l.wrap.b32 	%r10528, %r10522, %r10521, 25;
	mov.b64 	%rd15973, {%r10528, %r10527};
	xor.b64  	%rd15974, %rd15972, %rd15973;
	xor.b64  	%rd15975, %rd21705, %rd15904;
	xor.b64  	%rd15976, %rd21705, %rd21706;
	and.b64  	%rd15977, %rd15976, %rd15975;
	xor.b64  	%rd15978, %rd15977, %rd21705;
	add.s64 	%rd15979, %rd15969, %rd15978;
	add.s64 	%rd21704, %rd15979, %rd15974;
	add.s32 	%r10529, %r14457, 15;
	mul.wide.s32 	%rd15980, %r10529, 8;
	add.s64 	%rd15981, %rd21336, %rd15980;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10530,%dummy}, %rd21708;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10531}, %rd21708;
	}
	shf.r.wrap.b32 	%r10532, %r10531, %r10530, 14;
	shf.r.wrap.b32 	%r10533, %r10530, %r10531, 14;
	mov.b64 	%rd15982, {%r10533, %r10532};
	shf.r.wrap.b32 	%r10534, %r10531, %r10530, 18;
	shf.r.wrap.b32 	%r10535, %r10530, %r10531, 18;
	mov.b64 	%rd15983, {%r10535, %r10534};
	xor.b64  	%rd15984, %rd15983, %rd15982;
	shf.l.wrap.b32 	%r10536, %r10530, %r10531, 23;
	shf.l.wrap.b32 	%r10537, %r10531, %r10530, 23;
	mov.b64 	%rd15985, {%r10537, %r10536};
	xor.b64  	%rd15986, %rd15984, %rd15985;
	xor.b64  	%rd15987, %rd21709, %rd21710;
	and.b64  	%rd15988, %rd21708, %rd15987;
	xor.b64  	%rd15989, %rd15988, %rd21710;
	add.s64 	%rd15990, %rd15893, %rd21695;
	ld.const.u64 	%rd15991, [%rd15981];
	add.s64 	%rd15992, %rd15990, %rd15991;
	add.s64 	%rd15993, %rd15992, %rd15989;
	add.s64 	%rd15994, %rd15993, %rd15986;
	add.s64 	%rd21707, %rd15994, %rd15904;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10538,%dummy}, %rd21704;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10539}, %rd21704;
	}
	shf.r.wrap.b32 	%r10540, %r10539, %r10538, 28;
	shf.r.wrap.b32 	%r10541, %r10538, %r10539, 28;
	mov.b64 	%rd15995, {%r10541, %r10540};
	shf.l.wrap.b32 	%r10542, %r10538, %r10539, 30;
	shf.l.wrap.b32 	%r10543, %r10539, %r10538, 30;
	mov.b64 	%rd15996, {%r10543, %r10542};
	xor.b64  	%rd15997, %rd15996, %rd15995;
	shf.l.wrap.b32 	%r10544, %r10538, %r10539, 25;
	shf.l.wrap.b32 	%r10545, %r10539, %r10538, 25;
	mov.b64 	%rd15998, {%r10545, %r10544};
	xor.b64  	%rd15999, %rd15997, %rd15998;
	xor.b64  	%rd16000, %rd21704, %rd21706;
	xor.b64  	%rd16001, %rd21704, %rd21705;
	and.b64  	%rd16002, %rd16001, %rd16000;
	xor.b64  	%rd16003, %rd16002, %rd21704;
	add.s64 	%rd16004, %rd15994, %rd16003;
	add.s64 	%rd21703, %rd16004, %rd15999;
	add.s32 	%r14457, %r14457, 16;
	setp.lt.s32	%p166, %r14457, 80;
	@%p166 bra 	BB3_263;

	add.s64 	%rd16005, %rd21703, %rd1228;
	st.local.u64 	[%rd1], %rd16005;
	add.s64 	%rd16006, %rd21704, %rd1230;
	st.local.u64 	[%rd1+8], %rd16006;
	add.s64 	%rd16007, %rd21705, %rd1229;
	st.local.u64 	[%rd1+16], %rd16007;
	add.s64 	%rd16008, %rd21706, %rd1227;
	st.local.u64 	[%rd1+24], %rd16008;
	add.s64 	%rd16009, %rd21707, %rd1223;
	st.local.u64 	[%rd1+32], %rd16009;
	add.s64 	%rd16010, %rd21708, %rd1225;
	st.local.u64 	[%rd1+40], %rd16010;
	add.s64 	%rd16011, %rd21709, %rd1224;
	st.local.u64 	[%rd1+48], %rd16011;
	add.s64 	%rd16012, %rd21710, %rd1226;
	st.local.u64 	[%rd1+56], %rd16012;
	sub.s32 	%r375, %r2, %r355;
	setp.lt.s32	%p167, %r375, 1;
	@%p167 bra 	BB3_282;

	add.s32 	%r376, %r354, -128;
	and.b32  	%r377, %r376, 3;
	setp.eq.s32	%p168, %r377, 0;
	mov.u32 	%r14461, 0;
	@%p168 bra 	BB3_271;

	setp.eq.s32	%p169, %r377, 1;
	mov.u32 	%r14459, 0;
	@%p169 bra 	BB3_270;

	setp.eq.s32	%p170, %r377, 2;
	mov.u32 	%r14458, 0;
	@%p170 bra 	BB3_269;

	xor.b32  	%r10550, %r355, 7;
	cvt.u64.u32	%rd16013, %r10550;
	add.s64 	%rd16014, %rd1204, %rd16013;
	ld.local.u8 	%rs261, [%rd16014];
	st.local.u8 	[%rd1206], %rs261;
	mov.u32 	%r14458, 1;

BB3_269:
	add.s32 	%r10551, %r14458, %r355;
	xor.b32  	%r10552, %r10551, 7;
	cvt.s64.s32	%rd16015, %r10552;
	add.s64 	%rd16016, %rd1204, %rd16015;
	ld.local.u8 	%rs262, [%rd16016];
	xor.b32  	%r10553, %r14458, 7;
	cvt.u64.u32	%rd16017, %r10553;
	add.s64 	%rd16018, %rd179, %rd16017;
	st.local.u8 	[%rd16018], %rs262;
	add.s32 	%r14459, %r14458, 1;

BB3_270:
	add.s32 	%r10554, %r14459, %r355;
	xor.b32  	%r10555, %r10554, 7;
	cvt.s64.s32	%rd16019, %r10555;
	add.s64 	%rd16020, %rd1204, %rd16019;
	ld.local.u8 	%rs263, [%rd16020];
	xor.b32  	%r10556, %r14459, 7;
	cvt.s64.s32	%rd16021, %r10556;
	add.s64 	%rd16022, %rd179, %rd16021;
	st.local.u8 	[%rd16022], %rs263;
	add.s32 	%r14461, %r14459, 1;

BB3_271:
	setp.lt.u32	%p171, %r376, 4;
	@%p171 bra 	BB3_282;

BB3_272:
	add.s32 	%r10557, %r14461, %r355;
	xor.b32  	%r10558, %r10557, 7;
	cvt.s64.s32	%rd16023, %r10558;
	add.s64 	%rd16024, %rd1204, %rd16023;
	ld.local.u8 	%rs264, [%rd16024];
	xor.b32  	%r10559, %r14461, 7;
	cvt.s64.s32	%rd16025, %r10559;
	add.s64 	%rd16026, %rd179, %rd16025;
	st.local.u8 	[%rd16026], %rs264;
	add.s32 	%r10560, %r14461, 1;
	add.s32 	%r10561, %r10560, %r355;
	xor.b32  	%r10562, %r10561, 7;
	cvt.s64.s32	%rd16027, %r10562;
	add.s64 	%rd16028, %rd1204, %rd16027;
	ld.local.u8 	%rs265, [%rd16028];
	xor.b32  	%r10563, %r10560, 7;
	cvt.s64.s32	%rd16029, %r10563;
	add.s64 	%rd16030, %rd179, %rd16029;
	st.local.u8 	[%rd16030], %rs265;
	add.s32 	%r10564, %r14461, 2;
	add.s32 	%r10565, %r10564, %r355;
	xor.b32  	%r10566, %r10565, 7;
	cvt.s64.s32	%rd16031, %r10566;
	add.s64 	%rd16032, %rd1204, %rd16031;
	ld.local.u8 	%rs266, [%rd16032];
	xor.b32  	%r10567, %r10564, 7;
	cvt.s64.s32	%rd16033, %r10567;
	add.s64 	%rd16034, %rd179, %rd16033;
	st.local.u8 	[%rd16034], %rs266;
	add.s32 	%r10568, %r14461, 3;
	add.s32 	%r10569, %r10568, %r355;
	xor.b32  	%r10570, %r10569, 7;
	cvt.s64.s32	%rd16035, %r10570;
	add.s64 	%rd16036, %rd1204, %rd16035;
	ld.local.u8 	%rs267, [%rd16036];
	xor.b32  	%r10571, %r10568, 7;
	cvt.s64.s32	%rd16037, %r10571;
	add.s64 	%rd16038, %rd179, %rd16037;
	st.local.u8 	[%rd16038], %rs267;
	add.s32 	%r14461, %r14461, 4;
	setp.lt.s32	%p172, %r14461, %r375;
	@%p172 bra 	BB3_272;

BB3_282:
	add.s32 	%r14448, %r14448, 1;
	setp.lt.u32	%p179, %r14448, %r2;
	ld.local.u32 	%r14447, [%rd1+192];
	and.b32  	%r351, %r14447, 127;
	@%p179 bra 	BB3_252;

BB3_283:
	sub.s32 	%r404, %r2861, %r351;
	and.b32  	%r405, %r404, 3;
	setp.eq.s32	%p180, %r405, 0;
	mov.u32 	%r411, %r351;
	@%p180 bra 	BB3_289;

	setp.eq.s32	%p181, %r405, 1;
	mov.u32 	%r14472, %r351;
	@%p181 bra 	BB3_288;

	setp.eq.s32	%p182, %r405, 2;
	mov.u32 	%r14471, %r351;
	@%p182 bra 	BB3_287;

	xor.b32  	%r10596, %r351, 7;
	cvt.u64.u32	%rd16065, %r10596;
	add.s64 	%rd16066, %rd179, %rd16065;
	mov.u16 	%rs275, 0;
	st.local.u8 	[%rd16066], %rs275;
	add.s32 	%r14471, %r351, 1;

BB3_287:
	xor.b32  	%r10597, %r14471, 7;
	cvt.s64.s32	%rd16067, %r10597;
	add.s64 	%rd16068, %rd179, %rd16067;
	mov.u16 	%rs276, 0;
	st.local.u8 	[%rd16068], %rs276;
	add.s32 	%r14472, %r14471, 1;

BB3_288:
	xor.b32  	%r10598, %r14472, 7;
	cvt.s64.s32	%rd16069, %r10598;
	add.s64 	%rd16070, %rd179, %rd16069;
	mov.u16 	%rs277, 0;
	st.local.u8 	[%rd16070], %rs277;
	add.s32 	%r411, %r14472, 1;

BB3_289:
	setp.lt.u32	%p183, %r404, 4;
	@%p183 bra 	BB3_299;

	add.s32 	%r412, %r411, 4;
	setp.gt.s32	%p184, %r412, 128;
	add.s32 	%r413, %r411, 3;
	selp.b32	%r10599, %r413, 127, %p184;
	sub.s32 	%r10600, %r10599, %r411;
	shr.u32 	%r10601, %r10600, 2;
	add.s32 	%r414, %r10601, 1;
	and.b32  	%r415, %r414, 3;
	setp.eq.s32	%p185, %r415, 0;
	@%p185 bra 	BB3_297;

	setp.eq.s32	%p186, %r415, 1;
	@%p186 bra 	BB3_296;

	setp.eq.s32	%p187, %r415, 2;
	@%p187 bra 	BB3_293;
	bra.uni 	BB3_294;

BB3_293:
	mov.u32 	%r412, %r411;
	bra.uni 	BB3_295;

BB3_294:
	xor.b32  	%r10602, %r411, 7;
	cvt.s64.s32	%rd16071, %r10602;
	add.s64 	%rd16072, %rd179, %rd16071;
	mov.u16 	%rs278, 0;
	st.local.u8 	[%rd16072], %rs278;
	add.s32 	%r10603, %r411, 1;
	xor.b32  	%r10604, %r10603, 7;
	cvt.s64.s32	%rd16073, %r10604;
	add.s64 	%rd16074, %rd179, %rd16073;
	st.local.u8 	[%rd16074], %rs278;
	add.s32 	%r10605, %r411, 2;
	xor.b32  	%r10606, %r10605, 7;
	cvt.s64.s32	%rd16075, %r10606;
	add.s64 	%rd16076, %rd179, %rd16075;
	st.local.u8 	[%rd16076], %rs278;
	xor.b32  	%r10607, %r413, 7;
	cvt.s64.s32	%rd16077, %r10607;
	add.s64 	%rd16078, %rd179, %rd16077;
	st.local.u8 	[%rd16078], %rs278;

BB3_295:
	xor.b32  	%r10608, %r412, 7;
	cvt.s64.s32	%rd16079, %r10608;
	add.s64 	%rd16080, %rd179, %rd16079;
	mov.u16 	%rs279, 0;
	st.local.u8 	[%rd16080], %rs279;
	add.s32 	%r10609, %r412, 1;
	xor.b32  	%r10610, %r10609, 7;
	cvt.s64.s32	%rd16081, %r10610;
	add.s64 	%rd16082, %rd179, %rd16081;
	st.local.u8 	[%rd16082], %rs279;
	add.s32 	%r10611, %r412, 2;
	xor.b32  	%r10612, %r10611, 7;
	cvt.s64.s32	%rd16083, %r10612;
	add.s64 	%rd16084, %rd179, %rd16083;
	st.local.u8 	[%rd16084], %rs279;
	add.s32 	%r10613, %r412, 3;
	xor.b32  	%r10614, %r10613, 7;
	cvt.s64.s32	%rd16085, %r10614;
	add.s64 	%rd16086, %rd179, %rd16085;
	st.local.u8 	[%rd16086], %rs279;
	add.s32 	%r411, %r412, 4;

BB3_296:
	xor.b32  	%r10615, %r411, 7;
	cvt.s64.s32	%rd16087, %r10615;
	add.s64 	%rd16088, %rd179, %rd16087;
	mov.u16 	%rs280, 0;
	st.local.u8 	[%rd16088], %rs280;
	add.s32 	%r10616, %r411, 1;
	xor.b32  	%r10617, %r10616, 7;
	cvt.s64.s32	%rd16089, %r10617;
	add.s64 	%rd16090, %rd179, %rd16089;
	st.local.u8 	[%rd16090], %rs280;
	add.s32 	%r10618, %r411, 2;
	xor.b32  	%r10619, %r10618, 7;
	cvt.s64.s32	%rd16091, %r10619;
	add.s64 	%rd16092, %rd179, %rd16091;
	st.local.u8 	[%rd16092], %rs280;
	add.s32 	%r10620, %r411, 3;
	xor.b32  	%r10621, %r10620, 7;
	cvt.s64.s32	%rd16093, %r10621;
	add.s64 	%rd16094, %rd179, %rd16093;
	st.local.u8 	[%rd16094], %rs280;
	add.s32 	%r411, %r411, 4;

BB3_297:
	setp.lt.u32	%p188, %r414, 4;
	@%p188 bra 	BB3_299;

BB3_298:
	xor.b32  	%r10622, %r411, 7;
	cvt.s64.s32	%rd16095, %r10622;
	add.s64 	%rd16096, %rd179, %rd16095;
	mov.u16 	%rs281, 0;
	st.local.u8 	[%rd16096], %rs281;
	add.s32 	%r10623, %r411, 1;
	xor.b32  	%r10624, %r10623, 7;
	cvt.s64.s32	%rd16097, %r10624;
	add.s64 	%rd16098, %rd179, %rd16097;
	st.local.u8 	[%rd16098], %rs281;
	add.s32 	%r10625, %r411, 2;
	xor.b32  	%r10626, %r10625, 7;
	cvt.s64.s32	%rd16099, %r10626;
	add.s64 	%rd16100, %rd179, %rd16099;
	st.local.u8 	[%rd16100], %rs281;
	add.s32 	%r10627, %r411, 3;
	xor.b32  	%r10628, %r10627, 7;
	cvt.s64.s32	%rd16101, %r10628;
	add.s64 	%rd16102, %rd179, %rd16101;
	st.local.u8 	[%rd16102], %rs281;
	add.s32 	%r10629, %r411, 4;
	xor.b32  	%r10630, %r10629, 7;
	cvt.s64.s32	%rd16103, %r10630;
	add.s64 	%rd16104, %rd179, %rd16103;
	st.local.u8 	[%rd16104], %rs281;
	add.s32 	%r10631, %r411, 5;
	xor.b32  	%r10632, %r10631, 7;
	cvt.s64.s32	%rd16105, %r10632;
	add.s64 	%rd16106, %rd179, %rd16105;
	st.local.u8 	[%rd16106], %rs281;
	add.s32 	%r10633, %r411, 6;
	xor.b32  	%r10634, %r10633, 7;
	cvt.s64.s32	%rd16107, %r10634;
	add.s64 	%rd16108, %rd179, %rd16107;
	st.local.u8 	[%rd16108], %rs281;
	add.s32 	%r10635, %r411, 7;
	xor.b32  	%r10636, %r10635, 7;
	cvt.s64.s32	%rd16109, %r10636;
	add.s64 	%rd16110, %rd179, %rd16109;
	st.local.u8 	[%rd16110], %rs281;
	add.s32 	%r10637, %r411, 8;
	xor.b32  	%r10638, %r10637, 7;
	cvt.s64.s32	%rd16111, %r10638;
	add.s64 	%rd16112, %rd179, %rd16111;
	st.local.u8 	[%rd16112], %rs281;
	add.s32 	%r10639, %r411, 9;
	xor.b32  	%r10640, %r10639, 7;
	cvt.s64.s32	%rd16113, %r10640;
	add.s64 	%rd16114, %rd179, %rd16113;
	st.local.u8 	[%rd16114], %rs281;
	add.s32 	%r10641, %r411, 10;
	xor.b32  	%r10642, %r10641, 7;
	cvt.s64.s32	%rd16115, %r10642;
	add.s64 	%rd16116, %rd179, %rd16115;
	st.local.u8 	[%rd16116], %rs281;
	add.s32 	%r10643, %r411, 11;
	xor.b32  	%r10644, %r10643, 7;
	cvt.s64.s32	%rd16117, %r10644;
	add.s64 	%rd16118, %rd179, %rd16117;
	st.local.u8 	[%rd16118], %rs281;
	add.s32 	%r10645, %r411, 12;
	xor.b32  	%r10646, %r10645, 7;
	cvt.s64.s32	%rd16119, %r10646;
	add.s64 	%rd16120, %rd179, %rd16119;
	st.local.u8 	[%rd16120], %rs281;
	add.s32 	%r10647, %r411, 13;
	xor.b32  	%r10648, %r10647, 7;
	cvt.s64.s32	%rd16121, %r10648;
	add.s64 	%rd16122, %rd179, %rd16121;
	st.local.u8 	[%rd16122], %rs281;
	add.s32 	%r10649, %r411, 14;
	xor.b32  	%r10650, %r10649, 7;
	cvt.s64.s32	%rd16123, %r10650;
	add.s64 	%rd16124, %rd179, %rd16123;
	st.local.u8 	[%rd16124], %rs281;
	add.s32 	%r10651, %r411, 15;
	xor.b32  	%r10652, %r10651, 7;
	cvt.s64.s32	%rd16125, %r10652;
	add.s64 	%rd16126, %rd179, %rd16125;
	st.local.u8 	[%rd16126], %rs281;
	add.s32 	%r411, %r411, 16;
	setp.lt.s32	%p189, %r411, 128;
	@%p189 bra 	BB3_298;

BB3_299:
	mov.u16 	%rs310, 128;
	xor.b32  	%r10653, %r351, 7;
	cvt.u64.u32	%rd16127, %r10653;
	add.s64 	%rd16128, %rd179, %rd16127;
	st.local.u8 	[%rd16128], %rs310;
	ld.local.u64 	%rd21765, [%rd1+64];
	setp.gt.u32	%p190, %r351, 111;
	@%p190 bra 	BB3_301;
	bra.uni 	BB3_300;

BB3_301:
	shr.u64 	%rd16129, %rd21765, 32;
	ld.local.u64 	%rd16130, [%rd1+72];
	shr.u64 	%rd16131, %rd16130, 32;
	ld.local.u64 	%rd16132, [%rd1+80];
	shr.u64 	%rd16133, %rd16132, 32;
	ld.local.u64 	%rd16134, [%rd1+88];
	shr.u64 	%rd16135, %rd16134, 32;
	ld.local.u64 	%rd16136, [%rd1+96];
	shr.u64 	%rd16137, %rd16136, 32;
	ld.local.u64 	%rd16138, [%rd1+104];
	shr.u64 	%rd16139, %rd16138, 32;
	ld.local.u64 	%rd16140, [%rd1+112];
	shr.u64 	%rd16141, %rd16140, 32;
	ld.local.u64 	%rd16142, [%rd1+120];
	shr.u64 	%rd16143, %rd16142, 32;
	ld.local.u64 	%rd16144, [%rd1+128];
	shr.u64 	%rd16145, %rd16144, 32;
	ld.local.u64 	%rd16146, [%rd1+136];
	shr.u64 	%rd16147, %rd16146, 32;
	ld.local.u64 	%rd16148, [%rd1+144];
	shr.u64 	%rd16149, %rd16148, 32;
	ld.local.u64 	%rd16150, [%rd1+152];
	shr.u64 	%rd16151, %rd16150, 32;
	ld.local.u64 	%rd16152, [%rd1+160];
	shr.u64 	%rd16153, %rd16152, 32;
	ld.local.u64 	%rd16154, [%rd1+168];
	shr.u64 	%rd16155, %rd16154, 32;
	ld.local.u64 	%rd16156, [%rd1+176];
	shr.u64 	%rd16157, %rd16156, 32;
	ld.local.u64 	%rd16158, [%rd1+184];
	shr.u64 	%rd16159, %rd16158, 32;
	bfi.b64 	%rd21735, %rd16129, %rd21765, 32, 32;
	bfi.b64 	%rd21736, %rd16131, %rd16130, 32, 32;
	bfi.b64 	%rd21737, %rd16133, %rd16132, 32, 32;
	bfi.b64 	%rd21738, %rd16135, %rd16134, 32, 32;
	bfi.b64 	%rd21739, %rd16137, %rd16136, 32, 32;
	bfi.b64 	%rd21740, %rd16139, %rd16138, 32, 32;
	bfi.b64 	%rd21741, %rd16141, %rd16140, 32, 32;
	bfi.b64 	%rd21742, %rd16143, %rd16142, 32, 32;
	bfi.b64 	%rd21726, %rd16145, %rd16144, 32, 32;
	bfi.b64 	%rd21725, %rd16147, %rd16146, 32, 32;
	bfi.b64 	%rd21724, %rd16149, %rd16148, 32, 32;
	bfi.b64 	%rd21723, %rd16151, %rd16150, 32, 32;
	bfi.b64 	%rd21722, %rd16153, %rd16152, 32, 32;
	bfi.b64 	%rd21721, %rd16155, %rd16154, 32, 32;
	bfi.b64 	%rd21720, %rd16157, %rd16156, 32, 32;
	bfi.b64 	%rd21719, %rd16159, %rd16158, 32, 32;
	ld.local.u64 	%rd1326, [%rd1+32];
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10655,%dummy}, %rd1326;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10656}, %rd1326;
	}
	shf.r.wrap.b32 	%r10657, %r10656, %r10655, 14;
	shf.r.wrap.b32 	%r10658, %r10655, %r10656, 14;
	mov.b64 	%rd16160, {%r10658, %r10657};
	shf.r.wrap.b32 	%r10659, %r10656, %r10655, 18;
	shf.r.wrap.b32 	%r10660, %r10655, %r10656, 18;
	mov.b64 	%rd16161, {%r10660, %r10659};
	xor.b64  	%rd16162, %rd16161, %rd16160;
	shf.l.wrap.b32 	%r10661, %r10655, %r10656, 23;
	shf.l.wrap.b32 	%r10662, %r10656, %r10655, 23;
	mov.b64 	%rd16163, {%r10662, %r10661};
	xor.b64  	%rd16164, %rd16162, %rd16163;
	ld.local.u64 	%rd1327, [%rd1+48];
	ld.local.u64 	%rd1328, [%rd1+40];
	xor.b64  	%rd16165, %rd1327, %rd1328;
	and.b64  	%rd16166, %rd16165, %rd1326;
	xor.b64  	%rd16167, %rd16166, %rd1327;
	ld.local.u64 	%rd1329, [%rd1+56];
	add.s64 	%rd16168, %rd1329, %rd21735;
	add.s64 	%rd16169, %rd16168, %rd21454;
	add.s64 	%rd16170, %rd16169, %rd16167;
	add.s64 	%rd16171, %rd16170, %rd16164;
	ld.local.u64 	%rd1330, [%rd1+24];
	add.s64 	%rd16172, %rd16171, %rd1330;
	ld.local.u64 	%rd1331, [%rd1];
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10663,%dummy}, %rd1331;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10664}, %rd1331;
	}
	shf.r.wrap.b32 	%r10665, %r10664, %r10663, 28;
	shf.r.wrap.b32 	%r10666, %r10663, %r10664, 28;
	mov.b64 	%rd16173, {%r10666, %r10665};
	shf.l.wrap.b32 	%r10667, %r10663, %r10664, 30;
	shf.l.wrap.b32 	%r10668, %r10664, %r10663, 30;
	mov.b64 	%rd16174, {%r10668, %r10667};
	xor.b64  	%rd16175, %rd16174, %rd16173;
	shf.l.wrap.b32 	%r10669, %r10663, %r10664, 25;
	shf.l.wrap.b32 	%r10670, %r10664, %r10663, 25;
	mov.b64 	%rd16176, {%r10670, %r10669};
	xor.b64  	%rd16177, %rd16175, %rd16176;
	ld.local.u64 	%rd1332, [%rd1+16];
	xor.b64  	%rd16178, %rd1332, %rd1331;
	ld.local.u64 	%rd1333, [%rd1+8];
	xor.b64  	%rd16179, %rd1333, %rd1331;
	and.b64  	%rd16180, %rd16178, %rd16179;
	xor.b64  	%rd16181, %rd16180, %rd1331;
	add.s64 	%rd16182, %rd16171, %rd16181;
	add.s64 	%rd16183, %rd16182, %rd16177;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10671,%dummy}, %rd16172;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10672}, %rd16172;
	}
	shf.r.wrap.b32 	%r10673, %r10672, %r10671, 14;
	shf.r.wrap.b32 	%r10674, %r10671, %r10672, 14;
	mov.b64 	%rd16184, {%r10674, %r10673};
	shf.r.wrap.b32 	%r10675, %r10672, %r10671, 18;
	shf.r.wrap.b32 	%r10676, %r10671, %r10672, 18;
	mov.b64 	%rd16185, {%r10676, %r10675};
	xor.b64  	%rd16186, %rd16185, %rd16184;
	shf.l.wrap.b32 	%r10677, %r10671, %r10672, 23;
	shf.l.wrap.b32 	%r10678, %r10672, %r10671, 23;
	mov.b64 	%rd16187, {%r10678, %r10677};
	xor.b64  	%rd16188, %rd16186, %rd16187;
	xor.b64  	%rd16189, %rd1328, %rd1326;
	and.b64  	%rd16190, %rd16172, %rd16189;
	xor.b64  	%rd16191, %rd16190, %rd1328;
	add.s64 	%rd16192, %rd1327, %rd21736;
	add.s64 	%rd16193, %rd16192, %rd21453;
	add.s64 	%rd16194, %rd16193, %rd16191;
	add.s64 	%rd16195, %rd16194, %rd16188;
	add.s64 	%rd16196, %rd16195, %rd1332;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10679,%dummy}, %rd16183;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10680}, %rd16183;
	}
	shf.r.wrap.b32 	%r10681, %r10680, %r10679, 28;
	shf.r.wrap.b32 	%r10682, %r10679, %r10680, 28;
	mov.b64 	%rd16197, {%r10682, %r10681};
	shf.l.wrap.b32 	%r10683, %r10679, %r10680, 30;
	shf.l.wrap.b32 	%r10684, %r10680, %r10679, 30;
	mov.b64 	%rd16198, {%r10684, %r10683};
	xor.b64  	%rd16199, %rd16198, %rd16197;
	shf.l.wrap.b32 	%r10685, %r10679, %r10680, 25;
	shf.l.wrap.b32 	%r10686, %r10680, %r10679, 25;
	mov.b64 	%rd16200, {%r10686, %r10685};
	xor.b64  	%rd16201, %rd16199, %rd16200;
	xor.b64  	%rd16202, %rd16183, %rd1333;
	xor.b64  	%rd16203, %rd16183, %rd1331;
	and.b64  	%rd16204, %rd16203, %rd16202;
	xor.b64  	%rd16205, %rd16204, %rd16183;
	add.s64 	%rd16206, %rd16195, %rd16205;
	add.s64 	%rd16207, %rd16206, %rd16201;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10687,%dummy}, %rd16196;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10688}, %rd16196;
	}
	shf.r.wrap.b32 	%r10689, %r10688, %r10687, 14;
	shf.r.wrap.b32 	%r10690, %r10687, %r10688, 14;
	mov.b64 	%rd16208, {%r10690, %r10689};
	shf.r.wrap.b32 	%r10691, %r10688, %r10687, 18;
	shf.r.wrap.b32 	%r10692, %r10687, %r10688, 18;
	mov.b64 	%rd16209, {%r10692, %r10691};
	xor.b64  	%rd16210, %rd16209, %rd16208;
	shf.l.wrap.b32 	%r10693, %r10687, %r10688, 23;
	shf.l.wrap.b32 	%r10694, %r10688, %r10687, 23;
	mov.b64 	%rd16211, {%r10694, %r10693};
	xor.b64  	%rd16212, %rd16210, %rd16211;
	xor.b64  	%rd16213, %rd16172, %rd1326;
	and.b64  	%rd16214, %rd16196, %rd16213;
	xor.b64  	%rd16215, %rd16214, %rd1326;
	add.s64 	%rd16216, %rd1328, %rd21737;
	add.s64 	%rd16217, %rd16216, %rd21452;
	add.s64 	%rd16218, %rd16217, %rd16215;
	add.s64 	%rd16219, %rd16218, %rd16212;
	add.s64 	%rd16220, %rd16219, %rd1333;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10695,%dummy}, %rd16207;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10696}, %rd16207;
	}
	shf.r.wrap.b32 	%r10697, %r10696, %r10695, 28;
	shf.r.wrap.b32 	%r10698, %r10695, %r10696, 28;
	mov.b64 	%rd16221, {%r10698, %r10697};
	shf.l.wrap.b32 	%r10699, %r10695, %r10696, 30;
	shf.l.wrap.b32 	%r10700, %r10696, %r10695, 30;
	mov.b64 	%rd16222, {%r10700, %r10699};
	xor.b64  	%rd16223, %rd16222, %rd16221;
	shf.l.wrap.b32 	%r10701, %r10695, %r10696, 25;
	shf.l.wrap.b32 	%r10702, %r10696, %r10695, 25;
	mov.b64 	%rd16224, {%r10702, %r10701};
	xor.b64  	%rd16225, %rd16223, %rd16224;
	xor.b64  	%rd16226, %rd16207, %rd1331;
	xor.b64  	%rd16227, %rd16207, %rd16183;
	and.b64  	%rd16228, %rd16227, %rd16226;
	xor.b64  	%rd16229, %rd16228, %rd16207;
	add.s64 	%rd16230, %rd16219, %rd16229;
	add.s64 	%rd16231, %rd16230, %rd16225;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10703,%dummy}, %rd16220;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10704}, %rd16220;
	}
	shf.r.wrap.b32 	%r10705, %r10704, %r10703, 14;
	shf.r.wrap.b32 	%r10706, %r10703, %r10704, 14;
	mov.b64 	%rd16232, {%r10706, %r10705};
	shf.r.wrap.b32 	%r10707, %r10704, %r10703, 18;
	shf.r.wrap.b32 	%r10708, %r10703, %r10704, 18;
	mov.b64 	%rd16233, {%r10708, %r10707};
	xor.b64  	%rd16234, %rd16233, %rd16232;
	shf.l.wrap.b32 	%r10709, %r10703, %r10704, 23;
	shf.l.wrap.b32 	%r10710, %r10704, %r10703, 23;
	mov.b64 	%rd16235, {%r10710, %r10709};
	xor.b64  	%rd16236, %rd16234, %rd16235;
	xor.b64  	%rd16237, %rd16196, %rd16172;
	and.b64  	%rd16238, %rd16220, %rd16237;
	xor.b64  	%rd16239, %rd16238, %rd16172;
	add.s64 	%rd16240, %rd1326, %rd21738;
	add.s64 	%rd16241, %rd16240, %rd21451;
	add.s64 	%rd16242, %rd16241, %rd16239;
	add.s64 	%rd16243, %rd16242, %rd16236;
	add.s64 	%rd16244, %rd16243, %rd1331;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10711,%dummy}, %rd16231;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10712}, %rd16231;
	}
	shf.r.wrap.b32 	%r10713, %r10712, %r10711, 28;
	shf.r.wrap.b32 	%r10714, %r10711, %r10712, 28;
	mov.b64 	%rd16245, {%r10714, %r10713};
	shf.l.wrap.b32 	%r10715, %r10711, %r10712, 30;
	shf.l.wrap.b32 	%r10716, %r10712, %r10711, 30;
	mov.b64 	%rd16246, {%r10716, %r10715};
	xor.b64  	%rd16247, %rd16246, %rd16245;
	shf.l.wrap.b32 	%r10717, %r10711, %r10712, 25;
	shf.l.wrap.b32 	%r10718, %r10712, %r10711, 25;
	mov.b64 	%rd16248, {%r10718, %r10717};
	xor.b64  	%rd16249, %rd16247, %rd16248;
	xor.b64  	%rd16250, %rd16231, %rd16183;
	xor.b64  	%rd16251, %rd16231, %rd16207;
	and.b64  	%rd16252, %rd16251, %rd16250;
	xor.b64  	%rd16253, %rd16252, %rd16231;
	add.s64 	%rd16254, %rd16243, %rd16253;
	add.s64 	%rd16255, %rd16254, %rd16249;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10719,%dummy}, %rd16244;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10720}, %rd16244;
	}
	shf.r.wrap.b32 	%r10721, %r10720, %r10719, 14;
	shf.r.wrap.b32 	%r10722, %r10719, %r10720, 14;
	mov.b64 	%rd16256, {%r10722, %r10721};
	shf.r.wrap.b32 	%r10723, %r10720, %r10719, 18;
	shf.r.wrap.b32 	%r10724, %r10719, %r10720, 18;
	mov.b64 	%rd16257, {%r10724, %r10723};
	xor.b64  	%rd16258, %rd16257, %rd16256;
	shf.l.wrap.b32 	%r10725, %r10719, %r10720, 23;
	shf.l.wrap.b32 	%r10726, %r10720, %r10719, 23;
	mov.b64 	%rd16259, {%r10726, %r10725};
	xor.b64  	%rd16260, %rd16258, %rd16259;
	xor.b64  	%rd16261, %rd16220, %rd16196;
	and.b64  	%rd16262, %rd16244, %rd16261;
	xor.b64  	%rd16263, %rd16262, %rd16196;
	add.s64 	%rd16264, %rd16172, %rd21739;
	add.s64 	%rd16265, %rd16264, %rd21450;
	add.s64 	%rd16266, %rd16265, %rd16263;
	add.s64 	%rd16267, %rd16266, %rd16260;
	add.s64 	%rd16268, %rd16267, %rd16183;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10727,%dummy}, %rd16255;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10728}, %rd16255;
	}
	shf.r.wrap.b32 	%r10729, %r10728, %r10727, 28;
	shf.r.wrap.b32 	%r10730, %r10727, %r10728, 28;
	mov.b64 	%rd16269, {%r10730, %r10729};
	shf.l.wrap.b32 	%r10731, %r10727, %r10728, 30;
	shf.l.wrap.b32 	%r10732, %r10728, %r10727, 30;
	mov.b64 	%rd16270, {%r10732, %r10731};
	xor.b64  	%rd16271, %rd16270, %rd16269;
	shf.l.wrap.b32 	%r10733, %r10727, %r10728, 25;
	shf.l.wrap.b32 	%r10734, %r10728, %r10727, 25;
	mov.b64 	%rd16272, {%r10734, %r10733};
	xor.b64  	%rd16273, %rd16271, %rd16272;
	xor.b64  	%rd16274, %rd16255, %rd16207;
	xor.b64  	%rd16275, %rd16255, %rd16231;
	and.b64  	%rd16276, %rd16275, %rd16274;
	xor.b64  	%rd16277, %rd16276, %rd16255;
	add.s64 	%rd16278, %rd16267, %rd16277;
	add.s64 	%rd16279, %rd16278, %rd16273;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10735,%dummy}, %rd16268;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10736}, %rd16268;
	}
	shf.r.wrap.b32 	%r10737, %r10736, %r10735, 14;
	shf.r.wrap.b32 	%r10738, %r10735, %r10736, 14;
	mov.b64 	%rd16280, {%r10738, %r10737};
	shf.r.wrap.b32 	%r10739, %r10736, %r10735, 18;
	shf.r.wrap.b32 	%r10740, %r10735, %r10736, 18;
	mov.b64 	%rd16281, {%r10740, %r10739};
	xor.b64  	%rd16282, %rd16281, %rd16280;
	shf.l.wrap.b32 	%r10741, %r10735, %r10736, 23;
	shf.l.wrap.b32 	%r10742, %r10736, %r10735, 23;
	mov.b64 	%rd16283, {%r10742, %r10741};
	xor.b64  	%rd16284, %rd16282, %rd16283;
	xor.b64  	%rd16285, %rd16244, %rd16220;
	and.b64  	%rd16286, %rd16268, %rd16285;
	xor.b64  	%rd16287, %rd16286, %rd16220;
	add.s64 	%rd16288, %rd16196, %rd21740;
	add.s64 	%rd16289, %rd16288, %rd21449;
	add.s64 	%rd16290, %rd16289, %rd16287;
	add.s64 	%rd16291, %rd16290, %rd16284;
	add.s64 	%rd16292, %rd16291, %rd16207;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10743,%dummy}, %rd16279;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10744}, %rd16279;
	}
	shf.r.wrap.b32 	%r10745, %r10744, %r10743, 28;
	shf.r.wrap.b32 	%r10746, %r10743, %r10744, 28;
	mov.b64 	%rd16293, {%r10746, %r10745};
	shf.l.wrap.b32 	%r10747, %r10743, %r10744, 30;
	shf.l.wrap.b32 	%r10748, %r10744, %r10743, 30;
	mov.b64 	%rd16294, {%r10748, %r10747};
	xor.b64  	%rd16295, %rd16294, %rd16293;
	shf.l.wrap.b32 	%r10749, %r10743, %r10744, 25;
	shf.l.wrap.b32 	%r10750, %r10744, %r10743, 25;
	mov.b64 	%rd16296, {%r10750, %r10749};
	xor.b64  	%rd16297, %rd16295, %rd16296;
	xor.b64  	%rd16298, %rd16279, %rd16231;
	xor.b64  	%rd16299, %rd16279, %rd16255;
	and.b64  	%rd16300, %rd16299, %rd16298;
	xor.b64  	%rd16301, %rd16300, %rd16279;
	add.s64 	%rd16302, %rd16291, %rd16301;
	add.s64 	%rd16303, %rd16302, %rd16297;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10751,%dummy}, %rd16292;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10752}, %rd16292;
	}
	shf.r.wrap.b32 	%r10753, %r10752, %r10751, 14;
	shf.r.wrap.b32 	%r10754, %r10751, %r10752, 14;
	mov.b64 	%rd16304, {%r10754, %r10753};
	shf.r.wrap.b32 	%r10755, %r10752, %r10751, 18;
	shf.r.wrap.b32 	%r10756, %r10751, %r10752, 18;
	mov.b64 	%rd16305, {%r10756, %r10755};
	xor.b64  	%rd16306, %rd16305, %rd16304;
	shf.l.wrap.b32 	%r10757, %r10751, %r10752, 23;
	shf.l.wrap.b32 	%r10758, %r10752, %r10751, 23;
	mov.b64 	%rd16307, {%r10758, %r10757};
	xor.b64  	%rd16308, %rd16306, %rd16307;
	xor.b64  	%rd16309, %rd16268, %rd16244;
	and.b64  	%rd16310, %rd16292, %rd16309;
	xor.b64  	%rd16311, %rd16310, %rd16244;
	add.s64 	%rd16312, %rd16220, %rd21741;
	add.s64 	%rd16313, %rd16312, %rd21448;
	add.s64 	%rd16314, %rd16313, %rd16311;
	add.s64 	%rd16315, %rd16314, %rd16308;
	add.s64 	%rd16316, %rd16315, %rd16231;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10759,%dummy}, %rd16303;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10760}, %rd16303;
	}
	shf.r.wrap.b32 	%r10761, %r10760, %r10759, 28;
	shf.r.wrap.b32 	%r10762, %r10759, %r10760, 28;
	mov.b64 	%rd16317, {%r10762, %r10761};
	shf.l.wrap.b32 	%r10763, %r10759, %r10760, 30;
	shf.l.wrap.b32 	%r10764, %r10760, %r10759, 30;
	mov.b64 	%rd16318, {%r10764, %r10763};
	xor.b64  	%rd16319, %rd16318, %rd16317;
	shf.l.wrap.b32 	%r10765, %r10759, %r10760, 25;
	shf.l.wrap.b32 	%r10766, %r10760, %r10759, 25;
	mov.b64 	%rd16320, {%r10766, %r10765};
	xor.b64  	%rd16321, %rd16319, %rd16320;
	xor.b64  	%rd16322, %rd16303, %rd16255;
	xor.b64  	%rd16323, %rd16303, %rd16279;
	and.b64  	%rd16324, %rd16323, %rd16322;
	xor.b64  	%rd16325, %rd16324, %rd16303;
	add.s64 	%rd16326, %rd16315, %rd16325;
	add.s64 	%rd16327, %rd16326, %rd16321;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10767,%dummy}, %rd16316;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10768}, %rd16316;
	}
	shf.r.wrap.b32 	%r10769, %r10768, %r10767, 14;
	shf.r.wrap.b32 	%r10770, %r10767, %r10768, 14;
	mov.b64 	%rd16328, {%r10770, %r10769};
	shf.r.wrap.b32 	%r10771, %r10768, %r10767, 18;
	shf.r.wrap.b32 	%r10772, %r10767, %r10768, 18;
	mov.b64 	%rd16329, {%r10772, %r10771};
	xor.b64  	%rd16330, %rd16329, %rd16328;
	shf.l.wrap.b32 	%r10773, %r10767, %r10768, 23;
	shf.l.wrap.b32 	%r10774, %r10768, %r10767, 23;
	mov.b64 	%rd16331, {%r10774, %r10773};
	xor.b64  	%rd16332, %rd16330, %rd16331;
	xor.b64  	%rd16333, %rd16292, %rd16268;
	and.b64  	%rd16334, %rd16316, %rd16333;
	xor.b64  	%rd16335, %rd16334, %rd16268;
	add.s64 	%rd16336, %rd16244, %rd21742;
	add.s64 	%rd16337, %rd16336, %rd21447;
	add.s64 	%rd16338, %rd16337, %rd16335;
	add.s64 	%rd16339, %rd16338, %rd16332;
	add.s64 	%rd16340, %rd16339, %rd16255;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10775,%dummy}, %rd16327;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10776}, %rd16327;
	}
	shf.r.wrap.b32 	%r10777, %r10776, %r10775, 28;
	shf.r.wrap.b32 	%r10778, %r10775, %r10776, 28;
	mov.b64 	%rd16341, {%r10778, %r10777};
	shf.l.wrap.b32 	%r10779, %r10775, %r10776, 30;
	shf.l.wrap.b32 	%r10780, %r10776, %r10775, 30;
	mov.b64 	%rd16342, {%r10780, %r10779};
	xor.b64  	%rd16343, %rd16342, %rd16341;
	shf.l.wrap.b32 	%r10781, %r10775, %r10776, 25;
	shf.l.wrap.b32 	%r10782, %r10776, %r10775, 25;
	mov.b64 	%rd16344, {%r10782, %r10781};
	xor.b64  	%rd16345, %rd16343, %rd16344;
	xor.b64  	%rd16346, %rd16327, %rd16279;
	xor.b64  	%rd16347, %rd16327, %rd16303;
	and.b64  	%rd16348, %rd16347, %rd16346;
	xor.b64  	%rd16349, %rd16348, %rd16327;
	add.s64 	%rd16350, %rd16339, %rd16349;
	add.s64 	%rd16351, %rd16350, %rd16345;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10783,%dummy}, %rd16340;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10784}, %rd16340;
	}
	shf.r.wrap.b32 	%r10785, %r10784, %r10783, 14;
	shf.r.wrap.b32 	%r10786, %r10783, %r10784, 14;
	mov.b64 	%rd16352, {%r10786, %r10785};
	shf.r.wrap.b32 	%r10787, %r10784, %r10783, 18;
	shf.r.wrap.b32 	%r10788, %r10783, %r10784, 18;
	mov.b64 	%rd16353, {%r10788, %r10787};
	xor.b64  	%rd16354, %rd16353, %rd16352;
	shf.l.wrap.b32 	%r10789, %r10783, %r10784, 23;
	shf.l.wrap.b32 	%r10790, %r10784, %r10783, 23;
	mov.b64 	%rd16355, {%r10790, %r10789};
	xor.b64  	%rd16356, %rd16354, %rd16355;
	xor.b64  	%rd16357, %rd16316, %rd16292;
	and.b64  	%rd16358, %rd16340, %rd16357;
	xor.b64  	%rd16359, %rd16358, %rd16292;
	add.s64 	%rd16360, %rd16268, %rd21726;
	add.s64 	%rd16361, %rd16360, %rd21446;
	add.s64 	%rd16362, %rd16361, %rd16359;
	add.s64 	%rd16363, %rd16362, %rd16356;
	add.s64 	%rd16364, %rd16363, %rd16279;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10791,%dummy}, %rd16351;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10792}, %rd16351;
	}
	shf.r.wrap.b32 	%r10793, %r10792, %r10791, 28;
	shf.r.wrap.b32 	%r10794, %r10791, %r10792, 28;
	mov.b64 	%rd16365, {%r10794, %r10793};
	shf.l.wrap.b32 	%r10795, %r10791, %r10792, 30;
	shf.l.wrap.b32 	%r10796, %r10792, %r10791, 30;
	mov.b64 	%rd16366, {%r10796, %r10795};
	xor.b64  	%rd16367, %rd16366, %rd16365;
	shf.l.wrap.b32 	%r10797, %r10791, %r10792, 25;
	shf.l.wrap.b32 	%r10798, %r10792, %r10791, 25;
	mov.b64 	%rd16368, {%r10798, %r10797};
	xor.b64  	%rd16369, %rd16367, %rd16368;
	xor.b64  	%rd16370, %rd16351, %rd16303;
	xor.b64  	%rd16371, %rd16351, %rd16327;
	and.b64  	%rd16372, %rd16371, %rd16370;
	xor.b64  	%rd16373, %rd16372, %rd16351;
	add.s64 	%rd16374, %rd16363, %rd16373;
	add.s64 	%rd16375, %rd16374, %rd16369;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10799,%dummy}, %rd16364;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10800}, %rd16364;
	}
	shf.r.wrap.b32 	%r10801, %r10800, %r10799, 14;
	shf.r.wrap.b32 	%r10802, %r10799, %r10800, 14;
	mov.b64 	%rd16376, {%r10802, %r10801};
	shf.r.wrap.b32 	%r10803, %r10800, %r10799, 18;
	shf.r.wrap.b32 	%r10804, %r10799, %r10800, 18;
	mov.b64 	%rd16377, {%r10804, %r10803};
	xor.b64  	%rd16378, %rd16377, %rd16376;
	shf.l.wrap.b32 	%r10805, %r10799, %r10800, 23;
	shf.l.wrap.b32 	%r10806, %r10800, %r10799, 23;
	mov.b64 	%rd16379, {%r10806, %r10805};
	xor.b64  	%rd16380, %rd16378, %rd16379;
	xor.b64  	%rd16381, %rd16340, %rd16316;
	and.b64  	%rd16382, %rd16364, %rd16381;
	xor.b64  	%rd16383, %rd16382, %rd16316;
	add.s64 	%rd16384, %rd16292, %rd21725;
	add.s64 	%rd16385, %rd16384, %rd21445;
	add.s64 	%rd16386, %rd16385, %rd16383;
	add.s64 	%rd16387, %rd16386, %rd16380;
	add.s64 	%rd16388, %rd16387, %rd16303;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10807,%dummy}, %rd16375;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10808}, %rd16375;
	}
	shf.r.wrap.b32 	%r10809, %r10808, %r10807, 28;
	shf.r.wrap.b32 	%r10810, %r10807, %r10808, 28;
	mov.b64 	%rd16389, {%r10810, %r10809};
	shf.l.wrap.b32 	%r10811, %r10807, %r10808, 30;
	shf.l.wrap.b32 	%r10812, %r10808, %r10807, 30;
	mov.b64 	%rd16390, {%r10812, %r10811};
	xor.b64  	%rd16391, %rd16390, %rd16389;
	shf.l.wrap.b32 	%r10813, %r10807, %r10808, 25;
	shf.l.wrap.b32 	%r10814, %r10808, %r10807, 25;
	mov.b64 	%rd16392, {%r10814, %r10813};
	xor.b64  	%rd16393, %rd16391, %rd16392;
	xor.b64  	%rd16394, %rd16375, %rd16327;
	xor.b64  	%rd16395, %rd16375, %rd16351;
	and.b64  	%rd16396, %rd16395, %rd16394;
	xor.b64  	%rd16397, %rd16396, %rd16375;
	add.s64 	%rd16398, %rd16387, %rd16397;
	add.s64 	%rd16399, %rd16398, %rd16393;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10815,%dummy}, %rd16388;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10816}, %rd16388;
	}
	shf.r.wrap.b32 	%r10817, %r10816, %r10815, 14;
	shf.r.wrap.b32 	%r10818, %r10815, %r10816, 14;
	mov.b64 	%rd16400, {%r10818, %r10817};
	shf.r.wrap.b32 	%r10819, %r10816, %r10815, 18;
	shf.r.wrap.b32 	%r10820, %r10815, %r10816, 18;
	mov.b64 	%rd16401, {%r10820, %r10819};
	xor.b64  	%rd16402, %rd16401, %rd16400;
	shf.l.wrap.b32 	%r10821, %r10815, %r10816, 23;
	shf.l.wrap.b32 	%r10822, %r10816, %r10815, 23;
	mov.b64 	%rd16403, {%r10822, %r10821};
	xor.b64  	%rd16404, %rd16402, %rd16403;
	xor.b64  	%rd16405, %rd16364, %rd16340;
	and.b64  	%rd16406, %rd16388, %rd16405;
	xor.b64  	%rd16407, %rd16406, %rd16340;
	add.s64 	%rd16408, %rd16316, %rd21724;
	add.s64 	%rd16409, %rd16408, %rd21444;
	add.s64 	%rd16410, %rd16409, %rd16407;
	add.s64 	%rd16411, %rd16410, %rd16404;
	add.s64 	%rd16412, %rd16411, %rd16327;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10823,%dummy}, %rd16399;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10824}, %rd16399;
	}
	shf.r.wrap.b32 	%r10825, %r10824, %r10823, 28;
	shf.r.wrap.b32 	%r10826, %r10823, %r10824, 28;
	mov.b64 	%rd16413, {%r10826, %r10825};
	shf.l.wrap.b32 	%r10827, %r10823, %r10824, 30;
	shf.l.wrap.b32 	%r10828, %r10824, %r10823, 30;
	mov.b64 	%rd16414, {%r10828, %r10827};
	xor.b64  	%rd16415, %rd16414, %rd16413;
	shf.l.wrap.b32 	%r10829, %r10823, %r10824, 25;
	shf.l.wrap.b32 	%r10830, %r10824, %r10823, 25;
	mov.b64 	%rd16416, {%r10830, %r10829};
	xor.b64  	%rd16417, %rd16415, %rd16416;
	xor.b64  	%rd16418, %rd16399, %rd16351;
	xor.b64  	%rd16419, %rd16399, %rd16375;
	and.b64  	%rd16420, %rd16419, %rd16418;
	xor.b64  	%rd16421, %rd16420, %rd16399;
	add.s64 	%rd16422, %rd16411, %rd16421;
	add.s64 	%rd16423, %rd16422, %rd16417;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10831,%dummy}, %rd16412;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10832}, %rd16412;
	}
	shf.r.wrap.b32 	%r10833, %r10832, %r10831, 14;
	shf.r.wrap.b32 	%r10834, %r10831, %r10832, 14;
	mov.b64 	%rd16424, {%r10834, %r10833};
	shf.r.wrap.b32 	%r10835, %r10832, %r10831, 18;
	shf.r.wrap.b32 	%r10836, %r10831, %r10832, 18;
	mov.b64 	%rd16425, {%r10836, %r10835};
	xor.b64  	%rd16426, %rd16425, %rd16424;
	shf.l.wrap.b32 	%r10837, %r10831, %r10832, 23;
	shf.l.wrap.b32 	%r10838, %r10832, %r10831, 23;
	mov.b64 	%rd16427, {%r10838, %r10837};
	xor.b64  	%rd16428, %rd16426, %rd16427;
	xor.b64  	%rd16429, %rd16388, %rd16364;
	and.b64  	%rd16430, %rd16412, %rd16429;
	xor.b64  	%rd16431, %rd16430, %rd16364;
	add.s64 	%rd16432, %rd16340, %rd21723;
	add.s64 	%rd16433, %rd16432, %rd21443;
	add.s64 	%rd16434, %rd16433, %rd16431;
	add.s64 	%rd16435, %rd16434, %rd16428;
	add.s64 	%rd16436, %rd16435, %rd16351;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10839,%dummy}, %rd16423;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10840}, %rd16423;
	}
	shf.r.wrap.b32 	%r10841, %r10840, %r10839, 28;
	shf.r.wrap.b32 	%r10842, %r10839, %r10840, 28;
	mov.b64 	%rd16437, {%r10842, %r10841};
	shf.l.wrap.b32 	%r10843, %r10839, %r10840, 30;
	shf.l.wrap.b32 	%r10844, %r10840, %r10839, 30;
	mov.b64 	%rd16438, {%r10844, %r10843};
	xor.b64  	%rd16439, %rd16438, %rd16437;
	shf.l.wrap.b32 	%r10845, %r10839, %r10840, 25;
	shf.l.wrap.b32 	%r10846, %r10840, %r10839, 25;
	mov.b64 	%rd16440, {%r10846, %r10845};
	xor.b64  	%rd16441, %rd16439, %rd16440;
	xor.b64  	%rd16442, %rd16423, %rd16375;
	xor.b64  	%rd16443, %rd16423, %rd16399;
	and.b64  	%rd16444, %rd16443, %rd16442;
	xor.b64  	%rd16445, %rd16444, %rd16423;
	add.s64 	%rd16446, %rd16435, %rd16445;
	add.s64 	%rd16447, %rd16446, %rd16441;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10847,%dummy}, %rd16436;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10848}, %rd16436;
	}
	shf.r.wrap.b32 	%r10849, %r10848, %r10847, 14;
	shf.r.wrap.b32 	%r10850, %r10847, %r10848, 14;
	mov.b64 	%rd16448, {%r10850, %r10849};
	shf.r.wrap.b32 	%r10851, %r10848, %r10847, 18;
	shf.r.wrap.b32 	%r10852, %r10847, %r10848, 18;
	mov.b64 	%rd16449, {%r10852, %r10851};
	xor.b64  	%rd16450, %rd16449, %rd16448;
	shf.l.wrap.b32 	%r10853, %r10847, %r10848, 23;
	shf.l.wrap.b32 	%r10854, %r10848, %r10847, 23;
	mov.b64 	%rd16451, {%r10854, %r10853};
	xor.b64  	%rd16452, %rd16450, %rd16451;
	xor.b64  	%rd16453, %rd16412, %rd16388;
	and.b64  	%rd16454, %rd16436, %rd16453;
	xor.b64  	%rd16455, %rd16454, %rd16388;
	add.s64 	%rd16456, %rd16364, %rd21722;
	add.s64 	%rd16457, %rd16456, %rd21442;
	add.s64 	%rd16458, %rd16457, %rd16455;
	add.s64 	%rd16459, %rd16458, %rd16452;
	add.s64 	%rd21734, %rd16459, %rd16375;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10855,%dummy}, %rd16447;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10856}, %rd16447;
	}
	shf.r.wrap.b32 	%r10857, %r10856, %r10855, 28;
	shf.r.wrap.b32 	%r10858, %r10855, %r10856, 28;
	mov.b64 	%rd16460, {%r10858, %r10857};
	shf.l.wrap.b32 	%r10859, %r10855, %r10856, 30;
	shf.l.wrap.b32 	%r10860, %r10856, %r10855, 30;
	mov.b64 	%rd16461, {%r10860, %r10859};
	xor.b64  	%rd16462, %rd16461, %rd16460;
	shf.l.wrap.b32 	%r10861, %r10855, %r10856, 25;
	shf.l.wrap.b32 	%r10862, %r10856, %r10855, 25;
	mov.b64 	%rd16463, {%r10862, %r10861};
	xor.b64  	%rd16464, %rd16462, %rd16463;
	xor.b64  	%rd16465, %rd16447, %rd16399;
	xor.b64  	%rd16466, %rd16447, %rd16423;
	and.b64  	%rd16467, %rd16466, %rd16465;
	xor.b64  	%rd16468, %rd16467, %rd16447;
	add.s64 	%rd16469, %rd16459, %rd16468;
	add.s64 	%rd21730, %rd16469, %rd16464;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10863,%dummy}, %rd21734;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10864}, %rd21734;
	}
	shf.r.wrap.b32 	%r10865, %r10864, %r10863, 14;
	shf.r.wrap.b32 	%r10866, %r10863, %r10864, 14;
	mov.b64 	%rd16470, {%r10866, %r10865};
	shf.r.wrap.b32 	%r10867, %r10864, %r10863, 18;
	shf.r.wrap.b32 	%r10868, %r10863, %r10864, 18;
	mov.b64 	%rd16471, {%r10868, %r10867};
	xor.b64  	%rd16472, %rd16471, %rd16470;
	shf.l.wrap.b32 	%r10869, %r10863, %r10864, 23;
	shf.l.wrap.b32 	%r10870, %r10864, %r10863, 23;
	mov.b64 	%rd16473, {%r10870, %r10869};
	xor.b64  	%rd16474, %rd16472, %rd16473;
	xor.b64  	%rd16475, %rd16436, %rd16412;
	and.b64  	%rd16476, %rd21734, %rd16475;
	xor.b64  	%rd16477, %rd16476, %rd16412;
	add.s64 	%rd16478, %rd16388, %rd21721;
	add.s64 	%rd16479, %rd16478, %rd21441;
	add.s64 	%rd16480, %rd16479, %rd16477;
	add.s64 	%rd16481, %rd16480, %rd16474;
	add.s64 	%rd21733, %rd16481, %rd16399;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10871,%dummy}, %rd21730;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10872}, %rd21730;
	}
	shf.r.wrap.b32 	%r10873, %r10872, %r10871, 28;
	shf.r.wrap.b32 	%r10874, %r10871, %r10872, 28;
	mov.b64 	%rd16482, {%r10874, %r10873};
	shf.l.wrap.b32 	%r10875, %r10871, %r10872, 30;
	shf.l.wrap.b32 	%r10876, %r10872, %r10871, 30;
	mov.b64 	%rd16483, {%r10876, %r10875};
	xor.b64  	%rd16484, %rd16483, %rd16482;
	shf.l.wrap.b32 	%r10877, %r10871, %r10872, 25;
	shf.l.wrap.b32 	%r10878, %r10872, %r10871, 25;
	mov.b64 	%rd16485, {%r10878, %r10877};
	xor.b64  	%rd16486, %rd16484, %rd16485;
	xor.b64  	%rd16487, %rd21730, %rd16423;
	xor.b64  	%rd16488, %rd21730, %rd16447;
	and.b64  	%rd16489, %rd16488, %rd16487;
	xor.b64  	%rd16490, %rd16489, %rd21730;
	add.s64 	%rd16491, %rd16481, %rd16490;
	add.s64 	%rd21729, %rd16491, %rd16486;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10879,%dummy}, %rd21733;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10880}, %rd21733;
	}
	shf.r.wrap.b32 	%r10881, %r10880, %r10879, 14;
	shf.r.wrap.b32 	%r10882, %r10879, %r10880, 14;
	mov.b64 	%rd16492, {%r10882, %r10881};
	shf.r.wrap.b32 	%r10883, %r10880, %r10879, 18;
	shf.r.wrap.b32 	%r10884, %r10879, %r10880, 18;
	mov.b64 	%rd16493, {%r10884, %r10883};
	xor.b64  	%rd16494, %rd16493, %rd16492;
	shf.l.wrap.b32 	%r10885, %r10879, %r10880, 23;
	shf.l.wrap.b32 	%r10886, %r10880, %r10879, 23;
	mov.b64 	%rd16495, {%r10886, %r10885};
	xor.b64  	%rd16496, %rd16494, %rd16495;
	xor.b64  	%rd16497, %rd21734, %rd16436;
	and.b64  	%rd16498, %rd21733, %rd16497;
	xor.b64  	%rd16499, %rd16498, %rd16436;
	add.s64 	%rd16500, %rd16412, %rd21720;
	add.s64 	%rd16501, %rd16500, %rd21440;
	add.s64 	%rd16502, %rd16501, %rd16499;
	add.s64 	%rd16503, %rd16502, %rd16496;
	add.s64 	%rd21732, %rd16503, %rd16423;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10887,%dummy}, %rd21729;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10888}, %rd21729;
	}
	shf.r.wrap.b32 	%r10889, %r10888, %r10887, 28;
	shf.r.wrap.b32 	%r10890, %r10887, %r10888, 28;
	mov.b64 	%rd16504, {%r10890, %r10889};
	shf.l.wrap.b32 	%r10891, %r10887, %r10888, 30;
	shf.l.wrap.b32 	%r10892, %r10888, %r10887, 30;
	mov.b64 	%rd16505, {%r10892, %r10891};
	xor.b64  	%rd16506, %rd16505, %rd16504;
	shf.l.wrap.b32 	%r10893, %r10887, %r10888, 25;
	shf.l.wrap.b32 	%r10894, %r10888, %r10887, 25;
	mov.b64 	%rd16507, {%r10894, %r10893};
	xor.b64  	%rd16508, %rd16506, %rd16507;
	xor.b64  	%rd16509, %rd21729, %rd16447;
	xor.b64  	%rd16510, %rd21729, %rd21730;
	and.b64  	%rd16511, %rd16510, %rd16509;
	xor.b64  	%rd16512, %rd16511, %rd21729;
	add.s64 	%rd16513, %rd16503, %rd16512;
	add.s64 	%rd21728, %rd16513, %rd16508;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10895,%dummy}, %rd21732;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10896}, %rd21732;
	}
	shf.r.wrap.b32 	%r10897, %r10896, %r10895, 14;
	shf.r.wrap.b32 	%r10898, %r10895, %r10896, 14;
	mov.b64 	%rd16514, {%r10898, %r10897};
	shf.r.wrap.b32 	%r10899, %r10896, %r10895, 18;
	shf.r.wrap.b32 	%r10900, %r10895, %r10896, 18;
	mov.b64 	%rd16515, {%r10900, %r10899};
	xor.b64  	%rd16516, %rd16515, %rd16514;
	shf.l.wrap.b32 	%r10901, %r10895, %r10896, 23;
	shf.l.wrap.b32 	%r10902, %r10896, %r10895, 23;
	mov.b64 	%rd16517, {%r10902, %r10901};
	xor.b64  	%rd16518, %rd16516, %rd16517;
	xor.b64  	%rd16519, %rd21733, %rd21734;
	and.b64  	%rd16520, %rd21732, %rd16519;
	xor.b64  	%rd16521, %rd16520, %rd21734;
	add.s64 	%rd16522, %rd16436, %rd21719;
	add.s64 	%rd16523, %rd16522, %rd21439;
	add.s64 	%rd16524, %rd16523, %rd16521;
	add.s64 	%rd16525, %rd16524, %rd16518;
	add.s64 	%rd21731, %rd16525, %rd16447;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10903,%dummy}, %rd21728;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10904}, %rd21728;
	}
	shf.r.wrap.b32 	%r10905, %r10904, %r10903, 28;
	shf.r.wrap.b32 	%r10906, %r10903, %r10904, 28;
	mov.b64 	%rd16526, {%r10906, %r10905};
	shf.l.wrap.b32 	%r10907, %r10903, %r10904, 30;
	shf.l.wrap.b32 	%r10908, %r10904, %r10903, 30;
	mov.b64 	%rd16527, {%r10908, %r10907};
	xor.b64  	%rd16528, %rd16527, %rd16526;
	shf.l.wrap.b32 	%r10909, %r10903, %r10904, 25;
	shf.l.wrap.b32 	%r10910, %r10904, %r10903, 25;
	mov.b64 	%rd16529, {%r10910, %r10909};
	xor.b64  	%rd16530, %rd16528, %rd16529;
	xor.b64  	%rd16531, %rd21728, %rd21730;
	xor.b64  	%rd16532, %rd21728, %rd21729;
	and.b64  	%rd16533, %rd16532, %rd16531;
	xor.b64  	%rd16534, %rd16533, %rd21728;
	add.s64 	%rd16535, %rd16525, %rd16534;
	add.s64 	%rd21727, %rd16535, %rd16530;
	mov.u32 	%r14478, 16;

BB3_302:
	shr.u64 	%rd16536, %rd21720, 6;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10911,%dummy}, %rd21720;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10912}, %rd21720;
	}
	shf.r.wrap.b32 	%r10913, %r10912, %r10911, 19;
	shf.r.wrap.b32 	%r10914, %r10911, %r10912, 19;
	mov.b64 	%rd16537, {%r10914, %r10913};
	xor.b64  	%rd16538, %rd16537, %rd16536;
	shf.l.wrap.b32 	%r10915, %r10911, %r10912, 3;
	shf.l.wrap.b32 	%r10916, %r10912, %r10911, 3;
	mov.b64 	%rd16539, {%r10916, %r10915};
	xor.b64  	%rd16540, %rd16538, %rd16539;
	shr.u64 	%rd16541, %rd21736, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10917,%dummy}, %rd21736;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10918}, %rd21736;
	}
	shf.r.wrap.b32 	%r10919, %r10918, %r10917, 1;
	shf.r.wrap.b32 	%r10920, %r10917, %r10918, 1;
	mov.b64 	%rd16542, {%r10920, %r10919};
	xor.b64  	%rd16543, %rd16542, %rd16541;
	shf.r.wrap.b32 	%r10921, %r10918, %r10917, 8;
	shf.r.wrap.b32 	%r10922, %r10917, %r10918, 8;
	mov.b64 	%rd16544, {%r10922, %r10921};
	xor.b64  	%rd16545, %rd16543, %rd16544;
	add.s64 	%rd16546, %rd21735, %rd21725;
	add.s64 	%rd16547, %rd16546, %rd16540;
	add.s64 	%rd21735, %rd16547, %rd16545;
	shr.u64 	%rd16548, %rd21719, 6;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10923,%dummy}, %rd21719;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10924}, %rd21719;
	}
	shf.r.wrap.b32 	%r10925, %r10924, %r10923, 19;
	shf.r.wrap.b32 	%r10926, %r10923, %r10924, 19;
	mov.b64 	%rd16549, {%r10926, %r10925};
	xor.b64  	%rd16550, %rd16549, %rd16548;
	shf.l.wrap.b32 	%r10927, %r10923, %r10924, 3;
	shf.l.wrap.b32 	%r10928, %r10924, %r10923, 3;
	mov.b64 	%rd16551, {%r10928, %r10927};
	xor.b64  	%rd16552, %rd16550, %rd16551;
	shr.u64 	%rd16553, %rd21737, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10929,%dummy}, %rd21737;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10930}, %rd21737;
	}
	shf.r.wrap.b32 	%r10931, %r10930, %r10929, 1;
	shf.r.wrap.b32 	%r10932, %r10929, %r10930, 1;
	mov.b64 	%rd16554, {%r10932, %r10931};
	xor.b64  	%rd16555, %rd16554, %rd16553;
	shf.r.wrap.b32 	%r10933, %r10930, %r10929, 8;
	shf.r.wrap.b32 	%r10934, %r10929, %r10930, 8;
	mov.b64 	%rd16556, {%r10934, %r10933};
	xor.b64  	%rd16557, %rd16555, %rd16556;
	add.s64 	%rd16558, %rd21736, %rd21724;
	add.s64 	%rd16559, %rd16558, %rd16552;
	add.s64 	%rd21736, %rd16559, %rd16557;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10935,%dummy}, %rd21735;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10936}, %rd21735;
	}
	shf.r.wrap.b32 	%r10937, %r10936, %r10935, 19;
	shf.r.wrap.b32 	%r10938, %r10935, %r10936, 19;
	mov.b64 	%rd16560, {%r10938, %r10937};
	shf.l.wrap.b32 	%r10939, %r10935, %r10936, 3;
	shf.l.wrap.b32 	%r10940, %r10936, %r10935, 3;
	mov.b64 	%rd16561, {%r10940, %r10939};
	shr.u64 	%rd16562, %rd21735, 6;
	xor.b64  	%rd16563, %rd16560, %rd16562;
	xor.b64  	%rd16564, %rd16563, %rd16561;
	shr.u64 	%rd16565, %rd21738, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10941,%dummy}, %rd21738;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10942}, %rd21738;
	}
	shf.r.wrap.b32 	%r10943, %r10942, %r10941, 1;
	shf.r.wrap.b32 	%r10944, %r10941, %r10942, 1;
	mov.b64 	%rd16566, {%r10944, %r10943};
	xor.b64  	%rd16567, %rd16566, %rd16565;
	shf.r.wrap.b32 	%r10945, %r10942, %r10941, 8;
	shf.r.wrap.b32 	%r10946, %r10941, %r10942, 8;
	mov.b64 	%rd16568, {%r10946, %r10945};
	xor.b64  	%rd16569, %rd16567, %rd16568;
	add.s64 	%rd16570, %rd21737, %rd21723;
	add.s64 	%rd16571, %rd16570, %rd16564;
	add.s64 	%rd21737, %rd16571, %rd16569;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10947,%dummy}, %rd21736;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10948}, %rd21736;
	}
	shf.r.wrap.b32 	%r10949, %r10948, %r10947, 19;
	shf.r.wrap.b32 	%r10950, %r10947, %r10948, 19;
	mov.b64 	%rd16572, {%r10950, %r10949};
	shf.l.wrap.b32 	%r10951, %r10947, %r10948, 3;
	shf.l.wrap.b32 	%r10952, %r10948, %r10947, 3;
	mov.b64 	%rd16573, {%r10952, %r10951};
	shr.u64 	%rd16574, %rd21736, 6;
	xor.b64  	%rd16575, %rd16572, %rd16574;
	xor.b64  	%rd16576, %rd16575, %rd16573;
	shr.u64 	%rd16577, %rd21739, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10953,%dummy}, %rd21739;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10954}, %rd21739;
	}
	shf.r.wrap.b32 	%r10955, %r10954, %r10953, 1;
	shf.r.wrap.b32 	%r10956, %r10953, %r10954, 1;
	mov.b64 	%rd16578, {%r10956, %r10955};
	xor.b64  	%rd16579, %rd16578, %rd16577;
	shf.r.wrap.b32 	%r10957, %r10954, %r10953, 8;
	shf.r.wrap.b32 	%r10958, %r10953, %r10954, 8;
	mov.b64 	%rd16580, {%r10958, %r10957};
	xor.b64  	%rd16581, %rd16579, %rd16580;
	add.s64 	%rd16582, %rd21738, %rd21722;
	add.s64 	%rd16583, %rd16582, %rd16576;
	add.s64 	%rd21738, %rd16583, %rd16581;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10959,%dummy}, %rd21737;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10960}, %rd21737;
	}
	shf.r.wrap.b32 	%r10961, %r10960, %r10959, 19;
	shf.r.wrap.b32 	%r10962, %r10959, %r10960, 19;
	mov.b64 	%rd16584, {%r10962, %r10961};
	shf.l.wrap.b32 	%r10963, %r10959, %r10960, 3;
	shf.l.wrap.b32 	%r10964, %r10960, %r10959, 3;
	mov.b64 	%rd16585, {%r10964, %r10963};
	shr.u64 	%rd16586, %rd21737, 6;
	xor.b64  	%rd16587, %rd16584, %rd16586;
	xor.b64  	%rd16588, %rd16587, %rd16585;
	shr.u64 	%rd16589, %rd21740, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10965,%dummy}, %rd21740;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10966}, %rd21740;
	}
	shf.r.wrap.b32 	%r10967, %r10966, %r10965, 1;
	shf.r.wrap.b32 	%r10968, %r10965, %r10966, 1;
	mov.b64 	%rd16590, {%r10968, %r10967};
	xor.b64  	%rd16591, %rd16590, %rd16589;
	shf.r.wrap.b32 	%r10969, %r10966, %r10965, 8;
	shf.r.wrap.b32 	%r10970, %r10965, %r10966, 8;
	mov.b64 	%rd16592, {%r10970, %r10969};
	xor.b64  	%rd16593, %rd16591, %rd16592;
	add.s64 	%rd16594, %rd21739, %rd21721;
	add.s64 	%rd16595, %rd16594, %rd16588;
	add.s64 	%rd21739, %rd16595, %rd16593;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10971,%dummy}, %rd21738;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10972}, %rd21738;
	}
	shf.r.wrap.b32 	%r10973, %r10972, %r10971, 19;
	shf.r.wrap.b32 	%r10974, %r10971, %r10972, 19;
	mov.b64 	%rd16596, {%r10974, %r10973};
	shf.l.wrap.b32 	%r10975, %r10971, %r10972, 3;
	shf.l.wrap.b32 	%r10976, %r10972, %r10971, 3;
	mov.b64 	%rd16597, {%r10976, %r10975};
	shr.u64 	%rd16598, %rd21738, 6;
	xor.b64  	%rd16599, %rd16596, %rd16598;
	xor.b64  	%rd16600, %rd16599, %rd16597;
	shr.u64 	%rd16601, %rd21741, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10977,%dummy}, %rd21741;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10978}, %rd21741;
	}
	shf.r.wrap.b32 	%r10979, %r10978, %r10977, 1;
	shf.r.wrap.b32 	%r10980, %r10977, %r10978, 1;
	mov.b64 	%rd16602, {%r10980, %r10979};
	xor.b64  	%rd16603, %rd16602, %rd16601;
	shf.r.wrap.b32 	%r10981, %r10978, %r10977, 8;
	shf.r.wrap.b32 	%r10982, %r10977, %r10978, 8;
	mov.b64 	%rd16604, {%r10982, %r10981};
	xor.b64  	%rd16605, %rd16603, %rd16604;
	add.s64 	%rd16606, %rd21740, %rd21720;
	add.s64 	%rd16607, %rd16606, %rd16600;
	add.s64 	%rd21740, %rd16607, %rd16605;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10983,%dummy}, %rd21739;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10984}, %rd21739;
	}
	shf.r.wrap.b32 	%r10985, %r10984, %r10983, 19;
	shf.r.wrap.b32 	%r10986, %r10983, %r10984, 19;
	mov.b64 	%rd16608, {%r10986, %r10985};
	shf.l.wrap.b32 	%r10987, %r10983, %r10984, 3;
	shf.l.wrap.b32 	%r10988, %r10984, %r10983, 3;
	mov.b64 	%rd16609, {%r10988, %r10987};
	shr.u64 	%rd16610, %rd21739, 6;
	xor.b64  	%rd16611, %rd16608, %rd16610;
	xor.b64  	%rd16612, %rd16611, %rd16609;
	shr.u64 	%rd16613, %rd21742, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10989,%dummy}, %rd21742;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10990}, %rd21742;
	}
	shf.r.wrap.b32 	%r10991, %r10990, %r10989, 1;
	shf.r.wrap.b32 	%r10992, %r10989, %r10990, 1;
	mov.b64 	%rd16614, {%r10992, %r10991};
	xor.b64  	%rd16615, %rd16614, %rd16613;
	shf.r.wrap.b32 	%r10993, %r10990, %r10989, 8;
	shf.r.wrap.b32 	%r10994, %r10989, %r10990, 8;
	mov.b64 	%rd16616, {%r10994, %r10993};
	xor.b64  	%rd16617, %rd16615, %rd16616;
	add.s64 	%rd16618, %rd21741, %rd21719;
	add.s64 	%rd16619, %rd16618, %rd16612;
	add.s64 	%rd21741, %rd16619, %rd16617;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r10995,%dummy}, %rd21740;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r10996}, %rd21740;
	}
	shf.r.wrap.b32 	%r10997, %r10996, %r10995, 19;
	shf.r.wrap.b32 	%r10998, %r10995, %r10996, 19;
	mov.b64 	%rd16620, {%r10998, %r10997};
	shf.l.wrap.b32 	%r10999, %r10995, %r10996, 3;
	shf.l.wrap.b32 	%r11000, %r10996, %r10995, 3;
	mov.b64 	%rd16621, {%r11000, %r10999};
	shr.u64 	%rd16622, %rd21740, 6;
	xor.b64  	%rd16623, %rd16620, %rd16622;
	xor.b64  	%rd16624, %rd16623, %rd16621;
	shr.u64 	%rd16625, %rd21726, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11001,%dummy}, %rd21726;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11002}, %rd21726;
	}
	shf.r.wrap.b32 	%r11003, %r11002, %r11001, 1;
	shf.r.wrap.b32 	%r11004, %r11001, %r11002, 1;
	mov.b64 	%rd16626, {%r11004, %r11003};
	xor.b64  	%rd16627, %rd16626, %rd16625;
	shf.r.wrap.b32 	%r11005, %r11002, %r11001, 8;
	shf.r.wrap.b32 	%r11006, %r11001, %r11002, 8;
	mov.b64 	%rd16628, {%r11006, %r11005};
	xor.b64  	%rd16629, %rd16627, %rd16628;
	add.s64 	%rd16630, %rd21735, %rd21742;
	add.s64 	%rd16631, %rd16630, %rd16624;
	add.s64 	%rd21742, %rd16631, %rd16629;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11007,%dummy}, %rd21741;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11008}, %rd21741;
	}
	shf.r.wrap.b32 	%r11009, %r11008, %r11007, 19;
	shf.r.wrap.b32 	%r11010, %r11007, %r11008, 19;
	mov.b64 	%rd16632, {%r11010, %r11009};
	shf.l.wrap.b32 	%r11011, %r11007, %r11008, 3;
	shf.l.wrap.b32 	%r11012, %r11008, %r11007, 3;
	mov.b64 	%rd16633, {%r11012, %r11011};
	shr.u64 	%rd16634, %rd21741, 6;
	xor.b64  	%rd16635, %rd16632, %rd16634;
	xor.b64  	%rd16636, %rd16635, %rd16633;
	shr.u64 	%rd16637, %rd21725, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11013,%dummy}, %rd21725;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11014}, %rd21725;
	}
	shf.r.wrap.b32 	%r11015, %r11014, %r11013, 1;
	shf.r.wrap.b32 	%r11016, %r11013, %r11014, 1;
	mov.b64 	%rd16638, {%r11016, %r11015};
	xor.b64  	%rd16639, %rd16638, %rd16637;
	shf.r.wrap.b32 	%r11017, %r11014, %r11013, 8;
	shf.r.wrap.b32 	%r11018, %r11013, %r11014, 8;
	mov.b64 	%rd16640, {%r11018, %r11017};
	xor.b64  	%rd16641, %rd16639, %rd16640;
	add.s64 	%rd16642, %rd21736, %rd21726;
	add.s64 	%rd16643, %rd16642, %rd16636;
	add.s64 	%rd21726, %rd16643, %rd16641;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11019,%dummy}, %rd21742;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11020}, %rd21742;
	}
	shf.r.wrap.b32 	%r11021, %r11020, %r11019, 19;
	shf.r.wrap.b32 	%r11022, %r11019, %r11020, 19;
	mov.b64 	%rd16644, {%r11022, %r11021};
	shf.l.wrap.b32 	%r11023, %r11019, %r11020, 3;
	shf.l.wrap.b32 	%r11024, %r11020, %r11019, 3;
	mov.b64 	%rd16645, {%r11024, %r11023};
	shr.u64 	%rd16646, %rd21742, 6;
	xor.b64  	%rd16647, %rd16644, %rd16646;
	xor.b64  	%rd16648, %rd16647, %rd16645;
	shr.u64 	%rd16649, %rd21724, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11025,%dummy}, %rd21724;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11026}, %rd21724;
	}
	shf.r.wrap.b32 	%r11027, %r11026, %r11025, 1;
	shf.r.wrap.b32 	%r11028, %r11025, %r11026, 1;
	mov.b64 	%rd16650, {%r11028, %r11027};
	xor.b64  	%rd16651, %rd16650, %rd16649;
	shf.r.wrap.b32 	%r11029, %r11026, %r11025, 8;
	shf.r.wrap.b32 	%r11030, %r11025, %r11026, 8;
	mov.b64 	%rd16652, {%r11030, %r11029};
	xor.b64  	%rd16653, %rd16651, %rd16652;
	add.s64 	%rd16654, %rd21737, %rd21725;
	add.s64 	%rd16655, %rd16654, %rd16648;
	add.s64 	%rd21725, %rd16655, %rd16653;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11031,%dummy}, %rd21726;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11032}, %rd21726;
	}
	shf.r.wrap.b32 	%r11033, %r11032, %r11031, 19;
	shf.r.wrap.b32 	%r11034, %r11031, %r11032, 19;
	mov.b64 	%rd16656, {%r11034, %r11033};
	shf.l.wrap.b32 	%r11035, %r11031, %r11032, 3;
	shf.l.wrap.b32 	%r11036, %r11032, %r11031, 3;
	mov.b64 	%rd16657, {%r11036, %r11035};
	shr.u64 	%rd16658, %rd21726, 6;
	xor.b64  	%rd16659, %rd16656, %rd16658;
	xor.b64  	%rd16660, %rd16659, %rd16657;
	shr.u64 	%rd16661, %rd21723, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11037,%dummy}, %rd21723;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11038}, %rd21723;
	}
	shf.r.wrap.b32 	%r11039, %r11038, %r11037, 1;
	shf.r.wrap.b32 	%r11040, %r11037, %r11038, 1;
	mov.b64 	%rd16662, {%r11040, %r11039};
	xor.b64  	%rd16663, %rd16662, %rd16661;
	shf.r.wrap.b32 	%r11041, %r11038, %r11037, 8;
	shf.r.wrap.b32 	%r11042, %r11037, %r11038, 8;
	mov.b64 	%rd16664, {%r11042, %r11041};
	xor.b64  	%rd16665, %rd16663, %rd16664;
	add.s64 	%rd16666, %rd21738, %rd21724;
	add.s64 	%rd16667, %rd16666, %rd16660;
	add.s64 	%rd21724, %rd16667, %rd16665;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11043,%dummy}, %rd21725;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11044}, %rd21725;
	}
	shf.r.wrap.b32 	%r11045, %r11044, %r11043, 19;
	shf.r.wrap.b32 	%r11046, %r11043, %r11044, 19;
	mov.b64 	%rd16668, {%r11046, %r11045};
	shf.l.wrap.b32 	%r11047, %r11043, %r11044, 3;
	shf.l.wrap.b32 	%r11048, %r11044, %r11043, 3;
	mov.b64 	%rd16669, {%r11048, %r11047};
	shr.u64 	%rd16670, %rd21725, 6;
	xor.b64  	%rd16671, %rd16668, %rd16670;
	xor.b64  	%rd16672, %rd16671, %rd16669;
	shr.u64 	%rd16673, %rd21722, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11049,%dummy}, %rd21722;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11050}, %rd21722;
	}
	shf.r.wrap.b32 	%r11051, %r11050, %r11049, 1;
	shf.r.wrap.b32 	%r11052, %r11049, %r11050, 1;
	mov.b64 	%rd16674, {%r11052, %r11051};
	xor.b64  	%rd16675, %rd16674, %rd16673;
	shf.r.wrap.b32 	%r11053, %r11050, %r11049, 8;
	shf.r.wrap.b32 	%r11054, %r11049, %r11050, 8;
	mov.b64 	%rd16676, {%r11054, %r11053};
	xor.b64  	%rd16677, %rd16675, %rd16676;
	add.s64 	%rd16678, %rd21739, %rd21723;
	add.s64 	%rd16679, %rd16678, %rd16672;
	add.s64 	%rd21723, %rd16679, %rd16677;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11055,%dummy}, %rd21724;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11056}, %rd21724;
	}
	shf.r.wrap.b32 	%r11057, %r11056, %r11055, 19;
	shf.r.wrap.b32 	%r11058, %r11055, %r11056, 19;
	mov.b64 	%rd16680, {%r11058, %r11057};
	shf.l.wrap.b32 	%r11059, %r11055, %r11056, 3;
	shf.l.wrap.b32 	%r11060, %r11056, %r11055, 3;
	mov.b64 	%rd16681, {%r11060, %r11059};
	shr.u64 	%rd16682, %rd21724, 6;
	xor.b64  	%rd16683, %rd16680, %rd16682;
	xor.b64  	%rd16684, %rd16683, %rd16681;
	shr.u64 	%rd16685, %rd21721, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11061,%dummy}, %rd21721;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11062}, %rd21721;
	}
	shf.r.wrap.b32 	%r11063, %r11062, %r11061, 1;
	shf.r.wrap.b32 	%r11064, %r11061, %r11062, 1;
	mov.b64 	%rd16686, {%r11064, %r11063};
	xor.b64  	%rd16687, %rd16686, %rd16685;
	shf.r.wrap.b32 	%r11065, %r11062, %r11061, 8;
	shf.r.wrap.b32 	%r11066, %r11061, %r11062, 8;
	mov.b64 	%rd16688, {%r11066, %r11065};
	xor.b64  	%rd16689, %rd16687, %rd16688;
	add.s64 	%rd16690, %rd21740, %rd21722;
	add.s64 	%rd16691, %rd16690, %rd16684;
	add.s64 	%rd21722, %rd16691, %rd16689;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11067,%dummy}, %rd21723;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11068}, %rd21723;
	}
	shf.r.wrap.b32 	%r11069, %r11068, %r11067, 19;
	shf.r.wrap.b32 	%r11070, %r11067, %r11068, 19;
	mov.b64 	%rd16692, {%r11070, %r11069};
	shf.l.wrap.b32 	%r11071, %r11067, %r11068, 3;
	shf.l.wrap.b32 	%r11072, %r11068, %r11067, 3;
	mov.b64 	%rd16693, {%r11072, %r11071};
	shr.u64 	%rd16694, %rd21723, 6;
	xor.b64  	%rd16695, %rd16692, %rd16694;
	xor.b64  	%rd16696, %rd16695, %rd16693;
	shr.u64 	%rd16697, %rd21720, 7;
	shf.r.wrap.b32 	%r11073, %r10912, %r10911, 1;
	shf.r.wrap.b32 	%r11074, %r10911, %r10912, 1;
	mov.b64 	%rd16698, {%r11074, %r11073};
	xor.b64  	%rd16699, %rd16698, %rd16697;
	shf.r.wrap.b32 	%r11075, %r10912, %r10911, 8;
	shf.r.wrap.b32 	%r11076, %r10911, %r10912, 8;
	mov.b64 	%rd16700, {%r11076, %r11075};
	xor.b64  	%rd16701, %rd16699, %rd16700;
	add.s64 	%rd16702, %rd21741, %rd21721;
	add.s64 	%rd16703, %rd16702, %rd16696;
	add.s64 	%rd21721, %rd16703, %rd16701;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11077,%dummy}, %rd21722;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11078}, %rd21722;
	}
	shf.r.wrap.b32 	%r11079, %r11078, %r11077, 19;
	shf.r.wrap.b32 	%r11080, %r11077, %r11078, 19;
	mov.b64 	%rd16704, {%r11080, %r11079};
	shf.l.wrap.b32 	%r11081, %r11077, %r11078, 3;
	shf.l.wrap.b32 	%r11082, %r11078, %r11077, 3;
	mov.b64 	%rd16705, {%r11082, %r11081};
	shr.u64 	%rd16706, %rd21722, 6;
	xor.b64  	%rd16707, %rd16704, %rd16706;
	xor.b64  	%rd16708, %rd16707, %rd16705;
	shr.u64 	%rd16709, %rd21719, 7;
	shf.r.wrap.b32 	%r11083, %r10924, %r10923, 1;
	shf.r.wrap.b32 	%r11084, %r10923, %r10924, 1;
	mov.b64 	%rd16710, {%r11084, %r11083};
	xor.b64  	%rd16711, %rd16710, %rd16709;
	shf.r.wrap.b32 	%r11085, %r10924, %r10923, 8;
	shf.r.wrap.b32 	%r11086, %r10923, %r10924, 8;
	mov.b64 	%rd16712, {%r11086, %r11085};
	xor.b64  	%rd16713, %rd16711, %rd16712;
	add.s64 	%rd16714, %rd21742, %rd21720;
	add.s64 	%rd16715, %rd16714, %rd16708;
	add.s64 	%rd21720, %rd16715, %rd16713;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11087,%dummy}, %rd21721;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11088}, %rd21721;
	}
	shf.r.wrap.b32 	%r11089, %r11088, %r11087, 19;
	shf.r.wrap.b32 	%r11090, %r11087, %r11088, 19;
	mov.b64 	%rd16716, {%r11090, %r11089};
	shf.l.wrap.b32 	%r11091, %r11087, %r11088, 3;
	shf.l.wrap.b32 	%r11092, %r11088, %r11087, 3;
	mov.b64 	%rd16717, {%r11092, %r11091};
	shr.u64 	%rd16718, %rd21721, 6;
	xor.b64  	%rd16719, %rd16716, %rd16718;
	xor.b64  	%rd16720, %rd16719, %rd16717;
	shf.r.wrap.b32 	%r11093, %r10936, %r10935, 1;
	shf.r.wrap.b32 	%r11094, %r10935, %r10936, 1;
	mov.b64 	%rd16721, {%r11094, %r11093};
	shf.r.wrap.b32 	%r11095, %r10936, %r10935, 8;
	shf.r.wrap.b32 	%r11096, %r10935, %r10936, 8;
	mov.b64 	%rd16722, {%r11096, %r11095};
	shr.u64 	%rd16723, %rd21735, 7;
	xor.b64  	%rd16724, %rd16721, %rd16723;
	xor.b64  	%rd16725, %rd16724, %rd16722;
	add.s64 	%rd16726, %rd21726, %rd21719;
	add.s64 	%rd16727, %rd16726, %rd16720;
	add.s64 	%rd21719, %rd16727, %rd16725;
	mul.wide.s32 	%rd16728, %r14478, 8;
	mov.u64 	%rd16729, k_sha512;
	add.s64 	%rd16730, %rd16729, %rd16728;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11097,%dummy}, %rd21731;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11098}, %rd21731;
	}
	shf.r.wrap.b32 	%r11099, %r11098, %r11097, 18;
	shf.r.wrap.b32 	%r11100, %r11097, %r11098, 18;
	mov.b64 	%rd16731, {%r11100, %r11099};
	shf.r.wrap.b32 	%r11101, %r11098, %r11097, 14;
	shf.r.wrap.b32 	%r11102, %r11097, %r11098, 14;
	mov.b64 	%rd16732, {%r11102, %r11101};
	xor.b64  	%rd16733, %rd16731, %rd16732;
	shf.l.wrap.b32 	%r11103, %r11097, %r11098, 23;
	shf.l.wrap.b32 	%r11104, %r11098, %r11097, 23;
	mov.b64 	%rd16734, {%r11104, %r11103};
	xor.b64  	%rd16735, %rd16733, %rd16734;
	xor.b64  	%rd16736, %rd21733, %rd21732;
	and.b64  	%rd16737, %rd16736, %rd21731;
	xor.b64  	%rd16738, %rd16737, %rd21733;
	add.s64 	%rd16739, %rd16738, %rd21734;
	add.s64 	%rd16740, %rd16739, %rd21735;
	ld.const.u64 	%rd16741, [%rd16730];
	add.s64 	%rd16742, %rd16740, %rd16741;
	add.s64 	%rd16743, %rd16742, %rd16735;
	add.s64 	%rd16744, %rd16743, %rd21730;
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11105}, %rd21727;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11106,%dummy}, %rd21727;
	}
	shf.l.wrap.b32 	%r11107, %r11106, %r11105, 30;
	shf.l.wrap.b32 	%r11108, %r11105, %r11106, 30;
	mov.b64 	%rd16745, {%r11108, %r11107};
	shf.r.wrap.b32 	%r11109, %r11105, %r11106, 28;
	shf.r.wrap.b32 	%r11110, %r11106, %r11105, 28;
	mov.b64 	%rd16746, {%r11110, %r11109};
	xor.b64  	%rd16747, %rd16745, %rd16746;
	shf.l.wrap.b32 	%r11111, %r11106, %r11105, 25;
	shf.l.wrap.b32 	%r11112, %r11105, %r11106, 25;
	mov.b64 	%rd16748, {%r11112, %r11111};
	xor.b64  	%rd16749, %rd16747, %rd16748;
	xor.b64  	%rd16750, %rd21728, %rd21727;
	xor.b64  	%rd16751, %rd21729, %rd21727;
	and.b64  	%rd16752, %rd16751, %rd16750;
	xor.b64  	%rd16753, %rd16752, %rd21727;
	add.s64 	%rd16754, %rd16743, %rd16753;
	add.s64 	%rd16755, %rd16754, %rd16749;
	add.s32 	%r11113, %r14478, 1;
	mul.wide.s32 	%rd16756, %r11113, 8;
	add.s64 	%rd16757, %rd16729, %rd16756;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11114,%dummy}, %rd16744;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11115}, %rd16744;
	}
	shf.r.wrap.b32 	%r11116, %r11115, %r11114, 14;
	shf.r.wrap.b32 	%r11117, %r11114, %r11115, 14;
	mov.b64 	%rd16758, {%r11117, %r11116};
	shf.r.wrap.b32 	%r11118, %r11115, %r11114, 18;
	shf.r.wrap.b32 	%r11119, %r11114, %r11115, 18;
	mov.b64 	%rd16759, {%r11119, %r11118};
	xor.b64  	%rd16760, %rd16759, %rd16758;
	shf.l.wrap.b32 	%r11120, %r11114, %r11115, 23;
	shf.l.wrap.b32 	%r11121, %r11115, %r11114, 23;
	mov.b64 	%rd16761, {%r11121, %r11120};
	xor.b64  	%rd16762, %rd16760, %rd16761;
	xor.b64  	%rd16763, %rd21732, %rd21731;
	and.b64  	%rd16764, %rd16744, %rd16763;
	xor.b64  	%rd16765, %rd16764, %rd21732;
	add.s64 	%rd16766, %rd21736, %rd21733;
	ld.const.u64 	%rd16767, [%rd16757];
	add.s64 	%rd16768, %rd16766, %rd16767;
	add.s64 	%rd16769, %rd16768, %rd16765;
	add.s64 	%rd16770, %rd16769, %rd16762;
	add.s64 	%rd16771, %rd16770, %rd21729;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11122,%dummy}, %rd16755;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11123}, %rd16755;
	}
	shf.r.wrap.b32 	%r11124, %r11123, %r11122, 28;
	shf.r.wrap.b32 	%r11125, %r11122, %r11123, 28;
	mov.b64 	%rd16772, {%r11125, %r11124};
	shf.l.wrap.b32 	%r11126, %r11122, %r11123, 30;
	shf.l.wrap.b32 	%r11127, %r11123, %r11122, 30;
	mov.b64 	%rd16773, {%r11127, %r11126};
	xor.b64  	%rd16774, %rd16773, %rd16772;
	shf.l.wrap.b32 	%r11128, %r11122, %r11123, 25;
	shf.l.wrap.b32 	%r11129, %r11123, %r11122, 25;
	mov.b64 	%rd16775, {%r11129, %r11128};
	xor.b64  	%rd16776, %rd16774, %rd16775;
	xor.b64  	%rd16777, %rd16755, %rd21728;
	xor.b64  	%rd16778, %rd16755, %rd21727;
	and.b64  	%rd16779, %rd16778, %rd16777;
	xor.b64  	%rd16780, %rd16779, %rd16755;
	add.s64 	%rd16781, %rd16770, %rd16780;
	add.s64 	%rd16782, %rd16781, %rd16776;
	add.s32 	%r11130, %r14478, 2;
	mul.wide.s32 	%rd16783, %r11130, 8;
	add.s64 	%rd16784, %rd16729, %rd16783;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11131,%dummy}, %rd16771;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11132}, %rd16771;
	}
	shf.r.wrap.b32 	%r11133, %r11132, %r11131, 14;
	shf.r.wrap.b32 	%r11134, %r11131, %r11132, 14;
	mov.b64 	%rd16785, {%r11134, %r11133};
	shf.r.wrap.b32 	%r11135, %r11132, %r11131, 18;
	shf.r.wrap.b32 	%r11136, %r11131, %r11132, 18;
	mov.b64 	%rd16786, {%r11136, %r11135};
	xor.b64  	%rd16787, %rd16786, %rd16785;
	shf.l.wrap.b32 	%r11137, %r11131, %r11132, 23;
	shf.l.wrap.b32 	%r11138, %r11132, %r11131, 23;
	mov.b64 	%rd16788, {%r11138, %r11137};
	xor.b64  	%rd16789, %rd16787, %rd16788;
	xor.b64  	%rd16790, %rd16744, %rd21731;
	and.b64  	%rd16791, %rd16771, %rd16790;
	xor.b64  	%rd16792, %rd16791, %rd21731;
	add.s64 	%rd16793, %rd21737, %rd21732;
	ld.const.u64 	%rd16794, [%rd16784];
	add.s64 	%rd16795, %rd16793, %rd16794;
	add.s64 	%rd16796, %rd16795, %rd16792;
	add.s64 	%rd16797, %rd16796, %rd16789;
	add.s64 	%rd16798, %rd16797, %rd21728;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11139,%dummy}, %rd16782;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11140}, %rd16782;
	}
	shf.r.wrap.b32 	%r11141, %r11140, %r11139, 28;
	shf.r.wrap.b32 	%r11142, %r11139, %r11140, 28;
	mov.b64 	%rd16799, {%r11142, %r11141};
	shf.l.wrap.b32 	%r11143, %r11139, %r11140, 30;
	shf.l.wrap.b32 	%r11144, %r11140, %r11139, 30;
	mov.b64 	%rd16800, {%r11144, %r11143};
	xor.b64  	%rd16801, %rd16800, %rd16799;
	shf.l.wrap.b32 	%r11145, %r11139, %r11140, 25;
	shf.l.wrap.b32 	%r11146, %r11140, %r11139, 25;
	mov.b64 	%rd16802, {%r11146, %r11145};
	xor.b64  	%rd16803, %rd16801, %rd16802;
	xor.b64  	%rd16804, %rd16782, %rd21727;
	xor.b64  	%rd16805, %rd16782, %rd16755;
	and.b64  	%rd16806, %rd16805, %rd16804;
	xor.b64  	%rd16807, %rd16806, %rd16782;
	add.s64 	%rd16808, %rd16797, %rd16807;
	add.s64 	%rd16809, %rd16808, %rd16803;
	add.s32 	%r11147, %r14478, 3;
	mul.wide.s32 	%rd16810, %r11147, 8;
	add.s64 	%rd16811, %rd16729, %rd16810;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11148,%dummy}, %rd16798;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11149}, %rd16798;
	}
	shf.r.wrap.b32 	%r11150, %r11149, %r11148, 14;
	shf.r.wrap.b32 	%r11151, %r11148, %r11149, 14;
	mov.b64 	%rd16812, {%r11151, %r11150};
	shf.r.wrap.b32 	%r11152, %r11149, %r11148, 18;
	shf.r.wrap.b32 	%r11153, %r11148, %r11149, 18;
	mov.b64 	%rd16813, {%r11153, %r11152};
	xor.b64  	%rd16814, %rd16813, %rd16812;
	shf.l.wrap.b32 	%r11154, %r11148, %r11149, 23;
	shf.l.wrap.b32 	%r11155, %r11149, %r11148, 23;
	mov.b64 	%rd16815, {%r11155, %r11154};
	xor.b64  	%rd16816, %rd16814, %rd16815;
	xor.b64  	%rd16817, %rd16771, %rd16744;
	and.b64  	%rd16818, %rd16798, %rd16817;
	xor.b64  	%rd16819, %rd16818, %rd16744;
	add.s64 	%rd16820, %rd21738, %rd21731;
	ld.const.u64 	%rd16821, [%rd16811];
	add.s64 	%rd16822, %rd16820, %rd16821;
	add.s64 	%rd16823, %rd16822, %rd16819;
	add.s64 	%rd16824, %rd16823, %rd16816;
	add.s64 	%rd16825, %rd16824, %rd21727;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11156,%dummy}, %rd16809;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11157}, %rd16809;
	}
	shf.r.wrap.b32 	%r11158, %r11157, %r11156, 28;
	shf.r.wrap.b32 	%r11159, %r11156, %r11157, 28;
	mov.b64 	%rd16826, {%r11159, %r11158};
	shf.l.wrap.b32 	%r11160, %r11156, %r11157, 30;
	shf.l.wrap.b32 	%r11161, %r11157, %r11156, 30;
	mov.b64 	%rd16827, {%r11161, %r11160};
	xor.b64  	%rd16828, %rd16827, %rd16826;
	shf.l.wrap.b32 	%r11162, %r11156, %r11157, 25;
	shf.l.wrap.b32 	%r11163, %r11157, %r11156, 25;
	mov.b64 	%rd16829, {%r11163, %r11162};
	xor.b64  	%rd16830, %rd16828, %rd16829;
	xor.b64  	%rd16831, %rd16809, %rd16755;
	xor.b64  	%rd16832, %rd16809, %rd16782;
	and.b64  	%rd16833, %rd16832, %rd16831;
	xor.b64  	%rd16834, %rd16833, %rd16809;
	add.s64 	%rd16835, %rd16824, %rd16834;
	add.s64 	%rd16836, %rd16835, %rd16830;
	add.s32 	%r11164, %r14478, 4;
	mul.wide.s32 	%rd16837, %r11164, 8;
	add.s64 	%rd16838, %rd16729, %rd16837;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11165,%dummy}, %rd16825;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11166}, %rd16825;
	}
	shf.r.wrap.b32 	%r11167, %r11166, %r11165, 14;
	shf.r.wrap.b32 	%r11168, %r11165, %r11166, 14;
	mov.b64 	%rd16839, {%r11168, %r11167};
	shf.r.wrap.b32 	%r11169, %r11166, %r11165, 18;
	shf.r.wrap.b32 	%r11170, %r11165, %r11166, 18;
	mov.b64 	%rd16840, {%r11170, %r11169};
	xor.b64  	%rd16841, %rd16840, %rd16839;
	shf.l.wrap.b32 	%r11171, %r11165, %r11166, 23;
	shf.l.wrap.b32 	%r11172, %r11166, %r11165, 23;
	mov.b64 	%rd16842, {%r11172, %r11171};
	xor.b64  	%rd16843, %rd16841, %rd16842;
	xor.b64  	%rd16844, %rd16798, %rd16771;
	and.b64  	%rd16845, %rd16825, %rd16844;
	xor.b64  	%rd16846, %rd16845, %rd16771;
	add.s64 	%rd16847, %rd16744, %rd21739;
	ld.const.u64 	%rd16848, [%rd16838];
	add.s64 	%rd16849, %rd16847, %rd16848;
	add.s64 	%rd16850, %rd16849, %rd16846;
	add.s64 	%rd16851, %rd16850, %rd16843;
	add.s64 	%rd16852, %rd16851, %rd16755;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11173,%dummy}, %rd16836;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11174}, %rd16836;
	}
	shf.r.wrap.b32 	%r11175, %r11174, %r11173, 28;
	shf.r.wrap.b32 	%r11176, %r11173, %r11174, 28;
	mov.b64 	%rd16853, {%r11176, %r11175};
	shf.l.wrap.b32 	%r11177, %r11173, %r11174, 30;
	shf.l.wrap.b32 	%r11178, %r11174, %r11173, 30;
	mov.b64 	%rd16854, {%r11178, %r11177};
	xor.b64  	%rd16855, %rd16854, %rd16853;
	shf.l.wrap.b32 	%r11179, %r11173, %r11174, 25;
	shf.l.wrap.b32 	%r11180, %r11174, %r11173, 25;
	mov.b64 	%rd16856, {%r11180, %r11179};
	xor.b64  	%rd16857, %rd16855, %rd16856;
	xor.b64  	%rd16858, %rd16836, %rd16782;
	xor.b64  	%rd16859, %rd16836, %rd16809;
	and.b64  	%rd16860, %rd16859, %rd16858;
	xor.b64  	%rd16861, %rd16860, %rd16836;
	add.s64 	%rd16862, %rd16851, %rd16861;
	add.s64 	%rd16863, %rd16862, %rd16857;
	add.s32 	%r11181, %r14478, 5;
	mul.wide.s32 	%rd16864, %r11181, 8;
	add.s64 	%rd16865, %rd16729, %rd16864;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11182,%dummy}, %rd16852;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11183}, %rd16852;
	}
	shf.r.wrap.b32 	%r11184, %r11183, %r11182, 14;
	shf.r.wrap.b32 	%r11185, %r11182, %r11183, 14;
	mov.b64 	%rd16866, {%r11185, %r11184};
	shf.r.wrap.b32 	%r11186, %r11183, %r11182, 18;
	shf.r.wrap.b32 	%r11187, %r11182, %r11183, 18;
	mov.b64 	%rd16867, {%r11187, %r11186};
	xor.b64  	%rd16868, %rd16867, %rd16866;
	shf.l.wrap.b32 	%r11188, %r11182, %r11183, 23;
	shf.l.wrap.b32 	%r11189, %r11183, %r11182, 23;
	mov.b64 	%rd16869, {%r11189, %r11188};
	xor.b64  	%rd16870, %rd16868, %rd16869;
	xor.b64  	%rd16871, %rd16825, %rd16798;
	and.b64  	%rd16872, %rd16852, %rd16871;
	xor.b64  	%rd16873, %rd16872, %rd16798;
	add.s64 	%rd16874, %rd16771, %rd21740;
	ld.const.u64 	%rd16875, [%rd16865];
	add.s64 	%rd16876, %rd16874, %rd16875;
	add.s64 	%rd16877, %rd16876, %rd16873;
	add.s64 	%rd16878, %rd16877, %rd16870;
	add.s64 	%rd16879, %rd16878, %rd16782;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11190,%dummy}, %rd16863;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11191}, %rd16863;
	}
	shf.r.wrap.b32 	%r11192, %r11191, %r11190, 28;
	shf.r.wrap.b32 	%r11193, %r11190, %r11191, 28;
	mov.b64 	%rd16880, {%r11193, %r11192};
	shf.l.wrap.b32 	%r11194, %r11190, %r11191, 30;
	shf.l.wrap.b32 	%r11195, %r11191, %r11190, 30;
	mov.b64 	%rd16881, {%r11195, %r11194};
	xor.b64  	%rd16882, %rd16881, %rd16880;
	shf.l.wrap.b32 	%r11196, %r11190, %r11191, 25;
	shf.l.wrap.b32 	%r11197, %r11191, %r11190, 25;
	mov.b64 	%rd16883, {%r11197, %r11196};
	xor.b64  	%rd16884, %rd16882, %rd16883;
	xor.b64  	%rd16885, %rd16863, %rd16809;
	xor.b64  	%rd16886, %rd16863, %rd16836;
	and.b64  	%rd16887, %rd16886, %rd16885;
	xor.b64  	%rd16888, %rd16887, %rd16863;
	add.s64 	%rd16889, %rd16878, %rd16888;
	add.s64 	%rd16890, %rd16889, %rd16884;
	add.s32 	%r11198, %r14478, 6;
	mul.wide.s32 	%rd16891, %r11198, 8;
	add.s64 	%rd16892, %rd16729, %rd16891;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11199,%dummy}, %rd16879;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11200}, %rd16879;
	}
	shf.r.wrap.b32 	%r11201, %r11200, %r11199, 14;
	shf.r.wrap.b32 	%r11202, %r11199, %r11200, 14;
	mov.b64 	%rd16893, {%r11202, %r11201};
	shf.r.wrap.b32 	%r11203, %r11200, %r11199, 18;
	shf.r.wrap.b32 	%r11204, %r11199, %r11200, 18;
	mov.b64 	%rd16894, {%r11204, %r11203};
	xor.b64  	%rd16895, %rd16894, %rd16893;
	shf.l.wrap.b32 	%r11205, %r11199, %r11200, 23;
	shf.l.wrap.b32 	%r11206, %r11200, %r11199, 23;
	mov.b64 	%rd16896, {%r11206, %r11205};
	xor.b64  	%rd16897, %rd16895, %rd16896;
	xor.b64  	%rd16898, %rd16852, %rd16825;
	and.b64  	%rd16899, %rd16879, %rd16898;
	xor.b64  	%rd16900, %rd16899, %rd16825;
	add.s64 	%rd16901, %rd16798, %rd21741;
	ld.const.u64 	%rd16902, [%rd16892];
	add.s64 	%rd16903, %rd16901, %rd16902;
	add.s64 	%rd16904, %rd16903, %rd16900;
	add.s64 	%rd16905, %rd16904, %rd16897;
	add.s64 	%rd16906, %rd16905, %rd16809;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11207,%dummy}, %rd16890;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11208}, %rd16890;
	}
	shf.r.wrap.b32 	%r11209, %r11208, %r11207, 28;
	shf.r.wrap.b32 	%r11210, %r11207, %r11208, 28;
	mov.b64 	%rd16907, {%r11210, %r11209};
	shf.l.wrap.b32 	%r11211, %r11207, %r11208, 30;
	shf.l.wrap.b32 	%r11212, %r11208, %r11207, 30;
	mov.b64 	%rd16908, {%r11212, %r11211};
	xor.b64  	%rd16909, %rd16908, %rd16907;
	shf.l.wrap.b32 	%r11213, %r11207, %r11208, 25;
	shf.l.wrap.b32 	%r11214, %r11208, %r11207, 25;
	mov.b64 	%rd16910, {%r11214, %r11213};
	xor.b64  	%rd16911, %rd16909, %rd16910;
	xor.b64  	%rd16912, %rd16890, %rd16836;
	xor.b64  	%rd16913, %rd16890, %rd16863;
	and.b64  	%rd16914, %rd16913, %rd16912;
	xor.b64  	%rd16915, %rd16914, %rd16890;
	add.s64 	%rd16916, %rd16905, %rd16915;
	add.s64 	%rd16917, %rd16916, %rd16911;
	add.s32 	%r11215, %r14478, 7;
	mul.wide.s32 	%rd16918, %r11215, 8;
	add.s64 	%rd16919, %rd16729, %rd16918;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11216,%dummy}, %rd16906;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11217}, %rd16906;
	}
	shf.r.wrap.b32 	%r11218, %r11217, %r11216, 14;
	shf.r.wrap.b32 	%r11219, %r11216, %r11217, 14;
	mov.b64 	%rd16920, {%r11219, %r11218};
	shf.r.wrap.b32 	%r11220, %r11217, %r11216, 18;
	shf.r.wrap.b32 	%r11221, %r11216, %r11217, 18;
	mov.b64 	%rd16921, {%r11221, %r11220};
	xor.b64  	%rd16922, %rd16921, %rd16920;
	shf.l.wrap.b32 	%r11222, %r11216, %r11217, 23;
	shf.l.wrap.b32 	%r11223, %r11217, %r11216, 23;
	mov.b64 	%rd16923, {%r11223, %r11222};
	xor.b64  	%rd16924, %rd16922, %rd16923;
	xor.b64  	%rd16925, %rd16879, %rd16852;
	and.b64  	%rd16926, %rd16906, %rd16925;
	xor.b64  	%rd16927, %rd16926, %rd16852;
	add.s64 	%rd16928, %rd16825, %rd21742;
	ld.const.u64 	%rd16929, [%rd16919];
	add.s64 	%rd16930, %rd16928, %rd16929;
	add.s64 	%rd16931, %rd16930, %rd16927;
	add.s64 	%rd16932, %rd16931, %rd16924;
	add.s64 	%rd16933, %rd16932, %rd16836;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11224,%dummy}, %rd16917;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11225}, %rd16917;
	}
	shf.r.wrap.b32 	%r11226, %r11225, %r11224, 28;
	shf.r.wrap.b32 	%r11227, %r11224, %r11225, 28;
	mov.b64 	%rd16934, {%r11227, %r11226};
	shf.l.wrap.b32 	%r11228, %r11224, %r11225, 30;
	shf.l.wrap.b32 	%r11229, %r11225, %r11224, 30;
	mov.b64 	%rd16935, {%r11229, %r11228};
	xor.b64  	%rd16936, %rd16935, %rd16934;
	shf.l.wrap.b32 	%r11230, %r11224, %r11225, 25;
	shf.l.wrap.b32 	%r11231, %r11225, %r11224, 25;
	mov.b64 	%rd16937, {%r11231, %r11230};
	xor.b64  	%rd16938, %rd16936, %rd16937;
	xor.b64  	%rd16939, %rd16917, %rd16863;
	xor.b64  	%rd16940, %rd16917, %rd16890;
	and.b64  	%rd16941, %rd16940, %rd16939;
	xor.b64  	%rd16942, %rd16941, %rd16917;
	add.s64 	%rd16943, %rd16932, %rd16942;
	add.s64 	%rd16944, %rd16943, %rd16938;
	add.s32 	%r11232, %r14478, 8;
	mul.wide.s32 	%rd16945, %r11232, 8;
	add.s64 	%rd16946, %rd16729, %rd16945;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11233,%dummy}, %rd16933;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11234}, %rd16933;
	}
	shf.r.wrap.b32 	%r11235, %r11234, %r11233, 14;
	shf.r.wrap.b32 	%r11236, %r11233, %r11234, 14;
	mov.b64 	%rd16947, {%r11236, %r11235};
	shf.r.wrap.b32 	%r11237, %r11234, %r11233, 18;
	shf.r.wrap.b32 	%r11238, %r11233, %r11234, 18;
	mov.b64 	%rd16948, {%r11238, %r11237};
	xor.b64  	%rd16949, %rd16948, %rd16947;
	shf.l.wrap.b32 	%r11239, %r11233, %r11234, 23;
	shf.l.wrap.b32 	%r11240, %r11234, %r11233, 23;
	mov.b64 	%rd16950, {%r11240, %r11239};
	xor.b64  	%rd16951, %rd16949, %rd16950;
	xor.b64  	%rd16952, %rd16906, %rd16879;
	and.b64  	%rd16953, %rd16933, %rd16952;
	xor.b64  	%rd16954, %rd16953, %rd16879;
	add.s64 	%rd16955, %rd16852, %rd21726;
	ld.const.u64 	%rd16956, [%rd16946];
	add.s64 	%rd16957, %rd16955, %rd16956;
	add.s64 	%rd16958, %rd16957, %rd16954;
	add.s64 	%rd16959, %rd16958, %rd16951;
	add.s64 	%rd16960, %rd16959, %rd16863;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11241,%dummy}, %rd16944;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11242}, %rd16944;
	}
	shf.r.wrap.b32 	%r11243, %r11242, %r11241, 28;
	shf.r.wrap.b32 	%r11244, %r11241, %r11242, 28;
	mov.b64 	%rd16961, {%r11244, %r11243};
	shf.l.wrap.b32 	%r11245, %r11241, %r11242, 30;
	shf.l.wrap.b32 	%r11246, %r11242, %r11241, 30;
	mov.b64 	%rd16962, {%r11246, %r11245};
	xor.b64  	%rd16963, %rd16962, %rd16961;
	shf.l.wrap.b32 	%r11247, %r11241, %r11242, 25;
	shf.l.wrap.b32 	%r11248, %r11242, %r11241, 25;
	mov.b64 	%rd16964, {%r11248, %r11247};
	xor.b64  	%rd16965, %rd16963, %rd16964;
	xor.b64  	%rd16966, %rd16944, %rd16890;
	xor.b64  	%rd16967, %rd16944, %rd16917;
	and.b64  	%rd16968, %rd16967, %rd16966;
	xor.b64  	%rd16969, %rd16968, %rd16944;
	add.s64 	%rd16970, %rd16959, %rd16969;
	add.s64 	%rd16971, %rd16970, %rd16965;
	add.s32 	%r11249, %r14478, 9;
	mul.wide.s32 	%rd16972, %r11249, 8;
	add.s64 	%rd16973, %rd16729, %rd16972;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11250,%dummy}, %rd16960;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11251}, %rd16960;
	}
	shf.r.wrap.b32 	%r11252, %r11251, %r11250, 14;
	shf.r.wrap.b32 	%r11253, %r11250, %r11251, 14;
	mov.b64 	%rd16974, {%r11253, %r11252};
	shf.r.wrap.b32 	%r11254, %r11251, %r11250, 18;
	shf.r.wrap.b32 	%r11255, %r11250, %r11251, 18;
	mov.b64 	%rd16975, {%r11255, %r11254};
	xor.b64  	%rd16976, %rd16975, %rd16974;
	shf.l.wrap.b32 	%r11256, %r11250, %r11251, 23;
	shf.l.wrap.b32 	%r11257, %r11251, %r11250, 23;
	mov.b64 	%rd16977, {%r11257, %r11256};
	xor.b64  	%rd16978, %rd16976, %rd16977;
	xor.b64  	%rd16979, %rd16933, %rd16906;
	and.b64  	%rd16980, %rd16960, %rd16979;
	xor.b64  	%rd16981, %rd16980, %rd16906;
	add.s64 	%rd16982, %rd16879, %rd21725;
	ld.const.u64 	%rd16983, [%rd16973];
	add.s64 	%rd16984, %rd16982, %rd16983;
	add.s64 	%rd16985, %rd16984, %rd16981;
	add.s64 	%rd16986, %rd16985, %rd16978;
	add.s64 	%rd16987, %rd16986, %rd16890;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11258,%dummy}, %rd16971;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11259}, %rd16971;
	}
	shf.r.wrap.b32 	%r11260, %r11259, %r11258, 28;
	shf.r.wrap.b32 	%r11261, %r11258, %r11259, 28;
	mov.b64 	%rd16988, {%r11261, %r11260};
	shf.l.wrap.b32 	%r11262, %r11258, %r11259, 30;
	shf.l.wrap.b32 	%r11263, %r11259, %r11258, 30;
	mov.b64 	%rd16989, {%r11263, %r11262};
	xor.b64  	%rd16990, %rd16989, %rd16988;
	shf.l.wrap.b32 	%r11264, %r11258, %r11259, 25;
	shf.l.wrap.b32 	%r11265, %r11259, %r11258, 25;
	mov.b64 	%rd16991, {%r11265, %r11264};
	xor.b64  	%rd16992, %rd16990, %rd16991;
	xor.b64  	%rd16993, %rd16971, %rd16917;
	xor.b64  	%rd16994, %rd16971, %rd16944;
	and.b64  	%rd16995, %rd16994, %rd16993;
	xor.b64  	%rd16996, %rd16995, %rd16971;
	add.s64 	%rd16997, %rd16986, %rd16996;
	add.s64 	%rd16998, %rd16997, %rd16992;
	add.s32 	%r11266, %r14478, 10;
	mul.wide.s32 	%rd16999, %r11266, 8;
	add.s64 	%rd17000, %rd16729, %rd16999;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11267,%dummy}, %rd16987;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11268}, %rd16987;
	}
	shf.r.wrap.b32 	%r11269, %r11268, %r11267, 14;
	shf.r.wrap.b32 	%r11270, %r11267, %r11268, 14;
	mov.b64 	%rd17001, {%r11270, %r11269};
	shf.r.wrap.b32 	%r11271, %r11268, %r11267, 18;
	shf.r.wrap.b32 	%r11272, %r11267, %r11268, 18;
	mov.b64 	%rd17002, {%r11272, %r11271};
	xor.b64  	%rd17003, %rd17002, %rd17001;
	shf.l.wrap.b32 	%r11273, %r11267, %r11268, 23;
	shf.l.wrap.b32 	%r11274, %r11268, %r11267, 23;
	mov.b64 	%rd17004, {%r11274, %r11273};
	xor.b64  	%rd17005, %rd17003, %rd17004;
	xor.b64  	%rd17006, %rd16960, %rd16933;
	and.b64  	%rd17007, %rd16987, %rd17006;
	xor.b64  	%rd17008, %rd17007, %rd16933;
	add.s64 	%rd17009, %rd16906, %rd21724;
	ld.const.u64 	%rd17010, [%rd17000];
	add.s64 	%rd17011, %rd17009, %rd17010;
	add.s64 	%rd17012, %rd17011, %rd17008;
	add.s64 	%rd17013, %rd17012, %rd17005;
	add.s64 	%rd17014, %rd17013, %rd16917;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11275,%dummy}, %rd16998;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11276}, %rd16998;
	}
	shf.r.wrap.b32 	%r11277, %r11276, %r11275, 28;
	shf.r.wrap.b32 	%r11278, %r11275, %r11276, 28;
	mov.b64 	%rd17015, {%r11278, %r11277};
	shf.l.wrap.b32 	%r11279, %r11275, %r11276, 30;
	shf.l.wrap.b32 	%r11280, %r11276, %r11275, 30;
	mov.b64 	%rd17016, {%r11280, %r11279};
	xor.b64  	%rd17017, %rd17016, %rd17015;
	shf.l.wrap.b32 	%r11281, %r11275, %r11276, 25;
	shf.l.wrap.b32 	%r11282, %r11276, %r11275, 25;
	mov.b64 	%rd17018, {%r11282, %r11281};
	xor.b64  	%rd17019, %rd17017, %rd17018;
	xor.b64  	%rd17020, %rd16998, %rd16944;
	xor.b64  	%rd17021, %rd16998, %rd16971;
	and.b64  	%rd17022, %rd17021, %rd17020;
	xor.b64  	%rd17023, %rd17022, %rd16998;
	add.s64 	%rd17024, %rd17013, %rd17023;
	add.s64 	%rd17025, %rd17024, %rd17019;
	add.s32 	%r11283, %r14478, 11;
	mul.wide.s32 	%rd17026, %r11283, 8;
	add.s64 	%rd17027, %rd16729, %rd17026;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11284,%dummy}, %rd17014;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11285}, %rd17014;
	}
	shf.r.wrap.b32 	%r11286, %r11285, %r11284, 14;
	shf.r.wrap.b32 	%r11287, %r11284, %r11285, 14;
	mov.b64 	%rd17028, {%r11287, %r11286};
	shf.r.wrap.b32 	%r11288, %r11285, %r11284, 18;
	shf.r.wrap.b32 	%r11289, %r11284, %r11285, 18;
	mov.b64 	%rd17029, {%r11289, %r11288};
	xor.b64  	%rd17030, %rd17029, %rd17028;
	shf.l.wrap.b32 	%r11290, %r11284, %r11285, 23;
	shf.l.wrap.b32 	%r11291, %r11285, %r11284, 23;
	mov.b64 	%rd17031, {%r11291, %r11290};
	xor.b64  	%rd17032, %rd17030, %rd17031;
	xor.b64  	%rd17033, %rd16987, %rd16960;
	and.b64  	%rd17034, %rd17014, %rd17033;
	xor.b64  	%rd17035, %rd17034, %rd16960;
	add.s64 	%rd17036, %rd16933, %rd21723;
	ld.const.u64 	%rd17037, [%rd17027];
	add.s64 	%rd17038, %rd17036, %rd17037;
	add.s64 	%rd17039, %rd17038, %rd17035;
	add.s64 	%rd17040, %rd17039, %rd17032;
	add.s64 	%rd17041, %rd17040, %rd16944;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11292,%dummy}, %rd17025;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11293}, %rd17025;
	}
	shf.r.wrap.b32 	%r11294, %r11293, %r11292, 28;
	shf.r.wrap.b32 	%r11295, %r11292, %r11293, 28;
	mov.b64 	%rd17042, {%r11295, %r11294};
	shf.l.wrap.b32 	%r11296, %r11292, %r11293, 30;
	shf.l.wrap.b32 	%r11297, %r11293, %r11292, 30;
	mov.b64 	%rd17043, {%r11297, %r11296};
	xor.b64  	%rd17044, %rd17043, %rd17042;
	shf.l.wrap.b32 	%r11298, %r11292, %r11293, 25;
	shf.l.wrap.b32 	%r11299, %r11293, %r11292, 25;
	mov.b64 	%rd17045, {%r11299, %r11298};
	xor.b64  	%rd17046, %rd17044, %rd17045;
	xor.b64  	%rd17047, %rd17025, %rd16971;
	xor.b64  	%rd17048, %rd17025, %rd16998;
	and.b64  	%rd17049, %rd17048, %rd17047;
	xor.b64  	%rd17050, %rd17049, %rd17025;
	add.s64 	%rd17051, %rd17040, %rd17050;
	add.s64 	%rd17052, %rd17051, %rd17046;
	add.s32 	%r11300, %r14478, 12;
	mul.wide.s32 	%rd17053, %r11300, 8;
	add.s64 	%rd17054, %rd16729, %rd17053;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11301,%dummy}, %rd17041;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11302}, %rd17041;
	}
	shf.r.wrap.b32 	%r11303, %r11302, %r11301, 14;
	shf.r.wrap.b32 	%r11304, %r11301, %r11302, 14;
	mov.b64 	%rd17055, {%r11304, %r11303};
	shf.r.wrap.b32 	%r11305, %r11302, %r11301, 18;
	shf.r.wrap.b32 	%r11306, %r11301, %r11302, 18;
	mov.b64 	%rd17056, {%r11306, %r11305};
	xor.b64  	%rd17057, %rd17056, %rd17055;
	shf.l.wrap.b32 	%r11307, %r11301, %r11302, 23;
	shf.l.wrap.b32 	%r11308, %r11302, %r11301, 23;
	mov.b64 	%rd17058, {%r11308, %r11307};
	xor.b64  	%rd17059, %rd17057, %rd17058;
	xor.b64  	%rd17060, %rd17014, %rd16987;
	and.b64  	%rd17061, %rd17041, %rd17060;
	xor.b64  	%rd17062, %rd17061, %rd16987;
	add.s64 	%rd17063, %rd16960, %rd21722;
	ld.const.u64 	%rd17064, [%rd17054];
	add.s64 	%rd17065, %rd17063, %rd17064;
	add.s64 	%rd17066, %rd17065, %rd17062;
	add.s64 	%rd17067, %rd17066, %rd17059;
	add.s64 	%rd21734, %rd17067, %rd16971;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11309,%dummy}, %rd17052;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11310}, %rd17052;
	}
	shf.r.wrap.b32 	%r11311, %r11310, %r11309, 28;
	shf.r.wrap.b32 	%r11312, %r11309, %r11310, 28;
	mov.b64 	%rd17068, {%r11312, %r11311};
	shf.l.wrap.b32 	%r11313, %r11309, %r11310, 30;
	shf.l.wrap.b32 	%r11314, %r11310, %r11309, 30;
	mov.b64 	%rd17069, {%r11314, %r11313};
	xor.b64  	%rd17070, %rd17069, %rd17068;
	shf.l.wrap.b32 	%r11315, %r11309, %r11310, 25;
	shf.l.wrap.b32 	%r11316, %r11310, %r11309, 25;
	mov.b64 	%rd17071, {%r11316, %r11315};
	xor.b64  	%rd17072, %rd17070, %rd17071;
	xor.b64  	%rd17073, %rd17052, %rd16998;
	xor.b64  	%rd17074, %rd17052, %rd17025;
	and.b64  	%rd17075, %rd17074, %rd17073;
	xor.b64  	%rd17076, %rd17075, %rd17052;
	add.s64 	%rd17077, %rd17067, %rd17076;
	add.s64 	%rd21730, %rd17077, %rd17072;
	add.s32 	%r11317, %r14478, 13;
	mul.wide.s32 	%rd17078, %r11317, 8;
	add.s64 	%rd17079, %rd16729, %rd17078;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11318,%dummy}, %rd21734;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11319}, %rd21734;
	}
	shf.r.wrap.b32 	%r11320, %r11319, %r11318, 14;
	shf.r.wrap.b32 	%r11321, %r11318, %r11319, 14;
	mov.b64 	%rd17080, {%r11321, %r11320};
	shf.r.wrap.b32 	%r11322, %r11319, %r11318, 18;
	shf.r.wrap.b32 	%r11323, %r11318, %r11319, 18;
	mov.b64 	%rd17081, {%r11323, %r11322};
	xor.b64  	%rd17082, %rd17081, %rd17080;
	shf.l.wrap.b32 	%r11324, %r11318, %r11319, 23;
	shf.l.wrap.b32 	%r11325, %r11319, %r11318, 23;
	mov.b64 	%rd17083, {%r11325, %r11324};
	xor.b64  	%rd17084, %rd17082, %rd17083;
	xor.b64  	%rd17085, %rd17041, %rd17014;
	and.b64  	%rd17086, %rd21734, %rd17085;
	xor.b64  	%rd17087, %rd17086, %rd17014;
	add.s64 	%rd17088, %rd16987, %rd21721;
	ld.const.u64 	%rd17089, [%rd17079];
	add.s64 	%rd17090, %rd17088, %rd17089;
	add.s64 	%rd17091, %rd17090, %rd17087;
	add.s64 	%rd17092, %rd17091, %rd17084;
	add.s64 	%rd21733, %rd17092, %rd16998;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11326,%dummy}, %rd21730;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11327}, %rd21730;
	}
	shf.r.wrap.b32 	%r11328, %r11327, %r11326, 28;
	shf.r.wrap.b32 	%r11329, %r11326, %r11327, 28;
	mov.b64 	%rd17093, {%r11329, %r11328};
	shf.l.wrap.b32 	%r11330, %r11326, %r11327, 30;
	shf.l.wrap.b32 	%r11331, %r11327, %r11326, 30;
	mov.b64 	%rd17094, {%r11331, %r11330};
	xor.b64  	%rd17095, %rd17094, %rd17093;
	shf.l.wrap.b32 	%r11332, %r11326, %r11327, 25;
	shf.l.wrap.b32 	%r11333, %r11327, %r11326, 25;
	mov.b64 	%rd17096, {%r11333, %r11332};
	xor.b64  	%rd17097, %rd17095, %rd17096;
	xor.b64  	%rd17098, %rd21730, %rd17025;
	xor.b64  	%rd17099, %rd21730, %rd17052;
	and.b64  	%rd17100, %rd17099, %rd17098;
	xor.b64  	%rd17101, %rd17100, %rd21730;
	add.s64 	%rd17102, %rd17092, %rd17101;
	add.s64 	%rd21729, %rd17102, %rd17097;
	add.s32 	%r11334, %r14478, 14;
	mul.wide.s32 	%rd17103, %r11334, 8;
	add.s64 	%rd17104, %rd16729, %rd17103;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11335,%dummy}, %rd21733;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11336}, %rd21733;
	}
	shf.r.wrap.b32 	%r11337, %r11336, %r11335, 14;
	shf.r.wrap.b32 	%r11338, %r11335, %r11336, 14;
	mov.b64 	%rd17105, {%r11338, %r11337};
	shf.r.wrap.b32 	%r11339, %r11336, %r11335, 18;
	shf.r.wrap.b32 	%r11340, %r11335, %r11336, 18;
	mov.b64 	%rd17106, {%r11340, %r11339};
	xor.b64  	%rd17107, %rd17106, %rd17105;
	shf.l.wrap.b32 	%r11341, %r11335, %r11336, 23;
	shf.l.wrap.b32 	%r11342, %r11336, %r11335, 23;
	mov.b64 	%rd17108, {%r11342, %r11341};
	xor.b64  	%rd17109, %rd17107, %rd17108;
	xor.b64  	%rd17110, %rd21734, %rd17041;
	and.b64  	%rd17111, %rd21733, %rd17110;
	xor.b64  	%rd17112, %rd17111, %rd17041;
	add.s64 	%rd17113, %rd17014, %rd21720;
	ld.const.u64 	%rd17114, [%rd17104];
	add.s64 	%rd17115, %rd17113, %rd17114;
	add.s64 	%rd17116, %rd17115, %rd17112;
	add.s64 	%rd17117, %rd17116, %rd17109;
	add.s64 	%rd21732, %rd17117, %rd17025;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11343,%dummy}, %rd21729;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11344}, %rd21729;
	}
	shf.r.wrap.b32 	%r11345, %r11344, %r11343, 28;
	shf.r.wrap.b32 	%r11346, %r11343, %r11344, 28;
	mov.b64 	%rd17118, {%r11346, %r11345};
	shf.l.wrap.b32 	%r11347, %r11343, %r11344, 30;
	shf.l.wrap.b32 	%r11348, %r11344, %r11343, 30;
	mov.b64 	%rd17119, {%r11348, %r11347};
	xor.b64  	%rd17120, %rd17119, %rd17118;
	shf.l.wrap.b32 	%r11349, %r11343, %r11344, 25;
	shf.l.wrap.b32 	%r11350, %r11344, %r11343, 25;
	mov.b64 	%rd17121, {%r11350, %r11349};
	xor.b64  	%rd17122, %rd17120, %rd17121;
	xor.b64  	%rd17123, %rd21729, %rd17052;
	xor.b64  	%rd17124, %rd21729, %rd21730;
	and.b64  	%rd17125, %rd17124, %rd17123;
	xor.b64  	%rd17126, %rd17125, %rd21729;
	add.s64 	%rd17127, %rd17117, %rd17126;
	add.s64 	%rd21728, %rd17127, %rd17122;
	add.s32 	%r11351, %r14478, 15;
	mul.wide.s32 	%rd17128, %r11351, 8;
	add.s64 	%rd17129, %rd16729, %rd17128;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11352,%dummy}, %rd21732;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11353}, %rd21732;
	}
	shf.r.wrap.b32 	%r11354, %r11353, %r11352, 14;
	shf.r.wrap.b32 	%r11355, %r11352, %r11353, 14;
	mov.b64 	%rd17130, {%r11355, %r11354};
	shf.r.wrap.b32 	%r11356, %r11353, %r11352, 18;
	shf.r.wrap.b32 	%r11357, %r11352, %r11353, 18;
	mov.b64 	%rd17131, {%r11357, %r11356};
	xor.b64  	%rd17132, %rd17131, %rd17130;
	shf.l.wrap.b32 	%r11358, %r11352, %r11353, 23;
	shf.l.wrap.b32 	%r11359, %r11353, %r11352, 23;
	mov.b64 	%rd17133, {%r11359, %r11358};
	xor.b64  	%rd17134, %rd17132, %rd17133;
	xor.b64  	%rd17135, %rd21733, %rd21734;
	and.b64  	%rd17136, %rd21732, %rd17135;
	xor.b64  	%rd17137, %rd17136, %rd21734;
	add.s64 	%rd17138, %rd17041, %rd21719;
	ld.const.u64 	%rd17139, [%rd17129];
	add.s64 	%rd17140, %rd17138, %rd17139;
	add.s64 	%rd17141, %rd17140, %rd17137;
	add.s64 	%rd17142, %rd17141, %rd17134;
	add.s64 	%rd21731, %rd17142, %rd17052;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11360,%dummy}, %rd21728;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11361}, %rd21728;
	}
	shf.r.wrap.b32 	%r11362, %r11361, %r11360, 28;
	shf.r.wrap.b32 	%r11363, %r11360, %r11361, 28;
	mov.b64 	%rd17143, {%r11363, %r11362};
	shf.l.wrap.b32 	%r11364, %r11360, %r11361, 30;
	shf.l.wrap.b32 	%r11365, %r11361, %r11360, 30;
	mov.b64 	%rd17144, {%r11365, %r11364};
	xor.b64  	%rd17145, %rd17144, %rd17143;
	shf.l.wrap.b32 	%r11366, %r11360, %r11361, 25;
	shf.l.wrap.b32 	%r11367, %r11361, %r11360, 25;
	mov.b64 	%rd17146, {%r11367, %r11366};
	xor.b64  	%rd17147, %rd17145, %rd17146;
	xor.b64  	%rd17148, %rd21728, %rd21730;
	xor.b64  	%rd17149, %rd21728, %rd21729;
	and.b64  	%rd17150, %rd17149, %rd17148;
	xor.b64  	%rd17151, %rd17150, %rd21728;
	add.s64 	%rd17152, %rd17142, %rd17151;
	add.s64 	%rd21727, %rd17152, %rd17147;
	add.s32 	%r14478, %r14478, 16;
	setp.lt.s32	%p191, %r14478, 80;
	@%p191 bra 	BB3_302;

	add.s64 	%rd21750, %rd21727, %rd1331;
	st.local.u64 	[%rd1], %rd21750;
	add.s64 	%rd21749, %rd21728, %rd1333;
	st.local.u64 	[%rd1+8], %rd21749;
	add.s64 	%rd21748, %rd21729, %rd1332;
	st.local.u64 	[%rd1+16], %rd21748;
	add.s64 	%rd21747, %rd21730, %rd1330;
	st.local.u64 	[%rd1+24], %rd21747;
	add.s64 	%rd21746, %rd21731, %rd1326;
	st.local.u64 	[%rd1+32], %rd21746;
	add.s64 	%rd21745, %rd21732, %rd1328;
	st.local.u64 	[%rd1+40], %rd21745;
	add.s64 	%rd21744, %rd21733, %rd1327;
	st.local.u64 	[%rd1+48], %rd21744;
	add.s64 	%rd21743, %rd21734, %rd1329;
	st.local.u64 	[%rd1+56], %rd21743;
	mov.u64 	%rd21751, 0;
	st.local.u64 	[%rd1+64], %rd21751;
	st.local.u64 	[%rd1+72], %rd21751;
	st.local.u64 	[%rd1+80], %rd21751;
	st.local.u64 	[%rd1+88], %rd21751;
	st.local.u64 	[%rd1+96], %rd21751;
	st.local.u64 	[%rd1+104], %rd21751;
	st.local.u64 	[%rd1+112], %rd21751;
	st.local.u64 	[%rd1+120], %rd21751;
	st.local.u64 	[%rd1+128], %rd21751;
	st.local.u64 	[%rd1+136], %rd21751;
	st.local.u64 	[%rd1+144], %rd21751;
	st.local.u64 	[%rd1+152], %rd21751;
	st.local.u64 	[%rd1+160], %rd21751;
	st.local.u64 	[%rd1+168], %rd21751;
	st.local.u64 	[%rd1+176], %rd21751;
	st.local.u64 	[%rd1+184], %rd21751;
	mov.u64 	%rd21752, %rd21751;
	mov.u64 	%rd21753, %rd21751;
	mov.u64 	%rd21754, %rd21751;
	mov.u64 	%rd21755, %rd21751;
	mov.u64 	%rd21756, %rd21751;
	mov.u64 	%rd21757, %rd21751;
	mov.u64 	%rd21758, %rd21751;
	mov.u64 	%rd21759, %rd21751;
	mov.u64 	%rd21760, %rd21751;
	mov.u64 	%rd21761, %rd21751;
	mov.u64 	%rd21762, %rd21751;
	mov.u64 	%rd21763, %rd21751;
	mov.u64 	%rd21764, %rd21751;
	mov.u64 	%rd21765, %rd21751;
	bra.uni 	BB3_304;

BB3_300:
	ld.local.u64 	%rd21764, [%rd1+72];
	ld.local.u64 	%rd21763, [%rd1+80];
	ld.local.u64 	%rd21762, [%rd1+88];
	ld.local.u64 	%rd21761, [%rd1+96];
	ld.local.u64 	%rd21760, [%rd1+104];
	ld.local.u64 	%rd21759, [%rd1+112];
	ld.local.u64 	%rd21758, [%rd1+120];
	ld.local.u64 	%rd21757, [%rd1+128];
	ld.local.u64 	%rd21756, [%rd1+136];
	ld.local.u64 	%rd21755, [%rd1+144];
	ld.local.u64 	%rd21754, [%rd1+152];
	ld.local.u64 	%rd21753, [%rd1+160];
	ld.local.u64 	%rd21752, [%rd1+168];
	ld.local.u64 	%rd21751, [%rd1+176];
	ld.local.u64 	%rd21750, [%rd1];
	ld.local.u64 	%rd21749, [%rd1+8];
	ld.local.u64 	%rd21748, [%rd1+16];
	ld.local.u64 	%rd21747, [%rd1+24];
	ld.local.u64 	%rd21746, [%rd1+32];
	ld.local.u64 	%rd21745, [%rd1+40];
	ld.local.u64 	%rd21744, [%rd1+48];
	ld.local.u64 	%rd21743, [%rd1+56];

BB3_304:
	mov.u64 	%rd21766, k_sha512;
	ld.local.u32 	%r11369, [%rd1+192];
	shl.b32 	%r11370, %r11369, 3;
	cvt.s64.s32	%rd17169, %r11370;
	st.local.u64 	[%rd1+184], %rd17169;
	shr.u64 	%rd17170, %rd21765, 32;
	shr.u64 	%rd17171, %rd21764, 32;
	shr.u64 	%rd17172, %rd21763, 32;
	shr.u64 	%rd17173, %rd21762, 32;
	shr.u64 	%rd17174, %rd21761, 32;
	shr.u64 	%rd17175, %rd21760, 32;
	shr.u64 	%rd17176, %rd21759, 32;
	shr.u64 	%rd17177, %rd21758, 32;
	shr.u64 	%rd17178, %rd21757, 32;
	shr.u64 	%rd17179, %rd21756, 32;
	shr.u64 	%rd17180, %rd21755, 32;
	shr.u64 	%rd17181, %rd21754, 32;
	shr.u64 	%rd17182, %rd21753, 32;
	shr.u64 	%rd17183, %rd21752, 32;
	shr.u64 	%rd17184, %rd21751, 32;
	shr.u64 	%rd17185, %rd17169, 32;
	bfi.b64 	%rd21783, %rd17170, %rd21765, 32, 32;
	bfi.b64 	%rd21784, %rd17171, %rd21764, 32, 32;
	bfi.b64 	%rd21785, %rd17172, %rd21763, 32, 32;
	bfi.b64 	%rd21786, %rd17173, %rd21762, 32, 32;
	bfi.b64 	%rd21787, %rd17174, %rd21761, 32, 32;
	bfi.b64 	%rd21788, %rd17175, %rd21760, 32, 32;
	bfi.b64 	%rd21789, %rd17176, %rd21759, 32, 32;
	bfi.b64 	%rd21790, %rd17177, %rd21758, 32, 32;
	bfi.b64 	%rd21774, %rd17178, %rd21757, 32, 32;
	bfi.b64 	%rd21773, %rd17179, %rd21756, 32, 32;
	bfi.b64 	%rd21772, %rd17180, %rd21755, 32, 32;
	bfi.b64 	%rd21771, %rd17181, %rd21754, 32, 32;
	bfi.b64 	%rd21770, %rd17182, %rd21753, 32, 32;
	bfi.b64 	%rd21769, %rd17183, %rd21752, 32, 32;
	bfi.b64 	%rd21768, %rd17184, %rd21751, 32, 32;
	cvt.u32.u64	%r11371, %rd17185;
	mov.b64	%rd21767, {%r11370, %r11371};
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11372,%dummy}, %rd21746;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11373}, %rd21746;
	}
	shf.r.wrap.b32 	%r11374, %r11373, %r11372, 18;
	shf.r.wrap.b32 	%r11375, %r11372, %r11373, 18;
	mov.b64 	%rd17186, {%r11375, %r11374};
	shf.r.wrap.b32 	%r11376, %r11373, %r11372, 14;
	shf.r.wrap.b32 	%r11377, %r11372, %r11373, 14;
	mov.b64 	%rd17187, {%r11377, %r11376};
	xor.b64  	%rd17188, %rd17186, %rd17187;
	shf.l.wrap.b32 	%r11378, %r11372, %r11373, 23;
	shf.l.wrap.b32 	%r11379, %r11373, %r11372, 23;
	mov.b64 	%rd17189, {%r11379, %r11378};
	xor.b64  	%rd17190, %rd17188, %rd17189;
	xor.b64  	%rd17191, %rd21745, %rd21744;
	and.b64  	%rd17192, %rd17191, %rd21746;
	xor.b64  	%rd17193, %rd17192, %rd21744;
	add.s64 	%rd17194, %rd21743, %rd21454;
	add.s64 	%rd17195, %rd17194, %rd17193;
	add.s64 	%rd17196, %rd17195, %rd21783;
	add.s64 	%rd17197, %rd17196, %rd17190;
	add.s64 	%rd17198, %rd17197, %rd21747;
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11380}, %rd21750;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11381,%dummy}, %rd21750;
	}
	shf.l.wrap.b32 	%r11382, %r11381, %r11380, 30;
	shf.l.wrap.b32 	%r11383, %r11380, %r11381, 30;
	mov.b64 	%rd17199, {%r11383, %r11382};
	shf.r.wrap.b32 	%r11384, %r11380, %r11381, 28;
	shf.r.wrap.b32 	%r11385, %r11381, %r11380, 28;
	mov.b64 	%rd17200, {%r11385, %r11384};
	xor.b64  	%rd17201, %rd17199, %rd17200;
	shf.l.wrap.b32 	%r11386, %r11381, %r11380, 25;
	shf.l.wrap.b32 	%r11387, %r11380, %r11381, 25;
	mov.b64 	%rd17202, {%r11387, %r11386};
	xor.b64  	%rd17203, %rd17201, %rd17202;
	xor.b64  	%rd17204, %rd21750, %rd21749;
	xor.b64  	%rd17205, %rd21750, %rd21748;
	and.b64  	%rd17206, %rd17205, %rd17204;
	xor.b64  	%rd17207, %rd17206, %rd21750;
	add.s64 	%rd17208, %rd17197, %rd17207;
	add.s64 	%rd17209, %rd17208, %rd17203;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11388,%dummy}, %rd17198;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11389}, %rd17198;
	}
	shf.r.wrap.b32 	%r11390, %r11389, %r11388, 14;
	shf.r.wrap.b32 	%r11391, %r11388, %r11389, 14;
	mov.b64 	%rd17210, {%r11391, %r11390};
	shf.r.wrap.b32 	%r11392, %r11389, %r11388, 18;
	shf.r.wrap.b32 	%r11393, %r11388, %r11389, 18;
	mov.b64 	%rd17211, {%r11393, %r11392};
	xor.b64  	%rd17212, %rd17211, %rd17210;
	shf.l.wrap.b32 	%r11394, %r11388, %r11389, 23;
	shf.l.wrap.b32 	%r11395, %r11389, %r11388, 23;
	mov.b64 	%rd17213, {%r11395, %r11394};
	xor.b64  	%rd17214, %rd17212, %rd17213;
	xor.b64  	%rd17215, %rd21746, %rd21745;
	and.b64  	%rd17216, %rd17198, %rd17215;
	xor.b64  	%rd17217, %rd17216, %rd21745;
	add.s64 	%rd17218, %rd21744, %rd21453;
	add.s64 	%rd17219, %rd17218, %rd21784;
	add.s64 	%rd17220, %rd17219, %rd17217;
	add.s64 	%rd17221, %rd17220, %rd17214;
	add.s64 	%rd17222, %rd17221, %rd21748;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11396,%dummy}, %rd17209;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11397}, %rd17209;
	}
	shf.r.wrap.b32 	%r11398, %r11397, %r11396, 28;
	shf.r.wrap.b32 	%r11399, %r11396, %r11397, 28;
	mov.b64 	%rd17223, {%r11399, %r11398};
	shf.l.wrap.b32 	%r11400, %r11396, %r11397, 30;
	shf.l.wrap.b32 	%r11401, %r11397, %r11396, 30;
	mov.b64 	%rd17224, {%r11401, %r11400};
	xor.b64  	%rd17225, %rd17224, %rd17223;
	shf.l.wrap.b32 	%r11402, %r11396, %r11397, 25;
	shf.l.wrap.b32 	%r11403, %r11397, %r11396, 25;
	mov.b64 	%rd17226, {%r11403, %r11402};
	xor.b64  	%rd17227, %rd17225, %rd17226;
	xor.b64  	%rd17228, %rd17209, %rd21749;
	xor.b64  	%rd17229, %rd17209, %rd21750;
	and.b64  	%rd17230, %rd17229, %rd17228;
	xor.b64  	%rd17231, %rd17230, %rd17209;
	add.s64 	%rd17232, %rd17221, %rd17231;
	add.s64 	%rd17233, %rd17232, %rd17227;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11404,%dummy}, %rd17222;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11405}, %rd17222;
	}
	shf.r.wrap.b32 	%r11406, %r11405, %r11404, 14;
	shf.r.wrap.b32 	%r11407, %r11404, %r11405, 14;
	mov.b64 	%rd17234, {%r11407, %r11406};
	shf.r.wrap.b32 	%r11408, %r11405, %r11404, 18;
	shf.r.wrap.b32 	%r11409, %r11404, %r11405, 18;
	mov.b64 	%rd17235, {%r11409, %r11408};
	xor.b64  	%rd17236, %rd17235, %rd17234;
	shf.l.wrap.b32 	%r11410, %r11404, %r11405, 23;
	shf.l.wrap.b32 	%r11411, %r11405, %r11404, 23;
	mov.b64 	%rd17237, {%r11411, %r11410};
	xor.b64  	%rd17238, %rd17236, %rd17237;
	xor.b64  	%rd17239, %rd17198, %rd21746;
	and.b64  	%rd17240, %rd17222, %rd17239;
	xor.b64  	%rd17241, %rd17240, %rd21746;
	add.s64 	%rd17242, %rd21745, %rd21452;
	add.s64 	%rd17243, %rd17242, %rd21785;
	add.s64 	%rd17244, %rd17243, %rd17241;
	add.s64 	%rd17245, %rd17244, %rd17238;
	add.s64 	%rd17246, %rd17245, %rd21749;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11412,%dummy}, %rd17233;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11413}, %rd17233;
	}
	shf.r.wrap.b32 	%r11414, %r11413, %r11412, 28;
	shf.r.wrap.b32 	%r11415, %r11412, %r11413, 28;
	mov.b64 	%rd17247, {%r11415, %r11414};
	shf.l.wrap.b32 	%r11416, %r11412, %r11413, 30;
	shf.l.wrap.b32 	%r11417, %r11413, %r11412, 30;
	mov.b64 	%rd17248, {%r11417, %r11416};
	xor.b64  	%rd17249, %rd17248, %rd17247;
	shf.l.wrap.b32 	%r11418, %r11412, %r11413, 25;
	shf.l.wrap.b32 	%r11419, %r11413, %r11412, 25;
	mov.b64 	%rd17250, {%r11419, %r11418};
	xor.b64  	%rd17251, %rd17249, %rd17250;
	xor.b64  	%rd17252, %rd17233, %rd21750;
	xor.b64  	%rd17253, %rd17233, %rd17209;
	and.b64  	%rd17254, %rd17253, %rd17252;
	xor.b64  	%rd17255, %rd17254, %rd17233;
	add.s64 	%rd17256, %rd17245, %rd17255;
	add.s64 	%rd17257, %rd17256, %rd17251;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11420,%dummy}, %rd17246;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11421}, %rd17246;
	}
	shf.r.wrap.b32 	%r11422, %r11421, %r11420, 14;
	shf.r.wrap.b32 	%r11423, %r11420, %r11421, 14;
	mov.b64 	%rd17258, {%r11423, %r11422};
	shf.r.wrap.b32 	%r11424, %r11421, %r11420, 18;
	shf.r.wrap.b32 	%r11425, %r11420, %r11421, 18;
	mov.b64 	%rd17259, {%r11425, %r11424};
	xor.b64  	%rd17260, %rd17259, %rd17258;
	shf.l.wrap.b32 	%r11426, %r11420, %r11421, 23;
	shf.l.wrap.b32 	%r11427, %r11421, %r11420, 23;
	mov.b64 	%rd17261, {%r11427, %r11426};
	xor.b64  	%rd17262, %rd17260, %rd17261;
	xor.b64  	%rd17263, %rd17222, %rd17198;
	and.b64  	%rd17264, %rd17246, %rd17263;
	xor.b64  	%rd17265, %rd17264, %rd17198;
	add.s64 	%rd17266, %rd21746, %rd21451;
	add.s64 	%rd17267, %rd17266, %rd21786;
	add.s64 	%rd17268, %rd17267, %rd17265;
	add.s64 	%rd17269, %rd17268, %rd17262;
	add.s64 	%rd17270, %rd17269, %rd21750;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11428,%dummy}, %rd17257;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11429}, %rd17257;
	}
	shf.r.wrap.b32 	%r11430, %r11429, %r11428, 28;
	shf.r.wrap.b32 	%r11431, %r11428, %r11429, 28;
	mov.b64 	%rd17271, {%r11431, %r11430};
	shf.l.wrap.b32 	%r11432, %r11428, %r11429, 30;
	shf.l.wrap.b32 	%r11433, %r11429, %r11428, 30;
	mov.b64 	%rd17272, {%r11433, %r11432};
	xor.b64  	%rd17273, %rd17272, %rd17271;
	shf.l.wrap.b32 	%r11434, %r11428, %r11429, 25;
	shf.l.wrap.b32 	%r11435, %r11429, %r11428, 25;
	mov.b64 	%rd17274, {%r11435, %r11434};
	xor.b64  	%rd17275, %rd17273, %rd17274;
	xor.b64  	%rd17276, %rd17257, %rd17209;
	xor.b64  	%rd17277, %rd17257, %rd17233;
	and.b64  	%rd17278, %rd17277, %rd17276;
	xor.b64  	%rd17279, %rd17278, %rd17257;
	add.s64 	%rd17280, %rd17269, %rd17279;
	add.s64 	%rd17281, %rd17280, %rd17275;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11436,%dummy}, %rd17270;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11437}, %rd17270;
	}
	shf.r.wrap.b32 	%r11438, %r11437, %r11436, 14;
	shf.r.wrap.b32 	%r11439, %r11436, %r11437, 14;
	mov.b64 	%rd17282, {%r11439, %r11438};
	shf.r.wrap.b32 	%r11440, %r11437, %r11436, 18;
	shf.r.wrap.b32 	%r11441, %r11436, %r11437, 18;
	mov.b64 	%rd17283, {%r11441, %r11440};
	xor.b64  	%rd17284, %rd17283, %rd17282;
	shf.l.wrap.b32 	%r11442, %r11436, %r11437, 23;
	shf.l.wrap.b32 	%r11443, %r11437, %r11436, 23;
	mov.b64 	%rd17285, {%r11443, %r11442};
	xor.b64  	%rd17286, %rd17284, %rd17285;
	xor.b64  	%rd17287, %rd17246, %rd17222;
	and.b64  	%rd17288, %rd17270, %rd17287;
	xor.b64  	%rd17289, %rd17288, %rd17222;
	add.s64 	%rd17290, %rd21787, %rd21450;
	add.s64 	%rd17291, %rd17290, %rd17198;
	add.s64 	%rd17292, %rd17291, %rd17289;
	add.s64 	%rd17293, %rd17292, %rd17286;
	add.s64 	%rd17294, %rd17293, %rd17209;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11444,%dummy}, %rd17281;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11445}, %rd17281;
	}
	shf.r.wrap.b32 	%r11446, %r11445, %r11444, 28;
	shf.r.wrap.b32 	%r11447, %r11444, %r11445, 28;
	mov.b64 	%rd17295, {%r11447, %r11446};
	shf.l.wrap.b32 	%r11448, %r11444, %r11445, 30;
	shf.l.wrap.b32 	%r11449, %r11445, %r11444, 30;
	mov.b64 	%rd17296, {%r11449, %r11448};
	xor.b64  	%rd17297, %rd17296, %rd17295;
	shf.l.wrap.b32 	%r11450, %r11444, %r11445, 25;
	shf.l.wrap.b32 	%r11451, %r11445, %r11444, 25;
	mov.b64 	%rd17298, {%r11451, %r11450};
	xor.b64  	%rd17299, %rd17297, %rd17298;
	xor.b64  	%rd17300, %rd17281, %rd17233;
	xor.b64  	%rd17301, %rd17281, %rd17257;
	and.b64  	%rd17302, %rd17301, %rd17300;
	xor.b64  	%rd17303, %rd17302, %rd17281;
	add.s64 	%rd17304, %rd17293, %rd17303;
	add.s64 	%rd17305, %rd17304, %rd17299;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11452,%dummy}, %rd17294;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11453}, %rd17294;
	}
	shf.r.wrap.b32 	%r11454, %r11453, %r11452, 14;
	shf.r.wrap.b32 	%r11455, %r11452, %r11453, 14;
	mov.b64 	%rd17306, {%r11455, %r11454};
	shf.r.wrap.b32 	%r11456, %r11453, %r11452, 18;
	shf.r.wrap.b32 	%r11457, %r11452, %r11453, 18;
	mov.b64 	%rd17307, {%r11457, %r11456};
	xor.b64  	%rd17308, %rd17307, %rd17306;
	shf.l.wrap.b32 	%r11458, %r11452, %r11453, 23;
	shf.l.wrap.b32 	%r11459, %r11453, %r11452, 23;
	mov.b64 	%rd17309, {%r11459, %r11458};
	xor.b64  	%rd17310, %rd17308, %rd17309;
	xor.b64  	%rd17311, %rd17270, %rd17246;
	and.b64  	%rd17312, %rd17294, %rd17311;
	xor.b64  	%rd17313, %rd17312, %rd17246;
	add.s64 	%rd17314, %rd21788, %rd21449;
	add.s64 	%rd17315, %rd17314, %rd17222;
	add.s64 	%rd17316, %rd17315, %rd17313;
	add.s64 	%rd17317, %rd17316, %rd17310;
	add.s64 	%rd17318, %rd17317, %rd17233;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11460,%dummy}, %rd17305;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11461}, %rd17305;
	}
	shf.r.wrap.b32 	%r11462, %r11461, %r11460, 28;
	shf.r.wrap.b32 	%r11463, %r11460, %r11461, 28;
	mov.b64 	%rd17319, {%r11463, %r11462};
	shf.l.wrap.b32 	%r11464, %r11460, %r11461, 30;
	shf.l.wrap.b32 	%r11465, %r11461, %r11460, 30;
	mov.b64 	%rd17320, {%r11465, %r11464};
	xor.b64  	%rd17321, %rd17320, %rd17319;
	shf.l.wrap.b32 	%r11466, %r11460, %r11461, 25;
	shf.l.wrap.b32 	%r11467, %r11461, %r11460, 25;
	mov.b64 	%rd17322, {%r11467, %r11466};
	xor.b64  	%rd17323, %rd17321, %rd17322;
	xor.b64  	%rd17324, %rd17305, %rd17257;
	xor.b64  	%rd17325, %rd17305, %rd17281;
	and.b64  	%rd17326, %rd17325, %rd17324;
	xor.b64  	%rd17327, %rd17326, %rd17305;
	add.s64 	%rd17328, %rd17317, %rd17327;
	add.s64 	%rd17329, %rd17328, %rd17323;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11468,%dummy}, %rd17318;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11469}, %rd17318;
	}
	shf.r.wrap.b32 	%r11470, %r11469, %r11468, 14;
	shf.r.wrap.b32 	%r11471, %r11468, %r11469, 14;
	mov.b64 	%rd17330, {%r11471, %r11470};
	shf.r.wrap.b32 	%r11472, %r11469, %r11468, 18;
	shf.r.wrap.b32 	%r11473, %r11468, %r11469, 18;
	mov.b64 	%rd17331, {%r11473, %r11472};
	xor.b64  	%rd17332, %rd17331, %rd17330;
	shf.l.wrap.b32 	%r11474, %r11468, %r11469, 23;
	shf.l.wrap.b32 	%r11475, %r11469, %r11468, 23;
	mov.b64 	%rd17333, {%r11475, %r11474};
	xor.b64  	%rd17334, %rd17332, %rd17333;
	xor.b64  	%rd17335, %rd17294, %rd17270;
	and.b64  	%rd17336, %rd17318, %rd17335;
	xor.b64  	%rd17337, %rd17336, %rd17270;
	add.s64 	%rd17338, %rd21789, %rd21448;
	add.s64 	%rd17339, %rd17338, %rd17246;
	add.s64 	%rd17340, %rd17339, %rd17337;
	add.s64 	%rd17341, %rd17340, %rd17334;
	add.s64 	%rd17342, %rd17341, %rd17257;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11476,%dummy}, %rd17329;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11477}, %rd17329;
	}
	shf.r.wrap.b32 	%r11478, %r11477, %r11476, 28;
	shf.r.wrap.b32 	%r11479, %r11476, %r11477, 28;
	mov.b64 	%rd17343, {%r11479, %r11478};
	shf.l.wrap.b32 	%r11480, %r11476, %r11477, 30;
	shf.l.wrap.b32 	%r11481, %r11477, %r11476, 30;
	mov.b64 	%rd17344, {%r11481, %r11480};
	xor.b64  	%rd17345, %rd17344, %rd17343;
	shf.l.wrap.b32 	%r11482, %r11476, %r11477, 25;
	shf.l.wrap.b32 	%r11483, %r11477, %r11476, 25;
	mov.b64 	%rd17346, {%r11483, %r11482};
	xor.b64  	%rd17347, %rd17345, %rd17346;
	xor.b64  	%rd17348, %rd17329, %rd17281;
	xor.b64  	%rd17349, %rd17329, %rd17305;
	and.b64  	%rd17350, %rd17349, %rd17348;
	xor.b64  	%rd17351, %rd17350, %rd17329;
	add.s64 	%rd17352, %rd17341, %rd17351;
	add.s64 	%rd17353, %rd17352, %rd17347;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11484,%dummy}, %rd17342;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11485}, %rd17342;
	}
	shf.r.wrap.b32 	%r11486, %r11485, %r11484, 14;
	shf.r.wrap.b32 	%r11487, %r11484, %r11485, 14;
	mov.b64 	%rd17354, {%r11487, %r11486};
	shf.r.wrap.b32 	%r11488, %r11485, %r11484, 18;
	shf.r.wrap.b32 	%r11489, %r11484, %r11485, 18;
	mov.b64 	%rd17355, {%r11489, %r11488};
	xor.b64  	%rd17356, %rd17355, %rd17354;
	shf.l.wrap.b32 	%r11490, %r11484, %r11485, 23;
	shf.l.wrap.b32 	%r11491, %r11485, %r11484, 23;
	mov.b64 	%rd17357, {%r11491, %r11490};
	xor.b64  	%rd17358, %rd17356, %rd17357;
	xor.b64  	%rd17359, %rd17318, %rd17294;
	and.b64  	%rd17360, %rd17342, %rd17359;
	xor.b64  	%rd17361, %rd17360, %rd17294;
	add.s64 	%rd17362, %rd21790, %rd21447;
	add.s64 	%rd17363, %rd17362, %rd17270;
	add.s64 	%rd17364, %rd17363, %rd17361;
	add.s64 	%rd17365, %rd17364, %rd17358;
	add.s64 	%rd17366, %rd17365, %rd17281;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11492,%dummy}, %rd17353;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11493}, %rd17353;
	}
	shf.r.wrap.b32 	%r11494, %r11493, %r11492, 28;
	shf.r.wrap.b32 	%r11495, %r11492, %r11493, 28;
	mov.b64 	%rd17367, {%r11495, %r11494};
	shf.l.wrap.b32 	%r11496, %r11492, %r11493, 30;
	shf.l.wrap.b32 	%r11497, %r11493, %r11492, 30;
	mov.b64 	%rd17368, {%r11497, %r11496};
	xor.b64  	%rd17369, %rd17368, %rd17367;
	shf.l.wrap.b32 	%r11498, %r11492, %r11493, 25;
	shf.l.wrap.b32 	%r11499, %r11493, %r11492, 25;
	mov.b64 	%rd17370, {%r11499, %r11498};
	xor.b64  	%rd17371, %rd17369, %rd17370;
	xor.b64  	%rd17372, %rd17353, %rd17305;
	xor.b64  	%rd17373, %rd17353, %rd17329;
	and.b64  	%rd17374, %rd17373, %rd17372;
	xor.b64  	%rd17375, %rd17374, %rd17353;
	add.s64 	%rd17376, %rd17365, %rd17375;
	add.s64 	%rd17377, %rd17376, %rd17371;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11500,%dummy}, %rd17366;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11501}, %rd17366;
	}
	shf.r.wrap.b32 	%r11502, %r11501, %r11500, 14;
	shf.r.wrap.b32 	%r11503, %r11500, %r11501, 14;
	mov.b64 	%rd17378, {%r11503, %r11502};
	shf.r.wrap.b32 	%r11504, %r11501, %r11500, 18;
	shf.r.wrap.b32 	%r11505, %r11500, %r11501, 18;
	mov.b64 	%rd17379, {%r11505, %r11504};
	xor.b64  	%rd17380, %rd17379, %rd17378;
	shf.l.wrap.b32 	%r11506, %r11500, %r11501, 23;
	shf.l.wrap.b32 	%r11507, %r11501, %r11500, 23;
	mov.b64 	%rd17381, {%r11507, %r11506};
	xor.b64  	%rd17382, %rd17380, %rd17381;
	xor.b64  	%rd17383, %rd17342, %rd17318;
	and.b64  	%rd17384, %rd17366, %rd17383;
	xor.b64  	%rd17385, %rd17384, %rd17318;
	add.s64 	%rd17386, %rd21774, %rd21446;
	add.s64 	%rd17387, %rd17386, %rd17294;
	add.s64 	%rd17388, %rd17387, %rd17385;
	add.s64 	%rd17389, %rd17388, %rd17382;
	add.s64 	%rd17390, %rd17389, %rd17305;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11508,%dummy}, %rd17377;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11509}, %rd17377;
	}
	shf.r.wrap.b32 	%r11510, %r11509, %r11508, 28;
	shf.r.wrap.b32 	%r11511, %r11508, %r11509, 28;
	mov.b64 	%rd17391, {%r11511, %r11510};
	shf.l.wrap.b32 	%r11512, %r11508, %r11509, 30;
	shf.l.wrap.b32 	%r11513, %r11509, %r11508, 30;
	mov.b64 	%rd17392, {%r11513, %r11512};
	xor.b64  	%rd17393, %rd17392, %rd17391;
	shf.l.wrap.b32 	%r11514, %r11508, %r11509, 25;
	shf.l.wrap.b32 	%r11515, %r11509, %r11508, 25;
	mov.b64 	%rd17394, {%r11515, %r11514};
	xor.b64  	%rd17395, %rd17393, %rd17394;
	xor.b64  	%rd17396, %rd17377, %rd17329;
	xor.b64  	%rd17397, %rd17377, %rd17353;
	and.b64  	%rd17398, %rd17397, %rd17396;
	xor.b64  	%rd17399, %rd17398, %rd17377;
	add.s64 	%rd17400, %rd17389, %rd17399;
	add.s64 	%rd17401, %rd17400, %rd17395;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11516,%dummy}, %rd17390;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11517}, %rd17390;
	}
	shf.r.wrap.b32 	%r11518, %r11517, %r11516, 14;
	shf.r.wrap.b32 	%r11519, %r11516, %r11517, 14;
	mov.b64 	%rd17402, {%r11519, %r11518};
	shf.r.wrap.b32 	%r11520, %r11517, %r11516, 18;
	shf.r.wrap.b32 	%r11521, %r11516, %r11517, 18;
	mov.b64 	%rd17403, {%r11521, %r11520};
	xor.b64  	%rd17404, %rd17403, %rd17402;
	shf.l.wrap.b32 	%r11522, %r11516, %r11517, 23;
	shf.l.wrap.b32 	%r11523, %r11517, %r11516, 23;
	mov.b64 	%rd17405, {%r11523, %r11522};
	xor.b64  	%rd17406, %rd17404, %rd17405;
	xor.b64  	%rd17407, %rd17366, %rd17342;
	and.b64  	%rd17408, %rd17390, %rd17407;
	xor.b64  	%rd17409, %rd17408, %rd17342;
	add.s64 	%rd17410, %rd21773, %rd21445;
	add.s64 	%rd17411, %rd17410, %rd17318;
	add.s64 	%rd17412, %rd17411, %rd17409;
	add.s64 	%rd17413, %rd17412, %rd17406;
	add.s64 	%rd17414, %rd17413, %rd17329;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11524,%dummy}, %rd17401;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11525}, %rd17401;
	}
	shf.r.wrap.b32 	%r11526, %r11525, %r11524, 28;
	shf.r.wrap.b32 	%r11527, %r11524, %r11525, 28;
	mov.b64 	%rd17415, {%r11527, %r11526};
	shf.l.wrap.b32 	%r11528, %r11524, %r11525, 30;
	shf.l.wrap.b32 	%r11529, %r11525, %r11524, 30;
	mov.b64 	%rd17416, {%r11529, %r11528};
	xor.b64  	%rd17417, %rd17416, %rd17415;
	shf.l.wrap.b32 	%r11530, %r11524, %r11525, 25;
	shf.l.wrap.b32 	%r11531, %r11525, %r11524, 25;
	mov.b64 	%rd17418, {%r11531, %r11530};
	xor.b64  	%rd17419, %rd17417, %rd17418;
	xor.b64  	%rd17420, %rd17401, %rd17353;
	xor.b64  	%rd17421, %rd17401, %rd17377;
	and.b64  	%rd17422, %rd17421, %rd17420;
	xor.b64  	%rd17423, %rd17422, %rd17401;
	add.s64 	%rd17424, %rd17413, %rd17423;
	add.s64 	%rd17425, %rd17424, %rd17419;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11532,%dummy}, %rd17414;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11533}, %rd17414;
	}
	shf.r.wrap.b32 	%r11534, %r11533, %r11532, 14;
	shf.r.wrap.b32 	%r11535, %r11532, %r11533, 14;
	mov.b64 	%rd17426, {%r11535, %r11534};
	shf.r.wrap.b32 	%r11536, %r11533, %r11532, 18;
	shf.r.wrap.b32 	%r11537, %r11532, %r11533, 18;
	mov.b64 	%rd17427, {%r11537, %r11536};
	xor.b64  	%rd17428, %rd17427, %rd17426;
	shf.l.wrap.b32 	%r11538, %r11532, %r11533, 23;
	shf.l.wrap.b32 	%r11539, %r11533, %r11532, 23;
	mov.b64 	%rd17429, {%r11539, %r11538};
	xor.b64  	%rd17430, %rd17428, %rd17429;
	xor.b64  	%rd17431, %rd17390, %rd17366;
	and.b64  	%rd17432, %rd17414, %rd17431;
	xor.b64  	%rd17433, %rd17432, %rd17366;
	add.s64 	%rd17434, %rd21772, %rd21444;
	add.s64 	%rd17435, %rd17434, %rd17342;
	add.s64 	%rd17436, %rd17435, %rd17433;
	add.s64 	%rd17437, %rd17436, %rd17430;
	add.s64 	%rd17438, %rd17437, %rd17353;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11540,%dummy}, %rd17425;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11541}, %rd17425;
	}
	shf.r.wrap.b32 	%r11542, %r11541, %r11540, 28;
	shf.r.wrap.b32 	%r11543, %r11540, %r11541, 28;
	mov.b64 	%rd17439, {%r11543, %r11542};
	shf.l.wrap.b32 	%r11544, %r11540, %r11541, 30;
	shf.l.wrap.b32 	%r11545, %r11541, %r11540, 30;
	mov.b64 	%rd17440, {%r11545, %r11544};
	xor.b64  	%rd17441, %rd17440, %rd17439;
	shf.l.wrap.b32 	%r11546, %r11540, %r11541, 25;
	shf.l.wrap.b32 	%r11547, %r11541, %r11540, 25;
	mov.b64 	%rd17442, {%r11547, %r11546};
	xor.b64  	%rd17443, %rd17441, %rd17442;
	xor.b64  	%rd17444, %rd17425, %rd17377;
	xor.b64  	%rd17445, %rd17425, %rd17401;
	and.b64  	%rd17446, %rd17445, %rd17444;
	xor.b64  	%rd17447, %rd17446, %rd17425;
	add.s64 	%rd17448, %rd17437, %rd17447;
	add.s64 	%rd17449, %rd17448, %rd17443;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11548,%dummy}, %rd17438;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11549}, %rd17438;
	}
	shf.r.wrap.b32 	%r11550, %r11549, %r11548, 14;
	shf.r.wrap.b32 	%r11551, %r11548, %r11549, 14;
	mov.b64 	%rd17450, {%r11551, %r11550};
	shf.r.wrap.b32 	%r11552, %r11549, %r11548, 18;
	shf.r.wrap.b32 	%r11553, %r11548, %r11549, 18;
	mov.b64 	%rd17451, {%r11553, %r11552};
	xor.b64  	%rd17452, %rd17451, %rd17450;
	shf.l.wrap.b32 	%r11554, %r11548, %r11549, 23;
	shf.l.wrap.b32 	%r11555, %r11549, %r11548, 23;
	mov.b64 	%rd17453, {%r11555, %r11554};
	xor.b64  	%rd17454, %rd17452, %rd17453;
	xor.b64  	%rd17455, %rd17414, %rd17390;
	and.b64  	%rd17456, %rd17438, %rd17455;
	xor.b64  	%rd17457, %rd17456, %rd17390;
	add.s64 	%rd17458, %rd21771, %rd21443;
	add.s64 	%rd17459, %rd17458, %rd17366;
	add.s64 	%rd17460, %rd17459, %rd17457;
	add.s64 	%rd17461, %rd17460, %rd17454;
	add.s64 	%rd17462, %rd17461, %rd17377;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11556,%dummy}, %rd17449;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11557}, %rd17449;
	}
	shf.r.wrap.b32 	%r11558, %r11557, %r11556, 28;
	shf.r.wrap.b32 	%r11559, %r11556, %r11557, 28;
	mov.b64 	%rd17463, {%r11559, %r11558};
	shf.l.wrap.b32 	%r11560, %r11556, %r11557, 30;
	shf.l.wrap.b32 	%r11561, %r11557, %r11556, 30;
	mov.b64 	%rd17464, {%r11561, %r11560};
	xor.b64  	%rd17465, %rd17464, %rd17463;
	shf.l.wrap.b32 	%r11562, %r11556, %r11557, 25;
	shf.l.wrap.b32 	%r11563, %r11557, %r11556, 25;
	mov.b64 	%rd17466, {%r11563, %r11562};
	xor.b64  	%rd17467, %rd17465, %rd17466;
	xor.b64  	%rd17468, %rd17449, %rd17401;
	xor.b64  	%rd17469, %rd17449, %rd17425;
	and.b64  	%rd17470, %rd17469, %rd17468;
	xor.b64  	%rd17471, %rd17470, %rd17449;
	add.s64 	%rd17472, %rd17461, %rd17471;
	add.s64 	%rd17473, %rd17472, %rd17467;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11564,%dummy}, %rd17462;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11565}, %rd17462;
	}
	shf.r.wrap.b32 	%r11566, %r11565, %r11564, 14;
	shf.r.wrap.b32 	%r11567, %r11564, %r11565, 14;
	mov.b64 	%rd17474, {%r11567, %r11566};
	shf.r.wrap.b32 	%r11568, %r11565, %r11564, 18;
	shf.r.wrap.b32 	%r11569, %r11564, %r11565, 18;
	mov.b64 	%rd17475, {%r11569, %r11568};
	xor.b64  	%rd17476, %rd17475, %rd17474;
	shf.l.wrap.b32 	%r11570, %r11564, %r11565, 23;
	shf.l.wrap.b32 	%r11571, %r11565, %r11564, 23;
	mov.b64 	%rd17477, {%r11571, %r11570};
	xor.b64  	%rd17478, %rd17476, %rd17477;
	xor.b64  	%rd17479, %rd17438, %rd17414;
	and.b64  	%rd17480, %rd17462, %rd17479;
	xor.b64  	%rd17481, %rd17480, %rd17414;
	add.s64 	%rd17482, %rd21770, %rd21442;
	add.s64 	%rd17483, %rd17482, %rd17390;
	add.s64 	%rd17484, %rd17483, %rd17481;
	add.s64 	%rd17485, %rd17484, %rd17478;
	add.s64 	%rd21782, %rd17485, %rd17401;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11572,%dummy}, %rd17473;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11573}, %rd17473;
	}
	shf.r.wrap.b32 	%r11574, %r11573, %r11572, 28;
	shf.r.wrap.b32 	%r11575, %r11572, %r11573, 28;
	mov.b64 	%rd17486, {%r11575, %r11574};
	shf.l.wrap.b32 	%r11576, %r11572, %r11573, 30;
	shf.l.wrap.b32 	%r11577, %r11573, %r11572, 30;
	mov.b64 	%rd17487, {%r11577, %r11576};
	xor.b64  	%rd17488, %rd17487, %rd17486;
	shf.l.wrap.b32 	%r11578, %r11572, %r11573, 25;
	shf.l.wrap.b32 	%r11579, %r11573, %r11572, 25;
	mov.b64 	%rd17489, {%r11579, %r11578};
	xor.b64  	%rd17490, %rd17488, %rd17489;
	xor.b64  	%rd17491, %rd17473, %rd17425;
	xor.b64  	%rd17492, %rd17473, %rd17449;
	and.b64  	%rd17493, %rd17492, %rd17491;
	xor.b64  	%rd17494, %rd17493, %rd17473;
	add.s64 	%rd17495, %rd17485, %rd17494;
	add.s64 	%rd21778, %rd17495, %rd17490;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11580,%dummy}, %rd21782;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11581}, %rd21782;
	}
	shf.r.wrap.b32 	%r11582, %r11581, %r11580, 14;
	shf.r.wrap.b32 	%r11583, %r11580, %r11581, 14;
	mov.b64 	%rd17496, {%r11583, %r11582};
	shf.r.wrap.b32 	%r11584, %r11581, %r11580, 18;
	shf.r.wrap.b32 	%r11585, %r11580, %r11581, 18;
	mov.b64 	%rd17497, {%r11585, %r11584};
	xor.b64  	%rd17498, %rd17497, %rd17496;
	shf.l.wrap.b32 	%r11586, %r11580, %r11581, 23;
	shf.l.wrap.b32 	%r11587, %r11581, %r11580, 23;
	mov.b64 	%rd17499, {%r11587, %r11586};
	xor.b64  	%rd17500, %rd17498, %rd17499;
	xor.b64  	%rd17501, %rd17462, %rd17438;
	and.b64  	%rd17502, %rd21782, %rd17501;
	xor.b64  	%rd17503, %rd17502, %rd17438;
	add.s64 	%rd17504, %rd21769, %rd21441;
	add.s64 	%rd17505, %rd17504, %rd17414;
	add.s64 	%rd17506, %rd17505, %rd17503;
	add.s64 	%rd17507, %rd17506, %rd17500;
	add.s64 	%rd21781, %rd17507, %rd17425;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11588,%dummy}, %rd21778;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11589}, %rd21778;
	}
	shf.r.wrap.b32 	%r11590, %r11589, %r11588, 28;
	shf.r.wrap.b32 	%r11591, %r11588, %r11589, 28;
	mov.b64 	%rd17508, {%r11591, %r11590};
	shf.l.wrap.b32 	%r11592, %r11588, %r11589, 30;
	shf.l.wrap.b32 	%r11593, %r11589, %r11588, 30;
	mov.b64 	%rd17509, {%r11593, %r11592};
	xor.b64  	%rd17510, %rd17509, %rd17508;
	shf.l.wrap.b32 	%r11594, %r11588, %r11589, 25;
	shf.l.wrap.b32 	%r11595, %r11589, %r11588, 25;
	mov.b64 	%rd17511, {%r11595, %r11594};
	xor.b64  	%rd17512, %rd17510, %rd17511;
	xor.b64  	%rd17513, %rd21778, %rd17449;
	xor.b64  	%rd17514, %rd21778, %rd17473;
	and.b64  	%rd17515, %rd17514, %rd17513;
	xor.b64  	%rd17516, %rd17515, %rd21778;
	add.s64 	%rd17517, %rd17507, %rd17516;
	add.s64 	%rd21777, %rd17517, %rd17512;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11596,%dummy}, %rd21781;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11597}, %rd21781;
	}
	shf.r.wrap.b32 	%r11598, %r11597, %r11596, 14;
	shf.r.wrap.b32 	%r11599, %r11596, %r11597, 14;
	mov.b64 	%rd17518, {%r11599, %r11598};
	shf.r.wrap.b32 	%r11600, %r11597, %r11596, 18;
	shf.r.wrap.b32 	%r11601, %r11596, %r11597, 18;
	mov.b64 	%rd17519, {%r11601, %r11600};
	xor.b64  	%rd17520, %rd17519, %rd17518;
	shf.l.wrap.b32 	%r11602, %r11596, %r11597, 23;
	shf.l.wrap.b32 	%r11603, %r11597, %r11596, 23;
	mov.b64 	%rd17521, {%r11603, %r11602};
	xor.b64  	%rd17522, %rd17520, %rd17521;
	xor.b64  	%rd17523, %rd21782, %rd17462;
	and.b64  	%rd17524, %rd21781, %rd17523;
	xor.b64  	%rd17525, %rd17524, %rd17462;
	add.s64 	%rd17526, %rd21768, %rd21440;
	add.s64 	%rd17527, %rd17526, %rd17438;
	add.s64 	%rd17528, %rd17527, %rd17525;
	add.s64 	%rd17529, %rd17528, %rd17522;
	add.s64 	%rd21780, %rd17529, %rd17449;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11604,%dummy}, %rd21777;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11605}, %rd21777;
	}
	shf.r.wrap.b32 	%r11606, %r11605, %r11604, 28;
	shf.r.wrap.b32 	%r11607, %r11604, %r11605, 28;
	mov.b64 	%rd17530, {%r11607, %r11606};
	shf.l.wrap.b32 	%r11608, %r11604, %r11605, 30;
	shf.l.wrap.b32 	%r11609, %r11605, %r11604, 30;
	mov.b64 	%rd17531, {%r11609, %r11608};
	xor.b64  	%rd17532, %rd17531, %rd17530;
	shf.l.wrap.b32 	%r11610, %r11604, %r11605, 25;
	shf.l.wrap.b32 	%r11611, %r11605, %r11604, 25;
	mov.b64 	%rd17533, {%r11611, %r11610};
	xor.b64  	%rd17534, %rd17532, %rd17533;
	xor.b64  	%rd17535, %rd21777, %rd17473;
	xor.b64  	%rd17536, %rd21777, %rd21778;
	and.b64  	%rd17537, %rd17536, %rd17535;
	xor.b64  	%rd17538, %rd17537, %rd21777;
	add.s64 	%rd17539, %rd17529, %rd17538;
	add.s64 	%rd21776, %rd17539, %rd17534;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11612,%dummy}, %rd21780;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11613}, %rd21780;
	}
	shf.r.wrap.b32 	%r11614, %r11613, %r11612, 14;
	shf.r.wrap.b32 	%r11615, %r11612, %r11613, 14;
	mov.b64 	%rd17540, {%r11615, %r11614};
	shf.r.wrap.b32 	%r11616, %r11613, %r11612, 18;
	shf.r.wrap.b32 	%r11617, %r11612, %r11613, 18;
	mov.b64 	%rd17541, {%r11617, %r11616};
	xor.b64  	%rd17542, %rd17541, %rd17540;
	shf.l.wrap.b32 	%r11618, %r11612, %r11613, 23;
	shf.l.wrap.b32 	%r11619, %r11613, %r11612, 23;
	mov.b64 	%rd17543, {%r11619, %r11618};
	xor.b64  	%rd17544, %rd17542, %rd17543;
	xor.b64  	%rd17545, %rd21781, %rd21782;
	and.b64  	%rd17546, %rd21780, %rd17545;
	xor.b64  	%rd17547, %rd17546, %rd21782;
	add.s64 	%rd17548, %rd21767, %rd21439;
	add.s64 	%rd17549, %rd17548, %rd17462;
	add.s64 	%rd17550, %rd17549, %rd17547;
	add.s64 	%rd17551, %rd17550, %rd17544;
	add.s64 	%rd21779, %rd17551, %rd17473;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11620,%dummy}, %rd21776;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11621}, %rd21776;
	}
	shf.r.wrap.b32 	%r11622, %r11621, %r11620, 28;
	shf.r.wrap.b32 	%r11623, %r11620, %r11621, 28;
	mov.b64 	%rd17552, {%r11623, %r11622};
	shf.l.wrap.b32 	%r11624, %r11620, %r11621, 30;
	shf.l.wrap.b32 	%r11625, %r11621, %r11620, 30;
	mov.b64 	%rd17553, {%r11625, %r11624};
	xor.b64  	%rd17554, %rd17553, %rd17552;
	shf.l.wrap.b32 	%r11626, %r11620, %r11621, 25;
	shf.l.wrap.b32 	%r11627, %r11621, %r11620, 25;
	mov.b64 	%rd17555, {%r11627, %r11626};
	xor.b64  	%rd17556, %rd17554, %rd17555;
	xor.b64  	%rd17557, %rd21776, %rd21778;
	xor.b64  	%rd17558, %rd21776, %rd21777;
	and.b64  	%rd17559, %rd17558, %rd17557;
	xor.b64  	%rd17560, %rd17559, %rd21776;
	add.s64 	%rd17561, %rd17551, %rd17560;
	add.s64 	%rd21775, %rd17561, %rd17556;
	mov.u32 	%r14479, 16;

BB3_305:
	shr.u64 	%rd17562, %rd21768, 6;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11628,%dummy}, %rd21768;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11629}, %rd21768;
	}
	shf.r.wrap.b32 	%r11630, %r11629, %r11628, 19;
	shf.r.wrap.b32 	%r11631, %r11628, %r11629, 19;
	mov.b64 	%rd17563, {%r11631, %r11630};
	xor.b64  	%rd17564, %rd17563, %rd17562;
	shf.l.wrap.b32 	%r11632, %r11628, %r11629, 3;
	shf.l.wrap.b32 	%r11633, %r11629, %r11628, 3;
	mov.b64 	%rd17565, {%r11633, %r11632};
	xor.b64  	%rd17566, %rd17564, %rd17565;
	shr.u64 	%rd17567, %rd21784, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11634,%dummy}, %rd21784;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11635}, %rd21784;
	}
	shf.r.wrap.b32 	%r11636, %r11635, %r11634, 1;
	shf.r.wrap.b32 	%r11637, %r11634, %r11635, 1;
	mov.b64 	%rd17568, {%r11637, %r11636};
	xor.b64  	%rd17569, %rd17568, %rd17567;
	shf.r.wrap.b32 	%r11638, %r11635, %r11634, 8;
	shf.r.wrap.b32 	%r11639, %r11634, %r11635, 8;
	mov.b64 	%rd17570, {%r11639, %r11638};
	xor.b64  	%rd17571, %rd17569, %rd17570;
	add.s64 	%rd17572, %rd21783, %rd21773;
	add.s64 	%rd17573, %rd17572, %rd17566;
	add.s64 	%rd21783, %rd17573, %rd17571;
	shr.u64 	%rd17574, %rd21767, 6;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11640,%dummy}, %rd21767;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11641}, %rd21767;
	}
	shf.r.wrap.b32 	%r11642, %r11641, %r11640, 19;
	shf.r.wrap.b32 	%r11643, %r11640, %r11641, 19;
	mov.b64 	%rd17575, {%r11643, %r11642};
	xor.b64  	%rd17576, %rd17575, %rd17574;
	shf.l.wrap.b32 	%r11644, %r11640, %r11641, 3;
	shf.l.wrap.b32 	%r11645, %r11641, %r11640, 3;
	mov.b64 	%rd17577, {%r11645, %r11644};
	xor.b64  	%rd17578, %rd17576, %rd17577;
	shr.u64 	%rd17579, %rd21785, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11646,%dummy}, %rd21785;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11647}, %rd21785;
	}
	shf.r.wrap.b32 	%r11648, %r11647, %r11646, 1;
	shf.r.wrap.b32 	%r11649, %r11646, %r11647, 1;
	mov.b64 	%rd17580, {%r11649, %r11648};
	xor.b64  	%rd17581, %rd17580, %rd17579;
	shf.r.wrap.b32 	%r11650, %r11647, %r11646, 8;
	shf.r.wrap.b32 	%r11651, %r11646, %r11647, 8;
	mov.b64 	%rd17582, {%r11651, %r11650};
	xor.b64  	%rd17583, %rd17581, %rd17582;
	add.s64 	%rd17584, %rd21784, %rd21772;
	add.s64 	%rd17585, %rd17584, %rd17578;
	add.s64 	%rd21784, %rd17585, %rd17583;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11652,%dummy}, %rd21783;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11653}, %rd21783;
	}
	shf.r.wrap.b32 	%r11654, %r11653, %r11652, 19;
	shf.r.wrap.b32 	%r11655, %r11652, %r11653, 19;
	mov.b64 	%rd17586, {%r11655, %r11654};
	shf.l.wrap.b32 	%r11656, %r11652, %r11653, 3;
	shf.l.wrap.b32 	%r11657, %r11653, %r11652, 3;
	mov.b64 	%rd17587, {%r11657, %r11656};
	shr.u64 	%rd17588, %rd21783, 6;
	xor.b64  	%rd17589, %rd17586, %rd17588;
	xor.b64  	%rd17590, %rd17589, %rd17587;
	shr.u64 	%rd17591, %rd21786, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11658,%dummy}, %rd21786;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11659}, %rd21786;
	}
	shf.r.wrap.b32 	%r11660, %r11659, %r11658, 1;
	shf.r.wrap.b32 	%r11661, %r11658, %r11659, 1;
	mov.b64 	%rd17592, {%r11661, %r11660};
	xor.b64  	%rd17593, %rd17592, %rd17591;
	shf.r.wrap.b32 	%r11662, %r11659, %r11658, 8;
	shf.r.wrap.b32 	%r11663, %r11658, %r11659, 8;
	mov.b64 	%rd17594, {%r11663, %r11662};
	xor.b64  	%rd17595, %rd17593, %rd17594;
	add.s64 	%rd17596, %rd21785, %rd21771;
	add.s64 	%rd17597, %rd17596, %rd17590;
	add.s64 	%rd21785, %rd17597, %rd17595;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11664,%dummy}, %rd21784;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11665}, %rd21784;
	}
	shf.r.wrap.b32 	%r11666, %r11665, %r11664, 19;
	shf.r.wrap.b32 	%r11667, %r11664, %r11665, 19;
	mov.b64 	%rd17598, {%r11667, %r11666};
	shf.l.wrap.b32 	%r11668, %r11664, %r11665, 3;
	shf.l.wrap.b32 	%r11669, %r11665, %r11664, 3;
	mov.b64 	%rd17599, {%r11669, %r11668};
	shr.u64 	%rd17600, %rd21784, 6;
	xor.b64  	%rd17601, %rd17598, %rd17600;
	xor.b64  	%rd17602, %rd17601, %rd17599;
	shr.u64 	%rd17603, %rd21787, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11670,%dummy}, %rd21787;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11671}, %rd21787;
	}
	shf.r.wrap.b32 	%r11672, %r11671, %r11670, 1;
	shf.r.wrap.b32 	%r11673, %r11670, %r11671, 1;
	mov.b64 	%rd17604, {%r11673, %r11672};
	xor.b64  	%rd17605, %rd17604, %rd17603;
	shf.r.wrap.b32 	%r11674, %r11671, %r11670, 8;
	shf.r.wrap.b32 	%r11675, %r11670, %r11671, 8;
	mov.b64 	%rd17606, {%r11675, %r11674};
	xor.b64  	%rd17607, %rd17605, %rd17606;
	add.s64 	%rd17608, %rd21786, %rd21770;
	add.s64 	%rd17609, %rd17608, %rd17602;
	add.s64 	%rd21786, %rd17609, %rd17607;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11676,%dummy}, %rd21785;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11677}, %rd21785;
	}
	shf.r.wrap.b32 	%r11678, %r11677, %r11676, 19;
	shf.r.wrap.b32 	%r11679, %r11676, %r11677, 19;
	mov.b64 	%rd17610, {%r11679, %r11678};
	shf.l.wrap.b32 	%r11680, %r11676, %r11677, 3;
	shf.l.wrap.b32 	%r11681, %r11677, %r11676, 3;
	mov.b64 	%rd17611, {%r11681, %r11680};
	shr.u64 	%rd17612, %rd21785, 6;
	xor.b64  	%rd17613, %rd17610, %rd17612;
	xor.b64  	%rd17614, %rd17613, %rd17611;
	shr.u64 	%rd17615, %rd21788, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11682,%dummy}, %rd21788;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11683}, %rd21788;
	}
	shf.r.wrap.b32 	%r11684, %r11683, %r11682, 1;
	shf.r.wrap.b32 	%r11685, %r11682, %r11683, 1;
	mov.b64 	%rd17616, {%r11685, %r11684};
	xor.b64  	%rd17617, %rd17616, %rd17615;
	shf.r.wrap.b32 	%r11686, %r11683, %r11682, 8;
	shf.r.wrap.b32 	%r11687, %r11682, %r11683, 8;
	mov.b64 	%rd17618, {%r11687, %r11686};
	xor.b64  	%rd17619, %rd17617, %rd17618;
	add.s64 	%rd17620, %rd21787, %rd21769;
	add.s64 	%rd17621, %rd17620, %rd17614;
	add.s64 	%rd21787, %rd17621, %rd17619;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11688,%dummy}, %rd21786;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11689}, %rd21786;
	}
	shf.r.wrap.b32 	%r11690, %r11689, %r11688, 19;
	shf.r.wrap.b32 	%r11691, %r11688, %r11689, 19;
	mov.b64 	%rd17622, {%r11691, %r11690};
	shf.l.wrap.b32 	%r11692, %r11688, %r11689, 3;
	shf.l.wrap.b32 	%r11693, %r11689, %r11688, 3;
	mov.b64 	%rd17623, {%r11693, %r11692};
	shr.u64 	%rd17624, %rd21786, 6;
	xor.b64  	%rd17625, %rd17622, %rd17624;
	xor.b64  	%rd17626, %rd17625, %rd17623;
	shr.u64 	%rd17627, %rd21789, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11694,%dummy}, %rd21789;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11695}, %rd21789;
	}
	shf.r.wrap.b32 	%r11696, %r11695, %r11694, 1;
	shf.r.wrap.b32 	%r11697, %r11694, %r11695, 1;
	mov.b64 	%rd17628, {%r11697, %r11696};
	xor.b64  	%rd17629, %rd17628, %rd17627;
	shf.r.wrap.b32 	%r11698, %r11695, %r11694, 8;
	shf.r.wrap.b32 	%r11699, %r11694, %r11695, 8;
	mov.b64 	%rd17630, {%r11699, %r11698};
	xor.b64  	%rd17631, %rd17629, %rd17630;
	add.s64 	%rd17632, %rd21788, %rd21768;
	add.s64 	%rd17633, %rd17632, %rd17626;
	add.s64 	%rd21788, %rd17633, %rd17631;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11700,%dummy}, %rd21787;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11701}, %rd21787;
	}
	shf.r.wrap.b32 	%r11702, %r11701, %r11700, 19;
	shf.r.wrap.b32 	%r11703, %r11700, %r11701, 19;
	mov.b64 	%rd17634, {%r11703, %r11702};
	shf.l.wrap.b32 	%r11704, %r11700, %r11701, 3;
	shf.l.wrap.b32 	%r11705, %r11701, %r11700, 3;
	mov.b64 	%rd17635, {%r11705, %r11704};
	shr.u64 	%rd17636, %rd21787, 6;
	xor.b64  	%rd17637, %rd17634, %rd17636;
	xor.b64  	%rd17638, %rd17637, %rd17635;
	shr.u64 	%rd17639, %rd21790, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11706,%dummy}, %rd21790;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11707}, %rd21790;
	}
	shf.r.wrap.b32 	%r11708, %r11707, %r11706, 1;
	shf.r.wrap.b32 	%r11709, %r11706, %r11707, 1;
	mov.b64 	%rd17640, {%r11709, %r11708};
	xor.b64  	%rd17641, %rd17640, %rd17639;
	shf.r.wrap.b32 	%r11710, %r11707, %r11706, 8;
	shf.r.wrap.b32 	%r11711, %r11706, %r11707, 8;
	mov.b64 	%rd17642, {%r11711, %r11710};
	xor.b64  	%rd17643, %rd17641, %rd17642;
	add.s64 	%rd17644, %rd21789, %rd21767;
	add.s64 	%rd17645, %rd17644, %rd17638;
	add.s64 	%rd21789, %rd17645, %rd17643;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11712,%dummy}, %rd21788;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11713}, %rd21788;
	}
	shf.r.wrap.b32 	%r11714, %r11713, %r11712, 19;
	shf.r.wrap.b32 	%r11715, %r11712, %r11713, 19;
	mov.b64 	%rd17646, {%r11715, %r11714};
	shf.l.wrap.b32 	%r11716, %r11712, %r11713, 3;
	shf.l.wrap.b32 	%r11717, %r11713, %r11712, 3;
	mov.b64 	%rd17647, {%r11717, %r11716};
	shr.u64 	%rd17648, %rd21788, 6;
	xor.b64  	%rd17649, %rd17646, %rd17648;
	xor.b64  	%rd17650, %rd17649, %rd17647;
	shr.u64 	%rd17651, %rd21774, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11718,%dummy}, %rd21774;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11719}, %rd21774;
	}
	shf.r.wrap.b32 	%r11720, %r11719, %r11718, 1;
	shf.r.wrap.b32 	%r11721, %r11718, %r11719, 1;
	mov.b64 	%rd17652, {%r11721, %r11720};
	xor.b64  	%rd17653, %rd17652, %rd17651;
	shf.r.wrap.b32 	%r11722, %r11719, %r11718, 8;
	shf.r.wrap.b32 	%r11723, %r11718, %r11719, 8;
	mov.b64 	%rd17654, {%r11723, %r11722};
	xor.b64  	%rd17655, %rd17653, %rd17654;
	add.s64 	%rd17656, %rd21783, %rd21790;
	add.s64 	%rd17657, %rd17656, %rd17650;
	add.s64 	%rd21790, %rd17657, %rd17655;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11724,%dummy}, %rd21789;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11725}, %rd21789;
	}
	shf.r.wrap.b32 	%r11726, %r11725, %r11724, 19;
	shf.r.wrap.b32 	%r11727, %r11724, %r11725, 19;
	mov.b64 	%rd17658, {%r11727, %r11726};
	shf.l.wrap.b32 	%r11728, %r11724, %r11725, 3;
	shf.l.wrap.b32 	%r11729, %r11725, %r11724, 3;
	mov.b64 	%rd17659, {%r11729, %r11728};
	shr.u64 	%rd17660, %rd21789, 6;
	xor.b64  	%rd17661, %rd17658, %rd17660;
	xor.b64  	%rd17662, %rd17661, %rd17659;
	shr.u64 	%rd17663, %rd21773, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11730,%dummy}, %rd21773;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11731}, %rd21773;
	}
	shf.r.wrap.b32 	%r11732, %r11731, %r11730, 1;
	shf.r.wrap.b32 	%r11733, %r11730, %r11731, 1;
	mov.b64 	%rd17664, {%r11733, %r11732};
	xor.b64  	%rd17665, %rd17664, %rd17663;
	shf.r.wrap.b32 	%r11734, %r11731, %r11730, 8;
	shf.r.wrap.b32 	%r11735, %r11730, %r11731, 8;
	mov.b64 	%rd17666, {%r11735, %r11734};
	xor.b64  	%rd17667, %rd17665, %rd17666;
	add.s64 	%rd17668, %rd21784, %rd21774;
	add.s64 	%rd17669, %rd17668, %rd17662;
	add.s64 	%rd21774, %rd17669, %rd17667;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11736,%dummy}, %rd21790;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11737}, %rd21790;
	}
	shf.r.wrap.b32 	%r11738, %r11737, %r11736, 19;
	shf.r.wrap.b32 	%r11739, %r11736, %r11737, 19;
	mov.b64 	%rd17670, {%r11739, %r11738};
	shf.l.wrap.b32 	%r11740, %r11736, %r11737, 3;
	shf.l.wrap.b32 	%r11741, %r11737, %r11736, 3;
	mov.b64 	%rd17671, {%r11741, %r11740};
	shr.u64 	%rd17672, %rd21790, 6;
	xor.b64  	%rd17673, %rd17670, %rd17672;
	xor.b64  	%rd17674, %rd17673, %rd17671;
	shr.u64 	%rd17675, %rd21772, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11742,%dummy}, %rd21772;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11743}, %rd21772;
	}
	shf.r.wrap.b32 	%r11744, %r11743, %r11742, 1;
	shf.r.wrap.b32 	%r11745, %r11742, %r11743, 1;
	mov.b64 	%rd17676, {%r11745, %r11744};
	xor.b64  	%rd17677, %rd17676, %rd17675;
	shf.r.wrap.b32 	%r11746, %r11743, %r11742, 8;
	shf.r.wrap.b32 	%r11747, %r11742, %r11743, 8;
	mov.b64 	%rd17678, {%r11747, %r11746};
	xor.b64  	%rd17679, %rd17677, %rd17678;
	add.s64 	%rd17680, %rd21785, %rd21773;
	add.s64 	%rd17681, %rd17680, %rd17674;
	add.s64 	%rd21773, %rd17681, %rd17679;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11748,%dummy}, %rd21774;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11749}, %rd21774;
	}
	shf.r.wrap.b32 	%r11750, %r11749, %r11748, 19;
	shf.r.wrap.b32 	%r11751, %r11748, %r11749, 19;
	mov.b64 	%rd17682, {%r11751, %r11750};
	shf.l.wrap.b32 	%r11752, %r11748, %r11749, 3;
	shf.l.wrap.b32 	%r11753, %r11749, %r11748, 3;
	mov.b64 	%rd17683, {%r11753, %r11752};
	shr.u64 	%rd17684, %rd21774, 6;
	xor.b64  	%rd17685, %rd17682, %rd17684;
	xor.b64  	%rd17686, %rd17685, %rd17683;
	shr.u64 	%rd17687, %rd21771, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11754,%dummy}, %rd21771;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11755}, %rd21771;
	}
	shf.r.wrap.b32 	%r11756, %r11755, %r11754, 1;
	shf.r.wrap.b32 	%r11757, %r11754, %r11755, 1;
	mov.b64 	%rd17688, {%r11757, %r11756};
	xor.b64  	%rd17689, %rd17688, %rd17687;
	shf.r.wrap.b32 	%r11758, %r11755, %r11754, 8;
	shf.r.wrap.b32 	%r11759, %r11754, %r11755, 8;
	mov.b64 	%rd17690, {%r11759, %r11758};
	xor.b64  	%rd17691, %rd17689, %rd17690;
	add.s64 	%rd17692, %rd21786, %rd21772;
	add.s64 	%rd17693, %rd17692, %rd17686;
	add.s64 	%rd21772, %rd17693, %rd17691;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11760,%dummy}, %rd21773;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11761}, %rd21773;
	}
	shf.r.wrap.b32 	%r11762, %r11761, %r11760, 19;
	shf.r.wrap.b32 	%r11763, %r11760, %r11761, 19;
	mov.b64 	%rd17694, {%r11763, %r11762};
	shf.l.wrap.b32 	%r11764, %r11760, %r11761, 3;
	shf.l.wrap.b32 	%r11765, %r11761, %r11760, 3;
	mov.b64 	%rd17695, {%r11765, %r11764};
	shr.u64 	%rd17696, %rd21773, 6;
	xor.b64  	%rd17697, %rd17694, %rd17696;
	xor.b64  	%rd17698, %rd17697, %rd17695;
	shr.u64 	%rd17699, %rd21770, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11766,%dummy}, %rd21770;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11767}, %rd21770;
	}
	shf.r.wrap.b32 	%r11768, %r11767, %r11766, 1;
	shf.r.wrap.b32 	%r11769, %r11766, %r11767, 1;
	mov.b64 	%rd17700, {%r11769, %r11768};
	xor.b64  	%rd17701, %rd17700, %rd17699;
	shf.r.wrap.b32 	%r11770, %r11767, %r11766, 8;
	shf.r.wrap.b32 	%r11771, %r11766, %r11767, 8;
	mov.b64 	%rd17702, {%r11771, %r11770};
	xor.b64  	%rd17703, %rd17701, %rd17702;
	add.s64 	%rd17704, %rd21787, %rd21771;
	add.s64 	%rd17705, %rd17704, %rd17698;
	add.s64 	%rd21771, %rd17705, %rd17703;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11772,%dummy}, %rd21772;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11773}, %rd21772;
	}
	shf.r.wrap.b32 	%r11774, %r11773, %r11772, 19;
	shf.r.wrap.b32 	%r11775, %r11772, %r11773, 19;
	mov.b64 	%rd17706, {%r11775, %r11774};
	shf.l.wrap.b32 	%r11776, %r11772, %r11773, 3;
	shf.l.wrap.b32 	%r11777, %r11773, %r11772, 3;
	mov.b64 	%rd17707, {%r11777, %r11776};
	shr.u64 	%rd17708, %rd21772, 6;
	xor.b64  	%rd17709, %rd17706, %rd17708;
	xor.b64  	%rd17710, %rd17709, %rd17707;
	shr.u64 	%rd17711, %rd21769, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11778,%dummy}, %rd21769;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11779}, %rd21769;
	}
	shf.r.wrap.b32 	%r11780, %r11779, %r11778, 1;
	shf.r.wrap.b32 	%r11781, %r11778, %r11779, 1;
	mov.b64 	%rd17712, {%r11781, %r11780};
	xor.b64  	%rd17713, %rd17712, %rd17711;
	shf.r.wrap.b32 	%r11782, %r11779, %r11778, 8;
	shf.r.wrap.b32 	%r11783, %r11778, %r11779, 8;
	mov.b64 	%rd17714, {%r11783, %r11782};
	xor.b64  	%rd17715, %rd17713, %rd17714;
	add.s64 	%rd17716, %rd21788, %rd21770;
	add.s64 	%rd17717, %rd17716, %rd17710;
	add.s64 	%rd21770, %rd17717, %rd17715;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11784,%dummy}, %rd21771;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11785}, %rd21771;
	}
	shf.r.wrap.b32 	%r11786, %r11785, %r11784, 19;
	shf.r.wrap.b32 	%r11787, %r11784, %r11785, 19;
	mov.b64 	%rd17718, {%r11787, %r11786};
	shf.l.wrap.b32 	%r11788, %r11784, %r11785, 3;
	shf.l.wrap.b32 	%r11789, %r11785, %r11784, 3;
	mov.b64 	%rd17719, {%r11789, %r11788};
	shr.u64 	%rd17720, %rd21771, 6;
	xor.b64  	%rd17721, %rd17718, %rd17720;
	xor.b64  	%rd17722, %rd17721, %rd17719;
	shr.u64 	%rd17723, %rd21768, 7;
	shf.r.wrap.b32 	%r11790, %r11629, %r11628, 1;
	shf.r.wrap.b32 	%r11791, %r11628, %r11629, 1;
	mov.b64 	%rd17724, {%r11791, %r11790};
	xor.b64  	%rd17725, %rd17724, %rd17723;
	shf.r.wrap.b32 	%r11792, %r11629, %r11628, 8;
	shf.r.wrap.b32 	%r11793, %r11628, %r11629, 8;
	mov.b64 	%rd17726, {%r11793, %r11792};
	xor.b64  	%rd17727, %rd17725, %rd17726;
	add.s64 	%rd17728, %rd21789, %rd21769;
	add.s64 	%rd17729, %rd17728, %rd17722;
	add.s64 	%rd21769, %rd17729, %rd17727;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11794,%dummy}, %rd21770;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11795}, %rd21770;
	}
	shf.r.wrap.b32 	%r11796, %r11795, %r11794, 19;
	shf.r.wrap.b32 	%r11797, %r11794, %r11795, 19;
	mov.b64 	%rd17730, {%r11797, %r11796};
	shf.l.wrap.b32 	%r11798, %r11794, %r11795, 3;
	shf.l.wrap.b32 	%r11799, %r11795, %r11794, 3;
	mov.b64 	%rd17731, {%r11799, %r11798};
	shr.u64 	%rd17732, %rd21770, 6;
	xor.b64  	%rd17733, %rd17730, %rd17732;
	xor.b64  	%rd17734, %rd17733, %rd17731;
	shr.u64 	%rd17735, %rd21767, 7;
	shf.r.wrap.b32 	%r11800, %r11641, %r11640, 1;
	shf.r.wrap.b32 	%r11801, %r11640, %r11641, 1;
	mov.b64 	%rd17736, {%r11801, %r11800};
	xor.b64  	%rd17737, %rd17736, %rd17735;
	shf.r.wrap.b32 	%r11802, %r11641, %r11640, 8;
	shf.r.wrap.b32 	%r11803, %r11640, %r11641, 8;
	mov.b64 	%rd17738, {%r11803, %r11802};
	xor.b64  	%rd17739, %rd17737, %rd17738;
	add.s64 	%rd17740, %rd21790, %rd21768;
	add.s64 	%rd17741, %rd17740, %rd17734;
	add.s64 	%rd21768, %rd17741, %rd17739;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11804,%dummy}, %rd21769;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11805}, %rd21769;
	}
	shf.r.wrap.b32 	%r11806, %r11805, %r11804, 19;
	shf.r.wrap.b32 	%r11807, %r11804, %r11805, 19;
	mov.b64 	%rd17742, {%r11807, %r11806};
	shf.l.wrap.b32 	%r11808, %r11804, %r11805, 3;
	shf.l.wrap.b32 	%r11809, %r11805, %r11804, 3;
	mov.b64 	%rd17743, {%r11809, %r11808};
	shr.u64 	%rd17744, %rd21769, 6;
	xor.b64  	%rd17745, %rd17742, %rd17744;
	xor.b64  	%rd17746, %rd17745, %rd17743;
	shf.r.wrap.b32 	%r11810, %r11653, %r11652, 1;
	shf.r.wrap.b32 	%r11811, %r11652, %r11653, 1;
	mov.b64 	%rd17747, {%r11811, %r11810};
	shf.r.wrap.b32 	%r11812, %r11653, %r11652, 8;
	shf.r.wrap.b32 	%r11813, %r11652, %r11653, 8;
	mov.b64 	%rd17748, {%r11813, %r11812};
	shr.u64 	%rd17749, %rd21783, 7;
	xor.b64  	%rd17750, %rd17747, %rd17749;
	xor.b64  	%rd17751, %rd17750, %rd17748;
	add.s64 	%rd17752, %rd21774, %rd21767;
	add.s64 	%rd17753, %rd17752, %rd17746;
	add.s64 	%rd21767, %rd17753, %rd17751;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11814,%dummy}, %rd21779;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11815}, %rd21779;
	}
	shf.r.wrap.b32 	%r11816, %r11815, %r11814, 18;
	shf.r.wrap.b32 	%r11817, %r11814, %r11815, 18;
	mov.b64 	%rd17754, {%r11817, %r11816};
	shf.r.wrap.b32 	%r11818, %r11815, %r11814, 14;
	shf.r.wrap.b32 	%r11819, %r11814, %r11815, 14;
	mov.b64 	%rd17755, {%r11819, %r11818};
	xor.b64  	%rd17756, %rd17754, %rd17755;
	shf.l.wrap.b32 	%r11820, %r11814, %r11815, 23;
	shf.l.wrap.b32 	%r11821, %r11815, %r11814, 23;
	mov.b64 	%rd17757, {%r11821, %r11820};
	xor.b64  	%rd17758, %rd17756, %rd17757;
	xor.b64  	%rd17759, %rd21781, %rd21780;
	and.b64  	%rd17760, %rd17759, %rd21779;
	xor.b64  	%rd17761, %rd17760, %rd21781;
	add.s64 	%rd17762, %rd17761, %rd21782;
	add.s64 	%rd17763, %rd17762, %rd21783;
	add.s64 	%rd1494, %rd21766, 128;
	ld.const.u64 	%rd17764, [%rd21766+128];
	add.s64 	%rd17765, %rd17763, %rd17764;
	add.s64 	%rd17766, %rd17765, %rd17758;
	add.s64 	%rd17767, %rd17766, %rd21778;
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11822}, %rd21775;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11823,%dummy}, %rd21775;
	}
	shf.l.wrap.b32 	%r11824, %r11823, %r11822, 30;
	shf.l.wrap.b32 	%r11825, %r11822, %r11823, 30;
	mov.b64 	%rd17768, {%r11825, %r11824};
	shf.r.wrap.b32 	%r11826, %r11822, %r11823, 28;
	shf.r.wrap.b32 	%r11827, %r11823, %r11822, 28;
	mov.b64 	%rd17769, {%r11827, %r11826};
	xor.b64  	%rd17770, %rd17768, %rd17769;
	shf.l.wrap.b32 	%r11828, %r11823, %r11822, 25;
	shf.l.wrap.b32 	%r11829, %r11822, %r11823, 25;
	mov.b64 	%rd17771, {%r11829, %r11828};
	xor.b64  	%rd17772, %rd17770, %rd17771;
	xor.b64  	%rd17773, %rd21776, %rd21775;
	xor.b64  	%rd17774, %rd21777, %rd21775;
	and.b64  	%rd17775, %rd17774, %rd17773;
	xor.b64  	%rd17776, %rd17775, %rd21775;
	add.s64 	%rd17777, %rd17766, %rd17776;
	add.s64 	%rd17778, %rd17777, %rd17772;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11830,%dummy}, %rd17767;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11831}, %rd17767;
	}
	shf.r.wrap.b32 	%r11832, %r11831, %r11830, 14;
	shf.r.wrap.b32 	%r11833, %r11830, %r11831, 14;
	mov.b64 	%rd17779, {%r11833, %r11832};
	shf.r.wrap.b32 	%r11834, %r11831, %r11830, 18;
	shf.r.wrap.b32 	%r11835, %r11830, %r11831, 18;
	mov.b64 	%rd17780, {%r11835, %r11834};
	xor.b64  	%rd17781, %rd17780, %rd17779;
	shf.l.wrap.b32 	%r11836, %r11830, %r11831, 23;
	shf.l.wrap.b32 	%r11837, %r11831, %r11830, 23;
	mov.b64 	%rd17782, {%r11837, %r11836};
	xor.b64  	%rd17783, %rd17781, %rd17782;
	xor.b64  	%rd17784, %rd21780, %rd21779;
	and.b64  	%rd17785, %rd17767, %rd17784;
	xor.b64  	%rd17786, %rd17785, %rd21780;
	add.s64 	%rd17787, %rd21784, %rd21781;
	ld.const.u64 	%rd17788, [%rd21766+136];
	add.s64 	%rd17789, %rd17787, %rd17788;
	add.s64 	%rd17790, %rd17789, %rd17786;
	add.s64 	%rd17791, %rd17790, %rd17783;
	add.s64 	%rd17792, %rd17791, %rd21777;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11838,%dummy}, %rd17778;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11839}, %rd17778;
	}
	shf.r.wrap.b32 	%r11840, %r11839, %r11838, 28;
	shf.r.wrap.b32 	%r11841, %r11838, %r11839, 28;
	mov.b64 	%rd17793, {%r11841, %r11840};
	shf.l.wrap.b32 	%r11842, %r11838, %r11839, 30;
	shf.l.wrap.b32 	%r11843, %r11839, %r11838, 30;
	mov.b64 	%rd17794, {%r11843, %r11842};
	xor.b64  	%rd17795, %rd17794, %rd17793;
	shf.l.wrap.b32 	%r11844, %r11838, %r11839, 25;
	shf.l.wrap.b32 	%r11845, %r11839, %r11838, 25;
	mov.b64 	%rd17796, {%r11845, %r11844};
	xor.b64  	%rd17797, %rd17795, %rd17796;
	xor.b64  	%rd17798, %rd17778, %rd21776;
	xor.b64  	%rd17799, %rd17778, %rd21775;
	and.b64  	%rd17800, %rd17799, %rd17798;
	xor.b64  	%rd17801, %rd17800, %rd17778;
	add.s64 	%rd17802, %rd17791, %rd17801;
	add.s64 	%rd17803, %rd17802, %rd17797;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11846,%dummy}, %rd17792;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11847}, %rd17792;
	}
	shf.r.wrap.b32 	%r11848, %r11847, %r11846, 14;
	shf.r.wrap.b32 	%r11849, %r11846, %r11847, 14;
	mov.b64 	%rd17804, {%r11849, %r11848};
	shf.r.wrap.b32 	%r11850, %r11847, %r11846, 18;
	shf.r.wrap.b32 	%r11851, %r11846, %r11847, 18;
	mov.b64 	%rd17805, {%r11851, %r11850};
	xor.b64  	%rd17806, %rd17805, %rd17804;
	shf.l.wrap.b32 	%r11852, %r11846, %r11847, 23;
	shf.l.wrap.b32 	%r11853, %r11847, %r11846, 23;
	mov.b64 	%rd17807, {%r11853, %r11852};
	xor.b64  	%rd17808, %rd17806, %rd17807;
	xor.b64  	%rd17809, %rd17767, %rd21779;
	and.b64  	%rd17810, %rd17792, %rd17809;
	xor.b64  	%rd17811, %rd17810, %rd21779;
	add.s64 	%rd17812, %rd21785, %rd21780;
	ld.const.u64 	%rd17813, [%rd21766+144];
	add.s64 	%rd17814, %rd17812, %rd17813;
	add.s64 	%rd17815, %rd17814, %rd17811;
	add.s64 	%rd17816, %rd17815, %rd17808;
	add.s64 	%rd17817, %rd17816, %rd21776;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11854,%dummy}, %rd17803;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11855}, %rd17803;
	}
	shf.r.wrap.b32 	%r11856, %r11855, %r11854, 28;
	shf.r.wrap.b32 	%r11857, %r11854, %r11855, 28;
	mov.b64 	%rd17818, {%r11857, %r11856};
	shf.l.wrap.b32 	%r11858, %r11854, %r11855, 30;
	shf.l.wrap.b32 	%r11859, %r11855, %r11854, 30;
	mov.b64 	%rd17819, {%r11859, %r11858};
	xor.b64  	%rd17820, %rd17819, %rd17818;
	shf.l.wrap.b32 	%r11860, %r11854, %r11855, 25;
	shf.l.wrap.b32 	%r11861, %r11855, %r11854, 25;
	mov.b64 	%rd17821, {%r11861, %r11860};
	xor.b64  	%rd17822, %rd17820, %rd17821;
	xor.b64  	%rd17823, %rd17803, %rd21775;
	xor.b64  	%rd17824, %rd17803, %rd17778;
	and.b64  	%rd17825, %rd17824, %rd17823;
	xor.b64  	%rd17826, %rd17825, %rd17803;
	add.s64 	%rd17827, %rd17816, %rd17826;
	add.s64 	%rd17828, %rd17827, %rd17822;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11862,%dummy}, %rd17817;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11863}, %rd17817;
	}
	shf.r.wrap.b32 	%r11864, %r11863, %r11862, 14;
	shf.r.wrap.b32 	%r11865, %r11862, %r11863, 14;
	mov.b64 	%rd17829, {%r11865, %r11864};
	shf.r.wrap.b32 	%r11866, %r11863, %r11862, 18;
	shf.r.wrap.b32 	%r11867, %r11862, %r11863, 18;
	mov.b64 	%rd17830, {%r11867, %r11866};
	xor.b64  	%rd17831, %rd17830, %rd17829;
	shf.l.wrap.b32 	%r11868, %r11862, %r11863, 23;
	shf.l.wrap.b32 	%r11869, %r11863, %r11862, 23;
	mov.b64 	%rd17832, {%r11869, %r11868};
	xor.b64  	%rd17833, %rd17831, %rd17832;
	xor.b64  	%rd17834, %rd17792, %rd17767;
	and.b64  	%rd17835, %rd17817, %rd17834;
	xor.b64  	%rd17836, %rd17835, %rd17767;
	add.s64 	%rd17837, %rd21786, %rd21779;
	ld.const.u64 	%rd17838, [%rd21766+152];
	add.s64 	%rd17839, %rd17837, %rd17838;
	add.s64 	%rd17840, %rd17839, %rd17836;
	add.s64 	%rd17841, %rd17840, %rd17833;
	add.s64 	%rd17842, %rd17841, %rd21775;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11870,%dummy}, %rd17828;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11871}, %rd17828;
	}
	shf.r.wrap.b32 	%r11872, %r11871, %r11870, 28;
	shf.r.wrap.b32 	%r11873, %r11870, %r11871, 28;
	mov.b64 	%rd17843, {%r11873, %r11872};
	shf.l.wrap.b32 	%r11874, %r11870, %r11871, 30;
	shf.l.wrap.b32 	%r11875, %r11871, %r11870, 30;
	mov.b64 	%rd17844, {%r11875, %r11874};
	xor.b64  	%rd17845, %rd17844, %rd17843;
	shf.l.wrap.b32 	%r11876, %r11870, %r11871, 25;
	shf.l.wrap.b32 	%r11877, %r11871, %r11870, 25;
	mov.b64 	%rd17846, {%r11877, %r11876};
	xor.b64  	%rd17847, %rd17845, %rd17846;
	xor.b64  	%rd17848, %rd17828, %rd17778;
	xor.b64  	%rd17849, %rd17828, %rd17803;
	and.b64  	%rd17850, %rd17849, %rd17848;
	xor.b64  	%rd17851, %rd17850, %rd17828;
	add.s64 	%rd17852, %rd17841, %rd17851;
	add.s64 	%rd17853, %rd17852, %rd17847;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11878,%dummy}, %rd17842;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11879}, %rd17842;
	}
	shf.r.wrap.b32 	%r11880, %r11879, %r11878, 14;
	shf.r.wrap.b32 	%r11881, %r11878, %r11879, 14;
	mov.b64 	%rd17854, {%r11881, %r11880};
	shf.r.wrap.b32 	%r11882, %r11879, %r11878, 18;
	shf.r.wrap.b32 	%r11883, %r11878, %r11879, 18;
	mov.b64 	%rd17855, {%r11883, %r11882};
	xor.b64  	%rd17856, %rd17855, %rd17854;
	shf.l.wrap.b32 	%r11884, %r11878, %r11879, 23;
	shf.l.wrap.b32 	%r11885, %r11879, %r11878, 23;
	mov.b64 	%rd17857, {%r11885, %r11884};
	xor.b64  	%rd17858, %rd17856, %rd17857;
	xor.b64  	%rd17859, %rd17817, %rd17792;
	and.b64  	%rd17860, %rd17842, %rd17859;
	xor.b64  	%rd17861, %rd17860, %rd17792;
	add.s64 	%rd17862, %rd17767, %rd21787;
	ld.const.u64 	%rd17863, [%rd21766+160];
	add.s64 	%rd17864, %rd17862, %rd17863;
	add.s64 	%rd17865, %rd17864, %rd17861;
	add.s64 	%rd17866, %rd17865, %rd17858;
	add.s64 	%rd17867, %rd17866, %rd17778;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11886,%dummy}, %rd17853;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11887}, %rd17853;
	}
	shf.r.wrap.b32 	%r11888, %r11887, %r11886, 28;
	shf.r.wrap.b32 	%r11889, %r11886, %r11887, 28;
	mov.b64 	%rd17868, {%r11889, %r11888};
	shf.l.wrap.b32 	%r11890, %r11886, %r11887, 30;
	shf.l.wrap.b32 	%r11891, %r11887, %r11886, 30;
	mov.b64 	%rd17869, {%r11891, %r11890};
	xor.b64  	%rd17870, %rd17869, %rd17868;
	shf.l.wrap.b32 	%r11892, %r11886, %r11887, 25;
	shf.l.wrap.b32 	%r11893, %r11887, %r11886, 25;
	mov.b64 	%rd17871, {%r11893, %r11892};
	xor.b64  	%rd17872, %rd17870, %rd17871;
	xor.b64  	%rd17873, %rd17853, %rd17803;
	xor.b64  	%rd17874, %rd17853, %rd17828;
	and.b64  	%rd17875, %rd17874, %rd17873;
	xor.b64  	%rd17876, %rd17875, %rd17853;
	add.s64 	%rd17877, %rd17866, %rd17876;
	add.s64 	%rd17878, %rd17877, %rd17872;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11894,%dummy}, %rd17867;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11895}, %rd17867;
	}
	shf.r.wrap.b32 	%r11896, %r11895, %r11894, 14;
	shf.r.wrap.b32 	%r11897, %r11894, %r11895, 14;
	mov.b64 	%rd17879, {%r11897, %r11896};
	shf.r.wrap.b32 	%r11898, %r11895, %r11894, 18;
	shf.r.wrap.b32 	%r11899, %r11894, %r11895, 18;
	mov.b64 	%rd17880, {%r11899, %r11898};
	xor.b64  	%rd17881, %rd17880, %rd17879;
	shf.l.wrap.b32 	%r11900, %r11894, %r11895, 23;
	shf.l.wrap.b32 	%r11901, %r11895, %r11894, 23;
	mov.b64 	%rd17882, {%r11901, %r11900};
	xor.b64  	%rd17883, %rd17881, %rd17882;
	xor.b64  	%rd17884, %rd17842, %rd17817;
	and.b64  	%rd17885, %rd17867, %rd17884;
	xor.b64  	%rd17886, %rd17885, %rd17817;
	add.s64 	%rd17887, %rd17792, %rd21788;
	ld.const.u64 	%rd17888, [%rd21766+168];
	add.s64 	%rd17889, %rd17887, %rd17888;
	add.s64 	%rd17890, %rd17889, %rd17886;
	add.s64 	%rd17891, %rd17890, %rd17883;
	add.s64 	%rd17892, %rd17891, %rd17803;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11902,%dummy}, %rd17878;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11903}, %rd17878;
	}
	shf.r.wrap.b32 	%r11904, %r11903, %r11902, 28;
	shf.r.wrap.b32 	%r11905, %r11902, %r11903, 28;
	mov.b64 	%rd17893, {%r11905, %r11904};
	shf.l.wrap.b32 	%r11906, %r11902, %r11903, 30;
	shf.l.wrap.b32 	%r11907, %r11903, %r11902, 30;
	mov.b64 	%rd17894, {%r11907, %r11906};
	xor.b64  	%rd17895, %rd17894, %rd17893;
	shf.l.wrap.b32 	%r11908, %r11902, %r11903, 25;
	shf.l.wrap.b32 	%r11909, %r11903, %r11902, 25;
	mov.b64 	%rd17896, {%r11909, %r11908};
	xor.b64  	%rd17897, %rd17895, %rd17896;
	xor.b64  	%rd17898, %rd17878, %rd17828;
	xor.b64  	%rd17899, %rd17878, %rd17853;
	and.b64  	%rd17900, %rd17899, %rd17898;
	xor.b64  	%rd17901, %rd17900, %rd17878;
	add.s64 	%rd17902, %rd17891, %rd17901;
	add.s64 	%rd17903, %rd17902, %rd17897;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11910,%dummy}, %rd17892;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11911}, %rd17892;
	}
	shf.r.wrap.b32 	%r11912, %r11911, %r11910, 14;
	shf.r.wrap.b32 	%r11913, %r11910, %r11911, 14;
	mov.b64 	%rd17904, {%r11913, %r11912};
	shf.r.wrap.b32 	%r11914, %r11911, %r11910, 18;
	shf.r.wrap.b32 	%r11915, %r11910, %r11911, 18;
	mov.b64 	%rd17905, {%r11915, %r11914};
	xor.b64  	%rd17906, %rd17905, %rd17904;
	shf.l.wrap.b32 	%r11916, %r11910, %r11911, 23;
	shf.l.wrap.b32 	%r11917, %r11911, %r11910, 23;
	mov.b64 	%rd17907, {%r11917, %r11916};
	xor.b64  	%rd17908, %rd17906, %rd17907;
	xor.b64  	%rd17909, %rd17867, %rd17842;
	and.b64  	%rd17910, %rd17892, %rd17909;
	xor.b64  	%rd17911, %rd17910, %rd17842;
	add.s64 	%rd17912, %rd17817, %rd21789;
	ld.const.u64 	%rd17913, [%rd21766+176];
	add.s64 	%rd17914, %rd17912, %rd17913;
	add.s64 	%rd17915, %rd17914, %rd17911;
	add.s64 	%rd17916, %rd17915, %rd17908;
	add.s64 	%rd17917, %rd17916, %rd17828;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11918,%dummy}, %rd17903;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11919}, %rd17903;
	}
	shf.r.wrap.b32 	%r11920, %r11919, %r11918, 28;
	shf.r.wrap.b32 	%r11921, %r11918, %r11919, 28;
	mov.b64 	%rd17918, {%r11921, %r11920};
	shf.l.wrap.b32 	%r11922, %r11918, %r11919, 30;
	shf.l.wrap.b32 	%r11923, %r11919, %r11918, 30;
	mov.b64 	%rd17919, {%r11923, %r11922};
	xor.b64  	%rd17920, %rd17919, %rd17918;
	shf.l.wrap.b32 	%r11924, %r11918, %r11919, 25;
	shf.l.wrap.b32 	%r11925, %r11919, %r11918, 25;
	mov.b64 	%rd17921, {%r11925, %r11924};
	xor.b64  	%rd17922, %rd17920, %rd17921;
	xor.b64  	%rd17923, %rd17903, %rd17853;
	xor.b64  	%rd17924, %rd17903, %rd17878;
	and.b64  	%rd17925, %rd17924, %rd17923;
	xor.b64  	%rd17926, %rd17925, %rd17903;
	add.s64 	%rd17927, %rd17916, %rd17926;
	add.s64 	%rd17928, %rd17927, %rd17922;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11926,%dummy}, %rd17917;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11927}, %rd17917;
	}
	shf.r.wrap.b32 	%r11928, %r11927, %r11926, 14;
	shf.r.wrap.b32 	%r11929, %r11926, %r11927, 14;
	mov.b64 	%rd17929, {%r11929, %r11928};
	shf.r.wrap.b32 	%r11930, %r11927, %r11926, 18;
	shf.r.wrap.b32 	%r11931, %r11926, %r11927, 18;
	mov.b64 	%rd17930, {%r11931, %r11930};
	xor.b64  	%rd17931, %rd17930, %rd17929;
	shf.l.wrap.b32 	%r11932, %r11926, %r11927, 23;
	shf.l.wrap.b32 	%r11933, %r11927, %r11926, 23;
	mov.b64 	%rd17932, {%r11933, %r11932};
	xor.b64  	%rd17933, %rd17931, %rd17932;
	xor.b64  	%rd17934, %rd17892, %rd17867;
	and.b64  	%rd17935, %rd17917, %rd17934;
	xor.b64  	%rd17936, %rd17935, %rd17867;
	add.s64 	%rd17937, %rd17842, %rd21790;
	ld.const.u64 	%rd17938, [%rd21766+184];
	add.s64 	%rd17939, %rd17937, %rd17938;
	add.s64 	%rd17940, %rd17939, %rd17936;
	add.s64 	%rd17941, %rd17940, %rd17933;
	add.s64 	%rd17942, %rd17941, %rd17853;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11934,%dummy}, %rd17928;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11935}, %rd17928;
	}
	shf.r.wrap.b32 	%r11936, %r11935, %r11934, 28;
	shf.r.wrap.b32 	%r11937, %r11934, %r11935, 28;
	mov.b64 	%rd17943, {%r11937, %r11936};
	shf.l.wrap.b32 	%r11938, %r11934, %r11935, 30;
	shf.l.wrap.b32 	%r11939, %r11935, %r11934, 30;
	mov.b64 	%rd17944, {%r11939, %r11938};
	xor.b64  	%rd17945, %rd17944, %rd17943;
	shf.l.wrap.b32 	%r11940, %r11934, %r11935, 25;
	shf.l.wrap.b32 	%r11941, %r11935, %r11934, 25;
	mov.b64 	%rd17946, {%r11941, %r11940};
	xor.b64  	%rd17947, %rd17945, %rd17946;
	xor.b64  	%rd17948, %rd17928, %rd17878;
	xor.b64  	%rd17949, %rd17928, %rd17903;
	and.b64  	%rd17950, %rd17949, %rd17948;
	xor.b64  	%rd17951, %rd17950, %rd17928;
	add.s64 	%rd17952, %rd17941, %rd17951;
	add.s64 	%rd17953, %rd17952, %rd17947;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11942,%dummy}, %rd17942;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11943}, %rd17942;
	}
	shf.r.wrap.b32 	%r11944, %r11943, %r11942, 14;
	shf.r.wrap.b32 	%r11945, %r11942, %r11943, 14;
	mov.b64 	%rd17954, {%r11945, %r11944};
	shf.r.wrap.b32 	%r11946, %r11943, %r11942, 18;
	shf.r.wrap.b32 	%r11947, %r11942, %r11943, 18;
	mov.b64 	%rd17955, {%r11947, %r11946};
	xor.b64  	%rd17956, %rd17955, %rd17954;
	shf.l.wrap.b32 	%r11948, %r11942, %r11943, 23;
	shf.l.wrap.b32 	%r11949, %r11943, %r11942, 23;
	mov.b64 	%rd17957, {%r11949, %r11948};
	xor.b64  	%rd17958, %rd17956, %rd17957;
	xor.b64  	%rd17959, %rd17917, %rd17892;
	and.b64  	%rd17960, %rd17942, %rd17959;
	xor.b64  	%rd17961, %rd17960, %rd17892;
	add.s64 	%rd17962, %rd17867, %rd21774;
	ld.const.u64 	%rd17963, [%rd21766+192];
	add.s64 	%rd17964, %rd17962, %rd17963;
	add.s64 	%rd17965, %rd17964, %rd17961;
	add.s64 	%rd17966, %rd17965, %rd17958;
	add.s64 	%rd17967, %rd17966, %rd17878;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11950,%dummy}, %rd17953;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11951}, %rd17953;
	}
	shf.r.wrap.b32 	%r11952, %r11951, %r11950, 28;
	shf.r.wrap.b32 	%r11953, %r11950, %r11951, 28;
	mov.b64 	%rd17968, {%r11953, %r11952};
	shf.l.wrap.b32 	%r11954, %r11950, %r11951, 30;
	shf.l.wrap.b32 	%r11955, %r11951, %r11950, 30;
	mov.b64 	%rd17969, {%r11955, %r11954};
	xor.b64  	%rd17970, %rd17969, %rd17968;
	shf.l.wrap.b32 	%r11956, %r11950, %r11951, 25;
	shf.l.wrap.b32 	%r11957, %r11951, %r11950, 25;
	mov.b64 	%rd17971, {%r11957, %r11956};
	xor.b64  	%rd17972, %rd17970, %rd17971;
	xor.b64  	%rd17973, %rd17953, %rd17903;
	xor.b64  	%rd17974, %rd17953, %rd17928;
	and.b64  	%rd17975, %rd17974, %rd17973;
	xor.b64  	%rd17976, %rd17975, %rd17953;
	add.s64 	%rd17977, %rd17966, %rd17976;
	add.s64 	%rd17978, %rd17977, %rd17972;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11958,%dummy}, %rd17967;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11959}, %rd17967;
	}
	shf.r.wrap.b32 	%r11960, %r11959, %r11958, 14;
	shf.r.wrap.b32 	%r11961, %r11958, %r11959, 14;
	mov.b64 	%rd17979, {%r11961, %r11960};
	shf.r.wrap.b32 	%r11962, %r11959, %r11958, 18;
	shf.r.wrap.b32 	%r11963, %r11958, %r11959, 18;
	mov.b64 	%rd17980, {%r11963, %r11962};
	xor.b64  	%rd17981, %rd17980, %rd17979;
	shf.l.wrap.b32 	%r11964, %r11958, %r11959, 23;
	shf.l.wrap.b32 	%r11965, %r11959, %r11958, 23;
	mov.b64 	%rd17982, {%r11965, %r11964};
	xor.b64  	%rd17983, %rd17981, %rd17982;
	xor.b64  	%rd17984, %rd17942, %rd17917;
	and.b64  	%rd17985, %rd17967, %rd17984;
	xor.b64  	%rd17986, %rd17985, %rd17917;
	add.s64 	%rd17987, %rd17892, %rd21773;
	ld.const.u64 	%rd17988, [%rd21766+200];
	add.s64 	%rd17989, %rd17987, %rd17988;
	add.s64 	%rd17990, %rd17989, %rd17986;
	add.s64 	%rd17991, %rd17990, %rd17983;
	add.s64 	%rd17992, %rd17991, %rd17903;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11966,%dummy}, %rd17978;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11967}, %rd17978;
	}
	shf.r.wrap.b32 	%r11968, %r11967, %r11966, 28;
	shf.r.wrap.b32 	%r11969, %r11966, %r11967, 28;
	mov.b64 	%rd17993, {%r11969, %r11968};
	shf.l.wrap.b32 	%r11970, %r11966, %r11967, 30;
	shf.l.wrap.b32 	%r11971, %r11967, %r11966, 30;
	mov.b64 	%rd17994, {%r11971, %r11970};
	xor.b64  	%rd17995, %rd17994, %rd17993;
	shf.l.wrap.b32 	%r11972, %r11966, %r11967, 25;
	shf.l.wrap.b32 	%r11973, %r11967, %r11966, 25;
	mov.b64 	%rd17996, {%r11973, %r11972};
	xor.b64  	%rd17997, %rd17995, %rd17996;
	xor.b64  	%rd17998, %rd17978, %rd17928;
	xor.b64  	%rd17999, %rd17978, %rd17953;
	and.b64  	%rd18000, %rd17999, %rd17998;
	xor.b64  	%rd18001, %rd18000, %rd17978;
	add.s64 	%rd18002, %rd17991, %rd18001;
	add.s64 	%rd18003, %rd18002, %rd17997;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11974,%dummy}, %rd17992;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11975}, %rd17992;
	}
	shf.r.wrap.b32 	%r11976, %r11975, %r11974, 14;
	shf.r.wrap.b32 	%r11977, %r11974, %r11975, 14;
	mov.b64 	%rd18004, {%r11977, %r11976};
	shf.r.wrap.b32 	%r11978, %r11975, %r11974, 18;
	shf.r.wrap.b32 	%r11979, %r11974, %r11975, 18;
	mov.b64 	%rd18005, {%r11979, %r11978};
	xor.b64  	%rd18006, %rd18005, %rd18004;
	shf.l.wrap.b32 	%r11980, %r11974, %r11975, 23;
	shf.l.wrap.b32 	%r11981, %r11975, %r11974, 23;
	mov.b64 	%rd18007, {%r11981, %r11980};
	xor.b64  	%rd18008, %rd18006, %rd18007;
	xor.b64  	%rd18009, %rd17967, %rd17942;
	and.b64  	%rd18010, %rd17992, %rd18009;
	xor.b64  	%rd18011, %rd18010, %rd17942;
	add.s64 	%rd18012, %rd17917, %rd21772;
	ld.const.u64 	%rd18013, [%rd21766+208];
	add.s64 	%rd18014, %rd18012, %rd18013;
	add.s64 	%rd18015, %rd18014, %rd18011;
	add.s64 	%rd18016, %rd18015, %rd18008;
	add.s64 	%rd18017, %rd18016, %rd17928;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11982,%dummy}, %rd18003;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11983}, %rd18003;
	}
	shf.r.wrap.b32 	%r11984, %r11983, %r11982, 28;
	shf.r.wrap.b32 	%r11985, %r11982, %r11983, 28;
	mov.b64 	%rd18018, {%r11985, %r11984};
	shf.l.wrap.b32 	%r11986, %r11982, %r11983, 30;
	shf.l.wrap.b32 	%r11987, %r11983, %r11982, 30;
	mov.b64 	%rd18019, {%r11987, %r11986};
	xor.b64  	%rd18020, %rd18019, %rd18018;
	shf.l.wrap.b32 	%r11988, %r11982, %r11983, 25;
	shf.l.wrap.b32 	%r11989, %r11983, %r11982, 25;
	mov.b64 	%rd18021, {%r11989, %r11988};
	xor.b64  	%rd18022, %rd18020, %rd18021;
	xor.b64  	%rd18023, %rd18003, %rd17953;
	xor.b64  	%rd18024, %rd18003, %rd17978;
	and.b64  	%rd18025, %rd18024, %rd18023;
	xor.b64  	%rd18026, %rd18025, %rd18003;
	add.s64 	%rd18027, %rd18016, %rd18026;
	add.s64 	%rd18028, %rd18027, %rd18022;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11990,%dummy}, %rd18017;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11991}, %rd18017;
	}
	shf.r.wrap.b32 	%r11992, %r11991, %r11990, 14;
	shf.r.wrap.b32 	%r11993, %r11990, %r11991, 14;
	mov.b64 	%rd18029, {%r11993, %r11992};
	shf.r.wrap.b32 	%r11994, %r11991, %r11990, 18;
	shf.r.wrap.b32 	%r11995, %r11990, %r11991, 18;
	mov.b64 	%rd18030, {%r11995, %r11994};
	xor.b64  	%rd18031, %rd18030, %rd18029;
	shf.l.wrap.b32 	%r11996, %r11990, %r11991, 23;
	shf.l.wrap.b32 	%r11997, %r11991, %r11990, 23;
	mov.b64 	%rd18032, {%r11997, %r11996};
	xor.b64  	%rd18033, %rd18031, %rd18032;
	xor.b64  	%rd18034, %rd17992, %rd17967;
	and.b64  	%rd18035, %rd18017, %rd18034;
	xor.b64  	%rd18036, %rd18035, %rd17967;
	add.s64 	%rd18037, %rd17942, %rd21771;
	ld.const.u64 	%rd18038, [%rd21766+216];
	add.s64 	%rd18039, %rd18037, %rd18038;
	add.s64 	%rd18040, %rd18039, %rd18036;
	add.s64 	%rd18041, %rd18040, %rd18033;
	add.s64 	%rd18042, %rd18041, %rd17953;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r11998,%dummy}, %rd18028;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r11999}, %rd18028;
	}
	shf.r.wrap.b32 	%r12000, %r11999, %r11998, 28;
	shf.r.wrap.b32 	%r12001, %r11998, %r11999, 28;
	mov.b64 	%rd18043, {%r12001, %r12000};
	shf.l.wrap.b32 	%r12002, %r11998, %r11999, 30;
	shf.l.wrap.b32 	%r12003, %r11999, %r11998, 30;
	mov.b64 	%rd18044, {%r12003, %r12002};
	xor.b64  	%rd18045, %rd18044, %rd18043;
	shf.l.wrap.b32 	%r12004, %r11998, %r11999, 25;
	shf.l.wrap.b32 	%r12005, %r11999, %r11998, 25;
	mov.b64 	%rd18046, {%r12005, %r12004};
	xor.b64  	%rd18047, %rd18045, %rd18046;
	xor.b64  	%rd18048, %rd18028, %rd17978;
	xor.b64  	%rd18049, %rd18028, %rd18003;
	and.b64  	%rd18050, %rd18049, %rd18048;
	xor.b64  	%rd18051, %rd18050, %rd18028;
	add.s64 	%rd18052, %rd18041, %rd18051;
	add.s64 	%rd18053, %rd18052, %rd18047;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12006,%dummy}, %rd18042;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12007}, %rd18042;
	}
	shf.r.wrap.b32 	%r12008, %r12007, %r12006, 14;
	shf.r.wrap.b32 	%r12009, %r12006, %r12007, 14;
	mov.b64 	%rd18054, {%r12009, %r12008};
	shf.r.wrap.b32 	%r12010, %r12007, %r12006, 18;
	shf.r.wrap.b32 	%r12011, %r12006, %r12007, 18;
	mov.b64 	%rd18055, {%r12011, %r12010};
	xor.b64  	%rd18056, %rd18055, %rd18054;
	shf.l.wrap.b32 	%r12012, %r12006, %r12007, 23;
	shf.l.wrap.b32 	%r12013, %r12007, %r12006, 23;
	mov.b64 	%rd18057, {%r12013, %r12012};
	xor.b64  	%rd18058, %rd18056, %rd18057;
	xor.b64  	%rd18059, %rd18017, %rd17992;
	and.b64  	%rd18060, %rd18042, %rd18059;
	xor.b64  	%rd18061, %rd18060, %rd17992;
	add.s64 	%rd18062, %rd17967, %rd21770;
	ld.const.u64 	%rd18063, [%rd21766+224];
	add.s64 	%rd18064, %rd18062, %rd18063;
	add.s64 	%rd18065, %rd18064, %rd18061;
	add.s64 	%rd18066, %rd18065, %rd18058;
	add.s64 	%rd21782, %rd18066, %rd17978;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12014,%dummy}, %rd18053;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12015}, %rd18053;
	}
	shf.r.wrap.b32 	%r12016, %r12015, %r12014, 28;
	shf.r.wrap.b32 	%r12017, %r12014, %r12015, 28;
	mov.b64 	%rd18067, {%r12017, %r12016};
	shf.l.wrap.b32 	%r12018, %r12014, %r12015, 30;
	shf.l.wrap.b32 	%r12019, %r12015, %r12014, 30;
	mov.b64 	%rd18068, {%r12019, %r12018};
	xor.b64  	%rd18069, %rd18068, %rd18067;
	shf.l.wrap.b32 	%r12020, %r12014, %r12015, 25;
	shf.l.wrap.b32 	%r12021, %r12015, %r12014, 25;
	mov.b64 	%rd18070, {%r12021, %r12020};
	xor.b64  	%rd18071, %rd18069, %rd18070;
	xor.b64  	%rd18072, %rd18053, %rd18003;
	xor.b64  	%rd18073, %rd18053, %rd18028;
	and.b64  	%rd18074, %rd18073, %rd18072;
	xor.b64  	%rd18075, %rd18074, %rd18053;
	add.s64 	%rd18076, %rd18066, %rd18075;
	add.s64 	%rd21778, %rd18076, %rd18071;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12022,%dummy}, %rd21782;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12023}, %rd21782;
	}
	shf.r.wrap.b32 	%r12024, %r12023, %r12022, 14;
	shf.r.wrap.b32 	%r12025, %r12022, %r12023, 14;
	mov.b64 	%rd18077, {%r12025, %r12024};
	shf.r.wrap.b32 	%r12026, %r12023, %r12022, 18;
	shf.r.wrap.b32 	%r12027, %r12022, %r12023, 18;
	mov.b64 	%rd18078, {%r12027, %r12026};
	xor.b64  	%rd18079, %rd18078, %rd18077;
	shf.l.wrap.b32 	%r12028, %r12022, %r12023, 23;
	shf.l.wrap.b32 	%r12029, %r12023, %r12022, 23;
	mov.b64 	%rd18080, {%r12029, %r12028};
	xor.b64  	%rd18081, %rd18079, %rd18080;
	xor.b64  	%rd18082, %rd18042, %rd18017;
	and.b64  	%rd18083, %rd21782, %rd18082;
	xor.b64  	%rd18084, %rd18083, %rd18017;
	add.s64 	%rd18085, %rd17992, %rd21769;
	ld.const.u64 	%rd18086, [%rd21766+232];
	add.s64 	%rd18087, %rd18085, %rd18086;
	add.s64 	%rd18088, %rd18087, %rd18084;
	add.s64 	%rd18089, %rd18088, %rd18081;
	add.s64 	%rd21781, %rd18089, %rd18003;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12030,%dummy}, %rd21778;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12031}, %rd21778;
	}
	shf.r.wrap.b32 	%r12032, %r12031, %r12030, 28;
	shf.r.wrap.b32 	%r12033, %r12030, %r12031, 28;
	mov.b64 	%rd18090, {%r12033, %r12032};
	shf.l.wrap.b32 	%r12034, %r12030, %r12031, 30;
	shf.l.wrap.b32 	%r12035, %r12031, %r12030, 30;
	mov.b64 	%rd18091, {%r12035, %r12034};
	xor.b64  	%rd18092, %rd18091, %rd18090;
	shf.l.wrap.b32 	%r12036, %r12030, %r12031, 25;
	shf.l.wrap.b32 	%r12037, %r12031, %r12030, 25;
	mov.b64 	%rd18093, {%r12037, %r12036};
	xor.b64  	%rd18094, %rd18092, %rd18093;
	xor.b64  	%rd18095, %rd21778, %rd18028;
	xor.b64  	%rd18096, %rd21778, %rd18053;
	and.b64  	%rd18097, %rd18096, %rd18095;
	xor.b64  	%rd18098, %rd18097, %rd21778;
	add.s64 	%rd18099, %rd18089, %rd18098;
	add.s64 	%rd21777, %rd18099, %rd18094;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12038,%dummy}, %rd21781;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12039}, %rd21781;
	}
	shf.r.wrap.b32 	%r12040, %r12039, %r12038, 14;
	shf.r.wrap.b32 	%r12041, %r12038, %r12039, 14;
	mov.b64 	%rd18100, {%r12041, %r12040};
	shf.r.wrap.b32 	%r12042, %r12039, %r12038, 18;
	shf.r.wrap.b32 	%r12043, %r12038, %r12039, 18;
	mov.b64 	%rd18101, {%r12043, %r12042};
	xor.b64  	%rd18102, %rd18101, %rd18100;
	shf.l.wrap.b32 	%r12044, %r12038, %r12039, 23;
	shf.l.wrap.b32 	%r12045, %r12039, %r12038, 23;
	mov.b64 	%rd18103, {%r12045, %r12044};
	xor.b64  	%rd18104, %rd18102, %rd18103;
	xor.b64  	%rd18105, %rd21782, %rd18042;
	and.b64  	%rd18106, %rd21781, %rd18105;
	xor.b64  	%rd18107, %rd18106, %rd18042;
	add.s64 	%rd18108, %rd18017, %rd21768;
	ld.const.u64 	%rd18109, [%rd21766+240];
	add.s64 	%rd18110, %rd18108, %rd18109;
	add.s64 	%rd18111, %rd18110, %rd18107;
	add.s64 	%rd18112, %rd18111, %rd18104;
	add.s64 	%rd21780, %rd18112, %rd18028;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12046,%dummy}, %rd21777;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12047}, %rd21777;
	}
	shf.r.wrap.b32 	%r12048, %r12047, %r12046, 28;
	shf.r.wrap.b32 	%r12049, %r12046, %r12047, 28;
	mov.b64 	%rd18113, {%r12049, %r12048};
	shf.l.wrap.b32 	%r12050, %r12046, %r12047, 30;
	shf.l.wrap.b32 	%r12051, %r12047, %r12046, 30;
	mov.b64 	%rd18114, {%r12051, %r12050};
	xor.b64  	%rd18115, %rd18114, %rd18113;
	shf.l.wrap.b32 	%r12052, %r12046, %r12047, 25;
	shf.l.wrap.b32 	%r12053, %r12047, %r12046, 25;
	mov.b64 	%rd18116, {%r12053, %r12052};
	xor.b64  	%rd18117, %rd18115, %rd18116;
	xor.b64  	%rd18118, %rd21777, %rd18053;
	xor.b64  	%rd18119, %rd21777, %rd21778;
	and.b64  	%rd18120, %rd18119, %rd18118;
	xor.b64  	%rd18121, %rd18120, %rd21777;
	add.s64 	%rd18122, %rd18112, %rd18121;
	add.s64 	%rd21776, %rd18122, %rd18117;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12054,%dummy}, %rd21780;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12055}, %rd21780;
	}
	shf.r.wrap.b32 	%r12056, %r12055, %r12054, 14;
	shf.r.wrap.b32 	%r12057, %r12054, %r12055, 14;
	mov.b64 	%rd18123, {%r12057, %r12056};
	shf.r.wrap.b32 	%r12058, %r12055, %r12054, 18;
	shf.r.wrap.b32 	%r12059, %r12054, %r12055, 18;
	mov.b64 	%rd18124, {%r12059, %r12058};
	xor.b64  	%rd18125, %rd18124, %rd18123;
	shf.l.wrap.b32 	%r12060, %r12054, %r12055, 23;
	shf.l.wrap.b32 	%r12061, %r12055, %r12054, 23;
	mov.b64 	%rd18126, {%r12061, %r12060};
	xor.b64  	%rd18127, %rd18125, %rd18126;
	xor.b64  	%rd18128, %rd21781, %rd21782;
	and.b64  	%rd18129, %rd21780, %rd18128;
	xor.b64  	%rd18130, %rd18129, %rd21782;
	add.s64 	%rd18131, %rd18042, %rd21767;
	ld.const.u64 	%rd18132, [%rd21766+248];
	add.s64 	%rd18133, %rd18131, %rd18132;
	add.s64 	%rd18134, %rd18133, %rd18130;
	add.s64 	%rd18135, %rd18134, %rd18127;
	add.s64 	%rd21779, %rd18135, %rd18053;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12062,%dummy}, %rd21776;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12063}, %rd21776;
	}
	shf.r.wrap.b32 	%r12064, %r12063, %r12062, 28;
	shf.r.wrap.b32 	%r12065, %r12062, %r12063, 28;
	mov.b64 	%rd18136, {%r12065, %r12064};
	shf.l.wrap.b32 	%r12066, %r12062, %r12063, 30;
	shf.l.wrap.b32 	%r12067, %r12063, %r12062, 30;
	mov.b64 	%rd18137, {%r12067, %r12066};
	xor.b64  	%rd18138, %rd18137, %rd18136;
	shf.l.wrap.b32 	%r12068, %r12062, %r12063, 25;
	shf.l.wrap.b32 	%r12069, %r12063, %r12062, 25;
	mov.b64 	%rd18139, {%r12069, %r12068};
	xor.b64  	%rd18140, %rd18138, %rd18139;
	xor.b64  	%rd18141, %rd21776, %rd21778;
	xor.b64  	%rd18142, %rd21776, %rd21777;
	and.b64  	%rd18143, %rd18142, %rd18141;
	xor.b64  	%rd18144, %rd18143, %rd21776;
	add.s64 	%rd18145, %rd18135, %rd18144;
	add.s64 	%rd21775, %rd18145, %rd18140;
	add.s32 	%r14479, %r14479, 16;
	setp.lt.s32	%p192, %r14479, 80;
	mov.u64 	%rd21766, %rd1494;
	@%p192 bra 	BB3_305;

	mov.u64 	%rd21332, 6620516959819538809;
	mov.u64 	%rd21331, 2270897969802886507;
	mov.u64 	%rd21327, -7276294671716946913;
	mov.u64 	%rd21326, 5840696475078001361;
	mov.u64 	%rd21325, -6534734903238641935;
	mov.u64 	%rd21324, 4354685564936845355;
	mov.u64 	%rd21323, -4942790177534073029;
	mov.u64 	%rd21322, 7640891576956012808;
	add.s64 	%rd18148, %rd21775, %rd21750;
	st.global.u64 	[%rd14937+64], %rd18148;
	add.s64 	%rd18149, %rd21776, %rd21749;
	st.global.u64 	[%rd14937+72], %rd18149;
	st.local.u64 	[%rd1], %rd21322;
	st.local.u64 	[%rd1+8], %rd21323;
	st.local.u64 	[%rd1+16], %rd21324;
	st.local.u64 	[%rd1+24], %rd21325;
	st.local.u64 	[%rd1+32], %rd21326;
	st.local.u64 	[%rd1+40], %rd21327;
	st.local.u64 	[%rd1+48], %rd21331;
	st.local.u64 	[%rd1+56], %rd21332;
	mov.u32 	%r14480, 0;
	st.local.u32 	[%rd1+192], %r14480;
	and.b32  	%r427, %r3, 3;
	add.s64 	%rd1496, %rd1808, 7;
	shr.u64 	%rd18159, %rd1203, 56;
	add.s64 	%rd1497, %rd18159, 16;
	add.s64 	%rd1498, %rd179, 7;
	mov.u32 	%r14481, %r14480;
	bra.uni 	BB3_307;

BB3_355:
	ld.local.u32 	%r14480, [%rd1+192];

BB3_307:
	add.s32 	%r12072, %r14480, %r3;
	st.local.u32 	[%rd1+192], %r12072;
	and.b32  	%r430, %r14480, 127;
	add.s32 	%r431, %r430, %r3;
	setp.lt.s32	%p193, %r431, 128;
	@%p193 bra 	BB3_328;
	bra.uni 	BB3_308;

BB3_328:
	setp.lt.s32	%p206, %r3, 1;
	@%p206 bra 	BB3_337;

	mov.u32 	%r14496, 0;
	setp.eq.s32	%p207, %r427, 0;
	@%p207 bra 	BB3_335;

	setp.eq.s32	%p208, %r427, 1;
	@%p208 bra 	BB3_334;

	setp.eq.s32	%p209, %r427, 2;
	@%p209 bra 	BB3_333;

	ld.local.u8 	%rs297, [%rd1496];
	xor.b32  	%r12842, %r430, 7;
	cvt.u64.u32	%rd19245, %r12842;
	add.s64 	%rd19246, %rd179, %rd19245;
	st.local.u8 	[%rd19246], %rs297;
	add.s32 	%r430, %r430, 1;
	mov.u32 	%r14496, 1;

BB3_333:
	xor.b32  	%r12843, %r14496, 7;
	cvt.u64.u32	%rd19247, %r12843;
	add.s64 	%rd19248, %rd1808, %rd19247;
	ld.local.u8 	%rs298, [%rd19248];
	xor.b32  	%r12844, %r430, 7;
	cvt.s64.s32	%rd19249, %r12844;
	add.s64 	%rd19250, %rd179, %rd19249;
	st.local.u8 	[%rd19250], %rs298;
	add.s32 	%r430, %r430, 1;
	add.s32 	%r14496, %r14496, 1;

BB3_334:
	xor.b32  	%r12845, %r14496, 7;
	cvt.s64.s32	%rd19251, %r12845;
	add.s64 	%rd19252, %rd1808, %rd19251;
	ld.local.u8 	%rs299, [%rd19252];
	xor.b32  	%r12846, %r430, 7;
	cvt.s64.s32	%rd19253, %r12846;
	add.s64 	%rd19254, %rd179, %rd19253;
	st.local.u8 	[%rd19254], %rs299;
	add.s32 	%r430, %r430, 1;
	add.s32 	%r14496, %r14496, 1;

BB3_335:
	setp.lt.u32	%p210, %r3, 4;
	@%p210 bra 	BB3_337;

BB3_336:
	xor.b32  	%r12847, %r14496, 7;
	cvt.s64.s32	%rd19255, %r12847;
	add.s64 	%rd19256, %rd1808, %rd19255;
	ld.local.u8 	%rs300, [%rd19256];
	xor.b32  	%r12848, %r430, 7;
	cvt.s64.s32	%rd19257, %r12848;
	add.s64 	%rd19258, %rd179, %rd19257;
	st.local.u8 	[%rd19258], %rs300;
	add.s32 	%r12849, %r14496, 1;
	xor.b32  	%r12850, %r12849, 7;
	cvt.s64.s32	%rd19259, %r12850;
	add.s64 	%rd19260, %rd1808, %rd19259;
	ld.local.u8 	%rs301, [%rd19260];
	add.s32 	%r12851, %r430, 1;
	xor.b32  	%r12852, %r12851, 7;
	cvt.s64.s32	%rd19261, %r12852;
	add.s64 	%rd19262, %rd179, %rd19261;
	st.local.u8 	[%rd19262], %rs301;
	add.s32 	%r12853, %r14496, 2;
	xor.b32  	%r12854, %r12853, 7;
	cvt.s64.s32	%rd19263, %r12854;
	add.s64 	%rd19264, %rd1808, %rd19263;
	ld.local.u8 	%rs302, [%rd19264];
	add.s32 	%r12855, %r430, 2;
	xor.b32  	%r12856, %r12855, 7;
	cvt.s64.s32	%rd19265, %r12856;
	add.s64 	%rd19266, %rd179, %rd19265;
	st.local.u8 	[%rd19266], %rs302;
	add.s32 	%r12857, %r14496, 3;
	xor.b32  	%r12858, %r12857, 7;
	cvt.s64.s32	%rd19267, %r12858;
	add.s64 	%rd19268, %rd1808, %rd19267;
	ld.local.u8 	%rs303, [%rd19268];
	add.s32 	%r12859, %r430, 3;
	xor.b32  	%r12860, %r12859, 7;
	cvt.s64.s32	%rd19269, %r12860;
	add.s64 	%rd19270, %rd179, %rd19269;
	st.local.u8 	[%rd19270], %rs303;
	add.s32 	%r14496, %r14496, 4;
	setp.lt.s32	%p211, %r14496, %r3;
	add.s32 	%r430, %r430, 4;
	@%p211 bra 	BB3_336;
	bra.uni 	BB3_337;

BB3_308:
	sub.s32 	%r432, %r2861, %r430;
	mov.u32 	%r12075, 1;
	max.u32 	%r433, %r432, %r12075;
	and.b32  	%r434, %r433, 3;
	setp.eq.s32	%p194, %r434, 0;
	mov.u32 	%r14488, 0;
	@%p194 bra 	BB3_315;

	setp.eq.s32	%p195, %r434, 1;
	mov.u32 	%r14484, 0;
	@%p195 bra 	BB3_314;

	setp.eq.s32	%p196, %r434, 2;
	mov.u32 	%r12077, 0;
	@%p196 bra 	BB3_311;
	bra.uni 	BB3_312;

BB3_311:
	mov.u32 	%r12075, %r12077;
	bra.uni 	BB3_313;

BB3_312:
	ld.local.u8 	%rs283, [%rd1496];
	xor.b32  	%r12079, %r430, 7;
	cvt.u64.u32	%rd18160, %r12079;
	add.s64 	%rd18161, %rd179, %rd18160;
	st.local.u8 	[%rd18161], %rs283;
	add.s32 	%r430, %r430, 1;

BB3_313:
	xor.b32  	%r12080, %r12075, 7;
	cvt.u64.u32	%rd18162, %r12080;
	add.s64 	%rd18163, %rd1808, %rd18162;
	ld.local.u8 	%rs284, [%rd18163];
	xor.b32  	%r12081, %r430, 7;
	cvt.s64.s32	%rd18164, %r12081;
	add.s64 	%rd18165, %rd179, %rd18164;
	st.local.u8 	[%rd18165], %rs284;
	add.s32 	%r430, %r430, 1;
	add.s32 	%r14484, %r12075, 1;

BB3_314:
	xor.b32  	%r12082, %r14484, 7;
	cvt.s64.s32	%rd18166, %r12082;
	add.s64 	%rd18167, %rd1808, %rd18166;
	ld.local.u8 	%rs285, [%rd18167];
	xor.b32  	%r12083, %r430, 7;
	cvt.s64.s32	%rd18168, %r12083;
	add.s64 	%rd18169, %rd179, %rd18168;
	st.local.u8 	[%rd18169], %rs285;
	add.s32 	%r430, %r430, 1;
	add.s32 	%r14488, %r14484, 1;

BB3_315:
	setp.lt.u32	%p197, %r433, 4;
	@%p197 bra 	BB3_317;

BB3_316:
	xor.b32  	%r12084, %r14488, 7;
	cvt.s64.s32	%rd18170, %r12084;
	add.s64 	%rd18171, %rd1808, %rd18170;
	ld.local.u8 	%rs286, [%rd18171];
	xor.b32  	%r12085, %r430, 7;
	cvt.s64.s32	%rd18172, %r12085;
	add.s64 	%rd18173, %rd179, %rd18172;
	st.local.u8 	[%rd18173], %rs286;
	add.s32 	%r12086, %r14488, 1;
	xor.b32  	%r12087, %r12086, 7;
	cvt.s64.s32	%rd18174, %r12087;
	add.s64 	%rd18175, %rd1808, %rd18174;
	ld.local.u8 	%rs287, [%rd18175];
	add.s32 	%r12088, %r430, 1;
	xor.b32  	%r12089, %r12088, 7;
	cvt.s64.s32	%rd18176, %r12089;
	add.s64 	%rd18177, %rd179, %rd18176;
	st.local.u8 	[%rd18177], %rs287;
	add.s32 	%r12090, %r14488, 2;
	xor.b32  	%r12091, %r12090, 7;
	cvt.s64.s32	%rd18178, %r12091;
	add.s64 	%rd18179, %rd1808, %rd18178;
	ld.local.u8 	%rs288, [%rd18179];
	add.s32 	%r12092, %r430, 2;
	xor.b32  	%r12093, %r12092, 7;
	cvt.s64.s32	%rd18180, %r12093;
	add.s64 	%rd18181, %rd179, %rd18180;
	st.local.u8 	[%rd18181], %rs288;
	add.s32 	%r12094, %r14488, 3;
	xor.b32  	%r12095, %r12094, 7;
	cvt.s64.s32	%rd18182, %r12095;
	add.s64 	%rd18183, %rd1808, %rd18182;
	ld.local.u8 	%rs289, [%rd18183];
	add.s32 	%r12096, %r430, 3;
	xor.b32  	%r12097, %r12096, 7;
	cvt.s64.s32	%rd18184, %r12097;
	add.s64 	%rd18185, %rd179, %rd18184;
	st.local.u8 	[%rd18185], %rs289;
	add.s32 	%r14488, %r14488, 4;
	setp.lt.s32	%p198, %r14488, %r432;
	add.s32 	%r430, %r430, 4;
	@%p198 bra 	BB3_316;

BB3_317:
	ld.local.u64 	%rd18186, [%rd1+64];
	shr.u64 	%rd18187, %rd18186, 32;
	ld.local.u64 	%rd18188, [%rd1+72];
	shr.u64 	%rd18189, %rd18188, 32;
	ld.local.u64 	%rd18190, [%rd1+80];
	shr.u64 	%rd18191, %rd18190, 32;
	ld.local.u64 	%rd18192, [%rd1+88];
	shr.u64 	%rd18193, %rd18192, 32;
	ld.local.u64 	%rd18194, [%rd1+96];
	shr.u64 	%rd18195, %rd18194, 32;
	ld.local.u64 	%rd18196, [%rd1+104];
	shr.u64 	%rd18197, %rd18196, 32;
	ld.local.u64 	%rd18198, [%rd1+112];
	shr.u64 	%rd18199, %rd18198, 32;
	ld.local.u64 	%rd18200, [%rd1+120];
	shr.u64 	%rd18201, %rd18200, 32;
	ld.local.u64 	%rd18202, [%rd1+128];
	shr.u64 	%rd18203, %rd18202, 32;
	ld.local.u64 	%rd18204, [%rd1+136];
	shr.u64 	%rd18205, %rd18204, 32;
	ld.local.u64 	%rd18206, [%rd1+144];
	shr.u64 	%rd18207, %rd18206, 32;
	ld.local.u64 	%rd18208, [%rd1+152];
	shr.u64 	%rd18209, %rd18208, 32;
	ld.local.u64 	%rd18210, [%rd1+160];
	shr.u64 	%rd18211, %rd18210, 32;
	ld.local.u64 	%rd18212, [%rd1+168];
	shr.u64 	%rd18213, %rd18212, 32;
	ld.local.u64 	%rd18214, [%rd1+176];
	shr.u64 	%rd18215, %rd18214, 32;
	ld.local.u64 	%rd18216, [%rd1+184];
	shr.u64 	%rd18217, %rd18216, 32;
	bfi.b64 	%rd21807, %rd18187, %rd18186, 32, 32;
	bfi.b64 	%rd21808, %rd18189, %rd18188, 32, 32;
	bfi.b64 	%rd21809, %rd18191, %rd18190, 32, 32;
	bfi.b64 	%rd21810, %rd18193, %rd18192, 32, 32;
	bfi.b64 	%rd21811, %rd18195, %rd18194, 32, 32;
	bfi.b64 	%rd21812, %rd18197, %rd18196, 32, 32;
	bfi.b64 	%rd21813, %rd18199, %rd18198, 32, 32;
	bfi.b64 	%rd21814, %rd18201, %rd18200, 32, 32;
	bfi.b64 	%rd21798, %rd18203, %rd18202, 32, 32;
	bfi.b64 	%rd21797, %rd18205, %rd18204, 32, 32;
	bfi.b64 	%rd21796, %rd18207, %rd18206, 32, 32;
	bfi.b64 	%rd21795, %rd18209, %rd18208, 32, 32;
	bfi.b64 	%rd21794, %rd18211, %rd18210, 32, 32;
	bfi.b64 	%rd21793, %rd18213, %rd18212, 32, 32;
	bfi.b64 	%rd21792, %rd18215, %rd18214, 32, 32;
	bfi.b64 	%rd21791, %rd18217, %rd18216, 32, 32;
	ld.local.u64 	%rd1515, [%rd1+32];
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12099,%dummy}, %rd1515;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12100}, %rd1515;
	}
	shf.r.wrap.b32 	%r12101, %r12100, %r12099, 14;
	shf.r.wrap.b32 	%r12102, %r12099, %r12100, 14;
	mov.b64 	%rd18218, {%r12102, %r12101};
	shf.r.wrap.b32 	%r12103, %r12100, %r12099, 18;
	shf.r.wrap.b32 	%r12104, %r12099, %r12100, 18;
	mov.b64 	%rd18219, {%r12104, %r12103};
	xor.b64  	%rd18220, %rd18219, %rd18218;
	shf.l.wrap.b32 	%r12105, %r12099, %r12100, 23;
	shf.l.wrap.b32 	%r12106, %r12100, %r12099, 23;
	mov.b64 	%rd18221, {%r12106, %r12105};
	xor.b64  	%rd18222, %rd18220, %rd18221;
	ld.local.u64 	%rd1516, [%rd1+48];
	ld.local.u64 	%rd1517, [%rd1+40];
	xor.b64  	%rd18223, %rd1516, %rd1517;
	and.b64  	%rd18224, %rd18223, %rd1515;
	xor.b64  	%rd18225, %rd18224, %rd1516;
	ld.local.u64 	%rd1518, [%rd1+56];
	add.s64 	%rd18226, %rd1518, %rd21807;
	add.s64 	%rd18227, %rd18226, %rd21454;
	add.s64 	%rd18228, %rd18227, %rd18225;
	add.s64 	%rd18229, %rd18228, %rd18222;
	ld.local.u64 	%rd1519, [%rd1+24];
	add.s64 	%rd18230, %rd18229, %rd1519;
	ld.local.u64 	%rd1520, [%rd1];
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12107,%dummy}, %rd1520;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12108}, %rd1520;
	}
	shf.r.wrap.b32 	%r12109, %r12108, %r12107, 28;
	shf.r.wrap.b32 	%r12110, %r12107, %r12108, 28;
	mov.b64 	%rd18231, {%r12110, %r12109};
	shf.l.wrap.b32 	%r12111, %r12107, %r12108, 30;
	shf.l.wrap.b32 	%r12112, %r12108, %r12107, 30;
	mov.b64 	%rd18232, {%r12112, %r12111};
	xor.b64  	%rd18233, %rd18232, %rd18231;
	shf.l.wrap.b32 	%r12113, %r12107, %r12108, 25;
	shf.l.wrap.b32 	%r12114, %r12108, %r12107, 25;
	mov.b64 	%rd18234, {%r12114, %r12113};
	xor.b64  	%rd18235, %rd18233, %rd18234;
	ld.local.u64 	%rd1521, [%rd1+16];
	xor.b64  	%rd18236, %rd1521, %rd1520;
	ld.local.u64 	%rd1522, [%rd1+8];
	xor.b64  	%rd18237, %rd1522, %rd1520;
	and.b64  	%rd18238, %rd18236, %rd18237;
	xor.b64  	%rd18239, %rd18238, %rd1520;
	add.s64 	%rd18240, %rd18229, %rd18239;
	add.s64 	%rd18241, %rd18240, %rd18235;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12115,%dummy}, %rd18230;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12116}, %rd18230;
	}
	shf.r.wrap.b32 	%r12117, %r12116, %r12115, 14;
	shf.r.wrap.b32 	%r12118, %r12115, %r12116, 14;
	mov.b64 	%rd18242, {%r12118, %r12117};
	shf.r.wrap.b32 	%r12119, %r12116, %r12115, 18;
	shf.r.wrap.b32 	%r12120, %r12115, %r12116, 18;
	mov.b64 	%rd18243, {%r12120, %r12119};
	xor.b64  	%rd18244, %rd18243, %rd18242;
	shf.l.wrap.b32 	%r12121, %r12115, %r12116, 23;
	shf.l.wrap.b32 	%r12122, %r12116, %r12115, 23;
	mov.b64 	%rd18245, {%r12122, %r12121};
	xor.b64  	%rd18246, %rd18244, %rd18245;
	xor.b64  	%rd18247, %rd1517, %rd1515;
	and.b64  	%rd18248, %rd18230, %rd18247;
	xor.b64  	%rd18249, %rd18248, %rd1517;
	add.s64 	%rd18250, %rd1516, %rd21808;
	add.s64 	%rd18251, %rd18250, %rd21453;
	add.s64 	%rd18252, %rd18251, %rd18249;
	add.s64 	%rd18253, %rd18252, %rd18246;
	add.s64 	%rd18254, %rd18253, %rd1521;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12123,%dummy}, %rd18241;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12124}, %rd18241;
	}
	shf.r.wrap.b32 	%r12125, %r12124, %r12123, 28;
	shf.r.wrap.b32 	%r12126, %r12123, %r12124, 28;
	mov.b64 	%rd18255, {%r12126, %r12125};
	shf.l.wrap.b32 	%r12127, %r12123, %r12124, 30;
	shf.l.wrap.b32 	%r12128, %r12124, %r12123, 30;
	mov.b64 	%rd18256, {%r12128, %r12127};
	xor.b64  	%rd18257, %rd18256, %rd18255;
	shf.l.wrap.b32 	%r12129, %r12123, %r12124, 25;
	shf.l.wrap.b32 	%r12130, %r12124, %r12123, 25;
	mov.b64 	%rd18258, {%r12130, %r12129};
	xor.b64  	%rd18259, %rd18257, %rd18258;
	xor.b64  	%rd18260, %rd18241, %rd1522;
	xor.b64  	%rd18261, %rd18241, %rd1520;
	and.b64  	%rd18262, %rd18261, %rd18260;
	xor.b64  	%rd18263, %rd18262, %rd18241;
	add.s64 	%rd18264, %rd18253, %rd18263;
	add.s64 	%rd18265, %rd18264, %rd18259;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12131,%dummy}, %rd18254;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12132}, %rd18254;
	}
	shf.r.wrap.b32 	%r12133, %r12132, %r12131, 14;
	shf.r.wrap.b32 	%r12134, %r12131, %r12132, 14;
	mov.b64 	%rd18266, {%r12134, %r12133};
	shf.r.wrap.b32 	%r12135, %r12132, %r12131, 18;
	shf.r.wrap.b32 	%r12136, %r12131, %r12132, 18;
	mov.b64 	%rd18267, {%r12136, %r12135};
	xor.b64  	%rd18268, %rd18267, %rd18266;
	shf.l.wrap.b32 	%r12137, %r12131, %r12132, 23;
	shf.l.wrap.b32 	%r12138, %r12132, %r12131, 23;
	mov.b64 	%rd18269, {%r12138, %r12137};
	xor.b64  	%rd18270, %rd18268, %rd18269;
	xor.b64  	%rd18271, %rd18230, %rd1515;
	and.b64  	%rd18272, %rd18254, %rd18271;
	xor.b64  	%rd18273, %rd18272, %rd1515;
	add.s64 	%rd18274, %rd1517, %rd21809;
	add.s64 	%rd18275, %rd18274, %rd21452;
	add.s64 	%rd18276, %rd18275, %rd18273;
	add.s64 	%rd18277, %rd18276, %rd18270;
	add.s64 	%rd18278, %rd18277, %rd1522;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12139,%dummy}, %rd18265;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12140}, %rd18265;
	}
	shf.r.wrap.b32 	%r12141, %r12140, %r12139, 28;
	shf.r.wrap.b32 	%r12142, %r12139, %r12140, 28;
	mov.b64 	%rd18279, {%r12142, %r12141};
	shf.l.wrap.b32 	%r12143, %r12139, %r12140, 30;
	shf.l.wrap.b32 	%r12144, %r12140, %r12139, 30;
	mov.b64 	%rd18280, {%r12144, %r12143};
	xor.b64  	%rd18281, %rd18280, %rd18279;
	shf.l.wrap.b32 	%r12145, %r12139, %r12140, 25;
	shf.l.wrap.b32 	%r12146, %r12140, %r12139, 25;
	mov.b64 	%rd18282, {%r12146, %r12145};
	xor.b64  	%rd18283, %rd18281, %rd18282;
	xor.b64  	%rd18284, %rd18265, %rd1520;
	xor.b64  	%rd18285, %rd18265, %rd18241;
	and.b64  	%rd18286, %rd18285, %rd18284;
	xor.b64  	%rd18287, %rd18286, %rd18265;
	add.s64 	%rd18288, %rd18277, %rd18287;
	add.s64 	%rd18289, %rd18288, %rd18283;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12147,%dummy}, %rd18278;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12148}, %rd18278;
	}
	shf.r.wrap.b32 	%r12149, %r12148, %r12147, 14;
	shf.r.wrap.b32 	%r12150, %r12147, %r12148, 14;
	mov.b64 	%rd18290, {%r12150, %r12149};
	shf.r.wrap.b32 	%r12151, %r12148, %r12147, 18;
	shf.r.wrap.b32 	%r12152, %r12147, %r12148, 18;
	mov.b64 	%rd18291, {%r12152, %r12151};
	xor.b64  	%rd18292, %rd18291, %rd18290;
	shf.l.wrap.b32 	%r12153, %r12147, %r12148, 23;
	shf.l.wrap.b32 	%r12154, %r12148, %r12147, 23;
	mov.b64 	%rd18293, {%r12154, %r12153};
	xor.b64  	%rd18294, %rd18292, %rd18293;
	xor.b64  	%rd18295, %rd18254, %rd18230;
	and.b64  	%rd18296, %rd18278, %rd18295;
	xor.b64  	%rd18297, %rd18296, %rd18230;
	add.s64 	%rd18298, %rd1515, %rd21810;
	add.s64 	%rd18299, %rd18298, %rd21451;
	add.s64 	%rd18300, %rd18299, %rd18297;
	add.s64 	%rd18301, %rd18300, %rd18294;
	add.s64 	%rd18302, %rd18301, %rd1520;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12155,%dummy}, %rd18289;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12156}, %rd18289;
	}
	shf.r.wrap.b32 	%r12157, %r12156, %r12155, 28;
	shf.r.wrap.b32 	%r12158, %r12155, %r12156, 28;
	mov.b64 	%rd18303, {%r12158, %r12157};
	shf.l.wrap.b32 	%r12159, %r12155, %r12156, 30;
	shf.l.wrap.b32 	%r12160, %r12156, %r12155, 30;
	mov.b64 	%rd18304, {%r12160, %r12159};
	xor.b64  	%rd18305, %rd18304, %rd18303;
	shf.l.wrap.b32 	%r12161, %r12155, %r12156, 25;
	shf.l.wrap.b32 	%r12162, %r12156, %r12155, 25;
	mov.b64 	%rd18306, {%r12162, %r12161};
	xor.b64  	%rd18307, %rd18305, %rd18306;
	xor.b64  	%rd18308, %rd18289, %rd18241;
	xor.b64  	%rd18309, %rd18289, %rd18265;
	and.b64  	%rd18310, %rd18309, %rd18308;
	xor.b64  	%rd18311, %rd18310, %rd18289;
	add.s64 	%rd18312, %rd18301, %rd18311;
	add.s64 	%rd18313, %rd18312, %rd18307;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12163,%dummy}, %rd18302;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12164}, %rd18302;
	}
	shf.r.wrap.b32 	%r12165, %r12164, %r12163, 14;
	shf.r.wrap.b32 	%r12166, %r12163, %r12164, 14;
	mov.b64 	%rd18314, {%r12166, %r12165};
	shf.r.wrap.b32 	%r12167, %r12164, %r12163, 18;
	shf.r.wrap.b32 	%r12168, %r12163, %r12164, 18;
	mov.b64 	%rd18315, {%r12168, %r12167};
	xor.b64  	%rd18316, %rd18315, %rd18314;
	shf.l.wrap.b32 	%r12169, %r12163, %r12164, 23;
	shf.l.wrap.b32 	%r12170, %r12164, %r12163, 23;
	mov.b64 	%rd18317, {%r12170, %r12169};
	xor.b64  	%rd18318, %rd18316, %rd18317;
	xor.b64  	%rd18319, %rd18278, %rd18254;
	and.b64  	%rd18320, %rd18302, %rd18319;
	xor.b64  	%rd18321, %rd18320, %rd18254;
	add.s64 	%rd18322, %rd18230, %rd21811;
	add.s64 	%rd18323, %rd18322, %rd21450;
	add.s64 	%rd18324, %rd18323, %rd18321;
	add.s64 	%rd18325, %rd18324, %rd18318;
	add.s64 	%rd18326, %rd18325, %rd18241;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12171,%dummy}, %rd18313;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12172}, %rd18313;
	}
	shf.r.wrap.b32 	%r12173, %r12172, %r12171, 28;
	shf.r.wrap.b32 	%r12174, %r12171, %r12172, 28;
	mov.b64 	%rd18327, {%r12174, %r12173};
	shf.l.wrap.b32 	%r12175, %r12171, %r12172, 30;
	shf.l.wrap.b32 	%r12176, %r12172, %r12171, 30;
	mov.b64 	%rd18328, {%r12176, %r12175};
	xor.b64  	%rd18329, %rd18328, %rd18327;
	shf.l.wrap.b32 	%r12177, %r12171, %r12172, 25;
	shf.l.wrap.b32 	%r12178, %r12172, %r12171, 25;
	mov.b64 	%rd18330, {%r12178, %r12177};
	xor.b64  	%rd18331, %rd18329, %rd18330;
	xor.b64  	%rd18332, %rd18313, %rd18265;
	xor.b64  	%rd18333, %rd18313, %rd18289;
	and.b64  	%rd18334, %rd18333, %rd18332;
	xor.b64  	%rd18335, %rd18334, %rd18313;
	add.s64 	%rd18336, %rd18325, %rd18335;
	add.s64 	%rd18337, %rd18336, %rd18331;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12179,%dummy}, %rd18326;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12180}, %rd18326;
	}
	shf.r.wrap.b32 	%r12181, %r12180, %r12179, 14;
	shf.r.wrap.b32 	%r12182, %r12179, %r12180, 14;
	mov.b64 	%rd18338, {%r12182, %r12181};
	shf.r.wrap.b32 	%r12183, %r12180, %r12179, 18;
	shf.r.wrap.b32 	%r12184, %r12179, %r12180, 18;
	mov.b64 	%rd18339, {%r12184, %r12183};
	xor.b64  	%rd18340, %rd18339, %rd18338;
	shf.l.wrap.b32 	%r12185, %r12179, %r12180, 23;
	shf.l.wrap.b32 	%r12186, %r12180, %r12179, 23;
	mov.b64 	%rd18341, {%r12186, %r12185};
	xor.b64  	%rd18342, %rd18340, %rd18341;
	xor.b64  	%rd18343, %rd18302, %rd18278;
	and.b64  	%rd18344, %rd18326, %rd18343;
	xor.b64  	%rd18345, %rd18344, %rd18278;
	add.s64 	%rd18346, %rd18254, %rd21812;
	add.s64 	%rd18347, %rd18346, %rd21449;
	add.s64 	%rd18348, %rd18347, %rd18345;
	add.s64 	%rd18349, %rd18348, %rd18342;
	add.s64 	%rd18350, %rd18349, %rd18265;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12187,%dummy}, %rd18337;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12188}, %rd18337;
	}
	shf.r.wrap.b32 	%r12189, %r12188, %r12187, 28;
	shf.r.wrap.b32 	%r12190, %r12187, %r12188, 28;
	mov.b64 	%rd18351, {%r12190, %r12189};
	shf.l.wrap.b32 	%r12191, %r12187, %r12188, 30;
	shf.l.wrap.b32 	%r12192, %r12188, %r12187, 30;
	mov.b64 	%rd18352, {%r12192, %r12191};
	xor.b64  	%rd18353, %rd18352, %rd18351;
	shf.l.wrap.b32 	%r12193, %r12187, %r12188, 25;
	shf.l.wrap.b32 	%r12194, %r12188, %r12187, 25;
	mov.b64 	%rd18354, {%r12194, %r12193};
	xor.b64  	%rd18355, %rd18353, %rd18354;
	xor.b64  	%rd18356, %rd18337, %rd18289;
	xor.b64  	%rd18357, %rd18337, %rd18313;
	and.b64  	%rd18358, %rd18357, %rd18356;
	xor.b64  	%rd18359, %rd18358, %rd18337;
	add.s64 	%rd18360, %rd18349, %rd18359;
	add.s64 	%rd18361, %rd18360, %rd18355;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12195,%dummy}, %rd18350;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12196}, %rd18350;
	}
	shf.r.wrap.b32 	%r12197, %r12196, %r12195, 14;
	shf.r.wrap.b32 	%r12198, %r12195, %r12196, 14;
	mov.b64 	%rd18362, {%r12198, %r12197};
	shf.r.wrap.b32 	%r12199, %r12196, %r12195, 18;
	shf.r.wrap.b32 	%r12200, %r12195, %r12196, 18;
	mov.b64 	%rd18363, {%r12200, %r12199};
	xor.b64  	%rd18364, %rd18363, %rd18362;
	shf.l.wrap.b32 	%r12201, %r12195, %r12196, 23;
	shf.l.wrap.b32 	%r12202, %r12196, %r12195, 23;
	mov.b64 	%rd18365, {%r12202, %r12201};
	xor.b64  	%rd18366, %rd18364, %rd18365;
	xor.b64  	%rd18367, %rd18326, %rd18302;
	and.b64  	%rd18368, %rd18350, %rd18367;
	xor.b64  	%rd18369, %rd18368, %rd18302;
	add.s64 	%rd18370, %rd18278, %rd21813;
	add.s64 	%rd18371, %rd18370, %rd21448;
	add.s64 	%rd18372, %rd18371, %rd18369;
	add.s64 	%rd18373, %rd18372, %rd18366;
	add.s64 	%rd18374, %rd18373, %rd18289;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12203,%dummy}, %rd18361;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12204}, %rd18361;
	}
	shf.r.wrap.b32 	%r12205, %r12204, %r12203, 28;
	shf.r.wrap.b32 	%r12206, %r12203, %r12204, 28;
	mov.b64 	%rd18375, {%r12206, %r12205};
	shf.l.wrap.b32 	%r12207, %r12203, %r12204, 30;
	shf.l.wrap.b32 	%r12208, %r12204, %r12203, 30;
	mov.b64 	%rd18376, {%r12208, %r12207};
	xor.b64  	%rd18377, %rd18376, %rd18375;
	shf.l.wrap.b32 	%r12209, %r12203, %r12204, 25;
	shf.l.wrap.b32 	%r12210, %r12204, %r12203, 25;
	mov.b64 	%rd18378, {%r12210, %r12209};
	xor.b64  	%rd18379, %rd18377, %rd18378;
	xor.b64  	%rd18380, %rd18361, %rd18313;
	xor.b64  	%rd18381, %rd18361, %rd18337;
	and.b64  	%rd18382, %rd18381, %rd18380;
	xor.b64  	%rd18383, %rd18382, %rd18361;
	add.s64 	%rd18384, %rd18373, %rd18383;
	add.s64 	%rd18385, %rd18384, %rd18379;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12211,%dummy}, %rd18374;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12212}, %rd18374;
	}
	shf.r.wrap.b32 	%r12213, %r12212, %r12211, 14;
	shf.r.wrap.b32 	%r12214, %r12211, %r12212, 14;
	mov.b64 	%rd18386, {%r12214, %r12213};
	shf.r.wrap.b32 	%r12215, %r12212, %r12211, 18;
	shf.r.wrap.b32 	%r12216, %r12211, %r12212, 18;
	mov.b64 	%rd18387, {%r12216, %r12215};
	xor.b64  	%rd18388, %rd18387, %rd18386;
	shf.l.wrap.b32 	%r12217, %r12211, %r12212, 23;
	shf.l.wrap.b32 	%r12218, %r12212, %r12211, 23;
	mov.b64 	%rd18389, {%r12218, %r12217};
	xor.b64  	%rd18390, %rd18388, %rd18389;
	xor.b64  	%rd18391, %rd18350, %rd18326;
	and.b64  	%rd18392, %rd18374, %rd18391;
	xor.b64  	%rd18393, %rd18392, %rd18326;
	add.s64 	%rd18394, %rd18302, %rd21814;
	add.s64 	%rd18395, %rd18394, %rd21447;
	add.s64 	%rd18396, %rd18395, %rd18393;
	add.s64 	%rd18397, %rd18396, %rd18390;
	add.s64 	%rd18398, %rd18397, %rd18313;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12219,%dummy}, %rd18385;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12220}, %rd18385;
	}
	shf.r.wrap.b32 	%r12221, %r12220, %r12219, 28;
	shf.r.wrap.b32 	%r12222, %r12219, %r12220, 28;
	mov.b64 	%rd18399, {%r12222, %r12221};
	shf.l.wrap.b32 	%r12223, %r12219, %r12220, 30;
	shf.l.wrap.b32 	%r12224, %r12220, %r12219, 30;
	mov.b64 	%rd18400, {%r12224, %r12223};
	xor.b64  	%rd18401, %rd18400, %rd18399;
	shf.l.wrap.b32 	%r12225, %r12219, %r12220, 25;
	shf.l.wrap.b32 	%r12226, %r12220, %r12219, 25;
	mov.b64 	%rd18402, {%r12226, %r12225};
	xor.b64  	%rd18403, %rd18401, %rd18402;
	xor.b64  	%rd18404, %rd18385, %rd18337;
	xor.b64  	%rd18405, %rd18385, %rd18361;
	and.b64  	%rd18406, %rd18405, %rd18404;
	xor.b64  	%rd18407, %rd18406, %rd18385;
	add.s64 	%rd18408, %rd18397, %rd18407;
	add.s64 	%rd18409, %rd18408, %rd18403;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12227,%dummy}, %rd18398;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12228}, %rd18398;
	}
	shf.r.wrap.b32 	%r12229, %r12228, %r12227, 14;
	shf.r.wrap.b32 	%r12230, %r12227, %r12228, 14;
	mov.b64 	%rd18410, {%r12230, %r12229};
	shf.r.wrap.b32 	%r12231, %r12228, %r12227, 18;
	shf.r.wrap.b32 	%r12232, %r12227, %r12228, 18;
	mov.b64 	%rd18411, {%r12232, %r12231};
	xor.b64  	%rd18412, %rd18411, %rd18410;
	shf.l.wrap.b32 	%r12233, %r12227, %r12228, 23;
	shf.l.wrap.b32 	%r12234, %r12228, %r12227, 23;
	mov.b64 	%rd18413, {%r12234, %r12233};
	xor.b64  	%rd18414, %rd18412, %rd18413;
	xor.b64  	%rd18415, %rd18374, %rd18350;
	and.b64  	%rd18416, %rd18398, %rd18415;
	xor.b64  	%rd18417, %rd18416, %rd18350;
	add.s64 	%rd18418, %rd18326, %rd21798;
	add.s64 	%rd18419, %rd18418, %rd21446;
	add.s64 	%rd18420, %rd18419, %rd18417;
	add.s64 	%rd18421, %rd18420, %rd18414;
	add.s64 	%rd18422, %rd18421, %rd18337;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12235,%dummy}, %rd18409;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12236}, %rd18409;
	}
	shf.r.wrap.b32 	%r12237, %r12236, %r12235, 28;
	shf.r.wrap.b32 	%r12238, %r12235, %r12236, 28;
	mov.b64 	%rd18423, {%r12238, %r12237};
	shf.l.wrap.b32 	%r12239, %r12235, %r12236, 30;
	shf.l.wrap.b32 	%r12240, %r12236, %r12235, 30;
	mov.b64 	%rd18424, {%r12240, %r12239};
	xor.b64  	%rd18425, %rd18424, %rd18423;
	shf.l.wrap.b32 	%r12241, %r12235, %r12236, 25;
	shf.l.wrap.b32 	%r12242, %r12236, %r12235, 25;
	mov.b64 	%rd18426, {%r12242, %r12241};
	xor.b64  	%rd18427, %rd18425, %rd18426;
	xor.b64  	%rd18428, %rd18409, %rd18361;
	xor.b64  	%rd18429, %rd18409, %rd18385;
	and.b64  	%rd18430, %rd18429, %rd18428;
	xor.b64  	%rd18431, %rd18430, %rd18409;
	add.s64 	%rd18432, %rd18421, %rd18431;
	add.s64 	%rd18433, %rd18432, %rd18427;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12243,%dummy}, %rd18422;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12244}, %rd18422;
	}
	shf.r.wrap.b32 	%r12245, %r12244, %r12243, 14;
	shf.r.wrap.b32 	%r12246, %r12243, %r12244, 14;
	mov.b64 	%rd18434, {%r12246, %r12245};
	shf.r.wrap.b32 	%r12247, %r12244, %r12243, 18;
	shf.r.wrap.b32 	%r12248, %r12243, %r12244, 18;
	mov.b64 	%rd18435, {%r12248, %r12247};
	xor.b64  	%rd18436, %rd18435, %rd18434;
	shf.l.wrap.b32 	%r12249, %r12243, %r12244, 23;
	shf.l.wrap.b32 	%r12250, %r12244, %r12243, 23;
	mov.b64 	%rd18437, {%r12250, %r12249};
	xor.b64  	%rd18438, %rd18436, %rd18437;
	xor.b64  	%rd18439, %rd18398, %rd18374;
	and.b64  	%rd18440, %rd18422, %rd18439;
	xor.b64  	%rd18441, %rd18440, %rd18374;
	add.s64 	%rd18442, %rd18350, %rd21797;
	add.s64 	%rd18443, %rd18442, %rd21445;
	add.s64 	%rd18444, %rd18443, %rd18441;
	add.s64 	%rd18445, %rd18444, %rd18438;
	add.s64 	%rd18446, %rd18445, %rd18361;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12251,%dummy}, %rd18433;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12252}, %rd18433;
	}
	shf.r.wrap.b32 	%r12253, %r12252, %r12251, 28;
	shf.r.wrap.b32 	%r12254, %r12251, %r12252, 28;
	mov.b64 	%rd18447, {%r12254, %r12253};
	shf.l.wrap.b32 	%r12255, %r12251, %r12252, 30;
	shf.l.wrap.b32 	%r12256, %r12252, %r12251, 30;
	mov.b64 	%rd18448, {%r12256, %r12255};
	xor.b64  	%rd18449, %rd18448, %rd18447;
	shf.l.wrap.b32 	%r12257, %r12251, %r12252, 25;
	shf.l.wrap.b32 	%r12258, %r12252, %r12251, 25;
	mov.b64 	%rd18450, {%r12258, %r12257};
	xor.b64  	%rd18451, %rd18449, %rd18450;
	xor.b64  	%rd18452, %rd18433, %rd18385;
	xor.b64  	%rd18453, %rd18433, %rd18409;
	and.b64  	%rd18454, %rd18453, %rd18452;
	xor.b64  	%rd18455, %rd18454, %rd18433;
	add.s64 	%rd18456, %rd18445, %rd18455;
	add.s64 	%rd18457, %rd18456, %rd18451;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12259,%dummy}, %rd18446;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12260}, %rd18446;
	}
	shf.r.wrap.b32 	%r12261, %r12260, %r12259, 14;
	shf.r.wrap.b32 	%r12262, %r12259, %r12260, 14;
	mov.b64 	%rd18458, {%r12262, %r12261};
	shf.r.wrap.b32 	%r12263, %r12260, %r12259, 18;
	shf.r.wrap.b32 	%r12264, %r12259, %r12260, 18;
	mov.b64 	%rd18459, {%r12264, %r12263};
	xor.b64  	%rd18460, %rd18459, %rd18458;
	shf.l.wrap.b32 	%r12265, %r12259, %r12260, 23;
	shf.l.wrap.b32 	%r12266, %r12260, %r12259, 23;
	mov.b64 	%rd18461, {%r12266, %r12265};
	xor.b64  	%rd18462, %rd18460, %rd18461;
	xor.b64  	%rd18463, %rd18422, %rd18398;
	and.b64  	%rd18464, %rd18446, %rd18463;
	xor.b64  	%rd18465, %rd18464, %rd18398;
	add.s64 	%rd18466, %rd18374, %rd21796;
	add.s64 	%rd18467, %rd18466, %rd21444;
	add.s64 	%rd18468, %rd18467, %rd18465;
	add.s64 	%rd18469, %rd18468, %rd18462;
	add.s64 	%rd18470, %rd18469, %rd18385;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12267,%dummy}, %rd18457;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12268}, %rd18457;
	}
	shf.r.wrap.b32 	%r12269, %r12268, %r12267, 28;
	shf.r.wrap.b32 	%r12270, %r12267, %r12268, 28;
	mov.b64 	%rd18471, {%r12270, %r12269};
	shf.l.wrap.b32 	%r12271, %r12267, %r12268, 30;
	shf.l.wrap.b32 	%r12272, %r12268, %r12267, 30;
	mov.b64 	%rd18472, {%r12272, %r12271};
	xor.b64  	%rd18473, %rd18472, %rd18471;
	shf.l.wrap.b32 	%r12273, %r12267, %r12268, 25;
	shf.l.wrap.b32 	%r12274, %r12268, %r12267, 25;
	mov.b64 	%rd18474, {%r12274, %r12273};
	xor.b64  	%rd18475, %rd18473, %rd18474;
	xor.b64  	%rd18476, %rd18457, %rd18409;
	xor.b64  	%rd18477, %rd18457, %rd18433;
	and.b64  	%rd18478, %rd18477, %rd18476;
	xor.b64  	%rd18479, %rd18478, %rd18457;
	add.s64 	%rd18480, %rd18469, %rd18479;
	add.s64 	%rd18481, %rd18480, %rd18475;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12275,%dummy}, %rd18470;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12276}, %rd18470;
	}
	shf.r.wrap.b32 	%r12277, %r12276, %r12275, 14;
	shf.r.wrap.b32 	%r12278, %r12275, %r12276, 14;
	mov.b64 	%rd18482, {%r12278, %r12277};
	shf.r.wrap.b32 	%r12279, %r12276, %r12275, 18;
	shf.r.wrap.b32 	%r12280, %r12275, %r12276, 18;
	mov.b64 	%rd18483, {%r12280, %r12279};
	xor.b64  	%rd18484, %rd18483, %rd18482;
	shf.l.wrap.b32 	%r12281, %r12275, %r12276, 23;
	shf.l.wrap.b32 	%r12282, %r12276, %r12275, 23;
	mov.b64 	%rd18485, {%r12282, %r12281};
	xor.b64  	%rd18486, %rd18484, %rd18485;
	xor.b64  	%rd18487, %rd18446, %rd18422;
	and.b64  	%rd18488, %rd18470, %rd18487;
	xor.b64  	%rd18489, %rd18488, %rd18422;
	add.s64 	%rd18490, %rd18398, %rd21795;
	add.s64 	%rd18491, %rd18490, %rd21443;
	add.s64 	%rd18492, %rd18491, %rd18489;
	add.s64 	%rd18493, %rd18492, %rd18486;
	add.s64 	%rd18494, %rd18493, %rd18409;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12283,%dummy}, %rd18481;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12284}, %rd18481;
	}
	shf.r.wrap.b32 	%r12285, %r12284, %r12283, 28;
	shf.r.wrap.b32 	%r12286, %r12283, %r12284, 28;
	mov.b64 	%rd18495, {%r12286, %r12285};
	shf.l.wrap.b32 	%r12287, %r12283, %r12284, 30;
	shf.l.wrap.b32 	%r12288, %r12284, %r12283, 30;
	mov.b64 	%rd18496, {%r12288, %r12287};
	xor.b64  	%rd18497, %rd18496, %rd18495;
	shf.l.wrap.b32 	%r12289, %r12283, %r12284, 25;
	shf.l.wrap.b32 	%r12290, %r12284, %r12283, 25;
	mov.b64 	%rd18498, {%r12290, %r12289};
	xor.b64  	%rd18499, %rd18497, %rd18498;
	xor.b64  	%rd18500, %rd18481, %rd18433;
	xor.b64  	%rd18501, %rd18481, %rd18457;
	and.b64  	%rd18502, %rd18501, %rd18500;
	xor.b64  	%rd18503, %rd18502, %rd18481;
	add.s64 	%rd18504, %rd18493, %rd18503;
	add.s64 	%rd18505, %rd18504, %rd18499;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12291,%dummy}, %rd18494;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12292}, %rd18494;
	}
	shf.r.wrap.b32 	%r12293, %r12292, %r12291, 14;
	shf.r.wrap.b32 	%r12294, %r12291, %r12292, 14;
	mov.b64 	%rd18506, {%r12294, %r12293};
	shf.r.wrap.b32 	%r12295, %r12292, %r12291, 18;
	shf.r.wrap.b32 	%r12296, %r12291, %r12292, 18;
	mov.b64 	%rd18507, {%r12296, %r12295};
	xor.b64  	%rd18508, %rd18507, %rd18506;
	shf.l.wrap.b32 	%r12297, %r12291, %r12292, 23;
	shf.l.wrap.b32 	%r12298, %r12292, %r12291, 23;
	mov.b64 	%rd18509, {%r12298, %r12297};
	xor.b64  	%rd18510, %rd18508, %rd18509;
	xor.b64  	%rd18511, %rd18470, %rd18446;
	and.b64  	%rd18512, %rd18494, %rd18511;
	xor.b64  	%rd18513, %rd18512, %rd18446;
	add.s64 	%rd18514, %rd18422, %rd21794;
	add.s64 	%rd18515, %rd18514, %rd21442;
	add.s64 	%rd18516, %rd18515, %rd18513;
	add.s64 	%rd18517, %rd18516, %rd18510;
	add.s64 	%rd21806, %rd18517, %rd18433;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12299,%dummy}, %rd18505;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12300}, %rd18505;
	}
	shf.r.wrap.b32 	%r12301, %r12300, %r12299, 28;
	shf.r.wrap.b32 	%r12302, %r12299, %r12300, 28;
	mov.b64 	%rd18518, {%r12302, %r12301};
	shf.l.wrap.b32 	%r12303, %r12299, %r12300, 30;
	shf.l.wrap.b32 	%r12304, %r12300, %r12299, 30;
	mov.b64 	%rd18519, {%r12304, %r12303};
	xor.b64  	%rd18520, %rd18519, %rd18518;
	shf.l.wrap.b32 	%r12305, %r12299, %r12300, 25;
	shf.l.wrap.b32 	%r12306, %r12300, %r12299, 25;
	mov.b64 	%rd18521, {%r12306, %r12305};
	xor.b64  	%rd18522, %rd18520, %rd18521;
	xor.b64  	%rd18523, %rd18505, %rd18457;
	xor.b64  	%rd18524, %rd18505, %rd18481;
	and.b64  	%rd18525, %rd18524, %rd18523;
	xor.b64  	%rd18526, %rd18525, %rd18505;
	add.s64 	%rd18527, %rd18517, %rd18526;
	add.s64 	%rd21802, %rd18527, %rd18522;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12307,%dummy}, %rd21806;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12308}, %rd21806;
	}
	shf.r.wrap.b32 	%r12309, %r12308, %r12307, 14;
	shf.r.wrap.b32 	%r12310, %r12307, %r12308, 14;
	mov.b64 	%rd18528, {%r12310, %r12309};
	shf.r.wrap.b32 	%r12311, %r12308, %r12307, 18;
	shf.r.wrap.b32 	%r12312, %r12307, %r12308, 18;
	mov.b64 	%rd18529, {%r12312, %r12311};
	xor.b64  	%rd18530, %rd18529, %rd18528;
	shf.l.wrap.b32 	%r12313, %r12307, %r12308, 23;
	shf.l.wrap.b32 	%r12314, %r12308, %r12307, 23;
	mov.b64 	%rd18531, {%r12314, %r12313};
	xor.b64  	%rd18532, %rd18530, %rd18531;
	xor.b64  	%rd18533, %rd18494, %rd18470;
	and.b64  	%rd18534, %rd21806, %rd18533;
	xor.b64  	%rd18535, %rd18534, %rd18470;
	add.s64 	%rd18536, %rd18446, %rd21793;
	add.s64 	%rd18537, %rd18536, %rd21441;
	add.s64 	%rd18538, %rd18537, %rd18535;
	add.s64 	%rd18539, %rd18538, %rd18532;
	add.s64 	%rd21805, %rd18539, %rd18457;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12315,%dummy}, %rd21802;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12316}, %rd21802;
	}
	shf.r.wrap.b32 	%r12317, %r12316, %r12315, 28;
	shf.r.wrap.b32 	%r12318, %r12315, %r12316, 28;
	mov.b64 	%rd18540, {%r12318, %r12317};
	shf.l.wrap.b32 	%r12319, %r12315, %r12316, 30;
	shf.l.wrap.b32 	%r12320, %r12316, %r12315, 30;
	mov.b64 	%rd18541, {%r12320, %r12319};
	xor.b64  	%rd18542, %rd18541, %rd18540;
	shf.l.wrap.b32 	%r12321, %r12315, %r12316, 25;
	shf.l.wrap.b32 	%r12322, %r12316, %r12315, 25;
	mov.b64 	%rd18543, {%r12322, %r12321};
	xor.b64  	%rd18544, %rd18542, %rd18543;
	xor.b64  	%rd18545, %rd21802, %rd18481;
	xor.b64  	%rd18546, %rd21802, %rd18505;
	and.b64  	%rd18547, %rd18546, %rd18545;
	xor.b64  	%rd18548, %rd18547, %rd21802;
	add.s64 	%rd18549, %rd18539, %rd18548;
	add.s64 	%rd21801, %rd18549, %rd18544;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12323,%dummy}, %rd21805;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12324}, %rd21805;
	}
	shf.r.wrap.b32 	%r12325, %r12324, %r12323, 14;
	shf.r.wrap.b32 	%r12326, %r12323, %r12324, 14;
	mov.b64 	%rd18550, {%r12326, %r12325};
	shf.r.wrap.b32 	%r12327, %r12324, %r12323, 18;
	shf.r.wrap.b32 	%r12328, %r12323, %r12324, 18;
	mov.b64 	%rd18551, {%r12328, %r12327};
	xor.b64  	%rd18552, %rd18551, %rd18550;
	shf.l.wrap.b32 	%r12329, %r12323, %r12324, 23;
	shf.l.wrap.b32 	%r12330, %r12324, %r12323, 23;
	mov.b64 	%rd18553, {%r12330, %r12329};
	xor.b64  	%rd18554, %rd18552, %rd18553;
	xor.b64  	%rd18555, %rd21806, %rd18494;
	and.b64  	%rd18556, %rd21805, %rd18555;
	xor.b64  	%rd18557, %rd18556, %rd18494;
	add.s64 	%rd18558, %rd18470, %rd21792;
	add.s64 	%rd18559, %rd18558, %rd21440;
	add.s64 	%rd18560, %rd18559, %rd18557;
	add.s64 	%rd18561, %rd18560, %rd18554;
	add.s64 	%rd21804, %rd18561, %rd18481;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12331,%dummy}, %rd21801;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12332}, %rd21801;
	}
	shf.r.wrap.b32 	%r12333, %r12332, %r12331, 28;
	shf.r.wrap.b32 	%r12334, %r12331, %r12332, 28;
	mov.b64 	%rd18562, {%r12334, %r12333};
	shf.l.wrap.b32 	%r12335, %r12331, %r12332, 30;
	shf.l.wrap.b32 	%r12336, %r12332, %r12331, 30;
	mov.b64 	%rd18563, {%r12336, %r12335};
	xor.b64  	%rd18564, %rd18563, %rd18562;
	shf.l.wrap.b32 	%r12337, %r12331, %r12332, 25;
	shf.l.wrap.b32 	%r12338, %r12332, %r12331, 25;
	mov.b64 	%rd18565, {%r12338, %r12337};
	xor.b64  	%rd18566, %rd18564, %rd18565;
	xor.b64  	%rd18567, %rd21801, %rd18505;
	xor.b64  	%rd18568, %rd21801, %rd21802;
	and.b64  	%rd18569, %rd18568, %rd18567;
	xor.b64  	%rd18570, %rd18569, %rd21801;
	add.s64 	%rd18571, %rd18561, %rd18570;
	add.s64 	%rd21800, %rd18571, %rd18566;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12339,%dummy}, %rd21804;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12340}, %rd21804;
	}
	shf.r.wrap.b32 	%r12341, %r12340, %r12339, 14;
	shf.r.wrap.b32 	%r12342, %r12339, %r12340, 14;
	mov.b64 	%rd18572, {%r12342, %r12341};
	shf.r.wrap.b32 	%r12343, %r12340, %r12339, 18;
	shf.r.wrap.b32 	%r12344, %r12339, %r12340, 18;
	mov.b64 	%rd18573, {%r12344, %r12343};
	xor.b64  	%rd18574, %rd18573, %rd18572;
	shf.l.wrap.b32 	%r12345, %r12339, %r12340, 23;
	shf.l.wrap.b32 	%r12346, %r12340, %r12339, 23;
	mov.b64 	%rd18575, {%r12346, %r12345};
	xor.b64  	%rd18576, %rd18574, %rd18575;
	xor.b64  	%rd18577, %rd21805, %rd21806;
	and.b64  	%rd18578, %rd21804, %rd18577;
	xor.b64  	%rd18579, %rd18578, %rd21806;
	add.s64 	%rd18580, %rd18494, %rd21791;
	add.s64 	%rd18581, %rd18580, %rd21439;
	add.s64 	%rd18582, %rd18581, %rd18579;
	add.s64 	%rd18583, %rd18582, %rd18576;
	add.s64 	%rd21803, %rd18583, %rd18505;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12347,%dummy}, %rd21800;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12348}, %rd21800;
	}
	shf.r.wrap.b32 	%r12349, %r12348, %r12347, 28;
	shf.r.wrap.b32 	%r12350, %r12347, %r12348, 28;
	mov.b64 	%rd18584, {%r12350, %r12349};
	shf.l.wrap.b32 	%r12351, %r12347, %r12348, 30;
	shf.l.wrap.b32 	%r12352, %r12348, %r12347, 30;
	mov.b64 	%rd18585, {%r12352, %r12351};
	xor.b64  	%rd18586, %rd18585, %rd18584;
	shf.l.wrap.b32 	%r12353, %r12347, %r12348, 25;
	shf.l.wrap.b32 	%r12354, %r12348, %r12347, 25;
	mov.b64 	%rd18587, {%r12354, %r12353};
	xor.b64  	%rd18588, %rd18586, %rd18587;
	xor.b64  	%rd18589, %rd21800, %rd21802;
	xor.b64  	%rd18590, %rd21800, %rd21801;
	and.b64  	%rd18591, %rd18590, %rd18589;
	xor.b64  	%rd18592, %rd18591, %rd21800;
	add.s64 	%rd18593, %rd18583, %rd18592;
	add.s64 	%rd21799, %rd18593, %rd18588;
	mov.u32 	%r14490, 16;

BB3_318:
	shr.u64 	%rd18594, %rd21792, 6;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12355,%dummy}, %rd21792;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12356}, %rd21792;
	}
	shf.r.wrap.b32 	%r12357, %r12356, %r12355, 19;
	shf.r.wrap.b32 	%r12358, %r12355, %r12356, 19;
	mov.b64 	%rd18595, {%r12358, %r12357};
	xor.b64  	%rd18596, %rd18595, %rd18594;
	shf.l.wrap.b32 	%r12359, %r12355, %r12356, 3;
	shf.l.wrap.b32 	%r12360, %r12356, %r12355, 3;
	mov.b64 	%rd18597, {%r12360, %r12359};
	xor.b64  	%rd18598, %rd18596, %rd18597;
	shr.u64 	%rd18599, %rd21808, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12361,%dummy}, %rd21808;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12362}, %rd21808;
	}
	shf.r.wrap.b32 	%r12363, %r12362, %r12361, 1;
	shf.r.wrap.b32 	%r12364, %r12361, %r12362, 1;
	mov.b64 	%rd18600, {%r12364, %r12363};
	xor.b64  	%rd18601, %rd18600, %rd18599;
	shf.r.wrap.b32 	%r12365, %r12362, %r12361, 8;
	shf.r.wrap.b32 	%r12366, %r12361, %r12362, 8;
	mov.b64 	%rd18602, {%r12366, %r12365};
	xor.b64  	%rd18603, %rd18601, %rd18602;
	add.s64 	%rd18604, %rd21807, %rd21797;
	add.s64 	%rd18605, %rd18604, %rd18598;
	add.s64 	%rd21807, %rd18605, %rd18603;
	shr.u64 	%rd18606, %rd21791, 6;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12367,%dummy}, %rd21791;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12368}, %rd21791;
	}
	shf.r.wrap.b32 	%r12369, %r12368, %r12367, 19;
	shf.r.wrap.b32 	%r12370, %r12367, %r12368, 19;
	mov.b64 	%rd18607, {%r12370, %r12369};
	xor.b64  	%rd18608, %rd18607, %rd18606;
	shf.l.wrap.b32 	%r12371, %r12367, %r12368, 3;
	shf.l.wrap.b32 	%r12372, %r12368, %r12367, 3;
	mov.b64 	%rd18609, {%r12372, %r12371};
	xor.b64  	%rd18610, %rd18608, %rd18609;
	shr.u64 	%rd18611, %rd21809, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12373,%dummy}, %rd21809;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12374}, %rd21809;
	}
	shf.r.wrap.b32 	%r12375, %r12374, %r12373, 1;
	shf.r.wrap.b32 	%r12376, %r12373, %r12374, 1;
	mov.b64 	%rd18612, {%r12376, %r12375};
	xor.b64  	%rd18613, %rd18612, %rd18611;
	shf.r.wrap.b32 	%r12377, %r12374, %r12373, 8;
	shf.r.wrap.b32 	%r12378, %r12373, %r12374, 8;
	mov.b64 	%rd18614, {%r12378, %r12377};
	xor.b64  	%rd18615, %rd18613, %rd18614;
	add.s64 	%rd18616, %rd21808, %rd21796;
	add.s64 	%rd18617, %rd18616, %rd18610;
	add.s64 	%rd21808, %rd18617, %rd18615;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12379,%dummy}, %rd21807;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12380}, %rd21807;
	}
	shf.r.wrap.b32 	%r12381, %r12380, %r12379, 19;
	shf.r.wrap.b32 	%r12382, %r12379, %r12380, 19;
	mov.b64 	%rd18618, {%r12382, %r12381};
	shf.l.wrap.b32 	%r12383, %r12379, %r12380, 3;
	shf.l.wrap.b32 	%r12384, %r12380, %r12379, 3;
	mov.b64 	%rd18619, {%r12384, %r12383};
	shr.u64 	%rd18620, %rd21807, 6;
	xor.b64  	%rd18621, %rd18618, %rd18620;
	xor.b64  	%rd18622, %rd18621, %rd18619;
	shr.u64 	%rd18623, %rd21810, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12385,%dummy}, %rd21810;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12386}, %rd21810;
	}
	shf.r.wrap.b32 	%r12387, %r12386, %r12385, 1;
	shf.r.wrap.b32 	%r12388, %r12385, %r12386, 1;
	mov.b64 	%rd18624, {%r12388, %r12387};
	xor.b64  	%rd18625, %rd18624, %rd18623;
	shf.r.wrap.b32 	%r12389, %r12386, %r12385, 8;
	shf.r.wrap.b32 	%r12390, %r12385, %r12386, 8;
	mov.b64 	%rd18626, {%r12390, %r12389};
	xor.b64  	%rd18627, %rd18625, %rd18626;
	add.s64 	%rd18628, %rd21809, %rd21795;
	add.s64 	%rd18629, %rd18628, %rd18622;
	add.s64 	%rd21809, %rd18629, %rd18627;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12391,%dummy}, %rd21808;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12392}, %rd21808;
	}
	shf.r.wrap.b32 	%r12393, %r12392, %r12391, 19;
	shf.r.wrap.b32 	%r12394, %r12391, %r12392, 19;
	mov.b64 	%rd18630, {%r12394, %r12393};
	shf.l.wrap.b32 	%r12395, %r12391, %r12392, 3;
	shf.l.wrap.b32 	%r12396, %r12392, %r12391, 3;
	mov.b64 	%rd18631, {%r12396, %r12395};
	shr.u64 	%rd18632, %rd21808, 6;
	xor.b64  	%rd18633, %rd18630, %rd18632;
	xor.b64  	%rd18634, %rd18633, %rd18631;
	shr.u64 	%rd18635, %rd21811, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12397,%dummy}, %rd21811;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12398}, %rd21811;
	}
	shf.r.wrap.b32 	%r12399, %r12398, %r12397, 1;
	shf.r.wrap.b32 	%r12400, %r12397, %r12398, 1;
	mov.b64 	%rd18636, {%r12400, %r12399};
	xor.b64  	%rd18637, %rd18636, %rd18635;
	shf.r.wrap.b32 	%r12401, %r12398, %r12397, 8;
	shf.r.wrap.b32 	%r12402, %r12397, %r12398, 8;
	mov.b64 	%rd18638, {%r12402, %r12401};
	xor.b64  	%rd18639, %rd18637, %rd18638;
	add.s64 	%rd18640, %rd21810, %rd21794;
	add.s64 	%rd18641, %rd18640, %rd18634;
	add.s64 	%rd21810, %rd18641, %rd18639;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12403,%dummy}, %rd21809;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12404}, %rd21809;
	}
	shf.r.wrap.b32 	%r12405, %r12404, %r12403, 19;
	shf.r.wrap.b32 	%r12406, %r12403, %r12404, 19;
	mov.b64 	%rd18642, {%r12406, %r12405};
	shf.l.wrap.b32 	%r12407, %r12403, %r12404, 3;
	shf.l.wrap.b32 	%r12408, %r12404, %r12403, 3;
	mov.b64 	%rd18643, {%r12408, %r12407};
	shr.u64 	%rd18644, %rd21809, 6;
	xor.b64  	%rd18645, %rd18642, %rd18644;
	xor.b64  	%rd18646, %rd18645, %rd18643;
	shr.u64 	%rd18647, %rd21812, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12409,%dummy}, %rd21812;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12410}, %rd21812;
	}
	shf.r.wrap.b32 	%r12411, %r12410, %r12409, 1;
	shf.r.wrap.b32 	%r12412, %r12409, %r12410, 1;
	mov.b64 	%rd18648, {%r12412, %r12411};
	xor.b64  	%rd18649, %rd18648, %rd18647;
	shf.r.wrap.b32 	%r12413, %r12410, %r12409, 8;
	shf.r.wrap.b32 	%r12414, %r12409, %r12410, 8;
	mov.b64 	%rd18650, {%r12414, %r12413};
	xor.b64  	%rd18651, %rd18649, %rd18650;
	add.s64 	%rd18652, %rd21811, %rd21793;
	add.s64 	%rd18653, %rd18652, %rd18646;
	add.s64 	%rd21811, %rd18653, %rd18651;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12415,%dummy}, %rd21810;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12416}, %rd21810;
	}
	shf.r.wrap.b32 	%r12417, %r12416, %r12415, 19;
	shf.r.wrap.b32 	%r12418, %r12415, %r12416, 19;
	mov.b64 	%rd18654, {%r12418, %r12417};
	shf.l.wrap.b32 	%r12419, %r12415, %r12416, 3;
	shf.l.wrap.b32 	%r12420, %r12416, %r12415, 3;
	mov.b64 	%rd18655, {%r12420, %r12419};
	shr.u64 	%rd18656, %rd21810, 6;
	xor.b64  	%rd18657, %rd18654, %rd18656;
	xor.b64  	%rd18658, %rd18657, %rd18655;
	shr.u64 	%rd18659, %rd21813, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12421,%dummy}, %rd21813;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12422}, %rd21813;
	}
	shf.r.wrap.b32 	%r12423, %r12422, %r12421, 1;
	shf.r.wrap.b32 	%r12424, %r12421, %r12422, 1;
	mov.b64 	%rd18660, {%r12424, %r12423};
	xor.b64  	%rd18661, %rd18660, %rd18659;
	shf.r.wrap.b32 	%r12425, %r12422, %r12421, 8;
	shf.r.wrap.b32 	%r12426, %r12421, %r12422, 8;
	mov.b64 	%rd18662, {%r12426, %r12425};
	xor.b64  	%rd18663, %rd18661, %rd18662;
	add.s64 	%rd18664, %rd21812, %rd21792;
	add.s64 	%rd18665, %rd18664, %rd18658;
	add.s64 	%rd21812, %rd18665, %rd18663;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12427,%dummy}, %rd21811;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12428}, %rd21811;
	}
	shf.r.wrap.b32 	%r12429, %r12428, %r12427, 19;
	shf.r.wrap.b32 	%r12430, %r12427, %r12428, 19;
	mov.b64 	%rd18666, {%r12430, %r12429};
	shf.l.wrap.b32 	%r12431, %r12427, %r12428, 3;
	shf.l.wrap.b32 	%r12432, %r12428, %r12427, 3;
	mov.b64 	%rd18667, {%r12432, %r12431};
	shr.u64 	%rd18668, %rd21811, 6;
	xor.b64  	%rd18669, %rd18666, %rd18668;
	xor.b64  	%rd18670, %rd18669, %rd18667;
	shr.u64 	%rd18671, %rd21814, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12433,%dummy}, %rd21814;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12434}, %rd21814;
	}
	shf.r.wrap.b32 	%r12435, %r12434, %r12433, 1;
	shf.r.wrap.b32 	%r12436, %r12433, %r12434, 1;
	mov.b64 	%rd18672, {%r12436, %r12435};
	xor.b64  	%rd18673, %rd18672, %rd18671;
	shf.r.wrap.b32 	%r12437, %r12434, %r12433, 8;
	shf.r.wrap.b32 	%r12438, %r12433, %r12434, 8;
	mov.b64 	%rd18674, {%r12438, %r12437};
	xor.b64  	%rd18675, %rd18673, %rd18674;
	add.s64 	%rd18676, %rd21813, %rd21791;
	add.s64 	%rd18677, %rd18676, %rd18670;
	add.s64 	%rd21813, %rd18677, %rd18675;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12439,%dummy}, %rd21812;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12440}, %rd21812;
	}
	shf.r.wrap.b32 	%r12441, %r12440, %r12439, 19;
	shf.r.wrap.b32 	%r12442, %r12439, %r12440, 19;
	mov.b64 	%rd18678, {%r12442, %r12441};
	shf.l.wrap.b32 	%r12443, %r12439, %r12440, 3;
	shf.l.wrap.b32 	%r12444, %r12440, %r12439, 3;
	mov.b64 	%rd18679, {%r12444, %r12443};
	shr.u64 	%rd18680, %rd21812, 6;
	xor.b64  	%rd18681, %rd18678, %rd18680;
	xor.b64  	%rd18682, %rd18681, %rd18679;
	shr.u64 	%rd18683, %rd21798, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12445,%dummy}, %rd21798;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12446}, %rd21798;
	}
	shf.r.wrap.b32 	%r12447, %r12446, %r12445, 1;
	shf.r.wrap.b32 	%r12448, %r12445, %r12446, 1;
	mov.b64 	%rd18684, {%r12448, %r12447};
	xor.b64  	%rd18685, %rd18684, %rd18683;
	shf.r.wrap.b32 	%r12449, %r12446, %r12445, 8;
	shf.r.wrap.b32 	%r12450, %r12445, %r12446, 8;
	mov.b64 	%rd18686, {%r12450, %r12449};
	xor.b64  	%rd18687, %rd18685, %rd18686;
	add.s64 	%rd18688, %rd21807, %rd21814;
	add.s64 	%rd18689, %rd18688, %rd18682;
	add.s64 	%rd21814, %rd18689, %rd18687;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12451,%dummy}, %rd21813;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12452}, %rd21813;
	}
	shf.r.wrap.b32 	%r12453, %r12452, %r12451, 19;
	shf.r.wrap.b32 	%r12454, %r12451, %r12452, 19;
	mov.b64 	%rd18690, {%r12454, %r12453};
	shf.l.wrap.b32 	%r12455, %r12451, %r12452, 3;
	shf.l.wrap.b32 	%r12456, %r12452, %r12451, 3;
	mov.b64 	%rd18691, {%r12456, %r12455};
	shr.u64 	%rd18692, %rd21813, 6;
	xor.b64  	%rd18693, %rd18690, %rd18692;
	xor.b64  	%rd18694, %rd18693, %rd18691;
	shr.u64 	%rd18695, %rd21797, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12457,%dummy}, %rd21797;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12458}, %rd21797;
	}
	shf.r.wrap.b32 	%r12459, %r12458, %r12457, 1;
	shf.r.wrap.b32 	%r12460, %r12457, %r12458, 1;
	mov.b64 	%rd18696, {%r12460, %r12459};
	xor.b64  	%rd18697, %rd18696, %rd18695;
	shf.r.wrap.b32 	%r12461, %r12458, %r12457, 8;
	shf.r.wrap.b32 	%r12462, %r12457, %r12458, 8;
	mov.b64 	%rd18698, {%r12462, %r12461};
	xor.b64  	%rd18699, %rd18697, %rd18698;
	add.s64 	%rd18700, %rd21808, %rd21798;
	add.s64 	%rd18701, %rd18700, %rd18694;
	add.s64 	%rd21798, %rd18701, %rd18699;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12463,%dummy}, %rd21814;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12464}, %rd21814;
	}
	shf.r.wrap.b32 	%r12465, %r12464, %r12463, 19;
	shf.r.wrap.b32 	%r12466, %r12463, %r12464, 19;
	mov.b64 	%rd18702, {%r12466, %r12465};
	shf.l.wrap.b32 	%r12467, %r12463, %r12464, 3;
	shf.l.wrap.b32 	%r12468, %r12464, %r12463, 3;
	mov.b64 	%rd18703, {%r12468, %r12467};
	shr.u64 	%rd18704, %rd21814, 6;
	xor.b64  	%rd18705, %rd18702, %rd18704;
	xor.b64  	%rd18706, %rd18705, %rd18703;
	shr.u64 	%rd18707, %rd21796, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12469,%dummy}, %rd21796;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12470}, %rd21796;
	}
	shf.r.wrap.b32 	%r12471, %r12470, %r12469, 1;
	shf.r.wrap.b32 	%r12472, %r12469, %r12470, 1;
	mov.b64 	%rd18708, {%r12472, %r12471};
	xor.b64  	%rd18709, %rd18708, %rd18707;
	shf.r.wrap.b32 	%r12473, %r12470, %r12469, 8;
	shf.r.wrap.b32 	%r12474, %r12469, %r12470, 8;
	mov.b64 	%rd18710, {%r12474, %r12473};
	xor.b64  	%rd18711, %rd18709, %rd18710;
	add.s64 	%rd18712, %rd21809, %rd21797;
	add.s64 	%rd18713, %rd18712, %rd18706;
	add.s64 	%rd21797, %rd18713, %rd18711;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12475,%dummy}, %rd21798;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12476}, %rd21798;
	}
	shf.r.wrap.b32 	%r12477, %r12476, %r12475, 19;
	shf.r.wrap.b32 	%r12478, %r12475, %r12476, 19;
	mov.b64 	%rd18714, {%r12478, %r12477};
	shf.l.wrap.b32 	%r12479, %r12475, %r12476, 3;
	shf.l.wrap.b32 	%r12480, %r12476, %r12475, 3;
	mov.b64 	%rd18715, {%r12480, %r12479};
	shr.u64 	%rd18716, %rd21798, 6;
	xor.b64  	%rd18717, %rd18714, %rd18716;
	xor.b64  	%rd18718, %rd18717, %rd18715;
	shr.u64 	%rd18719, %rd21795, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12481,%dummy}, %rd21795;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12482}, %rd21795;
	}
	shf.r.wrap.b32 	%r12483, %r12482, %r12481, 1;
	shf.r.wrap.b32 	%r12484, %r12481, %r12482, 1;
	mov.b64 	%rd18720, {%r12484, %r12483};
	xor.b64  	%rd18721, %rd18720, %rd18719;
	shf.r.wrap.b32 	%r12485, %r12482, %r12481, 8;
	shf.r.wrap.b32 	%r12486, %r12481, %r12482, 8;
	mov.b64 	%rd18722, {%r12486, %r12485};
	xor.b64  	%rd18723, %rd18721, %rd18722;
	add.s64 	%rd18724, %rd21810, %rd21796;
	add.s64 	%rd18725, %rd18724, %rd18718;
	add.s64 	%rd21796, %rd18725, %rd18723;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12487,%dummy}, %rd21797;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12488}, %rd21797;
	}
	shf.r.wrap.b32 	%r12489, %r12488, %r12487, 19;
	shf.r.wrap.b32 	%r12490, %r12487, %r12488, 19;
	mov.b64 	%rd18726, {%r12490, %r12489};
	shf.l.wrap.b32 	%r12491, %r12487, %r12488, 3;
	shf.l.wrap.b32 	%r12492, %r12488, %r12487, 3;
	mov.b64 	%rd18727, {%r12492, %r12491};
	shr.u64 	%rd18728, %rd21797, 6;
	xor.b64  	%rd18729, %rd18726, %rd18728;
	xor.b64  	%rd18730, %rd18729, %rd18727;
	shr.u64 	%rd18731, %rd21794, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12493,%dummy}, %rd21794;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12494}, %rd21794;
	}
	shf.r.wrap.b32 	%r12495, %r12494, %r12493, 1;
	shf.r.wrap.b32 	%r12496, %r12493, %r12494, 1;
	mov.b64 	%rd18732, {%r12496, %r12495};
	xor.b64  	%rd18733, %rd18732, %rd18731;
	shf.r.wrap.b32 	%r12497, %r12494, %r12493, 8;
	shf.r.wrap.b32 	%r12498, %r12493, %r12494, 8;
	mov.b64 	%rd18734, {%r12498, %r12497};
	xor.b64  	%rd18735, %rd18733, %rd18734;
	add.s64 	%rd18736, %rd21811, %rd21795;
	add.s64 	%rd18737, %rd18736, %rd18730;
	add.s64 	%rd21795, %rd18737, %rd18735;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12499,%dummy}, %rd21796;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12500}, %rd21796;
	}
	shf.r.wrap.b32 	%r12501, %r12500, %r12499, 19;
	shf.r.wrap.b32 	%r12502, %r12499, %r12500, 19;
	mov.b64 	%rd18738, {%r12502, %r12501};
	shf.l.wrap.b32 	%r12503, %r12499, %r12500, 3;
	shf.l.wrap.b32 	%r12504, %r12500, %r12499, 3;
	mov.b64 	%rd18739, {%r12504, %r12503};
	shr.u64 	%rd18740, %rd21796, 6;
	xor.b64  	%rd18741, %rd18738, %rd18740;
	xor.b64  	%rd18742, %rd18741, %rd18739;
	shr.u64 	%rd18743, %rd21793, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12505,%dummy}, %rd21793;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12506}, %rd21793;
	}
	shf.r.wrap.b32 	%r12507, %r12506, %r12505, 1;
	shf.r.wrap.b32 	%r12508, %r12505, %r12506, 1;
	mov.b64 	%rd18744, {%r12508, %r12507};
	xor.b64  	%rd18745, %rd18744, %rd18743;
	shf.r.wrap.b32 	%r12509, %r12506, %r12505, 8;
	shf.r.wrap.b32 	%r12510, %r12505, %r12506, 8;
	mov.b64 	%rd18746, {%r12510, %r12509};
	xor.b64  	%rd18747, %rd18745, %rd18746;
	add.s64 	%rd18748, %rd21812, %rd21794;
	add.s64 	%rd18749, %rd18748, %rd18742;
	add.s64 	%rd21794, %rd18749, %rd18747;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12511,%dummy}, %rd21795;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12512}, %rd21795;
	}
	shf.r.wrap.b32 	%r12513, %r12512, %r12511, 19;
	shf.r.wrap.b32 	%r12514, %r12511, %r12512, 19;
	mov.b64 	%rd18750, {%r12514, %r12513};
	shf.l.wrap.b32 	%r12515, %r12511, %r12512, 3;
	shf.l.wrap.b32 	%r12516, %r12512, %r12511, 3;
	mov.b64 	%rd18751, {%r12516, %r12515};
	shr.u64 	%rd18752, %rd21795, 6;
	xor.b64  	%rd18753, %rd18750, %rd18752;
	xor.b64  	%rd18754, %rd18753, %rd18751;
	shr.u64 	%rd18755, %rd21792, 7;
	shf.r.wrap.b32 	%r12517, %r12356, %r12355, 1;
	shf.r.wrap.b32 	%r12518, %r12355, %r12356, 1;
	mov.b64 	%rd18756, {%r12518, %r12517};
	xor.b64  	%rd18757, %rd18756, %rd18755;
	shf.r.wrap.b32 	%r12519, %r12356, %r12355, 8;
	shf.r.wrap.b32 	%r12520, %r12355, %r12356, 8;
	mov.b64 	%rd18758, {%r12520, %r12519};
	xor.b64  	%rd18759, %rd18757, %rd18758;
	add.s64 	%rd18760, %rd21813, %rd21793;
	add.s64 	%rd18761, %rd18760, %rd18754;
	add.s64 	%rd21793, %rd18761, %rd18759;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12521,%dummy}, %rd21794;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12522}, %rd21794;
	}
	shf.r.wrap.b32 	%r12523, %r12522, %r12521, 19;
	shf.r.wrap.b32 	%r12524, %r12521, %r12522, 19;
	mov.b64 	%rd18762, {%r12524, %r12523};
	shf.l.wrap.b32 	%r12525, %r12521, %r12522, 3;
	shf.l.wrap.b32 	%r12526, %r12522, %r12521, 3;
	mov.b64 	%rd18763, {%r12526, %r12525};
	shr.u64 	%rd18764, %rd21794, 6;
	xor.b64  	%rd18765, %rd18762, %rd18764;
	xor.b64  	%rd18766, %rd18765, %rd18763;
	shr.u64 	%rd18767, %rd21791, 7;
	shf.r.wrap.b32 	%r12527, %r12368, %r12367, 1;
	shf.r.wrap.b32 	%r12528, %r12367, %r12368, 1;
	mov.b64 	%rd18768, {%r12528, %r12527};
	xor.b64  	%rd18769, %rd18768, %rd18767;
	shf.r.wrap.b32 	%r12529, %r12368, %r12367, 8;
	shf.r.wrap.b32 	%r12530, %r12367, %r12368, 8;
	mov.b64 	%rd18770, {%r12530, %r12529};
	xor.b64  	%rd18771, %rd18769, %rd18770;
	add.s64 	%rd18772, %rd21814, %rd21792;
	add.s64 	%rd18773, %rd18772, %rd18766;
	add.s64 	%rd21792, %rd18773, %rd18771;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12531,%dummy}, %rd21793;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12532}, %rd21793;
	}
	shf.r.wrap.b32 	%r12533, %r12532, %r12531, 19;
	shf.r.wrap.b32 	%r12534, %r12531, %r12532, 19;
	mov.b64 	%rd18774, {%r12534, %r12533};
	shf.l.wrap.b32 	%r12535, %r12531, %r12532, 3;
	shf.l.wrap.b32 	%r12536, %r12532, %r12531, 3;
	mov.b64 	%rd18775, {%r12536, %r12535};
	shr.u64 	%rd18776, %rd21793, 6;
	xor.b64  	%rd18777, %rd18774, %rd18776;
	xor.b64  	%rd18778, %rd18777, %rd18775;
	shf.r.wrap.b32 	%r12537, %r12380, %r12379, 1;
	shf.r.wrap.b32 	%r12538, %r12379, %r12380, 1;
	mov.b64 	%rd18779, {%r12538, %r12537};
	shf.r.wrap.b32 	%r12539, %r12380, %r12379, 8;
	shf.r.wrap.b32 	%r12540, %r12379, %r12380, 8;
	mov.b64 	%rd18780, {%r12540, %r12539};
	shr.u64 	%rd18781, %rd21807, 7;
	xor.b64  	%rd18782, %rd18779, %rd18781;
	xor.b64  	%rd18783, %rd18782, %rd18780;
	add.s64 	%rd18784, %rd21798, %rd21791;
	add.s64 	%rd18785, %rd18784, %rd18778;
	add.s64 	%rd21791, %rd18785, %rd18783;
	mul.wide.s32 	%rd18786, %r14490, 8;
	mov.u64 	%rd18787, k_sha512;
	add.s64 	%rd18788, %rd18787, %rd18786;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12541,%dummy}, %rd21803;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12542}, %rd21803;
	}
	shf.r.wrap.b32 	%r12543, %r12542, %r12541, 18;
	shf.r.wrap.b32 	%r12544, %r12541, %r12542, 18;
	mov.b64 	%rd18789, {%r12544, %r12543};
	shf.r.wrap.b32 	%r12545, %r12542, %r12541, 14;
	shf.r.wrap.b32 	%r12546, %r12541, %r12542, 14;
	mov.b64 	%rd18790, {%r12546, %r12545};
	xor.b64  	%rd18791, %rd18789, %rd18790;
	shf.l.wrap.b32 	%r12547, %r12541, %r12542, 23;
	shf.l.wrap.b32 	%r12548, %r12542, %r12541, 23;
	mov.b64 	%rd18792, {%r12548, %r12547};
	xor.b64  	%rd18793, %rd18791, %rd18792;
	xor.b64  	%rd18794, %rd21805, %rd21804;
	and.b64  	%rd18795, %rd18794, %rd21803;
	xor.b64  	%rd18796, %rd18795, %rd21805;
	add.s64 	%rd18797, %rd18796, %rd21806;
	add.s64 	%rd18798, %rd18797, %rd21807;
	ld.const.u64 	%rd18799, [%rd18788];
	add.s64 	%rd18800, %rd18798, %rd18799;
	add.s64 	%rd18801, %rd18800, %rd18793;
	add.s64 	%rd18802, %rd18801, %rd21802;
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12549}, %rd21799;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12550,%dummy}, %rd21799;
	}
	shf.l.wrap.b32 	%r12551, %r12550, %r12549, 30;
	shf.l.wrap.b32 	%r12552, %r12549, %r12550, 30;
	mov.b64 	%rd18803, {%r12552, %r12551};
	shf.r.wrap.b32 	%r12553, %r12549, %r12550, 28;
	shf.r.wrap.b32 	%r12554, %r12550, %r12549, 28;
	mov.b64 	%rd18804, {%r12554, %r12553};
	xor.b64  	%rd18805, %rd18803, %rd18804;
	shf.l.wrap.b32 	%r12555, %r12550, %r12549, 25;
	shf.l.wrap.b32 	%r12556, %r12549, %r12550, 25;
	mov.b64 	%rd18806, {%r12556, %r12555};
	xor.b64  	%rd18807, %rd18805, %rd18806;
	xor.b64  	%rd18808, %rd21800, %rd21799;
	xor.b64  	%rd18809, %rd21801, %rd21799;
	and.b64  	%rd18810, %rd18809, %rd18808;
	xor.b64  	%rd18811, %rd18810, %rd21799;
	add.s64 	%rd18812, %rd18801, %rd18811;
	add.s64 	%rd18813, %rd18812, %rd18807;
	add.s32 	%r12557, %r14490, 1;
	mul.wide.s32 	%rd18814, %r12557, 8;
	add.s64 	%rd18815, %rd18787, %rd18814;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12558,%dummy}, %rd18802;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12559}, %rd18802;
	}
	shf.r.wrap.b32 	%r12560, %r12559, %r12558, 14;
	shf.r.wrap.b32 	%r12561, %r12558, %r12559, 14;
	mov.b64 	%rd18816, {%r12561, %r12560};
	shf.r.wrap.b32 	%r12562, %r12559, %r12558, 18;
	shf.r.wrap.b32 	%r12563, %r12558, %r12559, 18;
	mov.b64 	%rd18817, {%r12563, %r12562};
	xor.b64  	%rd18818, %rd18817, %rd18816;
	shf.l.wrap.b32 	%r12564, %r12558, %r12559, 23;
	shf.l.wrap.b32 	%r12565, %r12559, %r12558, 23;
	mov.b64 	%rd18819, {%r12565, %r12564};
	xor.b64  	%rd18820, %rd18818, %rd18819;
	xor.b64  	%rd18821, %rd21804, %rd21803;
	and.b64  	%rd18822, %rd18802, %rd18821;
	xor.b64  	%rd18823, %rd18822, %rd21804;
	add.s64 	%rd18824, %rd21808, %rd21805;
	ld.const.u64 	%rd18825, [%rd18815];
	add.s64 	%rd18826, %rd18824, %rd18825;
	add.s64 	%rd18827, %rd18826, %rd18823;
	add.s64 	%rd18828, %rd18827, %rd18820;
	add.s64 	%rd18829, %rd18828, %rd21801;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12566,%dummy}, %rd18813;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12567}, %rd18813;
	}
	shf.r.wrap.b32 	%r12568, %r12567, %r12566, 28;
	shf.r.wrap.b32 	%r12569, %r12566, %r12567, 28;
	mov.b64 	%rd18830, {%r12569, %r12568};
	shf.l.wrap.b32 	%r12570, %r12566, %r12567, 30;
	shf.l.wrap.b32 	%r12571, %r12567, %r12566, 30;
	mov.b64 	%rd18831, {%r12571, %r12570};
	xor.b64  	%rd18832, %rd18831, %rd18830;
	shf.l.wrap.b32 	%r12572, %r12566, %r12567, 25;
	shf.l.wrap.b32 	%r12573, %r12567, %r12566, 25;
	mov.b64 	%rd18833, {%r12573, %r12572};
	xor.b64  	%rd18834, %rd18832, %rd18833;
	xor.b64  	%rd18835, %rd18813, %rd21800;
	xor.b64  	%rd18836, %rd18813, %rd21799;
	and.b64  	%rd18837, %rd18836, %rd18835;
	xor.b64  	%rd18838, %rd18837, %rd18813;
	add.s64 	%rd18839, %rd18828, %rd18838;
	add.s64 	%rd18840, %rd18839, %rd18834;
	add.s32 	%r12574, %r14490, 2;
	mul.wide.s32 	%rd18841, %r12574, 8;
	add.s64 	%rd18842, %rd18787, %rd18841;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12575,%dummy}, %rd18829;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12576}, %rd18829;
	}
	shf.r.wrap.b32 	%r12577, %r12576, %r12575, 14;
	shf.r.wrap.b32 	%r12578, %r12575, %r12576, 14;
	mov.b64 	%rd18843, {%r12578, %r12577};
	shf.r.wrap.b32 	%r12579, %r12576, %r12575, 18;
	shf.r.wrap.b32 	%r12580, %r12575, %r12576, 18;
	mov.b64 	%rd18844, {%r12580, %r12579};
	xor.b64  	%rd18845, %rd18844, %rd18843;
	shf.l.wrap.b32 	%r12581, %r12575, %r12576, 23;
	shf.l.wrap.b32 	%r12582, %r12576, %r12575, 23;
	mov.b64 	%rd18846, {%r12582, %r12581};
	xor.b64  	%rd18847, %rd18845, %rd18846;
	xor.b64  	%rd18848, %rd18802, %rd21803;
	and.b64  	%rd18849, %rd18829, %rd18848;
	xor.b64  	%rd18850, %rd18849, %rd21803;
	add.s64 	%rd18851, %rd21809, %rd21804;
	ld.const.u64 	%rd18852, [%rd18842];
	add.s64 	%rd18853, %rd18851, %rd18852;
	add.s64 	%rd18854, %rd18853, %rd18850;
	add.s64 	%rd18855, %rd18854, %rd18847;
	add.s64 	%rd18856, %rd18855, %rd21800;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12583,%dummy}, %rd18840;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12584}, %rd18840;
	}
	shf.r.wrap.b32 	%r12585, %r12584, %r12583, 28;
	shf.r.wrap.b32 	%r12586, %r12583, %r12584, 28;
	mov.b64 	%rd18857, {%r12586, %r12585};
	shf.l.wrap.b32 	%r12587, %r12583, %r12584, 30;
	shf.l.wrap.b32 	%r12588, %r12584, %r12583, 30;
	mov.b64 	%rd18858, {%r12588, %r12587};
	xor.b64  	%rd18859, %rd18858, %rd18857;
	shf.l.wrap.b32 	%r12589, %r12583, %r12584, 25;
	shf.l.wrap.b32 	%r12590, %r12584, %r12583, 25;
	mov.b64 	%rd18860, {%r12590, %r12589};
	xor.b64  	%rd18861, %rd18859, %rd18860;
	xor.b64  	%rd18862, %rd18840, %rd21799;
	xor.b64  	%rd18863, %rd18840, %rd18813;
	and.b64  	%rd18864, %rd18863, %rd18862;
	xor.b64  	%rd18865, %rd18864, %rd18840;
	add.s64 	%rd18866, %rd18855, %rd18865;
	add.s64 	%rd18867, %rd18866, %rd18861;
	add.s32 	%r12591, %r14490, 3;
	mul.wide.s32 	%rd18868, %r12591, 8;
	add.s64 	%rd18869, %rd18787, %rd18868;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12592,%dummy}, %rd18856;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12593}, %rd18856;
	}
	shf.r.wrap.b32 	%r12594, %r12593, %r12592, 14;
	shf.r.wrap.b32 	%r12595, %r12592, %r12593, 14;
	mov.b64 	%rd18870, {%r12595, %r12594};
	shf.r.wrap.b32 	%r12596, %r12593, %r12592, 18;
	shf.r.wrap.b32 	%r12597, %r12592, %r12593, 18;
	mov.b64 	%rd18871, {%r12597, %r12596};
	xor.b64  	%rd18872, %rd18871, %rd18870;
	shf.l.wrap.b32 	%r12598, %r12592, %r12593, 23;
	shf.l.wrap.b32 	%r12599, %r12593, %r12592, 23;
	mov.b64 	%rd18873, {%r12599, %r12598};
	xor.b64  	%rd18874, %rd18872, %rd18873;
	xor.b64  	%rd18875, %rd18829, %rd18802;
	and.b64  	%rd18876, %rd18856, %rd18875;
	xor.b64  	%rd18877, %rd18876, %rd18802;
	add.s64 	%rd18878, %rd21810, %rd21803;
	ld.const.u64 	%rd18879, [%rd18869];
	add.s64 	%rd18880, %rd18878, %rd18879;
	add.s64 	%rd18881, %rd18880, %rd18877;
	add.s64 	%rd18882, %rd18881, %rd18874;
	add.s64 	%rd18883, %rd18882, %rd21799;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12600,%dummy}, %rd18867;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12601}, %rd18867;
	}
	shf.r.wrap.b32 	%r12602, %r12601, %r12600, 28;
	shf.r.wrap.b32 	%r12603, %r12600, %r12601, 28;
	mov.b64 	%rd18884, {%r12603, %r12602};
	shf.l.wrap.b32 	%r12604, %r12600, %r12601, 30;
	shf.l.wrap.b32 	%r12605, %r12601, %r12600, 30;
	mov.b64 	%rd18885, {%r12605, %r12604};
	xor.b64  	%rd18886, %rd18885, %rd18884;
	shf.l.wrap.b32 	%r12606, %r12600, %r12601, 25;
	shf.l.wrap.b32 	%r12607, %r12601, %r12600, 25;
	mov.b64 	%rd18887, {%r12607, %r12606};
	xor.b64  	%rd18888, %rd18886, %rd18887;
	xor.b64  	%rd18889, %rd18867, %rd18813;
	xor.b64  	%rd18890, %rd18867, %rd18840;
	and.b64  	%rd18891, %rd18890, %rd18889;
	xor.b64  	%rd18892, %rd18891, %rd18867;
	add.s64 	%rd18893, %rd18882, %rd18892;
	add.s64 	%rd18894, %rd18893, %rd18888;
	add.s32 	%r12608, %r14490, 4;
	mul.wide.s32 	%rd18895, %r12608, 8;
	add.s64 	%rd18896, %rd18787, %rd18895;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12609,%dummy}, %rd18883;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12610}, %rd18883;
	}
	shf.r.wrap.b32 	%r12611, %r12610, %r12609, 14;
	shf.r.wrap.b32 	%r12612, %r12609, %r12610, 14;
	mov.b64 	%rd18897, {%r12612, %r12611};
	shf.r.wrap.b32 	%r12613, %r12610, %r12609, 18;
	shf.r.wrap.b32 	%r12614, %r12609, %r12610, 18;
	mov.b64 	%rd18898, {%r12614, %r12613};
	xor.b64  	%rd18899, %rd18898, %rd18897;
	shf.l.wrap.b32 	%r12615, %r12609, %r12610, 23;
	shf.l.wrap.b32 	%r12616, %r12610, %r12609, 23;
	mov.b64 	%rd18900, {%r12616, %r12615};
	xor.b64  	%rd18901, %rd18899, %rd18900;
	xor.b64  	%rd18902, %rd18856, %rd18829;
	and.b64  	%rd18903, %rd18883, %rd18902;
	xor.b64  	%rd18904, %rd18903, %rd18829;
	add.s64 	%rd18905, %rd18802, %rd21811;
	ld.const.u64 	%rd18906, [%rd18896];
	add.s64 	%rd18907, %rd18905, %rd18906;
	add.s64 	%rd18908, %rd18907, %rd18904;
	add.s64 	%rd18909, %rd18908, %rd18901;
	add.s64 	%rd18910, %rd18909, %rd18813;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12617,%dummy}, %rd18894;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12618}, %rd18894;
	}
	shf.r.wrap.b32 	%r12619, %r12618, %r12617, 28;
	shf.r.wrap.b32 	%r12620, %r12617, %r12618, 28;
	mov.b64 	%rd18911, {%r12620, %r12619};
	shf.l.wrap.b32 	%r12621, %r12617, %r12618, 30;
	shf.l.wrap.b32 	%r12622, %r12618, %r12617, 30;
	mov.b64 	%rd18912, {%r12622, %r12621};
	xor.b64  	%rd18913, %rd18912, %rd18911;
	shf.l.wrap.b32 	%r12623, %r12617, %r12618, 25;
	shf.l.wrap.b32 	%r12624, %r12618, %r12617, 25;
	mov.b64 	%rd18914, {%r12624, %r12623};
	xor.b64  	%rd18915, %rd18913, %rd18914;
	xor.b64  	%rd18916, %rd18894, %rd18840;
	xor.b64  	%rd18917, %rd18894, %rd18867;
	and.b64  	%rd18918, %rd18917, %rd18916;
	xor.b64  	%rd18919, %rd18918, %rd18894;
	add.s64 	%rd18920, %rd18909, %rd18919;
	add.s64 	%rd18921, %rd18920, %rd18915;
	add.s32 	%r12625, %r14490, 5;
	mul.wide.s32 	%rd18922, %r12625, 8;
	add.s64 	%rd18923, %rd18787, %rd18922;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12626,%dummy}, %rd18910;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12627}, %rd18910;
	}
	shf.r.wrap.b32 	%r12628, %r12627, %r12626, 14;
	shf.r.wrap.b32 	%r12629, %r12626, %r12627, 14;
	mov.b64 	%rd18924, {%r12629, %r12628};
	shf.r.wrap.b32 	%r12630, %r12627, %r12626, 18;
	shf.r.wrap.b32 	%r12631, %r12626, %r12627, 18;
	mov.b64 	%rd18925, {%r12631, %r12630};
	xor.b64  	%rd18926, %rd18925, %rd18924;
	shf.l.wrap.b32 	%r12632, %r12626, %r12627, 23;
	shf.l.wrap.b32 	%r12633, %r12627, %r12626, 23;
	mov.b64 	%rd18927, {%r12633, %r12632};
	xor.b64  	%rd18928, %rd18926, %rd18927;
	xor.b64  	%rd18929, %rd18883, %rd18856;
	and.b64  	%rd18930, %rd18910, %rd18929;
	xor.b64  	%rd18931, %rd18930, %rd18856;
	add.s64 	%rd18932, %rd18829, %rd21812;
	ld.const.u64 	%rd18933, [%rd18923];
	add.s64 	%rd18934, %rd18932, %rd18933;
	add.s64 	%rd18935, %rd18934, %rd18931;
	add.s64 	%rd18936, %rd18935, %rd18928;
	add.s64 	%rd18937, %rd18936, %rd18840;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12634,%dummy}, %rd18921;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12635}, %rd18921;
	}
	shf.r.wrap.b32 	%r12636, %r12635, %r12634, 28;
	shf.r.wrap.b32 	%r12637, %r12634, %r12635, 28;
	mov.b64 	%rd18938, {%r12637, %r12636};
	shf.l.wrap.b32 	%r12638, %r12634, %r12635, 30;
	shf.l.wrap.b32 	%r12639, %r12635, %r12634, 30;
	mov.b64 	%rd18939, {%r12639, %r12638};
	xor.b64  	%rd18940, %rd18939, %rd18938;
	shf.l.wrap.b32 	%r12640, %r12634, %r12635, 25;
	shf.l.wrap.b32 	%r12641, %r12635, %r12634, 25;
	mov.b64 	%rd18941, {%r12641, %r12640};
	xor.b64  	%rd18942, %rd18940, %rd18941;
	xor.b64  	%rd18943, %rd18921, %rd18867;
	xor.b64  	%rd18944, %rd18921, %rd18894;
	and.b64  	%rd18945, %rd18944, %rd18943;
	xor.b64  	%rd18946, %rd18945, %rd18921;
	add.s64 	%rd18947, %rd18936, %rd18946;
	add.s64 	%rd18948, %rd18947, %rd18942;
	add.s32 	%r12642, %r14490, 6;
	mul.wide.s32 	%rd18949, %r12642, 8;
	add.s64 	%rd18950, %rd18787, %rd18949;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12643,%dummy}, %rd18937;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12644}, %rd18937;
	}
	shf.r.wrap.b32 	%r12645, %r12644, %r12643, 14;
	shf.r.wrap.b32 	%r12646, %r12643, %r12644, 14;
	mov.b64 	%rd18951, {%r12646, %r12645};
	shf.r.wrap.b32 	%r12647, %r12644, %r12643, 18;
	shf.r.wrap.b32 	%r12648, %r12643, %r12644, 18;
	mov.b64 	%rd18952, {%r12648, %r12647};
	xor.b64  	%rd18953, %rd18952, %rd18951;
	shf.l.wrap.b32 	%r12649, %r12643, %r12644, 23;
	shf.l.wrap.b32 	%r12650, %r12644, %r12643, 23;
	mov.b64 	%rd18954, {%r12650, %r12649};
	xor.b64  	%rd18955, %rd18953, %rd18954;
	xor.b64  	%rd18956, %rd18910, %rd18883;
	and.b64  	%rd18957, %rd18937, %rd18956;
	xor.b64  	%rd18958, %rd18957, %rd18883;
	add.s64 	%rd18959, %rd18856, %rd21813;
	ld.const.u64 	%rd18960, [%rd18950];
	add.s64 	%rd18961, %rd18959, %rd18960;
	add.s64 	%rd18962, %rd18961, %rd18958;
	add.s64 	%rd18963, %rd18962, %rd18955;
	add.s64 	%rd18964, %rd18963, %rd18867;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12651,%dummy}, %rd18948;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12652}, %rd18948;
	}
	shf.r.wrap.b32 	%r12653, %r12652, %r12651, 28;
	shf.r.wrap.b32 	%r12654, %r12651, %r12652, 28;
	mov.b64 	%rd18965, {%r12654, %r12653};
	shf.l.wrap.b32 	%r12655, %r12651, %r12652, 30;
	shf.l.wrap.b32 	%r12656, %r12652, %r12651, 30;
	mov.b64 	%rd18966, {%r12656, %r12655};
	xor.b64  	%rd18967, %rd18966, %rd18965;
	shf.l.wrap.b32 	%r12657, %r12651, %r12652, 25;
	shf.l.wrap.b32 	%r12658, %r12652, %r12651, 25;
	mov.b64 	%rd18968, {%r12658, %r12657};
	xor.b64  	%rd18969, %rd18967, %rd18968;
	xor.b64  	%rd18970, %rd18948, %rd18894;
	xor.b64  	%rd18971, %rd18948, %rd18921;
	and.b64  	%rd18972, %rd18971, %rd18970;
	xor.b64  	%rd18973, %rd18972, %rd18948;
	add.s64 	%rd18974, %rd18963, %rd18973;
	add.s64 	%rd18975, %rd18974, %rd18969;
	add.s32 	%r12659, %r14490, 7;
	mul.wide.s32 	%rd18976, %r12659, 8;
	add.s64 	%rd18977, %rd18787, %rd18976;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12660,%dummy}, %rd18964;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12661}, %rd18964;
	}
	shf.r.wrap.b32 	%r12662, %r12661, %r12660, 14;
	shf.r.wrap.b32 	%r12663, %r12660, %r12661, 14;
	mov.b64 	%rd18978, {%r12663, %r12662};
	shf.r.wrap.b32 	%r12664, %r12661, %r12660, 18;
	shf.r.wrap.b32 	%r12665, %r12660, %r12661, 18;
	mov.b64 	%rd18979, {%r12665, %r12664};
	xor.b64  	%rd18980, %rd18979, %rd18978;
	shf.l.wrap.b32 	%r12666, %r12660, %r12661, 23;
	shf.l.wrap.b32 	%r12667, %r12661, %r12660, 23;
	mov.b64 	%rd18981, {%r12667, %r12666};
	xor.b64  	%rd18982, %rd18980, %rd18981;
	xor.b64  	%rd18983, %rd18937, %rd18910;
	and.b64  	%rd18984, %rd18964, %rd18983;
	xor.b64  	%rd18985, %rd18984, %rd18910;
	add.s64 	%rd18986, %rd18883, %rd21814;
	ld.const.u64 	%rd18987, [%rd18977];
	add.s64 	%rd18988, %rd18986, %rd18987;
	add.s64 	%rd18989, %rd18988, %rd18985;
	add.s64 	%rd18990, %rd18989, %rd18982;
	add.s64 	%rd18991, %rd18990, %rd18894;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12668,%dummy}, %rd18975;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12669}, %rd18975;
	}
	shf.r.wrap.b32 	%r12670, %r12669, %r12668, 28;
	shf.r.wrap.b32 	%r12671, %r12668, %r12669, 28;
	mov.b64 	%rd18992, {%r12671, %r12670};
	shf.l.wrap.b32 	%r12672, %r12668, %r12669, 30;
	shf.l.wrap.b32 	%r12673, %r12669, %r12668, 30;
	mov.b64 	%rd18993, {%r12673, %r12672};
	xor.b64  	%rd18994, %rd18993, %rd18992;
	shf.l.wrap.b32 	%r12674, %r12668, %r12669, 25;
	shf.l.wrap.b32 	%r12675, %r12669, %r12668, 25;
	mov.b64 	%rd18995, {%r12675, %r12674};
	xor.b64  	%rd18996, %rd18994, %rd18995;
	xor.b64  	%rd18997, %rd18975, %rd18921;
	xor.b64  	%rd18998, %rd18975, %rd18948;
	and.b64  	%rd18999, %rd18998, %rd18997;
	xor.b64  	%rd19000, %rd18999, %rd18975;
	add.s64 	%rd19001, %rd18990, %rd19000;
	add.s64 	%rd19002, %rd19001, %rd18996;
	add.s32 	%r12676, %r14490, 8;
	mul.wide.s32 	%rd19003, %r12676, 8;
	add.s64 	%rd19004, %rd18787, %rd19003;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12677,%dummy}, %rd18991;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12678}, %rd18991;
	}
	shf.r.wrap.b32 	%r12679, %r12678, %r12677, 14;
	shf.r.wrap.b32 	%r12680, %r12677, %r12678, 14;
	mov.b64 	%rd19005, {%r12680, %r12679};
	shf.r.wrap.b32 	%r12681, %r12678, %r12677, 18;
	shf.r.wrap.b32 	%r12682, %r12677, %r12678, 18;
	mov.b64 	%rd19006, {%r12682, %r12681};
	xor.b64  	%rd19007, %rd19006, %rd19005;
	shf.l.wrap.b32 	%r12683, %r12677, %r12678, 23;
	shf.l.wrap.b32 	%r12684, %r12678, %r12677, 23;
	mov.b64 	%rd19008, {%r12684, %r12683};
	xor.b64  	%rd19009, %rd19007, %rd19008;
	xor.b64  	%rd19010, %rd18964, %rd18937;
	and.b64  	%rd19011, %rd18991, %rd19010;
	xor.b64  	%rd19012, %rd19011, %rd18937;
	add.s64 	%rd19013, %rd18910, %rd21798;
	ld.const.u64 	%rd19014, [%rd19004];
	add.s64 	%rd19015, %rd19013, %rd19014;
	add.s64 	%rd19016, %rd19015, %rd19012;
	add.s64 	%rd19017, %rd19016, %rd19009;
	add.s64 	%rd19018, %rd19017, %rd18921;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12685,%dummy}, %rd19002;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12686}, %rd19002;
	}
	shf.r.wrap.b32 	%r12687, %r12686, %r12685, 28;
	shf.r.wrap.b32 	%r12688, %r12685, %r12686, 28;
	mov.b64 	%rd19019, {%r12688, %r12687};
	shf.l.wrap.b32 	%r12689, %r12685, %r12686, 30;
	shf.l.wrap.b32 	%r12690, %r12686, %r12685, 30;
	mov.b64 	%rd19020, {%r12690, %r12689};
	xor.b64  	%rd19021, %rd19020, %rd19019;
	shf.l.wrap.b32 	%r12691, %r12685, %r12686, 25;
	shf.l.wrap.b32 	%r12692, %r12686, %r12685, 25;
	mov.b64 	%rd19022, {%r12692, %r12691};
	xor.b64  	%rd19023, %rd19021, %rd19022;
	xor.b64  	%rd19024, %rd19002, %rd18948;
	xor.b64  	%rd19025, %rd19002, %rd18975;
	and.b64  	%rd19026, %rd19025, %rd19024;
	xor.b64  	%rd19027, %rd19026, %rd19002;
	add.s64 	%rd19028, %rd19017, %rd19027;
	add.s64 	%rd19029, %rd19028, %rd19023;
	add.s32 	%r12693, %r14490, 9;
	mul.wide.s32 	%rd19030, %r12693, 8;
	add.s64 	%rd19031, %rd18787, %rd19030;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12694,%dummy}, %rd19018;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12695}, %rd19018;
	}
	shf.r.wrap.b32 	%r12696, %r12695, %r12694, 14;
	shf.r.wrap.b32 	%r12697, %r12694, %r12695, 14;
	mov.b64 	%rd19032, {%r12697, %r12696};
	shf.r.wrap.b32 	%r12698, %r12695, %r12694, 18;
	shf.r.wrap.b32 	%r12699, %r12694, %r12695, 18;
	mov.b64 	%rd19033, {%r12699, %r12698};
	xor.b64  	%rd19034, %rd19033, %rd19032;
	shf.l.wrap.b32 	%r12700, %r12694, %r12695, 23;
	shf.l.wrap.b32 	%r12701, %r12695, %r12694, 23;
	mov.b64 	%rd19035, {%r12701, %r12700};
	xor.b64  	%rd19036, %rd19034, %rd19035;
	xor.b64  	%rd19037, %rd18991, %rd18964;
	and.b64  	%rd19038, %rd19018, %rd19037;
	xor.b64  	%rd19039, %rd19038, %rd18964;
	add.s64 	%rd19040, %rd18937, %rd21797;
	ld.const.u64 	%rd19041, [%rd19031];
	add.s64 	%rd19042, %rd19040, %rd19041;
	add.s64 	%rd19043, %rd19042, %rd19039;
	add.s64 	%rd19044, %rd19043, %rd19036;
	add.s64 	%rd19045, %rd19044, %rd18948;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12702,%dummy}, %rd19029;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12703}, %rd19029;
	}
	shf.r.wrap.b32 	%r12704, %r12703, %r12702, 28;
	shf.r.wrap.b32 	%r12705, %r12702, %r12703, 28;
	mov.b64 	%rd19046, {%r12705, %r12704};
	shf.l.wrap.b32 	%r12706, %r12702, %r12703, 30;
	shf.l.wrap.b32 	%r12707, %r12703, %r12702, 30;
	mov.b64 	%rd19047, {%r12707, %r12706};
	xor.b64  	%rd19048, %rd19047, %rd19046;
	shf.l.wrap.b32 	%r12708, %r12702, %r12703, 25;
	shf.l.wrap.b32 	%r12709, %r12703, %r12702, 25;
	mov.b64 	%rd19049, {%r12709, %r12708};
	xor.b64  	%rd19050, %rd19048, %rd19049;
	xor.b64  	%rd19051, %rd19029, %rd18975;
	xor.b64  	%rd19052, %rd19029, %rd19002;
	and.b64  	%rd19053, %rd19052, %rd19051;
	xor.b64  	%rd19054, %rd19053, %rd19029;
	add.s64 	%rd19055, %rd19044, %rd19054;
	add.s64 	%rd19056, %rd19055, %rd19050;
	add.s32 	%r12710, %r14490, 10;
	mul.wide.s32 	%rd19057, %r12710, 8;
	add.s64 	%rd19058, %rd18787, %rd19057;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12711,%dummy}, %rd19045;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12712}, %rd19045;
	}
	shf.r.wrap.b32 	%r12713, %r12712, %r12711, 14;
	shf.r.wrap.b32 	%r12714, %r12711, %r12712, 14;
	mov.b64 	%rd19059, {%r12714, %r12713};
	shf.r.wrap.b32 	%r12715, %r12712, %r12711, 18;
	shf.r.wrap.b32 	%r12716, %r12711, %r12712, 18;
	mov.b64 	%rd19060, {%r12716, %r12715};
	xor.b64  	%rd19061, %rd19060, %rd19059;
	shf.l.wrap.b32 	%r12717, %r12711, %r12712, 23;
	shf.l.wrap.b32 	%r12718, %r12712, %r12711, 23;
	mov.b64 	%rd19062, {%r12718, %r12717};
	xor.b64  	%rd19063, %rd19061, %rd19062;
	xor.b64  	%rd19064, %rd19018, %rd18991;
	and.b64  	%rd19065, %rd19045, %rd19064;
	xor.b64  	%rd19066, %rd19065, %rd18991;
	add.s64 	%rd19067, %rd18964, %rd21796;
	ld.const.u64 	%rd19068, [%rd19058];
	add.s64 	%rd19069, %rd19067, %rd19068;
	add.s64 	%rd19070, %rd19069, %rd19066;
	add.s64 	%rd19071, %rd19070, %rd19063;
	add.s64 	%rd19072, %rd19071, %rd18975;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12719,%dummy}, %rd19056;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12720}, %rd19056;
	}
	shf.r.wrap.b32 	%r12721, %r12720, %r12719, 28;
	shf.r.wrap.b32 	%r12722, %r12719, %r12720, 28;
	mov.b64 	%rd19073, {%r12722, %r12721};
	shf.l.wrap.b32 	%r12723, %r12719, %r12720, 30;
	shf.l.wrap.b32 	%r12724, %r12720, %r12719, 30;
	mov.b64 	%rd19074, {%r12724, %r12723};
	xor.b64  	%rd19075, %rd19074, %rd19073;
	shf.l.wrap.b32 	%r12725, %r12719, %r12720, 25;
	shf.l.wrap.b32 	%r12726, %r12720, %r12719, 25;
	mov.b64 	%rd19076, {%r12726, %r12725};
	xor.b64  	%rd19077, %rd19075, %rd19076;
	xor.b64  	%rd19078, %rd19056, %rd19002;
	xor.b64  	%rd19079, %rd19056, %rd19029;
	and.b64  	%rd19080, %rd19079, %rd19078;
	xor.b64  	%rd19081, %rd19080, %rd19056;
	add.s64 	%rd19082, %rd19071, %rd19081;
	add.s64 	%rd19083, %rd19082, %rd19077;
	add.s32 	%r12727, %r14490, 11;
	mul.wide.s32 	%rd19084, %r12727, 8;
	add.s64 	%rd19085, %rd18787, %rd19084;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12728,%dummy}, %rd19072;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12729}, %rd19072;
	}
	shf.r.wrap.b32 	%r12730, %r12729, %r12728, 14;
	shf.r.wrap.b32 	%r12731, %r12728, %r12729, 14;
	mov.b64 	%rd19086, {%r12731, %r12730};
	shf.r.wrap.b32 	%r12732, %r12729, %r12728, 18;
	shf.r.wrap.b32 	%r12733, %r12728, %r12729, 18;
	mov.b64 	%rd19087, {%r12733, %r12732};
	xor.b64  	%rd19088, %rd19087, %rd19086;
	shf.l.wrap.b32 	%r12734, %r12728, %r12729, 23;
	shf.l.wrap.b32 	%r12735, %r12729, %r12728, 23;
	mov.b64 	%rd19089, {%r12735, %r12734};
	xor.b64  	%rd19090, %rd19088, %rd19089;
	xor.b64  	%rd19091, %rd19045, %rd19018;
	and.b64  	%rd19092, %rd19072, %rd19091;
	xor.b64  	%rd19093, %rd19092, %rd19018;
	add.s64 	%rd19094, %rd18991, %rd21795;
	ld.const.u64 	%rd19095, [%rd19085];
	add.s64 	%rd19096, %rd19094, %rd19095;
	add.s64 	%rd19097, %rd19096, %rd19093;
	add.s64 	%rd19098, %rd19097, %rd19090;
	add.s64 	%rd19099, %rd19098, %rd19002;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12736,%dummy}, %rd19083;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12737}, %rd19083;
	}
	shf.r.wrap.b32 	%r12738, %r12737, %r12736, 28;
	shf.r.wrap.b32 	%r12739, %r12736, %r12737, 28;
	mov.b64 	%rd19100, {%r12739, %r12738};
	shf.l.wrap.b32 	%r12740, %r12736, %r12737, 30;
	shf.l.wrap.b32 	%r12741, %r12737, %r12736, 30;
	mov.b64 	%rd19101, {%r12741, %r12740};
	xor.b64  	%rd19102, %rd19101, %rd19100;
	shf.l.wrap.b32 	%r12742, %r12736, %r12737, 25;
	shf.l.wrap.b32 	%r12743, %r12737, %r12736, 25;
	mov.b64 	%rd19103, {%r12743, %r12742};
	xor.b64  	%rd19104, %rd19102, %rd19103;
	xor.b64  	%rd19105, %rd19083, %rd19029;
	xor.b64  	%rd19106, %rd19083, %rd19056;
	and.b64  	%rd19107, %rd19106, %rd19105;
	xor.b64  	%rd19108, %rd19107, %rd19083;
	add.s64 	%rd19109, %rd19098, %rd19108;
	add.s64 	%rd19110, %rd19109, %rd19104;
	add.s32 	%r12744, %r14490, 12;
	mul.wide.s32 	%rd19111, %r12744, 8;
	add.s64 	%rd19112, %rd18787, %rd19111;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12745,%dummy}, %rd19099;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12746}, %rd19099;
	}
	shf.r.wrap.b32 	%r12747, %r12746, %r12745, 14;
	shf.r.wrap.b32 	%r12748, %r12745, %r12746, 14;
	mov.b64 	%rd19113, {%r12748, %r12747};
	shf.r.wrap.b32 	%r12749, %r12746, %r12745, 18;
	shf.r.wrap.b32 	%r12750, %r12745, %r12746, 18;
	mov.b64 	%rd19114, {%r12750, %r12749};
	xor.b64  	%rd19115, %rd19114, %rd19113;
	shf.l.wrap.b32 	%r12751, %r12745, %r12746, 23;
	shf.l.wrap.b32 	%r12752, %r12746, %r12745, 23;
	mov.b64 	%rd19116, {%r12752, %r12751};
	xor.b64  	%rd19117, %rd19115, %rd19116;
	xor.b64  	%rd19118, %rd19072, %rd19045;
	and.b64  	%rd19119, %rd19099, %rd19118;
	xor.b64  	%rd19120, %rd19119, %rd19045;
	add.s64 	%rd19121, %rd19018, %rd21794;
	ld.const.u64 	%rd19122, [%rd19112];
	add.s64 	%rd19123, %rd19121, %rd19122;
	add.s64 	%rd19124, %rd19123, %rd19120;
	add.s64 	%rd19125, %rd19124, %rd19117;
	add.s64 	%rd21806, %rd19125, %rd19029;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12753,%dummy}, %rd19110;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12754}, %rd19110;
	}
	shf.r.wrap.b32 	%r12755, %r12754, %r12753, 28;
	shf.r.wrap.b32 	%r12756, %r12753, %r12754, 28;
	mov.b64 	%rd19126, {%r12756, %r12755};
	shf.l.wrap.b32 	%r12757, %r12753, %r12754, 30;
	shf.l.wrap.b32 	%r12758, %r12754, %r12753, 30;
	mov.b64 	%rd19127, {%r12758, %r12757};
	xor.b64  	%rd19128, %rd19127, %rd19126;
	shf.l.wrap.b32 	%r12759, %r12753, %r12754, 25;
	shf.l.wrap.b32 	%r12760, %r12754, %r12753, 25;
	mov.b64 	%rd19129, {%r12760, %r12759};
	xor.b64  	%rd19130, %rd19128, %rd19129;
	xor.b64  	%rd19131, %rd19110, %rd19056;
	xor.b64  	%rd19132, %rd19110, %rd19083;
	and.b64  	%rd19133, %rd19132, %rd19131;
	xor.b64  	%rd19134, %rd19133, %rd19110;
	add.s64 	%rd19135, %rd19125, %rd19134;
	add.s64 	%rd21802, %rd19135, %rd19130;
	add.s32 	%r12761, %r14490, 13;
	mul.wide.s32 	%rd19136, %r12761, 8;
	add.s64 	%rd19137, %rd18787, %rd19136;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12762,%dummy}, %rd21806;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12763}, %rd21806;
	}
	shf.r.wrap.b32 	%r12764, %r12763, %r12762, 14;
	shf.r.wrap.b32 	%r12765, %r12762, %r12763, 14;
	mov.b64 	%rd19138, {%r12765, %r12764};
	shf.r.wrap.b32 	%r12766, %r12763, %r12762, 18;
	shf.r.wrap.b32 	%r12767, %r12762, %r12763, 18;
	mov.b64 	%rd19139, {%r12767, %r12766};
	xor.b64  	%rd19140, %rd19139, %rd19138;
	shf.l.wrap.b32 	%r12768, %r12762, %r12763, 23;
	shf.l.wrap.b32 	%r12769, %r12763, %r12762, 23;
	mov.b64 	%rd19141, {%r12769, %r12768};
	xor.b64  	%rd19142, %rd19140, %rd19141;
	xor.b64  	%rd19143, %rd19099, %rd19072;
	and.b64  	%rd19144, %rd21806, %rd19143;
	xor.b64  	%rd19145, %rd19144, %rd19072;
	add.s64 	%rd19146, %rd19045, %rd21793;
	ld.const.u64 	%rd19147, [%rd19137];
	add.s64 	%rd19148, %rd19146, %rd19147;
	add.s64 	%rd19149, %rd19148, %rd19145;
	add.s64 	%rd19150, %rd19149, %rd19142;
	add.s64 	%rd21805, %rd19150, %rd19056;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12770,%dummy}, %rd21802;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12771}, %rd21802;
	}
	shf.r.wrap.b32 	%r12772, %r12771, %r12770, 28;
	shf.r.wrap.b32 	%r12773, %r12770, %r12771, 28;
	mov.b64 	%rd19151, {%r12773, %r12772};
	shf.l.wrap.b32 	%r12774, %r12770, %r12771, 30;
	shf.l.wrap.b32 	%r12775, %r12771, %r12770, 30;
	mov.b64 	%rd19152, {%r12775, %r12774};
	xor.b64  	%rd19153, %rd19152, %rd19151;
	shf.l.wrap.b32 	%r12776, %r12770, %r12771, 25;
	shf.l.wrap.b32 	%r12777, %r12771, %r12770, 25;
	mov.b64 	%rd19154, {%r12777, %r12776};
	xor.b64  	%rd19155, %rd19153, %rd19154;
	xor.b64  	%rd19156, %rd21802, %rd19083;
	xor.b64  	%rd19157, %rd21802, %rd19110;
	and.b64  	%rd19158, %rd19157, %rd19156;
	xor.b64  	%rd19159, %rd19158, %rd21802;
	add.s64 	%rd19160, %rd19150, %rd19159;
	add.s64 	%rd21801, %rd19160, %rd19155;
	add.s32 	%r12778, %r14490, 14;
	mul.wide.s32 	%rd19161, %r12778, 8;
	add.s64 	%rd19162, %rd18787, %rd19161;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12779,%dummy}, %rd21805;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12780}, %rd21805;
	}
	shf.r.wrap.b32 	%r12781, %r12780, %r12779, 14;
	shf.r.wrap.b32 	%r12782, %r12779, %r12780, 14;
	mov.b64 	%rd19163, {%r12782, %r12781};
	shf.r.wrap.b32 	%r12783, %r12780, %r12779, 18;
	shf.r.wrap.b32 	%r12784, %r12779, %r12780, 18;
	mov.b64 	%rd19164, {%r12784, %r12783};
	xor.b64  	%rd19165, %rd19164, %rd19163;
	shf.l.wrap.b32 	%r12785, %r12779, %r12780, 23;
	shf.l.wrap.b32 	%r12786, %r12780, %r12779, 23;
	mov.b64 	%rd19166, {%r12786, %r12785};
	xor.b64  	%rd19167, %rd19165, %rd19166;
	xor.b64  	%rd19168, %rd21806, %rd19099;
	and.b64  	%rd19169, %rd21805, %rd19168;
	xor.b64  	%rd19170, %rd19169, %rd19099;
	add.s64 	%rd19171, %rd19072, %rd21792;
	ld.const.u64 	%rd19172, [%rd19162];
	add.s64 	%rd19173, %rd19171, %rd19172;
	add.s64 	%rd19174, %rd19173, %rd19170;
	add.s64 	%rd19175, %rd19174, %rd19167;
	add.s64 	%rd21804, %rd19175, %rd19083;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12787,%dummy}, %rd21801;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12788}, %rd21801;
	}
	shf.r.wrap.b32 	%r12789, %r12788, %r12787, 28;
	shf.r.wrap.b32 	%r12790, %r12787, %r12788, 28;
	mov.b64 	%rd19176, {%r12790, %r12789};
	shf.l.wrap.b32 	%r12791, %r12787, %r12788, 30;
	shf.l.wrap.b32 	%r12792, %r12788, %r12787, 30;
	mov.b64 	%rd19177, {%r12792, %r12791};
	xor.b64  	%rd19178, %rd19177, %rd19176;
	shf.l.wrap.b32 	%r12793, %r12787, %r12788, 25;
	shf.l.wrap.b32 	%r12794, %r12788, %r12787, 25;
	mov.b64 	%rd19179, {%r12794, %r12793};
	xor.b64  	%rd19180, %rd19178, %rd19179;
	xor.b64  	%rd19181, %rd21801, %rd19110;
	xor.b64  	%rd19182, %rd21801, %rd21802;
	and.b64  	%rd19183, %rd19182, %rd19181;
	xor.b64  	%rd19184, %rd19183, %rd21801;
	add.s64 	%rd19185, %rd19175, %rd19184;
	add.s64 	%rd21800, %rd19185, %rd19180;
	add.s32 	%r12795, %r14490, 15;
	mul.wide.s32 	%rd19186, %r12795, 8;
	add.s64 	%rd19187, %rd18787, %rd19186;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12796,%dummy}, %rd21804;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12797}, %rd21804;
	}
	shf.r.wrap.b32 	%r12798, %r12797, %r12796, 14;
	shf.r.wrap.b32 	%r12799, %r12796, %r12797, 14;
	mov.b64 	%rd19188, {%r12799, %r12798};
	shf.r.wrap.b32 	%r12800, %r12797, %r12796, 18;
	shf.r.wrap.b32 	%r12801, %r12796, %r12797, 18;
	mov.b64 	%rd19189, {%r12801, %r12800};
	xor.b64  	%rd19190, %rd19189, %rd19188;
	shf.l.wrap.b32 	%r12802, %r12796, %r12797, 23;
	shf.l.wrap.b32 	%r12803, %r12797, %r12796, 23;
	mov.b64 	%rd19191, {%r12803, %r12802};
	xor.b64  	%rd19192, %rd19190, %rd19191;
	xor.b64  	%rd19193, %rd21805, %rd21806;
	and.b64  	%rd19194, %rd21804, %rd19193;
	xor.b64  	%rd19195, %rd19194, %rd21806;
	add.s64 	%rd19196, %rd19099, %rd21791;
	ld.const.u64 	%rd19197, [%rd19187];
	add.s64 	%rd19198, %rd19196, %rd19197;
	add.s64 	%rd19199, %rd19198, %rd19195;
	add.s64 	%rd19200, %rd19199, %rd19192;
	add.s64 	%rd21803, %rd19200, %rd19110;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12804,%dummy}, %rd21800;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12805}, %rd21800;
	}
	shf.r.wrap.b32 	%r12806, %r12805, %r12804, 28;
	shf.r.wrap.b32 	%r12807, %r12804, %r12805, 28;
	mov.b64 	%rd19201, {%r12807, %r12806};
	shf.l.wrap.b32 	%r12808, %r12804, %r12805, 30;
	shf.l.wrap.b32 	%r12809, %r12805, %r12804, 30;
	mov.b64 	%rd19202, {%r12809, %r12808};
	xor.b64  	%rd19203, %rd19202, %rd19201;
	shf.l.wrap.b32 	%r12810, %r12804, %r12805, 25;
	shf.l.wrap.b32 	%r12811, %r12805, %r12804, 25;
	mov.b64 	%rd19204, {%r12811, %r12810};
	xor.b64  	%rd19205, %rd19203, %rd19204;
	xor.b64  	%rd19206, %rd21800, %rd21802;
	xor.b64  	%rd19207, %rd21800, %rd21801;
	and.b64  	%rd19208, %rd19207, %rd19206;
	xor.b64  	%rd19209, %rd19208, %rd21800;
	add.s64 	%rd19210, %rd19200, %rd19209;
	add.s64 	%rd21799, %rd19210, %rd19205;
	add.s32 	%r14490, %r14490, 16;
	setp.lt.s32	%p199, %r14490, 80;
	@%p199 bra 	BB3_318;

	add.s64 	%rd19211, %rd21799, %rd1520;
	st.local.u64 	[%rd1], %rd19211;
	add.s64 	%rd19212, %rd21800, %rd1522;
	st.local.u64 	[%rd1+8], %rd19212;
	add.s64 	%rd19213, %rd21801, %rd1521;
	st.local.u64 	[%rd1+16], %rd19213;
	add.s64 	%rd19214, %rd21802, %rd1519;
	st.local.u64 	[%rd1+24], %rd19214;
	add.s64 	%rd19215, %rd21803, %rd1515;
	st.local.u64 	[%rd1+32], %rd19215;
	add.s64 	%rd19216, %rd21804, %rd1517;
	st.local.u64 	[%rd1+40], %rd19216;
	add.s64 	%rd19217, %rd21805, %rd1516;
	st.local.u64 	[%rd1+48], %rd19217;
	add.s64 	%rd19218, %rd21806, %rd1518;
	st.local.u64 	[%rd1+56], %rd19218;
	sub.s32 	%r452, %r3, %r432;
	setp.lt.s32	%p200, %r452, 1;
	@%p200 bra 	BB3_337;

	add.s32 	%r453, %r431, -128;
	and.b32  	%r454, %r453, 3;
	setp.eq.s32	%p201, %r454, 0;
	mov.u32 	%r14494, 0;
	@%p201 bra 	BB3_326;

	setp.eq.s32	%p202, %r454, 1;
	mov.u32 	%r14492, 0;
	@%p202 bra 	BB3_325;

	setp.eq.s32	%p203, %r454, 2;
	mov.u32 	%r14491, 0;
	@%p203 bra 	BB3_324;

	xor.b32  	%r12816, %r432, 7;
	cvt.u64.u32	%rd19219, %r12816;
	add.s64 	%rd19220, %rd1808, %rd19219;
	ld.local.u8 	%rs290, [%rd19220];
	st.local.u8 	[%rd1498], %rs290;
	mov.u32 	%r14491, 1;

BB3_324:
	add.s32 	%r12817, %r14491, %r432;
	xor.b32  	%r12818, %r12817, 7;
	cvt.s64.s32	%rd19221, %r12818;
	add.s64 	%rd19222, %rd1808, %rd19221;
	ld.local.u8 	%rs291, [%rd19222];
	xor.b32  	%r12819, %r14491, 7;
	cvt.u64.u32	%rd19223, %r12819;
	add.s64 	%rd19224, %rd179, %rd19223;
	st.local.u8 	[%rd19224], %rs291;
	add.s32 	%r14492, %r14491, 1;

BB3_325:
	add.s32 	%r12820, %r14492, %r432;
	xor.b32  	%r12821, %r12820, 7;
	cvt.s64.s32	%rd19225, %r12821;
	add.s64 	%rd19226, %rd1808, %rd19225;
	ld.local.u8 	%rs292, [%rd19226];
	xor.b32  	%r12822, %r14492, 7;
	cvt.s64.s32	%rd19227, %r12822;
	add.s64 	%rd19228, %rd179, %rd19227;
	st.local.u8 	[%rd19228], %rs292;
	add.s32 	%r14494, %r14492, 1;

BB3_326:
	setp.lt.u32	%p204, %r453, 4;
	@%p204 bra 	BB3_337;

BB3_327:
	add.s32 	%r12823, %r14494, %r432;
	xor.b32  	%r12824, %r12823, 7;
	cvt.s64.s32	%rd19229, %r12824;
	add.s64 	%rd19230, %rd1808, %rd19229;
	ld.local.u8 	%rs293, [%rd19230];
	xor.b32  	%r12825, %r14494, 7;
	cvt.s64.s32	%rd19231, %r12825;
	add.s64 	%rd19232, %rd179, %rd19231;
	st.local.u8 	[%rd19232], %rs293;
	add.s32 	%r12826, %r14494, 1;
	add.s32 	%r12827, %r12826, %r432;
	xor.b32  	%r12828, %r12827, 7;
	cvt.s64.s32	%rd19233, %r12828;
	add.s64 	%rd19234, %rd1808, %rd19233;
	ld.local.u8 	%rs294, [%rd19234];
	xor.b32  	%r12829, %r12826, 7;
	cvt.s64.s32	%rd19235, %r12829;
	add.s64 	%rd19236, %rd179, %rd19235;
	st.local.u8 	[%rd19236], %rs294;
	add.s32 	%r12830, %r14494, 2;
	add.s32 	%r12831, %r12830, %r432;
	xor.b32  	%r12832, %r12831, 7;
	cvt.s64.s32	%rd19237, %r12832;
	add.s64 	%rd19238, %rd1808, %rd19237;
	ld.local.u8 	%rs295, [%rd19238];
	xor.b32  	%r12833, %r12830, 7;
	cvt.s64.s32	%rd19239, %r12833;
	add.s64 	%rd19240, %rd179, %rd19239;
	st.local.u8 	[%rd19240], %rs295;
	add.s32 	%r12834, %r14494, 3;
	add.s32 	%r12835, %r12834, %r432;
	xor.b32  	%r12836, %r12835, 7;
	cvt.s64.s32	%rd19241, %r12836;
	add.s64 	%rd19242, %rd1808, %rd19241;
	ld.local.u8 	%rs296, [%rd19242];
	xor.b32  	%r12837, %r12834, 7;
	cvt.s64.s32	%rd19243, %r12837;
	add.s64 	%rd19244, %rd179, %rd19243;
	st.local.u8 	[%rd19244], %rs296;
	add.s32 	%r14494, %r14494, 4;
	setp.lt.s32	%p205, %r14494, %r452;
	@%p205 bra 	BB3_327;

BB3_337:
	add.s32 	%r14481, %r14481, 1;
	cvt.u64.u32	%rd19271, %r14481;
	setp.lt.u64	%p212, %rd19271, %rd1497;
	@%p212 bra 	BB3_355;

	ld.local.u32 	%r12861, [%rd1+192];
	and.b32  	%r478, %r12861, 127;
	sub.s32 	%r479, %r2861, %r478;
	and.b32  	%r480, %r479, 3;
	setp.eq.s32	%p213, %r480, 0;
	mov.u32 	%r14506, %r478;
	@%p213 bra 	BB3_344;

	setp.eq.s32	%p214, %r480, 1;
	mov.u32 	%r14504, %r478;
	@%p214 bra 	BB3_343;

	setp.eq.s32	%p215, %r480, 2;
	mov.u32 	%r14503, %r478;
	@%p215 bra 	BB3_342;

	xor.b32  	%r12863, %r478, 7;
	cvt.u64.u32	%rd19272, %r12863;
	add.s64 	%rd19273, %rd179, %rd19272;
	mov.u16 	%rs304, 0;
	st.local.u8 	[%rd19273], %rs304;
	add.s32 	%r14503, %r478, 1;

BB3_342:
	xor.b32  	%r12864, %r14503, 7;
	cvt.s64.s32	%rd19274, %r12864;
	add.s64 	%rd19275, %rd179, %rd19274;
	mov.u16 	%rs305, 0;
	st.local.u8 	[%rd19275], %rs305;
	add.s32 	%r14504, %r14503, 1;

BB3_343:
	xor.b32  	%r12865, %r14504, 7;
	cvt.s64.s32	%rd19276, %r12865;
	add.s64 	%rd19277, %rd179, %rd19276;
	mov.u16 	%rs306, 0;
	st.local.u8 	[%rd19277], %rs306;
	add.s32 	%r14506, %r14504, 1;

BB3_344:
	setp.lt.u32	%p216, %r479, 4;
	@%p216 bra 	BB3_346;

BB3_345:
	xor.b32  	%r12866, %r14506, 7;
	cvt.s64.s32	%rd19278, %r12866;
	add.s64 	%rd19279, %rd179, %rd19278;
	mov.u16 	%rs307, 0;
	st.local.u8 	[%rd19279], %rs307;
	add.s32 	%r12867, %r14506, 1;
	xor.b32  	%r12868, %r12867, 7;
	cvt.s64.s32	%rd19280, %r12868;
	add.s64 	%rd19281, %rd179, %rd19280;
	st.local.u8 	[%rd19281], %rs307;
	add.s32 	%r12869, %r14506, 2;
	xor.b32  	%r12870, %r12869, 7;
	cvt.s64.s32	%rd19282, %r12870;
	add.s64 	%rd19283, %rd179, %rd19282;
	st.local.u8 	[%rd19283], %rs307;
	add.s32 	%r12871, %r14506, 3;
	xor.b32  	%r12872, %r12871, 7;
	cvt.s64.s32	%rd19284, %r12872;
	add.s64 	%rd19285, %rd179, %rd19284;
	st.local.u8 	[%rd19285], %rs307;
	add.s32 	%r14506, %r14506, 4;
	setp.lt.s32	%p217, %r14506, 128;
	@%p217 bra 	BB3_345;

BB3_346:
	mov.u16 	%rs311, 128;
	xor.b32  	%r12873, %r478, 7;
	cvt.u64.u32	%rd19286, %r12873;
	add.s64 	%rd19287, %rd179, %rd19286;
	st.local.u8 	[%rd19287], %rs311;
	ld.local.u64 	%rd21861, [%rd1+64];
	setp.gt.u32	%p218, %r478, 111;
	@%p218 bra 	BB3_348;
	bra.uni 	BB3_347;

BB3_348:
	shr.u64 	%rd19288, %rd21861, 32;
	ld.local.u64 	%rd19289, [%rd1+72];
	shr.u64 	%rd19290, %rd19289, 32;
	ld.local.u64 	%rd19291, [%rd1+80];
	shr.u64 	%rd19292, %rd19291, 32;
	ld.local.u64 	%rd19293, [%rd1+88];
	shr.u64 	%rd19294, %rd19293, 32;
	ld.local.u64 	%rd19295, [%rd1+96];
	shr.u64 	%rd19296, %rd19295, 32;
	ld.local.u64 	%rd19297, [%rd1+104];
	shr.u64 	%rd19298, %rd19297, 32;
	ld.local.u64 	%rd19299, [%rd1+112];
	shr.u64 	%rd19300, %rd19299, 32;
	ld.local.u64 	%rd19301, [%rd1+120];
	shr.u64 	%rd19302, %rd19301, 32;
	ld.local.u64 	%rd19303, [%rd1+128];
	shr.u64 	%rd19304, %rd19303, 32;
	ld.local.u64 	%rd19305, [%rd1+136];
	shr.u64 	%rd19306, %rd19305, 32;
	ld.local.u64 	%rd19307, [%rd1+144];
	shr.u64 	%rd19308, %rd19307, 32;
	ld.local.u64 	%rd19309, [%rd1+152];
	shr.u64 	%rd19310, %rd19309, 32;
	ld.local.u64 	%rd19311, [%rd1+160];
	shr.u64 	%rd19312, %rd19311, 32;
	ld.local.u64 	%rd19313, [%rd1+168];
	shr.u64 	%rd19314, %rd19313, 32;
	ld.local.u64 	%rd19315, [%rd1+176];
	shr.u64 	%rd19316, %rd19315, 32;
	ld.local.u64 	%rd19317, [%rd1+184];
	shr.u64 	%rd19318, %rd19317, 32;
	bfi.b64 	%rd21831, %rd19288, %rd21861, 32, 32;
	bfi.b64 	%rd21832, %rd19290, %rd19289, 32, 32;
	bfi.b64 	%rd21833, %rd19292, %rd19291, 32, 32;
	bfi.b64 	%rd21834, %rd19294, %rd19293, 32, 32;
	bfi.b64 	%rd21835, %rd19296, %rd19295, 32, 32;
	bfi.b64 	%rd21836, %rd19298, %rd19297, 32, 32;
	bfi.b64 	%rd21837, %rd19300, %rd19299, 32, 32;
	bfi.b64 	%rd21838, %rd19302, %rd19301, 32, 32;
	bfi.b64 	%rd21822, %rd19304, %rd19303, 32, 32;
	bfi.b64 	%rd21821, %rd19306, %rd19305, 32, 32;
	bfi.b64 	%rd21820, %rd19308, %rd19307, 32, 32;
	bfi.b64 	%rd21819, %rd19310, %rd19309, 32, 32;
	bfi.b64 	%rd21818, %rd19312, %rd19311, 32, 32;
	bfi.b64 	%rd21817, %rd19314, %rd19313, 32, 32;
	bfi.b64 	%rd21816, %rd19316, %rd19315, 32, 32;
	bfi.b64 	%rd21815, %rd19318, %rd19317, 32, 32;
	ld.local.u64 	%rd1618, [%rd1+32];
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12875,%dummy}, %rd1618;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12876}, %rd1618;
	}
	shf.r.wrap.b32 	%r12877, %r12876, %r12875, 14;
	shf.r.wrap.b32 	%r12878, %r12875, %r12876, 14;
	mov.b64 	%rd19319, {%r12878, %r12877};
	shf.r.wrap.b32 	%r12879, %r12876, %r12875, 18;
	shf.r.wrap.b32 	%r12880, %r12875, %r12876, 18;
	mov.b64 	%rd19320, {%r12880, %r12879};
	xor.b64  	%rd19321, %rd19320, %rd19319;
	shf.l.wrap.b32 	%r12881, %r12875, %r12876, 23;
	shf.l.wrap.b32 	%r12882, %r12876, %r12875, 23;
	mov.b64 	%rd19322, {%r12882, %r12881};
	xor.b64  	%rd19323, %rd19321, %rd19322;
	ld.local.u64 	%rd1619, [%rd1+48];
	ld.local.u64 	%rd1620, [%rd1+40];
	xor.b64  	%rd19324, %rd1619, %rd1620;
	and.b64  	%rd19325, %rd19324, %rd1618;
	xor.b64  	%rd19326, %rd19325, %rd1619;
	ld.local.u64 	%rd1621, [%rd1+56];
	add.s64 	%rd19327, %rd1621, %rd21831;
	add.s64 	%rd19328, %rd19327, %rd21454;
	add.s64 	%rd19329, %rd19328, %rd19326;
	add.s64 	%rd19330, %rd19329, %rd19323;
	ld.local.u64 	%rd1622, [%rd1+24];
	add.s64 	%rd19331, %rd19330, %rd1622;
	ld.local.u64 	%rd1623, [%rd1];
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12883,%dummy}, %rd1623;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12884}, %rd1623;
	}
	shf.r.wrap.b32 	%r12885, %r12884, %r12883, 28;
	shf.r.wrap.b32 	%r12886, %r12883, %r12884, 28;
	mov.b64 	%rd19332, {%r12886, %r12885};
	shf.l.wrap.b32 	%r12887, %r12883, %r12884, 30;
	shf.l.wrap.b32 	%r12888, %r12884, %r12883, 30;
	mov.b64 	%rd19333, {%r12888, %r12887};
	xor.b64  	%rd19334, %rd19333, %rd19332;
	shf.l.wrap.b32 	%r12889, %r12883, %r12884, 25;
	shf.l.wrap.b32 	%r12890, %r12884, %r12883, 25;
	mov.b64 	%rd19335, {%r12890, %r12889};
	xor.b64  	%rd19336, %rd19334, %rd19335;
	ld.local.u64 	%rd1624, [%rd1+16];
	xor.b64  	%rd19337, %rd1624, %rd1623;
	ld.local.u64 	%rd1625, [%rd1+8];
	xor.b64  	%rd19338, %rd1625, %rd1623;
	and.b64  	%rd19339, %rd19337, %rd19338;
	xor.b64  	%rd19340, %rd19339, %rd1623;
	add.s64 	%rd19341, %rd19330, %rd19340;
	add.s64 	%rd19342, %rd19341, %rd19336;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12891,%dummy}, %rd19331;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12892}, %rd19331;
	}
	shf.r.wrap.b32 	%r12893, %r12892, %r12891, 14;
	shf.r.wrap.b32 	%r12894, %r12891, %r12892, 14;
	mov.b64 	%rd19343, {%r12894, %r12893};
	shf.r.wrap.b32 	%r12895, %r12892, %r12891, 18;
	shf.r.wrap.b32 	%r12896, %r12891, %r12892, 18;
	mov.b64 	%rd19344, {%r12896, %r12895};
	xor.b64  	%rd19345, %rd19344, %rd19343;
	shf.l.wrap.b32 	%r12897, %r12891, %r12892, 23;
	shf.l.wrap.b32 	%r12898, %r12892, %r12891, 23;
	mov.b64 	%rd19346, {%r12898, %r12897};
	xor.b64  	%rd19347, %rd19345, %rd19346;
	xor.b64  	%rd19348, %rd1620, %rd1618;
	and.b64  	%rd19349, %rd19331, %rd19348;
	xor.b64  	%rd19350, %rd19349, %rd1620;
	add.s64 	%rd19351, %rd1619, %rd21832;
	add.s64 	%rd19352, %rd19351, %rd21453;
	add.s64 	%rd19353, %rd19352, %rd19350;
	add.s64 	%rd19354, %rd19353, %rd19347;
	add.s64 	%rd19355, %rd19354, %rd1624;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12899,%dummy}, %rd19342;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12900}, %rd19342;
	}
	shf.r.wrap.b32 	%r12901, %r12900, %r12899, 28;
	shf.r.wrap.b32 	%r12902, %r12899, %r12900, 28;
	mov.b64 	%rd19356, {%r12902, %r12901};
	shf.l.wrap.b32 	%r12903, %r12899, %r12900, 30;
	shf.l.wrap.b32 	%r12904, %r12900, %r12899, 30;
	mov.b64 	%rd19357, {%r12904, %r12903};
	xor.b64  	%rd19358, %rd19357, %rd19356;
	shf.l.wrap.b32 	%r12905, %r12899, %r12900, 25;
	shf.l.wrap.b32 	%r12906, %r12900, %r12899, 25;
	mov.b64 	%rd19359, {%r12906, %r12905};
	xor.b64  	%rd19360, %rd19358, %rd19359;
	xor.b64  	%rd19361, %rd19342, %rd1625;
	xor.b64  	%rd19362, %rd19342, %rd1623;
	and.b64  	%rd19363, %rd19362, %rd19361;
	xor.b64  	%rd19364, %rd19363, %rd19342;
	add.s64 	%rd19365, %rd19354, %rd19364;
	add.s64 	%rd19366, %rd19365, %rd19360;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12907,%dummy}, %rd19355;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12908}, %rd19355;
	}
	shf.r.wrap.b32 	%r12909, %r12908, %r12907, 14;
	shf.r.wrap.b32 	%r12910, %r12907, %r12908, 14;
	mov.b64 	%rd19367, {%r12910, %r12909};
	shf.r.wrap.b32 	%r12911, %r12908, %r12907, 18;
	shf.r.wrap.b32 	%r12912, %r12907, %r12908, 18;
	mov.b64 	%rd19368, {%r12912, %r12911};
	xor.b64  	%rd19369, %rd19368, %rd19367;
	shf.l.wrap.b32 	%r12913, %r12907, %r12908, 23;
	shf.l.wrap.b32 	%r12914, %r12908, %r12907, 23;
	mov.b64 	%rd19370, {%r12914, %r12913};
	xor.b64  	%rd19371, %rd19369, %rd19370;
	xor.b64  	%rd19372, %rd19331, %rd1618;
	and.b64  	%rd19373, %rd19355, %rd19372;
	xor.b64  	%rd19374, %rd19373, %rd1618;
	add.s64 	%rd19375, %rd1620, %rd21833;
	add.s64 	%rd19376, %rd19375, %rd21452;
	add.s64 	%rd19377, %rd19376, %rd19374;
	add.s64 	%rd19378, %rd19377, %rd19371;
	add.s64 	%rd19379, %rd19378, %rd1625;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12915,%dummy}, %rd19366;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12916}, %rd19366;
	}
	shf.r.wrap.b32 	%r12917, %r12916, %r12915, 28;
	shf.r.wrap.b32 	%r12918, %r12915, %r12916, 28;
	mov.b64 	%rd19380, {%r12918, %r12917};
	shf.l.wrap.b32 	%r12919, %r12915, %r12916, 30;
	shf.l.wrap.b32 	%r12920, %r12916, %r12915, 30;
	mov.b64 	%rd19381, {%r12920, %r12919};
	xor.b64  	%rd19382, %rd19381, %rd19380;
	shf.l.wrap.b32 	%r12921, %r12915, %r12916, 25;
	shf.l.wrap.b32 	%r12922, %r12916, %r12915, 25;
	mov.b64 	%rd19383, {%r12922, %r12921};
	xor.b64  	%rd19384, %rd19382, %rd19383;
	xor.b64  	%rd19385, %rd19366, %rd1623;
	xor.b64  	%rd19386, %rd19366, %rd19342;
	and.b64  	%rd19387, %rd19386, %rd19385;
	xor.b64  	%rd19388, %rd19387, %rd19366;
	add.s64 	%rd19389, %rd19378, %rd19388;
	add.s64 	%rd19390, %rd19389, %rd19384;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12923,%dummy}, %rd19379;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12924}, %rd19379;
	}
	shf.r.wrap.b32 	%r12925, %r12924, %r12923, 14;
	shf.r.wrap.b32 	%r12926, %r12923, %r12924, 14;
	mov.b64 	%rd19391, {%r12926, %r12925};
	shf.r.wrap.b32 	%r12927, %r12924, %r12923, 18;
	shf.r.wrap.b32 	%r12928, %r12923, %r12924, 18;
	mov.b64 	%rd19392, {%r12928, %r12927};
	xor.b64  	%rd19393, %rd19392, %rd19391;
	shf.l.wrap.b32 	%r12929, %r12923, %r12924, 23;
	shf.l.wrap.b32 	%r12930, %r12924, %r12923, 23;
	mov.b64 	%rd19394, {%r12930, %r12929};
	xor.b64  	%rd19395, %rd19393, %rd19394;
	xor.b64  	%rd19396, %rd19355, %rd19331;
	and.b64  	%rd19397, %rd19379, %rd19396;
	xor.b64  	%rd19398, %rd19397, %rd19331;
	add.s64 	%rd19399, %rd1618, %rd21834;
	add.s64 	%rd19400, %rd19399, %rd21451;
	add.s64 	%rd19401, %rd19400, %rd19398;
	add.s64 	%rd19402, %rd19401, %rd19395;
	add.s64 	%rd19403, %rd19402, %rd1623;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12931,%dummy}, %rd19390;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12932}, %rd19390;
	}
	shf.r.wrap.b32 	%r12933, %r12932, %r12931, 28;
	shf.r.wrap.b32 	%r12934, %r12931, %r12932, 28;
	mov.b64 	%rd19404, {%r12934, %r12933};
	shf.l.wrap.b32 	%r12935, %r12931, %r12932, 30;
	shf.l.wrap.b32 	%r12936, %r12932, %r12931, 30;
	mov.b64 	%rd19405, {%r12936, %r12935};
	xor.b64  	%rd19406, %rd19405, %rd19404;
	shf.l.wrap.b32 	%r12937, %r12931, %r12932, 25;
	shf.l.wrap.b32 	%r12938, %r12932, %r12931, 25;
	mov.b64 	%rd19407, {%r12938, %r12937};
	xor.b64  	%rd19408, %rd19406, %rd19407;
	xor.b64  	%rd19409, %rd19390, %rd19342;
	xor.b64  	%rd19410, %rd19390, %rd19366;
	and.b64  	%rd19411, %rd19410, %rd19409;
	xor.b64  	%rd19412, %rd19411, %rd19390;
	add.s64 	%rd19413, %rd19402, %rd19412;
	add.s64 	%rd19414, %rd19413, %rd19408;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12939,%dummy}, %rd19403;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12940}, %rd19403;
	}
	shf.r.wrap.b32 	%r12941, %r12940, %r12939, 14;
	shf.r.wrap.b32 	%r12942, %r12939, %r12940, 14;
	mov.b64 	%rd19415, {%r12942, %r12941};
	shf.r.wrap.b32 	%r12943, %r12940, %r12939, 18;
	shf.r.wrap.b32 	%r12944, %r12939, %r12940, 18;
	mov.b64 	%rd19416, {%r12944, %r12943};
	xor.b64  	%rd19417, %rd19416, %rd19415;
	shf.l.wrap.b32 	%r12945, %r12939, %r12940, 23;
	shf.l.wrap.b32 	%r12946, %r12940, %r12939, 23;
	mov.b64 	%rd19418, {%r12946, %r12945};
	xor.b64  	%rd19419, %rd19417, %rd19418;
	xor.b64  	%rd19420, %rd19379, %rd19355;
	and.b64  	%rd19421, %rd19403, %rd19420;
	xor.b64  	%rd19422, %rd19421, %rd19355;
	add.s64 	%rd19423, %rd19331, %rd21835;
	add.s64 	%rd19424, %rd19423, %rd21450;
	add.s64 	%rd19425, %rd19424, %rd19422;
	add.s64 	%rd19426, %rd19425, %rd19419;
	add.s64 	%rd19427, %rd19426, %rd19342;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12947,%dummy}, %rd19414;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12948}, %rd19414;
	}
	shf.r.wrap.b32 	%r12949, %r12948, %r12947, 28;
	shf.r.wrap.b32 	%r12950, %r12947, %r12948, 28;
	mov.b64 	%rd19428, {%r12950, %r12949};
	shf.l.wrap.b32 	%r12951, %r12947, %r12948, 30;
	shf.l.wrap.b32 	%r12952, %r12948, %r12947, 30;
	mov.b64 	%rd19429, {%r12952, %r12951};
	xor.b64  	%rd19430, %rd19429, %rd19428;
	shf.l.wrap.b32 	%r12953, %r12947, %r12948, 25;
	shf.l.wrap.b32 	%r12954, %r12948, %r12947, 25;
	mov.b64 	%rd19431, {%r12954, %r12953};
	xor.b64  	%rd19432, %rd19430, %rd19431;
	xor.b64  	%rd19433, %rd19414, %rd19366;
	xor.b64  	%rd19434, %rd19414, %rd19390;
	and.b64  	%rd19435, %rd19434, %rd19433;
	xor.b64  	%rd19436, %rd19435, %rd19414;
	add.s64 	%rd19437, %rd19426, %rd19436;
	add.s64 	%rd19438, %rd19437, %rd19432;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12955,%dummy}, %rd19427;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12956}, %rd19427;
	}
	shf.r.wrap.b32 	%r12957, %r12956, %r12955, 14;
	shf.r.wrap.b32 	%r12958, %r12955, %r12956, 14;
	mov.b64 	%rd19439, {%r12958, %r12957};
	shf.r.wrap.b32 	%r12959, %r12956, %r12955, 18;
	shf.r.wrap.b32 	%r12960, %r12955, %r12956, 18;
	mov.b64 	%rd19440, {%r12960, %r12959};
	xor.b64  	%rd19441, %rd19440, %rd19439;
	shf.l.wrap.b32 	%r12961, %r12955, %r12956, 23;
	shf.l.wrap.b32 	%r12962, %r12956, %r12955, 23;
	mov.b64 	%rd19442, {%r12962, %r12961};
	xor.b64  	%rd19443, %rd19441, %rd19442;
	xor.b64  	%rd19444, %rd19403, %rd19379;
	and.b64  	%rd19445, %rd19427, %rd19444;
	xor.b64  	%rd19446, %rd19445, %rd19379;
	add.s64 	%rd19447, %rd19355, %rd21836;
	add.s64 	%rd19448, %rd19447, %rd21449;
	add.s64 	%rd19449, %rd19448, %rd19446;
	add.s64 	%rd19450, %rd19449, %rd19443;
	add.s64 	%rd19451, %rd19450, %rd19366;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12963,%dummy}, %rd19438;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12964}, %rd19438;
	}
	shf.r.wrap.b32 	%r12965, %r12964, %r12963, 28;
	shf.r.wrap.b32 	%r12966, %r12963, %r12964, 28;
	mov.b64 	%rd19452, {%r12966, %r12965};
	shf.l.wrap.b32 	%r12967, %r12963, %r12964, 30;
	shf.l.wrap.b32 	%r12968, %r12964, %r12963, 30;
	mov.b64 	%rd19453, {%r12968, %r12967};
	xor.b64  	%rd19454, %rd19453, %rd19452;
	shf.l.wrap.b32 	%r12969, %r12963, %r12964, 25;
	shf.l.wrap.b32 	%r12970, %r12964, %r12963, 25;
	mov.b64 	%rd19455, {%r12970, %r12969};
	xor.b64  	%rd19456, %rd19454, %rd19455;
	xor.b64  	%rd19457, %rd19438, %rd19390;
	xor.b64  	%rd19458, %rd19438, %rd19414;
	and.b64  	%rd19459, %rd19458, %rd19457;
	xor.b64  	%rd19460, %rd19459, %rd19438;
	add.s64 	%rd19461, %rd19450, %rd19460;
	add.s64 	%rd19462, %rd19461, %rd19456;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12971,%dummy}, %rd19451;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12972}, %rd19451;
	}
	shf.r.wrap.b32 	%r12973, %r12972, %r12971, 14;
	shf.r.wrap.b32 	%r12974, %r12971, %r12972, 14;
	mov.b64 	%rd19463, {%r12974, %r12973};
	shf.r.wrap.b32 	%r12975, %r12972, %r12971, 18;
	shf.r.wrap.b32 	%r12976, %r12971, %r12972, 18;
	mov.b64 	%rd19464, {%r12976, %r12975};
	xor.b64  	%rd19465, %rd19464, %rd19463;
	shf.l.wrap.b32 	%r12977, %r12971, %r12972, 23;
	shf.l.wrap.b32 	%r12978, %r12972, %r12971, 23;
	mov.b64 	%rd19466, {%r12978, %r12977};
	xor.b64  	%rd19467, %rd19465, %rd19466;
	xor.b64  	%rd19468, %rd19427, %rd19403;
	and.b64  	%rd19469, %rd19451, %rd19468;
	xor.b64  	%rd19470, %rd19469, %rd19403;
	add.s64 	%rd19471, %rd19379, %rd21837;
	add.s64 	%rd19472, %rd19471, %rd21448;
	add.s64 	%rd19473, %rd19472, %rd19470;
	add.s64 	%rd19474, %rd19473, %rd19467;
	add.s64 	%rd19475, %rd19474, %rd19390;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12979,%dummy}, %rd19462;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12980}, %rd19462;
	}
	shf.r.wrap.b32 	%r12981, %r12980, %r12979, 28;
	shf.r.wrap.b32 	%r12982, %r12979, %r12980, 28;
	mov.b64 	%rd19476, {%r12982, %r12981};
	shf.l.wrap.b32 	%r12983, %r12979, %r12980, 30;
	shf.l.wrap.b32 	%r12984, %r12980, %r12979, 30;
	mov.b64 	%rd19477, {%r12984, %r12983};
	xor.b64  	%rd19478, %rd19477, %rd19476;
	shf.l.wrap.b32 	%r12985, %r12979, %r12980, 25;
	shf.l.wrap.b32 	%r12986, %r12980, %r12979, 25;
	mov.b64 	%rd19479, {%r12986, %r12985};
	xor.b64  	%rd19480, %rd19478, %rd19479;
	xor.b64  	%rd19481, %rd19462, %rd19414;
	xor.b64  	%rd19482, %rd19462, %rd19438;
	and.b64  	%rd19483, %rd19482, %rd19481;
	xor.b64  	%rd19484, %rd19483, %rd19462;
	add.s64 	%rd19485, %rd19474, %rd19484;
	add.s64 	%rd19486, %rd19485, %rd19480;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12987,%dummy}, %rd19475;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12988}, %rd19475;
	}
	shf.r.wrap.b32 	%r12989, %r12988, %r12987, 14;
	shf.r.wrap.b32 	%r12990, %r12987, %r12988, 14;
	mov.b64 	%rd19487, {%r12990, %r12989};
	shf.r.wrap.b32 	%r12991, %r12988, %r12987, 18;
	shf.r.wrap.b32 	%r12992, %r12987, %r12988, 18;
	mov.b64 	%rd19488, {%r12992, %r12991};
	xor.b64  	%rd19489, %rd19488, %rd19487;
	shf.l.wrap.b32 	%r12993, %r12987, %r12988, 23;
	shf.l.wrap.b32 	%r12994, %r12988, %r12987, 23;
	mov.b64 	%rd19490, {%r12994, %r12993};
	xor.b64  	%rd19491, %rd19489, %rd19490;
	xor.b64  	%rd19492, %rd19451, %rd19427;
	and.b64  	%rd19493, %rd19475, %rd19492;
	xor.b64  	%rd19494, %rd19493, %rd19427;
	add.s64 	%rd19495, %rd19403, %rd21838;
	add.s64 	%rd19496, %rd19495, %rd21447;
	add.s64 	%rd19497, %rd19496, %rd19494;
	add.s64 	%rd19498, %rd19497, %rd19491;
	add.s64 	%rd19499, %rd19498, %rd19414;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r12995,%dummy}, %rd19486;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r12996}, %rd19486;
	}
	shf.r.wrap.b32 	%r12997, %r12996, %r12995, 28;
	shf.r.wrap.b32 	%r12998, %r12995, %r12996, 28;
	mov.b64 	%rd19500, {%r12998, %r12997};
	shf.l.wrap.b32 	%r12999, %r12995, %r12996, 30;
	shf.l.wrap.b32 	%r13000, %r12996, %r12995, 30;
	mov.b64 	%rd19501, {%r13000, %r12999};
	xor.b64  	%rd19502, %rd19501, %rd19500;
	shf.l.wrap.b32 	%r13001, %r12995, %r12996, 25;
	shf.l.wrap.b32 	%r13002, %r12996, %r12995, 25;
	mov.b64 	%rd19503, {%r13002, %r13001};
	xor.b64  	%rd19504, %rd19502, %rd19503;
	xor.b64  	%rd19505, %rd19486, %rd19438;
	xor.b64  	%rd19506, %rd19486, %rd19462;
	and.b64  	%rd19507, %rd19506, %rd19505;
	xor.b64  	%rd19508, %rd19507, %rd19486;
	add.s64 	%rd19509, %rd19498, %rd19508;
	add.s64 	%rd19510, %rd19509, %rd19504;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13003,%dummy}, %rd19499;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13004}, %rd19499;
	}
	shf.r.wrap.b32 	%r13005, %r13004, %r13003, 14;
	shf.r.wrap.b32 	%r13006, %r13003, %r13004, 14;
	mov.b64 	%rd19511, {%r13006, %r13005};
	shf.r.wrap.b32 	%r13007, %r13004, %r13003, 18;
	shf.r.wrap.b32 	%r13008, %r13003, %r13004, 18;
	mov.b64 	%rd19512, {%r13008, %r13007};
	xor.b64  	%rd19513, %rd19512, %rd19511;
	shf.l.wrap.b32 	%r13009, %r13003, %r13004, 23;
	shf.l.wrap.b32 	%r13010, %r13004, %r13003, 23;
	mov.b64 	%rd19514, {%r13010, %r13009};
	xor.b64  	%rd19515, %rd19513, %rd19514;
	xor.b64  	%rd19516, %rd19475, %rd19451;
	and.b64  	%rd19517, %rd19499, %rd19516;
	xor.b64  	%rd19518, %rd19517, %rd19451;
	add.s64 	%rd19519, %rd19427, %rd21822;
	add.s64 	%rd19520, %rd19519, %rd21446;
	add.s64 	%rd19521, %rd19520, %rd19518;
	add.s64 	%rd19522, %rd19521, %rd19515;
	add.s64 	%rd19523, %rd19522, %rd19438;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13011,%dummy}, %rd19510;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13012}, %rd19510;
	}
	shf.r.wrap.b32 	%r13013, %r13012, %r13011, 28;
	shf.r.wrap.b32 	%r13014, %r13011, %r13012, 28;
	mov.b64 	%rd19524, {%r13014, %r13013};
	shf.l.wrap.b32 	%r13015, %r13011, %r13012, 30;
	shf.l.wrap.b32 	%r13016, %r13012, %r13011, 30;
	mov.b64 	%rd19525, {%r13016, %r13015};
	xor.b64  	%rd19526, %rd19525, %rd19524;
	shf.l.wrap.b32 	%r13017, %r13011, %r13012, 25;
	shf.l.wrap.b32 	%r13018, %r13012, %r13011, 25;
	mov.b64 	%rd19527, {%r13018, %r13017};
	xor.b64  	%rd19528, %rd19526, %rd19527;
	xor.b64  	%rd19529, %rd19510, %rd19462;
	xor.b64  	%rd19530, %rd19510, %rd19486;
	and.b64  	%rd19531, %rd19530, %rd19529;
	xor.b64  	%rd19532, %rd19531, %rd19510;
	add.s64 	%rd19533, %rd19522, %rd19532;
	add.s64 	%rd19534, %rd19533, %rd19528;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13019,%dummy}, %rd19523;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13020}, %rd19523;
	}
	shf.r.wrap.b32 	%r13021, %r13020, %r13019, 14;
	shf.r.wrap.b32 	%r13022, %r13019, %r13020, 14;
	mov.b64 	%rd19535, {%r13022, %r13021};
	shf.r.wrap.b32 	%r13023, %r13020, %r13019, 18;
	shf.r.wrap.b32 	%r13024, %r13019, %r13020, 18;
	mov.b64 	%rd19536, {%r13024, %r13023};
	xor.b64  	%rd19537, %rd19536, %rd19535;
	shf.l.wrap.b32 	%r13025, %r13019, %r13020, 23;
	shf.l.wrap.b32 	%r13026, %r13020, %r13019, 23;
	mov.b64 	%rd19538, {%r13026, %r13025};
	xor.b64  	%rd19539, %rd19537, %rd19538;
	xor.b64  	%rd19540, %rd19499, %rd19475;
	and.b64  	%rd19541, %rd19523, %rd19540;
	xor.b64  	%rd19542, %rd19541, %rd19475;
	add.s64 	%rd19543, %rd19451, %rd21821;
	add.s64 	%rd19544, %rd19543, %rd21445;
	add.s64 	%rd19545, %rd19544, %rd19542;
	add.s64 	%rd19546, %rd19545, %rd19539;
	add.s64 	%rd19547, %rd19546, %rd19462;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13027,%dummy}, %rd19534;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13028}, %rd19534;
	}
	shf.r.wrap.b32 	%r13029, %r13028, %r13027, 28;
	shf.r.wrap.b32 	%r13030, %r13027, %r13028, 28;
	mov.b64 	%rd19548, {%r13030, %r13029};
	shf.l.wrap.b32 	%r13031, %r13027, %r13028, 30;
	shf.l.wrap.b32 	%r13032, %r13028, %r13027, 30;
	mov.b64 	%rd19549, {%r13032, %r13031};
	xor.b64  	%rd19550, %rd19549, %rd19548;
	shf.l.wrap.b32 	%r13033, %r13027, %r13028, 25;
	shf.l.wrap.b32 	%r13034, %r13028, %r13027, 25;
	mov.b64 	%rd19551, {%r13034, %r13033};
	xor.b64  	%rd19552, %rd19550, %rd19551;
	xor.b64  	%rd19553, %rd19534, %rd19486;
	xor.b64  	%rd19554, %rd19534, %rd19510;
	and.b64  	%rd19555, %rd19554, %rd19553;
	xor.b64  	%rd19556, %rd19555, %rd19534;
	add.s64 	%rd19557, %rd19546, %rd19556;
	add.s64 	%rd19558, %rd19557, %rd19552;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13035,%dummy}, %rd19547;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13036}, %rd19547;
	}
	shf.r.wrap.b32 	%r13037, %r13036, %r13035, 14;
	shf.r.wrap.b32 	%r13038, %r13035, %r13036, 14;
	mov.b64 	%rd19559, {%r13038, %r13037};
	shf.r.wrap.b32 	%r13039, %r13036, %r13035, 18;
	shf.r.wrap.b32 	%r13040, %r13035, %r13036, 18;
	mov.b64 	%rd19560, {%r13040, %r13039};
	xor.b64  	%rd19561, %rd19560, %rd19559;
	shf.l.wrap.b32 	%r13041, %r13035, %r13036, 23;
	shf.l.wrap.b32 	%r13042, %r13036, %r13035, 23;
	mov.b64 	%rd19562, {%r13042, %r13041};
	xor.b64  	%rd19563, %rd19561, %rd19562;
	xor.b64  	%rd19564, %rd19523, %rd19499;
	and.b64  	%rd19565, %rd19547, %rd19564;
	xor.b64  	%rd19566, %rd19565, %rd19499;
	add.s64 	%rd19567, %rd19475, %rd21820;
	add.s64 	%rd19568, %rd19567, %rd21444;
	add.s64 	%rd19569, %rd19568, %rd19566;
	add.s64 	%rd19570, %rd19569, %rd19563;
	add.s64 	%rd19571, %rd19570, %rd19486;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13043,%dummy}, %rd19558;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13044}, %rd19558;
	}
	shf.r.wrap.b32 	%r13045, %r13044, %r13043, 28;
	shf.r.wrap.b32 	%r13046, %r13043, %r13044, 28;
	mov.b64 	%rd19572, {%r13046, %r13045};
	shf.l.wrap.b32 	%r13047, %r13043, %r13044, 30;
	shf.l.wrap.b32 	%r13048, %r13044, %r13043, 30;
	mov.b64 	%rd19573, {%r13048, %r13047};
	xor.b64  	%rd19574, %rd19573, %rd19572;
	shf.l.wrap.b32 	%r13049, %r13043, %r13044, 25;
	shf.l.wrap.b32 	%r13050, %r13044, %r13043, 25;
	mov.b64 	%rd19575, {%r13050, %r13049};
	xor.b64  	%rd19576, %rd19574, %rd19575;
	xor.b64  	%rd19577, %rd19558, %rd19510;
	xor.b64  	%rd19578, %rd19558, %rd19534;
	and.b64  	%rd19579, %rd19578, %rd19577;
	xor.b64  	%rd19580, %rd19579, %rd19558;
	add.s64 	%rd19581, %rd19570, %rd19580;
	add.s64 	%rd19582, %rd19581, %rd19576;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13051,%dummy}, %rd19571;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13052}, %rd19571;
	}
	shf.r.wrap.b32 	%r13053, %r13052, %r13051, 14;
	shf.r.wrap.b32 	%r13054, %r13051, %r13052, 14;
	mov.b64 	%rd19583, {%r13054, %r13053};
	shf.r.wrap.b32 	%r13055, %r13052, %r13051, 18;
	shf.r.wrap.b32 	%r13056, %r13051, %r13052, 18;
	mov.b64 	%rd19584, {%r13056, %r13055};
	xor.b64  	%rd19585, %rd19584, %rd19583;
	shf.l.wrap.b32 	%r13057, %r13051, %r13052, 23;
	shf.l.wrap.b32 	%r13058, %r13052, %r13051, 23;
	mov.b64 	%rd19586, {%r13058, %r13057};
	xor.b64  	%rd19587, %rd19585, %rd19586;
	xor.b64  	%rd19588, %rd19547, %rd19523;
	and.b64  	%rd19589, %rd19571, %rd19588;
	xor.b64  	%rd19590, %rd19589, %rd19523;
	add.s64 	%rd19591, %rd19499, %rd21819;
	add.s64 	%rd19592, %rd19591, %rd21443;
	add.s64 	%rd19593, %rd19592, %rd19590;
	add.s64 	%rd19594, %rd19593, %rd19587;
	add.s64 	%rd19595, %rd19594, %rd19510;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13059,%dummy}, %rd19582;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13060}, %rd19582;
	}
	shf.r.wrap.b32 	%r13061, %r13060, %r13059, 28;
	shf.r.wrap.b32 	%r13062, %r13059, %r13060, 28;
	mov.b64 	%rd19596, {%r13062, %r13061};
	shf.l.wrap.b32 	%r13063, %r13059, %r13060, 30;
	shf.l.wrap.b32 	%r13064, %r13060, %r13059, 30;
	mov.b64 	%rd19597, {%r13064, %r13063};
	xor.b64  	%rd19598, %rd19597, %rd19596;
	shf.l.wrap.b32 	%r13065, %r13059, %r13060, 25;
	shf.l.wrap.b32 	%r13066, %r13060, %r13059, 25;
	mov.b64 	%rd19599, {%r13066, %r13065};
	xor.b64  	%rd19600, %rd19598, %rd19599;
	xor.b64  	%rd19601, %rd19582, %rd19534;
	xor.b64  	%rd19602, %rd19582, %rd19558;
	and.b64  	%rd19603, %rd19602, %rd19601;
	xor.b64  	%rd19604, %rd19603, %rd19582;
	add.s64 	%rd19605, %rd19594, %rd19604;
	add.s64 	%rd19606, %rd19605, %rd19600;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13067,%dummy}, %rd19595;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13068}, %rd19595;
	}
	shf.r.wrap.b32 	%r13069, %r13068, %r13067, 14;
	shf.r.wrap.b32 	%r13070, %r13067, %r13068, 14;
	mov.b64 	%rd19607, {%r13070, %r13069};
	shf.r.wrap.b32 	%r13071, %r13068, %r13067, 18;
	shf.r.wrap.b32 	%r13072, %r13067, %r13068, 18;
	mov.b64 	%rd19608, {%r13072, %r13071};
	xor.b64  	%rd19609, %rd19608, %rd19607;
	shf.l.wrap.b32 	%r13073, %r13067, %r13068, 23;
	shf.l.wrap.b32 	%r13074, %r13068, %r13067, 23;
	mov.b64 	%rd19610, {%r13074, %r13073};
	xor.b64  	%rd19611, %rd19609, %rd19610;
	xor.b64  	%rd19612, %rd19571, %rd19547;
	and.b64  	%rd19613, %rd19595, %rd19612;
	xor.b64  	%rd19614, %rd19613, %rd19547;
	add.s64 	%rd19615, %rd19523, %rd21818;
	add.s64 	%rd19616, %rd19615, %rd21442;
	add.s64 	%rd19617, %rd19616, %rd19614;
	add.s64 	%rd19618, %rd19617, %rd19611;
	add.s64 	%rd21830, %rd19618, %rd19534;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13075,%dummy}, %rd19606;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13076}, %rd19606;
	}
	shf.r.wrap.b32 	%r13077, %r13076, %r13075, 28;
	shf.r.wrap.b32 	%r13078, %r13075, %r13076, 28;
	mov.b64 	%rd19619, {%r13078, %r13077};
	shf.l.wrap.b32 	%r13079, %r13075, %r13076, 30;
	shf.l.wrap.b32 	%r13080, %r13076, %r13075, 30;
	mov.b64 	%rd19620, {%r13080, %r13079};
	xor.b64  	%rd19621, %rd19620, %rd19619;
	shf.l.wrap.b32 	%r13081, %r13075, %r13076, 25;
	shf.l.wrap.b32 	%r13082, %r13076, %r13075, 25;
	mov.b64 	%rd19622, {%r13082, %r13081};
	xor.b64  	%rd19623, %rd19621, %rd19622;
	xor.b64  	%rd19624, %rd19606, %rd19558;
	xor.b64  	%rd19625, %rd19606, %rd19582;
	and.b64  	%rd19626, %rd19625, %rd19624;
	xor.b64  	%rd19627, %rd19626, %rd19606;
	add.s64 	%rd19628, %rd19618, %rd19627;
	add.s64 	%rd21826, %rd19628, %rd19623;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13083,%dummy}, %rd21830;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13084}, %rd21830;
	}
	shf.r.wrap.b32 	%r13085, %r13084, %r13083, 14;
	shf.r.wrap.b32 	%r13086, %r13083, %r13084, 14;
	mov.b64 	%rd19629, {%r13086, %r13085};
	shf.r.wrap.b32 	%r13087, %r13084, %r13083, 18;
	shf.r.wrap.b32 	%r13088, %r13083, %r13084, 18;
	mov.b64 	%rd19630, {%r13088, %r13087};
	xor.b64  	%rd19631, %rd19630, %rd19629;
	shf.l.wrap.b32 	%r13089, %r13083, %r13084, 23;
	shf.l.wrap.b32 	%r13090, %r13084, %r13083, 23;
	mov.b64 	%rd19632, {%r13090, %r13089};
	xor.b64  	%rd19633, %rd19631, %rd19632;
	xor.b64  	%rd19634, %rd19595, %rd19571;
	and.b64  	%rd19635, %rd21830, %rd19634;
	xor.b64  	%rd19636, %rd19635, %rd19571;
	add.s64 	%rd19637, %rd19547, %rd21817;
	add.s64 	%rd19638, %rd19637, %rd21441;
	add.s64 	%rd19639, %rd19638, %rd19636;
	add.s64 	%rd19640, %rd19639, %rd19633;
	add.s64 	%rd21829, %rd19640, %rd19558;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13091,%dummy}, %rd21826;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13092}, %rd21826;
	}
	shf.r.wrap.b32 	%r13093, %r13092, %r13091, 28;
	shf.r.wrap.b32 	%r13094, %r13091, %r13092, 28;
	mov.b64 	%rd19641, {%r13094, %r13093};
	shf.l.wrap.b32 	%r13095, %r13091, %r13092, 30;
	shf.l.wrap.b32 	%r13096, %r13092, %r13091, 30;
	mov.b64 	%rd19642, {%r13096, %r13095};
	xor.b64  	%rd19643, %rd19642, %rd19641;
	shf.l.wrap.b32 	%r13097, %r13091, %r13092, 25;
	shf.l.wrap.b32 	%r13098, %r13092, %r13091, 25;
	mov.b64 	%rd19644, {%r13098, %r13097};
	xor.b64  	%rd19645, %rd19643, %rd19644;
	xor.b64  	%rd19646, %rd21826, %rd19582;
	xor.b64  	%rd19647, %rd21826, %rd19606;
	and.b64  	%rd19648, %rd19647, %rd19646;
	xor.b64  	%rd19649, %rd19648, %rd21826;
	add.s64 	%rd19650, %rd19640, %rd19649;
	add.s64 	%rd21825, %rd19650, %rd19645;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13099,%dummy}, %rd21829;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13100}, %rd21829;
	}
	shf.r.wrap.b32 	%r13101, %r13100, %r13099, 14;
	shf.r.wrap.b32 	%r13102, %r13099, %r13100, 14;
	mov.b64 	%rd19651, {%r13102, %r13101};
	shf.r.wrap.b32 	%r13103, %r13100, %r13099, 18;
	shf.r.wrap.b32 	%r13104, %r13099, %r13100, 18;
	mov.b64 	%rd19652, {%r13104, %r13103};
	xor.b64  	%rd19653, %rd19652, %rd19651;
	shf.l.wrap.b32 	%r13105, %r13099, %r13100, 23;
	shf.l.wrap.b32 	%r13106, %r13100, %r13099, 23;
	mov.b64 	%rd19654, {%r13106, %r13105};
	xor.b64  	%rd19655, %rd19653, %rd19654;
	xor.b64  	%rd19656, %rd21830, %rd19595;
	and.b64  	%rd19657, %rd21829, %rd19656;
	xor.b64  	%rd19658, %rd19657, %rd19595;
	add.s64 	%rd19659, %rd19571, %rd21816;
	add.s64 	%rd19660, %rd19659, %rd21440;
	add.s64 	%rd19661, %rd19660, %rd19658;
	add.s64 	%rd19662, %rd19661, %rd19655;
	add.s64 	%rd21828, %rd19662, %rd19582;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13107,%dummy}, %rd21825;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13108}, %rd21825;
	}
	shf.r.wrap.b32 	%r13109, %r13108, %r13107, 28;
	shf.r.wrap.b32 	%r13110, %r13107, %r13108, 28;
	mov.b64 	%rd19663, {%r13110, %r13109};
	shf.l.wrap.b32 	%r13111, %r13107, %r13108, 30;
	shf.l.wrap.b32 	%r13112, %r13108, %r13107, 30;
	mov.b64 	%rd19664, {%r13112, %r13111};
	xor.b64  	%rd19665, %rd19664, %rd19663;
	shf.l.wrap.b32 	%r13113, %r13107, %r13108, 25;
	shf.l.wrap.b32 	%r13114, %r13108, %r13107, 25;
	mov.b64 	%rd19666, {%r13114, %r13113};
	xor.b64  	%rd19667, %rd19665, %rd19666;
	xor.b64  	%rd19668, %rd21825, %rd19606;
	xor.b64  	%rd19669, %rd21825, %rd21826;
	and.b64  	%rd19670, %rd19669, %rd19668;
	xor.b64  	%rd19671, %rd19670, %rd21825;
	add.s64 	%rd19672, %rd19662, %rd19671;
	add.s64 	%rd21824, %rd19672, %rd19667;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13115,%dummy}, %rd21828;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13116}, %rd21828;
	}
	shf.r.wrap.b32 	%r13117, %r13116, %r13115, 14;
	shf.r.wrap.b32 	%r13118, %r13115, %r13116, 14;
	mov.b64 	%rd19673, {%r13118, %r13117};
	shf.r.wrap.b32 	%r13119, %r13116, %r13115, 18;
	shf.r.wrap.b32 	%r13120, %r13115, %r13116, 18;
	mov.b64 	%rd19674, {%r13120, %r13119};
	xor.b64  	%rd19675, %rd19674, %rd19673;
	shf.l.wrap.b32 	%r13121, %r13115, %r13116, 23;
	shf.l.wrap.b32 	%r13122, %r13116, %r13115, 23;
	mov.b64 	%rd19676, {%r13122, %r13121};
	xor.b64  	%rd19677, %rd19675, %rd19676;
	xor.b64  	%rd19678, %rd21829, %rd21830;
	and.b64  	%rd19679, %rd21828, %rd19678;
	xor.b64  	%rd19680, %rd19679, %rd21830;
	add.s64 	%rd19681, %rd19595, %rd21815;
	add.s64 	%rd19682, %rd19681, %rd21439;
	add.s64 	%rd19683, %rd19682, %rd19680;
	add.s64 	%rd19684, %rd19683, %rd19677;
	add.s64 	%rd21827, %rd19684, %rd19606;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13123,%dummy}, %rd21824;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13124}, %rd21824;
	}
	shf.r.wrap.b32 	%r13125, %r13124, %r13123, 28;
	shf.r.wrap.b32 	%r13126, %r13123, %r13124, 28;
	mov.b64 	%rd19685, {%r13126, %r13125};
	shf.l.wrap.b32 	%r13127, %r13123, %r13124, 30;
	shf.l.wrap.b32 	%r13128, %r13124, %r13123, 30;
	mov.b64 	%rd19686, {%r13128, %r13127};
	xor.b64  	%rd19687, %rd19686, %rd19685;
	shf.l.wrap.b32 	%r13129, %r13123, %r13124, 25;
	shf.l.wrap.b32 	%r13130, %r13124, %r13123, 25;
	mov.b64 	%rd19688, {%r13130, %r13129};
	xor.b64  	%rd19689, %rd19687, %rd19688;
	xor.b64  	%rd19690, %rd21824, %rd21826;
	xor.b64  	%rd19691, %rd21824, %rd21825;
	and.b64  	%rd19692, %rd19691, %rd19690;
	xor.b64  	%rd19693, %rd19692, %rd21824;
	add.s64 	%rd19694, %rd19684, %rd19693;
	add.s64 	%rd21823, %rd19694, %rd19689;
	mov.u32 	%r14507, 16;

BB3_349:
	shr.u64 	%rd19695, %rd21816, 6;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13131,%dummy}, %rd21816;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13132}, %rd21816;
	}
	shf.r.wrap.b32 	%r13133, %r13132, %r13131, 19;
	shf.r.wrap.b32 	%r13134, %r13131, %r13132, 19;
	mov.b64 	%rd19696, {%r13134, %r13133};
	xor.b64  	%rd19697, %rd19696, %rd19695;
	shf.l.wrap.b32 	%r13135, %r13131, %r13132, 3;
	shf.l.wrap.b32 	%r13136, %r13132, %r13131, 3;
	mov.b64 	%rd19698, {%r13136, %r13135};
	xor.b64  	%rd19699, %rd19697, %rd19698;
	shr.u64 	%rd19700, %rd21832, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13137,%dummy}, %rd21832;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13138}, %rd21832;
	}
	shf.r.wrap.b32 	%r13139, %r13138, %r13137, 1;
	shf.r.wrap.b32 	%r13140, %r13137, %r13138, 1;
	mov.b64 	%rd19701, {%r13140, %r13139};
	xor.b64  	%rd19702, %rd19701, %rd19700;
	shf.r.wrap.b32 	%r13141, %r13138, %r13137, 8;
	shf.r.wrap.b32 	%r13142, %r13137, %r13138, 8;
	mov.b64 	%rd19703, {%r13142, %r13141};
	xor.b64  	%rd19704, %rd19702, %rd19703;
	add.s64 	%rd19705, %rd21821, %rd21831;
	add.s64 	%rd19706, %rd19705, %rd19699;
	add.s64 	%rd21831, %rd19706, %rd19704;
	shr.u64 	%rd19707, %rd21815, 6;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13143,%dummy}, %rd21815;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13144}, %rd21815;
	}
	shf.r.wrap.b32 	%r13145, %r13144, %r13143, 19;
	shf.r.wrap.b32 	%r13146, %r13143, %r13144, 19;
	mov.b64 	%rd19708, {%r13146, %r13145};
	xor.b64  	%rd19709, %rd19708, %rd19707;
	shf.l.wrap.b32 	%r13147, %r13143, %r13144, 3;
	shf.l.wrap.b32 	%r13148, %r13144, %r13143, 3;
	mov.b64 	%rd19710, {%r13148, %r13147};
	xor.b64  	%rd19711, %rd19709, %rd19710;
	shr.u64 	%rd19712, %rd21833, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13149,%dummy}, %rd21833;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13150}, %rd21833;
	}
	shf.r.wrap.b32 	%r13151, %r13150, %r13149, 1;
	shf.r.wrap.b32 	%r13152, %r13149, %r13150, 1;
	mov.b64 	%rd19713, {%r13152, %r13151};
	xor.b64  	%rd19714, %rd19713, %rd19712;
	shf.r.wrap.b32 	%r13153, %r13150, %r13149, 8;
	shf.r.wrap.b32 	%r13154, %r13149, %r13150, 8;
	mov.b64 	%rd19715, {%r13154, %r13153};
	xor.b64  	%rd19716, %rd19714, %rd19715;
	add.s64 	%rd19717, %rd21820, %rd21832;
	add.s64 	%rd19718, %rd19717, %rd19711;
	add.s64 	%rd21832, %rd19718, %rd19716;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13155,%dummy}, %rd21831;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13156}, %rd21831;
	}
	shf.r.wrap.b32 	%r13157, %r13156, %r13155, 19;
	shf.r.wrap.b32 	%r13158, %r13155, %r13156, 19;
	mov.b64 	%rd19719, {%r13158, %r13157};
	shf.l.wrap.b32 	%r13159, %r13155, %r13156, 3;
	shf.l.wrap.b32 	%r13160, %r13156, %r13155, 3;
	mov.b64 	%rd19720, {%r13160, %r13159};
	shr.u64 	%rd19721, %rd21831, 6;
	xor.b64  	%rd19722, %rd19719, %rd19721;
	xor.b64  	%rd19723, %rd19722, %rd19720;
	shr.u64 	%rd19724, %rd21834, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13161,%dummy}, %rd21834;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13162}, %rd21834;
	}
	shf.r.wrap.b32 	%r13163, %r13162, %r13161, 1;
	shf.r.wrap.b32 	%r13164, %r13161, %r13162, 1;
	mov.b64 	%rd19725, {%r13164, %r13163};
	xor.b64  	%rd19726, %rd19725, %rd19724;
	shf.r.wrap.b32 	%r13165, %r13162, %r13161, 8;
	shf.r.wrap.b32 	%r13166, %r13161, %r13162, 8;
	mov.b64 	%rd19727, {%r13166, %r13165};
	xor.b64  	%rd19728, %rd19726, %rd19727;
	add.s64 	%rd19729, %rd21819, %rd21833;
	add.s64 	%rd19730, %rd19729, %rd19723;
	add.s64 	%rd21833, %rd19730, %rd19728;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13167,%dummy}, %rd21832;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13168}, %rd21832;
	}
	shf.r.wrap.b32 	%r13169, %r13168, %r13167, 19;
	shf.r.wrap.b32 	%r13170, %r13167, %r13168, 19;
	mov.b64 	%rd19731, {%r13170, %r13169};
	shf.l.wrap.b32 	%r13171, %r13167, %r13168, 3;
	shf.l.wrap.b32 	%r13172, %r13168, %r13167, 3;
	mov.b64 	%rd19732, {%r13172, %r13171};
	shr.u64 	%rd19733, %rd21832, 6;
	xor.b64  	%rd19734, %rd19731, %rd19733;
	xor.b64  	%rd19735, %rd19734, %rd19732;
	shr.u64 	%rd19736, %rd21835, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13173,%dummy}, %rd21835;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13174}, %rd21835;
	}
	shf.r.wrap.b32 	%r13175, %r13174, %r13173, 1;
	shf.r.wrap.b32 	%r13176, %r13173, %r13174, 1;
	mov.b64 	%rd19737, {%r13176, %r13175};
	xor.b64  	%rd19738, %rd19737, %rd19736;
	shf.r.wrap.b32 	%r13177, %r13174, %r13173, 8;
	shf.r.wrap.b32 	%r13178, %r13173, %r13174, 8;
	mov.b64 	%rd19739, {%r13178, %r13177};
	xor.b64  	%rd19740, %rd19738, %rd19739;
	add.s64 	%rd19741, %rd21818, %rd21834;
	add.s64 	%rd19742, %rd19741, %rd19735;
	add.s64 	%rd21834, %rd19742, %rd19740;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13179,%dummy}, %rd21833;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13180}, %rd21833;
	}
	shf.r.wrap.b32 	%r13181, %r13180, %r13179, 19;
	shf.r.wrap.b32 	%r13182, %r13179, %r13180, 19;
	mov.b64 	%rd19743, {%r13182, %r13181};
	shf.l.wrap.b32 	%r13183, %r13179, %r13180, 3;
	shf.l.wrap.b32 	%r13184, %r13180, %r13179, 3;
	mov.b64 	%rd19744, {%r13184, %r13183};
	shr.u64 	%rd19745, %rd21833, 6;
	xor.b64  	%rd19746, %rd19743, %rd19745;
	xor.b64  	%rd19747, %rd19746, %rd19744;
	shr.u64 	%rd19748, %rd21836, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13185,%dummy}, %rd21836;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13186}, %rd21836;
	}
	shf.r.wrap.b32 	%r13187, %r13186, %r13185, 1;
	shf.r.wrap.b32 	%r13188, %r13185, %r13186, 1;
	mov.b64 	%rd19749, {%r13188, %r13187};
	xor.b64  	%rd19750, %rd19749, %rd19748;
	shf.r.wrap.b32 	%r13189, %r13186, %r13185, 8;
	shf.r.wrap.b32 	%r13190, %r13185, %r13186, 8;
	mov.b64 	%rd19751, {%r13190, %r13189};
	xor.b64  	%rd19752, %rd19750, %rd19751;
	add.s64 	%rd19753, %rd21817, %rd21835;
	add.s64 	%rd19754, %rd19753, %rd19747;
	add.s64 	%rd21835, %rd19754, %rd19752;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13191,%dummy}, %rd21834;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13192}, %rd21834;
	}
	shf.r.wrap.b32 	%r13193, %r13192, %r13191, 19;
	shf.r.wrap.b32 	%r13194, %r13191, %r13192, 19;
	mov.b64 	%rd19755, {%r13194, %r13193};
	shf.l.wrap.b32 	%r13195, %r13191, %r13192, 3;
	shf.l.wrap.b32 	%r13196, %r13192, %r13191, 3;
	mov.b64 	%rd19756, {%r13196, %r13195};
	shr.u64 	%rd19757, %rd21834, 6;
	xor.b64  	%rd19758, %rd19755, %rd19757;
	xor.b64  	%rd19759, %rd19758, %rd19756;
	shr.u64 	%rd19760, %rd21837, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13197,%dummy}, %rd21837;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13198}, %rd21837;
	}
	shf.r.wrap.b32 	%r13199, %r13198, %r13197, 1;
	shf.r.wrap.b32 	%r13200, %r13197, %r13198, 1;
	mov.b64 	%rd19761, {%r13200, %r13199};
	xor.b64  	%rd19762, %rd19761, %rd19760;
	shf.r.wrap.b32 	%r13201, %r13198, %r13197, 8;
	shf.r.wrap.b32 	%r13202, %r13197, %r13198, 8;
	mov.b64 	%rd19763, {%r13202, %r13201};
	xor.b64  	%rd19764, %rd19762, %rd19763;
	add.s64 	%rd19765, %rd21816, %rd21836;
	add.s64 	%rd19766, %rd19765, %rd19759;
	add.s64 	%rd21836, %rd19766, %rd19764;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13203,%dummy}, %rd21835;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13204}, %rd21835;
	}
	shf.r.wrap.b32 	%r13205, %r13204, %r13203, 19;
	shf.r.wrap.b32 	%r13206, %r13203, %r13204, 19;
	mov.b64 	%rd19767, {%r13206, %r13205};
	shf.l.wrap.b32 	%r13207, %r13203, %r13204, 3;
	shf.l.wrap.b32 	%r13208, %r13204, %r13203, 3;
	mov.b64 	%rd19768, {%r13208, %r13207};
	shr.u64 	%rd19769, %rd21835, 6;
	xor.b64  	%rd19770, %rd19767, %rd19769;
	xor.b64  	%rd19771, %rd19770, %rd19768;
	shr.u64 	%rd19772, %rd21838, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13209,%dummy}, %rd21838;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13210}, %rd21838;
	}
	shf.r.wrap.b32 	%r13211, %r13210, %r13209, 1;
	shf.r.wrap.b32 	%r13212, %r13209, %r13210, 1;
	mov.b64 	%rd19773, {%r13212, %r13211};
	xor.b64  	%rd19774, %rd19773, %rd19772;
	shf.r.wrap.b32 	%r13213, %r13210, %r13209, 8;
	shf.r.wrap.b32 	%r13214, %r13209, %r13210, 8;
	mov.b64 	%rd19775, {%r13214, %r13213};
	xor.b64  	%rd19776, %rd19774, %rd19775;
	add.s64 	%rd19777, %rd21815, %rd21837;
	add.s64 	%rd19778, %rd19777, %rd19771;
	add.s64 	%rd21837, %rd19778, %rd19776;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13215,%dummy}, %rd21836;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13216}, %rd21836;
	}
	shf.r.wrap.b32 	%r13217, %r13216, %r13215, 19;
	shf.r.wrap.b32 	%r13218, %r13215, %r13216, 19;
	mov.b64 	%rd19779, {%r13218, %r13217};
	shf.l.wrap.b32 	%r13219, %r13215, %r13216, 3;
	shf.l.wrap.b32 	%r13220, %r13216, %r13215, 3;
	mov.b64 	%rd19780, {%r13220, %r13219};
	shr.u64 	%rd19781, %rd21836, 6;
	xor.b64  	%rd19782, %rd19779, %rd19781;
	xor.b64  	%rd19783, %rd19782, %rd19780;
	shr.u64 	%rd19784, %rd21822, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13221,%dummy}, %rd21822;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13222}, %rd21822;
	}
	shf.r.wrap.b32 	%r13223, %r13222, %r13221, 1;
	shf.r.wrap.b32 	%r13224, %r13221, %r13222, 1;
	mov.b64 	%rd19785, {%r13224, %r13223};
	xor.b64  	%rd19786, %rd19785, %rd19784;
	shf.r.wrap.b32 	%r13225, %r13222, %r13221, 8;
	shf.r.wrap.b32 	%r13226, %r13221, %r13222, 8;
	mov.b64 	%rd19787, {%r13226, %r13225};
	xor.b64  	%rd19788, %rd19786, %rd19787;
	add.s64 	%rd19789, %rd21831, %rd21838;
	add.s64 	%rd19790, %rd19789, %rd19783;
	add.s64 	%rd21838, %rd19790, %rd19788;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13227,%dummy}, %rd21837;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13228}, %rd21837;
	}
	shf.r.wrap.b32 	%r13229, %r13228, %r13227, 19;
	shf.r.wrap.b32 	%r13230, %r13227, %r13228, 19;
	mov.b64 	%rd19791, {%r13230, %r13229};
	shf.l.wrap.b32 	%r13231, %r13227, %r13228, 3;
	shf.l.wrap.b32 	%r13232, %r13228, %r13227, 3;
	mov.b64 	%rd19792, {%r13232, %r13231};
	shr.u64 	%rd19793, %rd21837, 6;
	xor.b64  	%rd19794, %rd19791, %rd19793;
	xor.b64  	%rd19795, %rd19794, %rd19792;
	shr.u64 	%rd19796, %rd21821, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13233,%dummy}, %rd21821;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13234}, %rd21821;
	}
	shf.r.wrap.b32 	%r13235, %r13234, %r13233, 1;
	shf.r.wrap.b32 	%r13236, %r13233, %r13234, 1;
	mov.b64 	%rd19797, {%r13236, %r13235};
	xor.b64  	%rd19798, %rd19797, %rd19796;
	shf.r.wrap.b32 	%r13237, %r13234, %r13233, 8;
	shf.r.wrap.b32 	%r13238, %r13233, %r13234, 8;
	mov.b64 	%rd19799, {%r13238, %r13237};
	xor.b64  	%rd19800, %rd19798, %rd19799;
	add.s64 	%rd19801, %rd21832, %rd21822;
	add.s64 	%rd19802, %rd19801, %rd19795;
	add.s64 	%rd21822, %rd19802, %rd19800;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13239,%dummy}, %rd21838;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13240}, %rd21838;
	}
	shf.r.wrap.b32 	%r13241, %r13240, %r13239, 19;
	shf.r.wrap.b32 	%r13242, %r13239, %r13240, 19;
	mov.b64 	%rd19803, {%r13242, %r13241};
	shf.l.wrap.b32 	%r13243, %r13239, %r13240, 3;
	shf.l.wrap.b32 	%r13244, %r13240, %r13239, 3;
	mov.b64 	%rd19804, {%r13244, %r13243};
	shr.u64 	%rd19805, %rd21838, 6;
	xor.b64  	%rd19806, %rd19803, %rd19805;
	xor.b64  	%rd19807, %rd19806, %rd19804;
	shr.u64 	%rd19808, %rd21820, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13245,%dummy}, %rd21820;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13246}, %rd21820;
	}
	shf.r.wrap.b32 	%r13247, %r13246, %r13245, 1;
	shf.r.wrap.b32 	%r13248, %r13245, %r13246, 1;
	mov.b64 	%rd19809, {%r13248, %r13247};
	xor.b64  	%rd19810, %rd19809, %rd19808;
	shf.r.wrap.b32 	%r13249, %r13246, %r13245, 8;
	shf.r.wrap.b32 	%r13250, %r13245, %r13246, 8;
	mov.b64 	%rd19811, {%r13250, %r13249};
	xor.b64  	%rd19812, %rd19810, %rd19811;
	add.s64 	%rd19813, %rd21833, %rd21821;
	add.s64 	%rd19814, %rd19813, %rd19807;
	add.s64 	%rd21821, %rd19814, %rd19812;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13251,%dummy}, %rd21822;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13252}, %rd21822;
	}
	shf.r.wrap.b32 	%r13253, %r13252, %r13251, 19;
	shf.r.wrap.b32 	%r13254, %r13251, %r13252, 19;
	mov.b64 	%rd19815, {%r13254, %r13253};
	shf.l.wrap.b32 	%r13255, %r13251, %r13252, 3;
	shf.l.wrap.b32 	%r13256, %r13252, %r13251, 3;
	mov.b64 	%rd19816, {%r13256, %r13255};
	shr.u64 	%rd19817, %rd21822, 6;
	xor.b64  	%rd19818, %rd19815, %rd19817;
	xor.b64  	%rd19819, %rd19818, %rd19816;
	shr.u64 	%rd19820, %rd21819, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13257,%dummy}, %rd21819;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13258}, %rd21819;
	}
	shf.r.wrap.b32 	%r13259, %r13258, %r13257, 1;
	shf.r.wrap.b32 	%r13260, %r13257, %r13258, 1;
	mov.b64 	%rd19821, {%r13260, %r13259};
	xor.b64  	%rd19822, %rd19821, %rd19820;
	shf.r.wrap.b32 	%r13261, %r13258, %r13257, 8;
	shf.r.wrap.b32 	%r13262, %r13257, %r13258, 8;
	mov.b64 	%rd19823, {%r13262, %r13261};
	xor.b64  	%rd19824, %rd19822, %rd19823;
	add.s64 	%rd19825, %rd21834, %rd21820;
	add.s64 	%rd19826, %rd19825, %rd19819;
	add.s64 	%rd21820, %rd19826, %rd19824;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13263,%dummy}, %rd21821;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13264}, %rd21821;
	}
	shf.r.wrap.b32 	%r13265, %r13264, %r13263, 19;
	shf.r.wrap.b32 	%r13266, %r13263, %r13264, 19;
	mov.b64 	%rd19827, {%r13266, %r13265};
	shf.l.wrap.b32 	%r13267, %r13263, %r13264, 3;
	shf.l.wrap.b32 	%r13268, %r13264, %r13263, 3;
	mov.b64 	%rd19828, {%r13268, %r13267};
	shr.u64 	%rd19829, %rd21821, 6;
	xor.b64  	%rd19830, %rd19827, %rd19829;
	xor.b64  	%rd19831, %rd19830, %rd19828;
	shr.u64 	%rd19832, %rd21818, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13269,%dummy}, %rd21818;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13270}, %rd21818;
	}
	shf.r.wrap.b32 	%r13271, %r13270, %r13269, 1;
	shf.r.wrap.b32 	%r13272, %r13269, %r13270, 1;
	mov.b64 	%rd19833, {%r13272, %r13271};
	xor.b64  	%rd19834, %rd19833, %rd19832;
	shf.r.wrap.b32 	%r13273, %r13270, %r13269, 8;
	shf.r.wrap.b32 	%r13274, %r13269, %r13270, 8;
	mov.b64 	%rd19835, {%r13274, %r13273};
	xor.b64  	%rd19836, %rd19834, %rd19835;
	add.s64 	%rd19837, %rd21835, %rd21819;
	add.s64 	%rd19838, %rd19837, %rd19831;
	add.s64 	%rd21819, %rd19838, %rd19836;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13275,%dummy}, %rd21820;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13276}, %rd21820;
	}
	shf.r.wrap.b32 	%r13277, %r13276, %r13275, 19;
	shf.r.wrap.b32 	%r13278, %r13275, %r13276, 19;
	mov.b64 	%rd19839, {%r13278, %r13277};
	shf.l.wrap.b32 	%r13279, %r13275, %r13276, 3;
	shf.l.wrap.b32 	%r13280, %r13276, %r13275, 3;
	mov.b64 	%rd19840, {%r13280, %r13279};
	shr.u64 	%rd19841, %rd21820, 6;
	xor.b64  	%rd19842, %rd19839, %rd19841;
	xor.b64  	%rd19843, %rd19842, %rd19840;
	shr.u64 	%rd19844, %rd21817, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13281,%dummy}, %rd21817;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13282}, %rd21817;
	}
	shf.r.wrap.b32 	%r13283, %r13282, %r13281, 1;
	shf.r.wrap.b32 	%r13284, %r13281, %r13282, 1;
	mov.b64 	%rd19845, {%r13284, %r13283};
	xor.b64  	%rd19846, %rd19845, %rd19844;
	shf.r.wrap.b32 	%r13285, %r13282, %r13281, 8;
	shf.r.wrap.b32 	%r13286, %r13281, %r13282, 8;
	mov.b64 	%rd19847, {%r13286, %r13285};
	xor.b64  	%rd19848, %rd19846, %rd19847;
	add.s64 	%rd19849, %rd21836, %rd21818;
	add.s64 	%rd19850, %rd19849, %rd19843;
	add.s64 	%rd21818, %rd19850, %rd19848;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13287,%dummy}, %rd21819;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13288}, %rd21819;
	}
	shf.r.wrap.b32 	%r13289, %r13288, %r13287, 19;
	shf.r.wrap.b32 	%r13290, %r13287, %r13288, 19;
	mov.b64 	%rd19851, {%r13290, %r13289};
	shf.l.wrap.b32 	%r13291, %r13287, %r13288, 3;
	shf.l.wrap.b32 	%r13292, %r13288, %r13287, 3;
	mov.b64 	%rd19852, {%r13292, %r13291};
	shr.u64 	%rd19853, %rd21819, 6;
	xor.b64  	%rd19854, %rd19851, %rd19853;
	xor.b64  	%rd19855, %rd19854, %rd19852;
	shr.u64 	%rd19856, %rd21816, 7;
	shf.r.wrap.b32 	%r13293, %r13132, %r13131, 1;
	shf.r.wrap.b32 	%r13294, %r13131, %r13132, 1;
	mov.b64 	%rd19857, {%r13294, %r13293};
	xor.b64  	%rd19858, %rd19857, %rd19856;
	shf.r.wrap.b32 	%r13295, %r13132, %r13131, 8;
	shf.r.wrap.b32 	%r13296, %r13131, %r13132, 8;
	mov.b64 	%rd19859, {%r13296, %r13295};
	xor.b64  	%rd19860, %rd19858, %rd19859;
	add.s64 	%rd19861, %rd21837, %rd21817;
	add.s64 	%rd19862, %rd19861, %rd19855;
	add.s64 	%rd21817, %rd19862, %rd19860;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13297,%dummy}, %rd21818;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13298}, %rd21818;
	}
	shf.r.wrap.b32 	%r13299, %r13298, %r13297, 19;
	shf.r.wrap.b32 	%r13300, %r13297, %r13298, 19;
	mov.b64 	%rd19863, {%r13300, %r13299};
	shf.l.wrap.b32 	%r13301, %r13297, %r13298, 3;
	shf.l.wrap.b32 	%r13302, %r13298, %r13297, 3;
	mov.b64 	%rd19864, {%r13302, %r13301};
	shr.u64 	%rd19865, %rd21818, 6;
	xor.b64  	%rd19866, %rd19863, %rd19865;
	xor.b64  	%rd19867, %rd19866, %rd19864;
	shr.u64 	%rd19868, %rd21815, 7;
	shf.r.wrap.b32 	%r13303, %r13144, %r13143, 1;
	shf.r.wrap.b32 	%r13304, %r13143, %r13144, 1;
	mov.b64 	%rd19869, {%r13304, %r13303};
	xor.b64  	%rd19870, %rd19869, %rd19868;
	shf.r.wrap.b32 	%r13305, %r13144, %r13143, 8;
	shf.r.wrap.b32 	%r13306, %r13143, %r13144, 8;
	mov.b64 	%rd19871, {%r13306, %r13305};
	xor.b64  	%rd19872, %rd19870, %rd19871;
	add.s64 	%rd19873, %rd21838, %rd21816;
	add.s64 	%rd19874, %rd19873, %rd19867;
	add.s64 	%rd21816, %rd19874, %rd19872;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13307,%dummy}, %rd21817;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13308}, %rd21817;
	}
	shf.r.wrap.b32 	%r13309, %r13308, %r13307, 19;
	shf.r.wrap.b32 	%r13310, %r13307, %r13308, 19;
	mov.b64 	%rd19875, {%r13310, %r13309};
	shf.l.wrap.b32 	%r13311, %r13307, %r13308, 3;
	shf.l.wrap.b32 	%r13312, %r13308, %r13307, 3;
	mov.b64 	%rd19876, {%r13312, %r13311};
	shr.u64 	%rd19877, %rd21817, 6;
	xor.b64  	%rd19878, %rd19875, %rd19877;
	xor.b64  	%rd19879, %rd19878, %rd19876;
	shf.r.wrap.b32 	%r13313, %r13156, %r13155, 1;
	shf.r.wrap.b32 	%r13314, %r13155, %r13156, 1;
	mov.b64 	%rd19880, {%r13314, %r13313};
	shf.r.wrap.b32 	%r13315, %r13156, %r13155, 8;
	shf.r.wrap.b32 	%r13316, %r13155, %r13156, 8;
	mov.b64 	%rd19881, {%r13316, %r13315};
	shr.u64 	%rd19882, %rd21831, 7;
	xor.b64  	%rd19883, %rd19880, %rd19882;
	xor.b64  	%rd19884, %rd19883, %rd19881;
	add.s64 	%rd19885, %rd21822, %rd21815;
	add.s64 	%rd19886, %rd19885, %rd19879;
	add.s64 	%rd21815, %rd19886, %rd19884;
	mul.wide.s32 	%rd19887, %r14507, 8;
	mov.u64 	%rd19888, k_sha512;
	add.s64 	%rd19889, %rd19888, %rd19887;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13317,%dummy}, %rd21827;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13318}, %rd21827;
	}
	shf.r.wrap.b32 	%r13319, %r13318, %r13317, 18;
	shf.r.wrap.b32 	%r13320, %r13317, %r13318, 18;
	mov.b64 	%rd19890, {%r13320, %r13319};
	shf.r.wrap.b32 	%r13321, %r13318, %r13317, 14;
	shf.r.wrap.b32 	%r13322, %r13317, %r13318, 14;
	mov.b64 	%rd19891, {%r13322, %r13321};
	xor.b64  	%rd19892, %rd19890, %rd19891;
	shf.l.wrap.b32 	%r13323, %r13317, %r13318, 23;
	shf.l.wrap.b32 	%r13324, %r13318, %r13317, 23;
	mov.b64 	%rd19893, {%r13324, %r13323};
	xor.b64  	%rd19894, %rd19892, %rd19893;
	xor.b64  	%rd19895, %rd21828, %rd21829;
	and.b64  	%rd19896, %rd19895, %rd21827;
	xor.b64  	%rd19897, %rd19896, %rd21829;
	add.s64 	%rd19898, %rd19897, %rd21830;
	add.s64 	%rd19899, %rd19898, %rd21831;
	ld.const.u64 	%rd19900, [%rd19889];
	add.s64 	%rd19901, %rd19899, %rd19900;
	add.s64 	%rd19902, %rd19901, %rd19894;
	add.s64 	%rd19903, %rd19902, %rd21826;
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13325}, %rd21823;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13326,%dummy}, %rd21823;
	}
	shf.l.wrap.b32 	%r13327, %r13326, %r13325, 30;
	shf.l.wrap.b32 	%r13328, %r13325, %r13326, 30;
	mov.b64 	%rd19904, {%r13328, %r13327};
	shf.r.wrap.b32 	%r13329, %r13325, %r13326, 28;
	shf.r.wrap.b32 	%r13330, %r13326, %r13325, 28;
	mov.b64 	%rd19905, {%r13330, %r13329};
	xor.b64  	%rd19906, %rd19904, %rd19905;
	shf.l.wrap.b32 	%r13331, %r13326, %r13325, 25;
	shf.l.wrap.b32 	%r13332, %r13325, %r13326, 25;
	mov.b64 	%rd19907, {%r13332, %r13331};
	xor.b64  	%rd19908, %rd19906, %rd19907;
	xor.b64  	%rd19909, %rd21823, %rd21824;
	xor.b64  	%rd19910, %rd21823, %rd21825;
	and.b64  	%rd19911, %rd19909, %rd19910;
	xor.b64  	%rd19912, %rd19911, %rd21823;
	add.s64 	%rd19913, %rd19902, %rd19912;
	add.s64 	%rd19914, %rd19913, %rd19908;
	add.s32 	%r13333, %r14507, 1;
	mul.wide.s32 	%rd19915, %r13333, 8;
	add.s64 	%rd19916, %rd19888, %rd19915;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13334,%dummy}, %rd19903;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13335}, %rd19903;
	}
	shf.r.wrap.b32 	%r13336, %r13335, %r13334, 14;
	shf.r.wrap.b32 	%r13337, %r13334, %r13335, 14;
	mov.b64 	%rd19917, {%r13337, %r13336};
	shf.r.wrap.b32 	%r13338, %r13335, %r13334, 18;
	shf.r.wrap.b32 	%r13339, %r13334, %r13335, 18;
	mov.b64 	%rd19918, {%r13339, %r13338};
	xor.b64  	%rd19919, %rd19918, %rd19917;
	shf.l.wrap.b32 	%r13340, %r13334, %r13335, 23;
	shf.l.wrap.b32 	%r13341, %r13335, %r13334, 23;
	mov.b64 	%rd19920, {%r13341, %r13340};
	xor.b64  	%rd19921, %rd19919, %rd19920;
	xor.b64  	%rd19922, %rd21827, %rd21828;
	and.b64  	%rd19923, %rd19903, %rd19922;
	xor.b64  	%rd19924, %rd19923, %rd21828;
	add.s64 	%rd19925, %rd21832, %rd21829;
	ld.const.u64 	%rd19926, [%rd19916];
	add.s64 	%rd19927, %rd19925, %rd19926;
	add.s64 	%rd19928, %rd19927, %rd19924;
	add.s64 	%rd19929, %rd19928, %rd19921;
	add.s64 	%rd19930, %rd19929, %rd21825;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13342,%dummy}, %rd19914;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13343}, %rd19914;
	}
	shf.r.wrap.b32 	%r13344, %r13343, %r13342, 28;
	shf.r.wrap.b32 	%r13345, %r13342, %r13343, 28;
	mov.b64 	%rd19931, {%r13345, %r13344};
	shf.l.wrap.b32 	%r13346, %r13342, %r13343, 30;
	shf.l.wrap.b32 	%r13347, %r13343, %r13342, 30;
	mov.b64 	%rd19932, {%r13347, %r13346};
	xor.b64  	%rd19933, %rd19932, %rd19931;
	shf.l.wrap.b32 	%r13348, %r13342, %r13343, 25;
	shf.l.wrap.b32 	%r13349, %r13343, %r13342, 25;
	mov.b64 	%rd19934, {%r13349, %r13348};
	xor.b64  	%rd19935, %rd19933, %rd19934;
	xor.b64  	%rd19936, %rd19914, %rd21824;
	xor.b64  	%rd19937, %rd19914, %rd21823;
	and.b64  	%rd19938, %rd19937, %rd19936;
	xor.b64  	%rd19939, %rd19938, %rd19914;
	add.s64 	%rd19940, %rd19929, %rd19939;
	add.s64 	%rd19941, %rd19940, %rd19935;
	add.s32 	%r13350, %r14507, 2;
	mul.wide.s32 	%rd19942, %r13350, 8;
	add.s64 	%rd19943, %rd19888, %rd19942;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13351,%dummy}, %rd19930;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13352}, %rd19930;
	}
	shf.r.wrap.b32 	%r13353, %r13352, %r13351, 14;
	shf.r.wrap.b32 	%r13354, %r13351, %r13352, 14;
	mov.b64 	%rd19944, {%r13354, %r13353};
	shf.r.wrap.b32 	%r13355, %r13352, %r13351, 18;
	shf.r.wrap.b32 	%r13356, %r13351, %r13352, 18;
	mov.b64 	%rd19945, {%r13356, %r13355};
	xor.b64  	%rd19946, %rd19945, %rd19944;
	shf.l.wrap.b32 	%r13357, %r13351, %r13352, 23;
	shf.l.wrap.b32 	%r13358, %r13352, %r13351, 23;
	mov.b64 	%rd19947, {%r13358, %r13357};
	xor.b64  	%rd19948, %rd19946, %rd19947;
	xor.b64  	%rd19949, %rd19903, %rd21827;
	and.b64  	%rd19950, %rd19930, %rd19949;
	xor.b64  	%rd19951, %rd19950, %rd21827;
	add.s64 	%rd19952, %rd21833, %rd21828;
	ld.const.u64 	%rd19953, [%rd19943];
	add.s64 	%rd19954, %rd19952, %rd19953;
	add.s64 	%rd19955, %rd19954, %rd19951;
	add.s64 	%rd19956, %rd19955, %rd19948;
	add.s64 	%rd19957, %rd19956, %rd21824;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13359,%dummy}, %rd19941;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13360}, %rd19941;
	}
	shf.r.wrap.b32 	%r13361, %r13360, %r13359, 28;
	shf.r.wrap.b32 	%r13362, %r13359, %r13360, 28;
	mov.b64 	%rd19958, {%r13362, %r13361};
	shf.l.wrap.b32 	%r13363, %r13359, %r13360, 30;
	shf.l.wrap.b32 	%r13364, %r13360, %r13359, 30;
	mov.b64 	%rd19959, {%r13364, %r13363};
	xor.b64  	%rd19960, %rd19959, %rd19958;
	shf.l.wrap.b32 	%r13365, %r13359, %r13360, 25;
	shf.l.wrap.b32 	%r13366, %r13360, %r13359, 25;
	mov.b64 	%rd19961, {%r13366, %r13365};
	xor.b64  	%rd19962, %rd19960, %rd19961;
	xor.b64  	%rd19963, %rd19941, %rd21823;
	xor.b64  	%rd19964, %rd19941, %rd19914;
	and.b64  	%rd19965, %rd19964, %rd19963;
	xor.b64  	%rd19966, %rd19965, %rd19941;
	add.s64 	%rd19967, %rd19956, %rd19966;
	add.s64 	%rd19968, %rd19967, %rd19962;
	add.s32 	%r13367, %r14507, 3;
	mul.wide.s32 	%rd19969, %r13367, 8;
	add.s64 	%rd19970, %rd19888, %rd19969;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13368,%dummy}, %rd19957;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13369}, %rd19957;
	}
	shf.r.wrap.b32 	%r13370, %r13369, %r13368, 14;
	shf.r.wrap.b32 	%r13371, %r13368, %r13369, 14;
	mov.b64 	%rd19971, {%r13371, %r13370};
	shf.r.wrap.b32 	%r13372, %r13369, %r13368, 18;
	shf.r.wrap.b32 	%r13373, %r13368, %r13369, 18;
	mov.b64 	%rd19972, {%r13373, %r13372};
	xor.b64  	%rd19973, %rd19972, %rd19971;
	shf.l.wrap.b32 	%r13374, %r13368, %r13369, 23;
	shf.l.wrap.b32 	%r13375, %r13369, %r13368, 23;
	mov.b64 	%rd19974, {%r13375, %r13374};
	xor.b64  	%rd19975, %rd19973, %rd19974;
	xor.b64  	%rd19976, %rd19930, %rd19903;
	and.b64  	%rd19977, %rd19957, %rd19976;
	xor.b64  	%rd19978, %rd19977, %rd19903;
	add.s64 	%rd19979, %rd21834, %rd21827;
	ld.const.u64 	%rd19980, [%rd19970];
	add.s64 	%rd19981, %rd19979, %rd19980;
	add.s64 	%rd19982, %rd19981, %rd19978;
	add.s64 	%rd19983, %rd19982, %rd19975;
	add.s64 	%rd19984, %rd19983, %rd21823;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13376,%dummy}, %rd19968;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13377}, %rd19968;
	}
	shf.r.wrap.b32 	%r13378, %r13377, %r13376, 28;
	shf.r.wrap.b32 	%r13379, %r13376, %r13377, 28;
	mov.b64 	%rd19985, {%r13379, %r13378};
	shf.l.wrap.b32 	%r13380, %r13376, %r13377, 30;
	shf.l.wrap.b32 	%r13381, %r13377, %r13376, 30;
	mov.b64 	%rd19986, {%r13381, %r13380};
	xor.b64  	%rd19987, %rd19986, %rd19985;
	shf.l.wrap.b32 	%r13382, %r13376, %r13377, 25;
	shf.l.wrap.b32 	%r13383, %r13377, %r13376, 25;
	mov.b64 	%rd19988, {%r13383, %r13382};
	xor.b64  	%rd19989, %rd19987, %rd19988;
	xor.b64  	%rd19990, %rd19968, %rd19914;
	xor.b64  	%rd19991, %rd19968, %rd19941;
	and.b64  	%rd19992, %rd19991, %rd19990;
	xor.b64  	%rd19993, %rd19992, %rd19968;
	add.s64 	%rd19994, %rd19983, %rd19993;
	add.s64 	%rd19995, %rd19994, %rd19989;
	add.s32 	%r13384, %r14507, 4;
	mul.wide.s32 	%rd19996, %r13384, 8;
	add.s64 	%rd19997, %rd19888, %rd19996;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13385,%dummy}, %rd19984;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13386}, %rd19984;
	}
	shf.r.wrap.b32 	%r13387, %r13386, %r13385, 14;
	shf.r.wrap.b32 	%r13388, %r13385, %r13386, 14;
	mov.b64 	%rd19998, {%r13388, %r13387};
	shf.r.wrap.b32 	%r13389, %r13386, %r13385, 18;
	shf.r.wrap.b32 	%r13390, %r13385, %r13386, 18;
	mov.b64 	%rd19999, {%r13390, %r13389};
	xor.b64  	%rd20000, %rd19999, %rd19998;
	shf.l.wrap.b32 	%r13391, %r13385, %r13386, 23;
	shf.l.wrap.b32 	%r13392, %r13386, %r13385, 23;
	mov.b64 	%rd20001, {%r13392, %r13391};
	xor.b64  	%rd20002, %rd20000, %rd20001;
	xor.b64  	%rd20003, %rd19957, %rd19930;
	and.b64  	%rd20004, %rd19984, %rd20003;
	xor.b64  	%rd20005, %rd20004, %rd19930;
	add.s64 	%rd20006, %rd19903, %rd21835;
	ld.const.u64 	%rd20007, [%rd19997];
	add.s64 	%rd20008, %rd20006, %rd20007;
	add.s64 	%rd20009, %rd20008, %rd20005;
	add.s64 	%rd20010, %rd20009, %rd20002;
	add.s64 	%rd20011, %rd20010, %rd19914;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13393,%dummy}, %rd19995;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13394}, %rd19995;
	}
	shf.r.wrap.b32 	%r13395, %r13394, %r13393, 28;
	shf.r.wrap.b32 	%r13396, %r13393, %r13394, 28;
	mov.b64 	%rd20012, {%r13396, %r13395};
	shf.l.wrap.b32 	%r13397, %r13393, %r13394, 30;
	shf.l.wrap.b32 	%r13398, %r13394, %r13393, 30;
	mov.b64 	%rd20013, {%r13398, %r13397};
	xor.b64  	%rd20014, %rd20013, %rd20012;
	shf.l.wrap.b32 	%r13399, %r13393, %r13394, 25;
	shf.l.wrap.b32 	%r13400, %r13394, %r13393, 25;
	mov.b64 	%rd20015, {%r13400, %r13399};
	xor.b64  	%rd20016, %rd20014, %rd20015;
	xor.b64  	%rd20017, %rd19995, %rd19941;
	xor.b64  	%rd20018, %rd19995, %rd19968;
	and.b64  	%rd20019, %rd20018, %rd20017;
	xor.b64  	%rd20020, %rd20019, %rd19995;
	add.s64 	%rd20021, %rd20010, %rd20020;
	add.s64 	%rd20022, %rd20021, %rd20016;
	add.s32 	%r13401, %r14507, 5;
	mul.wide.s32 	%rd20023, %r13401, 8;
	add.s64 	%rd20024, %rd19888, %rd20023;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13402,%dummy}, %rd20011;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13403}, %rd20011;
	}
	shf.r.wrap.b32 	%r13404, %r13403, %r13402, 14;
	shf.r.wrap.b32 	%r13405, %r13402, %r13403, 14;
	mov.b64 	%rd20025, {%r13405, %r13404};
	shf.r.wrap.b32 	%r13406, %r13403, %r13402, 18;
	shf.r.wrap.b32 	%r13407, %r13402, %r13403, 18;
	mov.b64 	%rd20026, {%r13407, %r13406};
	xor.b64  	%rd20027, %rd20026, %rd20025;
	shf.l.wrap.b32 	%r13408, %r13402, %r13403, 23;
	shf.l.wrap.b32 	%r13409, %r13403, %r13402, 23;
	mov.b64 	%rd20028, {%r13409, %r13408};
	xor.b64  	%rd20029, %rd20027, %rd20028;
	xor.b64  	%rd20030, %rd19984, %rd19957;
	and.b64  	%rd20031, %rd20011, %rd20030;
	xor.b64  	%rd20032, %rd20031, %rd19957;
	add.s64 	%rd20033, %rd19930, %rd21836;
	ld.const.u64 	%rd20034, [%rd20024];
	add.s64 	%rd20035, %rd20033, %rd20034;
	add.s64 	%rd20036, %rd20035, %rd20032;
	add.s64 	%rd20037, %rd20036, %rd20029;
	add.s64 	%rd20038, %rd20037, %rd19941;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13410,%dummy}, %rd20022;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13411}, %rd20022;
	}
	shf.r.wrap.b32 	%r13412, %r13411, %r13410, 28;
	shf.r.wrap.b32 	%r13413, %r13410, %r13411, 28;
	mov.b64 	%rd20039, {%r13413, %r13412};
	shf.l.wrap.b32 	%r13414, %r13410, %r13411, 30;
	shf.l.wrap.b32 	%r13415, %r13411, %r13410, 30;
	mov.b64 	%rd20040, {%r13415, %r13414};
	xor.b64  	%rd20041, %rd20040, %rd20039;
	shf.l.wrap.b32 	%r13416, %r13410, %r13411, 25;
	shf.l.wrap.b32 	%r13417, %r13411, %r13410, 25;
	mov.b64 	%rd20042, {%r13417, %r13416};
	xor.b64  	%rd20043, %rd20041, %rd20042;
	xor.b64  	%rd20044, %rd20022, %rd19968;
	xor.b64  	%rd20045, %rd20022, %rd19995;
	and.b64  	%rd20046, %rd20045, %rd20044;
	xor.b64  	%rd20047, %rd20046, %rd20022;
	add.s64 	%rd20048, %rd20037, %rd20047;
	add.s64 	%rd20049, %rd20048, %rd20043;
	add.s32 	%r13418, %r14507, 6;
	mul.wide.s32 	%rd20050, %r13418, 8;
	add.s64 	%rd20051, %rd19888, %rd20050;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13419,%dummy}, %rd20038;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13420}, %rd20038;
	}
	shf.r.wrap.b32 	%r13421, %r13420, %r13419, 14;
	shf.r.wrap.b32 	%r13422, %r13419, %r13420, 14;
	mov.b64 	%rd20052, {%r13422, %r13421};
	shf.r.wrap.b32 	%r13423, %r13420, %r13419, 18;
	shf.r.wrap.b32 	%r13424, %r13419, %r13420, 18;
	mov.b64 	%rd20053, {%r13424, %r13423};
	xor.b64  	%rd20054, %rd20053, %rd20052;
	shf.l.wrap.b32 	%r13425, %r13419, %r13420, 23;
	shf.l.wrap.b32 	%r13426, %r13420, %r13419, 23;
	mov.b64 	%rd20055, {%r13426, %r13425};
	xor.b64  	%rd20056, %rd20054, %rd20055;
	xor.b64  	%rd20057, %rd20011, %rd19984;
	and.b64  	%rd20058, %rd20038, %rd20057;
	xor.b64  	%rd20059, %rd20058, %rd19984;
	add.s64 	%rd20060, %rd19957, %rd21837;
	ld.const.u64 	%rd20061, [%rd20051];
	add.s64 	%rd20062, %rd20060, %rd20061;
	add.s64 	%rd20063, %rd20062, %rd20059;
	add.s64 	%rd20064, %rd20063, %rd20056;
	add.s64 	%rd20065, %rd20064, %rd19968;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13427,%dummy}, %rd20049;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13428}, %rd20049;
	}
	shf.r.wrap.b32 	%r13429, %r13428, %r13427, 28;
	shf.r.wrap.b32 	%r13430, %r13427, %r13428, 28;
	mov.b64 	%rd20066, {%r13430, %r13429};
	shf.l.wrap.b32 	%r13431, %r13427, %r13428, 30;
	shf.l.wrap.b32 	%r13432, %r13428, %r13427, 30;
	mov.b64 	%rd20067, {%r13432, %r13431};
	xor.b64  	%rd20068, %rd20067, %rd20066;
	shf.l.wrap.b32 	%r13433, %r13427, %r13428, 25;
	shf.l.wrap.b32 	%r13434, %r13428, %r13427, 25;
	mov.b64 	%rd20069, {%r13434, %r13433};
	xor.b64  	%rd20070, %rd20068, %rd20069;
	xor.b64  	%rd20071, %rd20049, %rd19995;
	xor.b64  	%rd20072, %rd20049, %rd20022;
	and.b64  	%rd20073, %rd20072, %rd20071;
	xor.b64  	%rd20074, %rd20073, %rd20049;
	add.s64 	%rd20075, %rd20064, %rd20074;
	add.s64 	%rd20076, %rd20075, %rd20070;
	add.s32 	%r13435, %r14507, 7;
	mul.wide.s32 	%rd20077, %r13435, 8;
	add.s64 	%rd20078, %rd19888, %rd20077;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13436,%dummy}, %rd20065;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13437}, %rd20065;
	}
	shf.r.wrap.b32 	%r13438, %r13437, %r13436, 14;
	shf.r.wrap.b32 	%r13439, %r13436, %r13437, 14;
	mov.b64 	%rd20079, {%r13439, %r13438};
	shf.r.wrap.b32 	%r13440, %r13437, %r13436, 18;
	shf.r.wrap.b32 	%r13441, %r13436, %r13437, 18;
	mov.b64 	%rd20080, {%r13441, %r13440};
	xor.b64  	%rd20081, %rd20080, %rd20079;
	shf.l.wrap.b32 	%r13442, %r13436, %r13437, 23;
	shf.l.wrap.b32 	%r13443, %r13437, %r13436, 23;
	mov.b64 	%rd20082, {%r13443, %r13442};
	xor.b64  	%rd20083, %rd20081, %rd20082;
	xor.b64  	%rd20084, %rd20038, %rd20011;
	and.b64  	%rd20085, %rd20065, %rd20084;
	xor.b64  	%rd20086, %rd20085, %rd20011;
	add.s64 	%rd20087, %rd19984, %rd21838;
	ld.const.u64 	%rd20088, [%rd20078];
	add.s64 	%rd20089, %rd20087, %rd20088;
	add.s64 	%rd20090, %rd20089, %rd20086;
	add.s64 	%rd20091, %rd20090, %rd20083;
	add.s64 	%rd20092, %rd20091, %rd19995;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13444,%dummy}, %rd20076;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13445}, %rd20076;
	}
	shf.r.wrap.b32 	%r13446, %r13445, %r13444, 28;
	shf.r.wrap.b32 	%r13447, %r13444, %r13445, 28;
	mov.b64 	%rd20093, {%r13447, %r13446};
	shf.l.wrap.b32 	%r13448, %r13444, %r13445, 30;
	shf.l.wrap.b32 	%r13449, %r13445, %r13444, 30;
	mov.b64 	%rd20094, {%r13449, %r13448};
	xor.b64  	%rd20095, %rd20094, %rd20093;
	shf.l.wrap.b32 	%r13450, %r13444, %r13445, 25;
	shf.l.wrap.b32 	%r13451, %r13445, %r13444, 25;
	mov.b64 	%rd20096, {%r13451, %r13450};
	xor.b64  	%rd20097, %rd20095, %rd20096;
	xor.b64  	%rd20098, %rd20076, %rd20022;
	xor.b64  	%rd20099, %rd20076, %rd20049;
	and.b64  	%rd20100, %rd20099, %rd20098;
	xor.b64  	%rd20101, %rd20100, %rd20076;
	add.s64 	%rd20102, %rd20091, %rd20101;
	add.s64 	%rd20103, %rd20102, %rd20097;
	add.s32 	%r13452, %r14507, 8;
	mul.wide.s32 	%rd20104, %r13452, 8;
	add.s64 	%rd20105, %rd19888, %rd20104;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13453,%dummy}, %rd20092;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13454}, %rd20092;
	}
	shf.r.wrap.b32 	%r13455, %r13454, %r13453, 14;
	shf.r.wrap.b32 	%r13456, %r13453, %r13454, 14;
	mov.b64 	%rd20106, {%r13456, %r13455};
	shf.r.wrap.b32 	%r13457, %r13454, %r13453, 18;
	shf.r.wrap.b32 	%r13458, %r13453, %r13454, 18;
	mov.b64 	%rd20107, {%r13458, %r13457};
	xor.b64  	%rd20108, %rd20107, %rd20106;
	shf.l.wrap.b32 	%r13459, %r13453, %r13454, 23;
	shf.l.wrap.b32 	%r13460, %r13454, %r13453, 23;
	mov.b64 	%rd20109, {%r13460, %r13459};
	xor.b64  	%rd20110, %rd20108, %rd20109;
	xor.b64  	%rd20111, %rd20065, %rd20038;
	and.b64  	%rd20112, %rd20092, %rd20111;
	xor.b64  	%rd20113, %rd20112, %rd20038;
	add.s64 	%rd20114, %rd20011, %rd21822;
	ld.const.u64 	%rd20115, [%rd20105];
	add.s64 	%rd20116, %rd20114, %rd20115;
	add.s64 	%rd20117, %rd20116, %rd20113;
	add.s64 	%rd20118, %rd20117, %rd20110;
	add.s64 	%rd20119, %rd20118, %rd20022;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13461,%dummy}, %rd20103;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13462}, %rd20103;
	}
	shf.r.wrap.b32 	%r13463, %r13462, %r13461, 28;
	shf.r.wrap.b32 	%r13464, %r13461, %r13462, 28;
	mov.b64 	%rd20120, {%r13464, %r13463};
	shf.l.wrap.b32 	%r13465, %r13461, %r13462, 30;
	shf.l.wrap.b32 	%r13466, %r13462, %r13461, 30;
	mov.b64 	%rd20121, {%r13466, %r13465};
	xor.b64  	%rd20122, %rd20121, %rd20120;
	shf.l.wrap.b32 	%r13467, %r13461, %r13462, 25;
	shf.l.wrap.b32 	%r13468, %r13462, %r13461, 25;
	mov.b64 	%rd20123, {%r13468, %r13467};
	xor.b64  	%rd20124, %rd20122, %rd20123;
	xor.b64  	%rd20125, %rd20103, %rd20049;
	xor.b64  	%rd20126, %rd20103, %rd20076;
	and.b64  	%rd20127, %rd20126, %rd20125;
	xor.b64  	%rd20128, %rd20127, %rd20103;
	add.s64 	%rd20129, %rd20118, %rd20128;
	add.s64 	%rd20130, %rd20129, %rd20124;
	add.s32 	%r13469, %r14507, 9;
	mul.wide.s32 	%rd20131, %r13469, 8;
	add.s64 	%rd20132, %rd19888, %rd20131;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13470,%dummy}, %rd20119;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13471}, %rd20119;
	}
	shf.r.wrap.b32 	%r13472, %r13471, %r13470, 14;
	shf.r.wrap.b32 	%r13473, %r13470, %r13471, 14;
	mov.b64 	%rd20133, {%r13473, %r13472};
	shf.r.wrap.b32 	%r13474, %r13471, %r13470, 18;
	shf.r.wrap.b32 	%r13475, %r13470, %r13471, 18;
	mov.b64 	%rd20134, {%r13475, %r13474};
	xor.b64  	%rd20135, %rd20134, %rd20133;
	shf.l.wrap.b32 	%r13476, %r13470, %r13471, 23;
	shf.l.wrap.b32 	%r13477, %r13471, %r13470, 23;
	mov.b64 	%rd20136, {%r13477, %r13476};
	xor.b64  	%rd20137, %rd20135, %rd20136;
	xor.b64  	%rd20138, %rd20092, %rd20065;
	and.b64  	%rd20139, %rd20119, %rd20138;
	xor.b64  	%rd20140, %rd20139, %rd20065;
	add.s64 	%rd20141, %rd20038, %rd21821;
	ld.const.u64 	%rd20142, [%rd20132];
	add.s64 	%rd20143, %rd20141, %rd20142;
	add.s64 	%rd20144, %rd20143, %rd20140;
	add.s64 	%rd20145, %rd20144, %rd20137;
	add.s64 	%rd20146, %rd20145, %rd20049;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13478,%dummy}, %rd20130;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13479}, %rd20130;
	}
	shf.r.wrap.b32 	%r13480, %r13479, %r13478, 28;
	shf.r.wrap.b32 	%r13481, %r13478, %r13479, 28;
	mov.b64 	%rd20147, {%r13481, %r13480};
	shf.l.wrap.b32 	%r13482, %r13478, %r13479, 30;
	shf.l.wrap.b32 	%r13483, %r13479, %r13478, 30;
	mov.b64 	%rd20148, {%r13483, %r13482};
	xor.b64  	%rd20149, %rd20148, %rd20147;
	shf.l.wrap.b32 	%r13484, %r13478, %r13479, 25;
	shf.l.wrap.b32 	%r13485, %r13479, %r13478, 25;
	mov.b64 	%rd20150, {%r13485, %r13484};
	xor.b64  	%rd20151, %rd20149, %rd20150;
	xor.b64  	%rd20152, %rd20130, %rd20076;
	xor.b64  	%rd20153, %rd20130, %rd20103;
	and.b64  	%rd20154, %rd20153, %rd20152;
	xor.b64  	%rd20155, %rd20154, %rd20130;
	add.s64 	%rd20156, %rd20145, %rd20155;
	add.s64 	%rd20157, %rd20156, %rd20151;
	add.s32 	%r13486, %r14507, 10;
	mul.wide.s32 	%rd20158, %r13486, 8;
	add.s64 	%rd20159, %rd19888, %rd20158;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13487,%dummy}, %rd20146;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13488}, %rd20146;
	}
	shf.r.wrap.b32 	%r13489, %r13488, %r13487, 14;
	shf.r.wrap.b32 	%r13490, %r13487, %r13488, 14;
	mov.b64 	%rd20160, {%r13490, %r13489};
	shf.r.wrap.b32 	%r13491, %r13488, %r13487, 18;
	shf.r.wrap.b32 	%r13492, %r13487, %r13488, 18;
	mov.b64 	%rd20161, {%r13492, %r13491};
	xor.b64  	%rd20162, %rd20161, %rd20160;
	shf.l.wrap.b32 	%r13493, %r13487, %r13488, 23;
	shf.l.wrap.b32 	%r13494, %r13488, %r13487, 23;
	mov.b64 	%rd20163, {%r13494, %r13493};
	xor.b64  	%rd20164, %rd20162, %rd20163;
	xor.b64  	%rd20165, %rd20119, %rd20092;
	and.b64  	%rd20166, %rd20146, %rd20165;
	xor.b64  	%rd20167, %rd20166, %rd20092;
	add.s64 	%rd20168, %rd20065, %rd21820;
	ld.const.u64 	%rd20169, [%rd20159];
	add.s64 	%rd20170, %rd20168, %rd20169;
	add.s64 	%rd20171, %rd20170, %rd20167;
	add.s64 	%rd20172, %rd20171, %rd20164;
	add.s64 	%rd20173, %rd20172, %rd20076;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13495,%dummy}, %rd20157;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13496}, %rd20157;
	}
	shf.r.wrap.b32 	%r13497, %r13496, %r13495, 28;
	shf.r.wrap.b32 	%r13498, %r13495, %r13496, 28;
	mov.b64 	%rd20174, {%r13498, %r13497};
	shf.l.wrap.b32 	%r13499, %r13495, %r13496, 30;
	shf.l.wrap.b32 	%r13500, %r13496, %r13495, 30;
	mov.b64 	%rd20175, {%r13500, %r13499};
	xor.b64  	%rd20176, %rd20175, %rd20174;
	shf.l.wrap.b32 	%r13501, %r13495, %r13496, 25;
	shf.l.wrap.b32 	%r13502, %r13496, %r13495, 25;
	mov.b64 	%rd20177, {%r13502, %r13501};
	xor.b64  	%rd20178, %rd20176, %rd20177;
	xor.b64  	%rd20179, %rd20157, %rd20103;
	xor.b64  	%rd20180, %rd20157, %rd20130;
	and.b64  	%rd20181, %rd20180, %rd20179;
	xor.b64  	%rd20182, %rd20181, %rd20157;
	add.s64 	%rd20183, %rd20172, %rd20182;
	add.s64 	%rd20184, %rd20183, %rd20178;
	add.s32 	%r13503, %r14507, 11;
	mul.wide.s32 	%rd20185, %r13503, 8;
	add.s64 	%rd20186, %rd19888, %rd20185;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13504,%dummy}, %rd20173;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13505}, %rd20173;
	}
	shf.r.wrap.b32 	%r13506, %r13505, %r13504, 14;
	shf.r.wrap.b32 	%r13507, %r13504, %r13505, 14;
	mov.b64 	%rd20187, {%r13507, %r13506};
	shf.r.wrap.b32 	%r13508, %r13505, %r13504, 18;
	shf.r.wrap.b32 	%r13509, %r13504, %r13505, 18;
	mov.b64 	%rd20188, {%r13509, %r13508};
	xor.b64  	%rd20189, %rd20188, %rd20187;
	shf.l.wrap.b32 	%r13510, %r13504, %r13505, 23;
	shf.l.wrap.b32 	%r13511, %r13505, %r13504, 23;
	mov.b64 	%rd20190, {%r13511, %r13510};
	xor.b64  	%rd20191, %rd20189, %rd20190;
	xor.b64  	%rd20192, %rd20146, %rd20119;
	and.b64  	%rd20193, %rd20173, %rd20192;
	xor.b64  	%rd20194, %rd20193, %rd20119;
	add.s64 	%rd20195, %rd20092, %rd21819;
	ld.const.u64 	%rd20196, [%rd20186];
	add.s64 	%rd20197, %rd20195, %rd20196;
	add.s64 	%rd20198, %rd20197, %rd20194;
	add.s64 	%rd20199, %rd20198, %rd20191;
	add.s64 	%rd20200, %rd20199, %rd20103;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13512,%dummy}, %rd20184;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13513}, %rd20184;
	}
	shf.r.wrap.b32 	%r13514, %r13513, %r13512, 28;
	shf.r.wrap.b32 	%r13515, %r13512, %r13513, 28;
	mov.b64 	%rd20201, {%r13515, %r13514};
	shf.l.wrap.b32 	%r13516, %r13512, %r13513, 30;
	shf.l.wrap.b32 	%r13517, %r13513, %r13512, 30;
	mov.b64 	%rd20202, {%r13517, %r13516};
	xor.b64  	%rd20203, %rd20202, %rd20201;
	shf.l.wrap.b32 	%r13518, %r13512, %r13513, 25;
	shf.l.wrap.b32 	%r13519, %r13513, %r13512, 25;
	mov.b64 	%rd20204, {%r13519, %r13518};
	xor.b64  	%rd20205, %rd20203, %rd20204;
	xor.b64  	%rd20206, %rd20184, %rd20130;
	xor.b64  	%rd20207, %rd20184, %rd20157;
	and.b64  	%rd20208, %rd20207, %rd20206;
	xor.b64  	%rd20209, %rd20208, %rd20184;
	add.s64 	%rd20210, %rd20199, %rd20209;
	add.s64 	%rd20211, %rd20210, %rd20205;
	add.s32 	%r13520, %r14507, 12;
	mul.wide.s32 	%rd20212, %r13520, 8;
	add.s64 	%rd20213, %rd19888, %rd20212;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13521,%dummy}, %rd20200;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13522}, %rd20200;
	}
	shf.r.wrap.b32 	%r13523, %r13522, %r13521, 14;
	shf.r.wrap.b32 	%r13524, %r13521, %r13522, 14;
	mov.b64 	%rd20214, {%r13524, %r13523};
	shf.r.wrap.b32 	%r13525, %r13522, %r13521, 18;
	shf.r.wrap.b32 	%r13526, %r13521, %r13522, 18;
	mov.b64 	%rd20215, {%r13526, %r13525};
	xor.b64  	%rd20216, %rd20215, %rd20214;
	shf.l.wrap.b32 	%r13527, %r13521, %r13522, 23;
	shf.l.wrap.b32 	%r13528, %r13522, %r13521, 23;
	mov.b64 	%rd20217, {%r13528, %r13527};
	xor.b64  	%rd20218, %rd20216, %rd20217;
	xor.b64  	%rd20219, %rd20173, %rd20146;
	and.b64  	%rd20220, %rd20200, %rd20219;
	xor.b64  	%rd20221, %rd20220, %rd20146;
	add.s64 	%rd20222, %rd20119, %rd21818;
	ld.const.u64 	%rd20223, [%rd20213];
	add.s64 	%rd20224, %rd20222, %rd20223;
	add.s64 	%rd20225, %rd20224, %rd20221;
	add.s64 	%rd20226, %rd20225, %rd20218;
	add.s64 	%rd21830, %rd20226, %rd20130;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13529,%dummy}, %rd20211;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13530}, %rd20211;
	}
	shf.r.wrap.b32 	%r13531, %r13530, %r13529, 28;
	shf.r.wrap.b32 	%r13532, %r13529, %r13530, 28;
	mov.b64 	%rd20227, {%r13532, %r13531};
	shf.l.wrap.b32 	%r13533, %r13529, %r13530, 30;
	shf.l.wrap.b32 	%r13534, %r13530, %r13529, 30;
	mov.b64 	%rd20228, {%r13534, %r13533};
	xor.b64  	%rd20229, %rd20228, %rd20227;
	shf.l.wrap.b32 	%r13535, %r13529, %r13530, 25;
	shf.l.wrap.b32 	%r13536, %r13530, %r13529, 25;
	mov.b64 	%rd20230, {%r13536, %r13535};
	xor.b64  	%rd20231, %rd20229, %rd20230;
	xor.b64  	%rd20232, %rd20211, %rd20157;
	xor.b64  	%rd20233, %rd20211, %rd20184;
	and.b64  	%rd20234, %rd20233, %rd20232;
	xor.b64  	%rd20235, %rd20234, %rd20211;
	add.s64 	%rd20236, %rd20226, %rd20235;
	add.s64 	%rd21826, %rd20236, %rd20231;
	add.s32 	%r13537, %r14507, 13;
	mul.wide.s32 	%rd20237, %r13537, 8;
	add.s64 	%rd20238, %rd19888, %rd20237;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13538,%dummy}, %rd21830;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13539}, %rd21830;
	}
	shf.r.wrap.b32 	%r13540, %r13539, %r13538, 14;
	shf.r.wrap.b32 	%r13541, %r13538, %r13539, 14;
	mov.b64 	%rd20239, {%r13541, %r13540};
	shf.r.wrap.b32 	%r13542, %r13539, %r13538, 18;
	shf.r.wrap.b32 	%r13543, %r13538, %r13539, 18;
	mov.b64 	%rd20240, {%r13543, %r13542};
	xor.b64  	%rd20241, %rd20240, %rd20239;
	shf.l.wrap.b32 	%r13544, %r13538, %r13539, 23;
	shf.l.wrap.b32 	%r13545, %r13539, %r13538, 23;
	mov.b64 	%rd20242, {%r13545, %r13544};
	xor.b64  	%rd20243, %rd20241, %rd20242;
	xor.b64  	%rd20244, %rd20200, %rd20173;
	and.b64  	%rd20245, %rd21830, %rd20244;
	xor.b64  	%rd20246, %rd20245, %rd20173;
	add.s64 	%rd20247, %rd20146, %rd21817;
	ld.const.u64 	%rd20248, [%rd20238];
	add.s64 	%rd20249, %rd20247, %rd20248;
	add.s64 	%rd20250, %rd20249, %rd20246;
	add.s64 	%rd20251, %rd20250, %rd20243;
	add.s64 	%rd21829, %rd20251, %rd20157;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13546,%dummy}, %rd21826;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13547}, %rd21826;
	}
	shf.r.wrap.b32 	%r13548, %r13547, %r13546, 28;
	shf.r.wrap.b32 	%r13549, %r13546, %r13547, 28;
	mov.b64 	%rd20252, {%r13549, %r13548};
	shf.l.wrap.b32 	%r13550, %r13546, %r13547, 30;
	shf.l.wrap.b32 	%r13551, %r13547, %r13546, 30;
	mov.b64 	%rd20253, {%r13551, %r13550};
	xor.b64  	%rd20254, %rd20253, %rd20252;
	shf.l.wrap.b32 	%r13552, %r13546, %r13547, 25;
	shf.l.wrap.b32 	%r13553, %r13547, %r13546, 25;
	mov.b64 	%rd20255, {%r13553, %r13552};
	xor.b64  	%rd20256, %rd20254, %rd20255;
	xor.b64  	%rd20257, %rd21826, %rd20184;
	xor.b64  	%rd20258, %rd21826, %rd20211;
	and.b64  	%rd20259, %rd20258, %rd20257;
	xor.b64  	%rd20260, %rd20259, %rd21826;
	add.s64 	%rd20261, %rd20251, %rd20260;
	add.s64 	%rd21825, %rd20261, %rd20256;
	add.s32 	%r13554, %r14507, 14;
	mul.wide.s32 	%rd20262, %r13554, 8;
	add.s64 	%rd20263, %rd19888, %rd20262;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13555,%dummy}, %rd21829;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13556}, %rd21829;
	}
	shf.r.wrap.b32 	%r13557, %r13556, %r13555, 14;
	shf.r.wrap.b32 	%r13558, %r13555, %r13556, 14;
	mov.b64 	%rd20264, {%r13558, %r13557};
	shf.r.wrap.b32 	%r13559, %r13556, %r13555, 18;
	shf.r.wrap.b32 	%r13560, %r13555, %r13556, 18;
	mov.b64 	%rd20265, {%r13560, %r13559};
	xor.b64  	%rd20266, %rd20265, %rd20264;
	shf.l.wrap.b32 	%r13561, %r13555, %r13556, 23;
	shf.l.wrap.b32 	%r13562, %r13556, %r13555, 23;
	mov.b64 	%rd20267, {%r13562, %r13561};
	xor.b64  	%rd20268, %rd20266, %rd20267;
	xor.b64  	%rd20269, %rd21830, %rd20200;
	and.b64  	%rd20270, %rd21829, %rd20269;
	xor.b64  	%rd20271, %rd20270, %rd20200;
	add.s64 	%rd20272, %rd20173, %rd21816;
	ld.const.u64 	%rd20273, [%rd20263];
	add.s64 	%rd20274, %rd20272, %rd20273;
	add.s64 	%rd20275, %rd20274, %rd20271;
	add.s64 	%rd20276, %rd20275, %rd20268;
	add.s64 	%rd21828, %rd20276, %rd20184;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13563,%dummy}, %rd21825;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13564}, %rd21825;
	}
	shf.r.wrap.b32 	%r13565, %r13564, %r13563, 28;
	shf.r.wrap.b32 	%r13566, %r13563, %r13564, 28;
	mov.b64 	%rd20277, {%r13566, %r13565};
	shf.l.wrap.b32 	%r13567, %r13563, %r13564, 30;
	shf.l.wrap.b32 	%r13568, %r13564, %r13563, 30;
	mov.b64 	%rd20278, {%r13568, %r13567};
	xor.b64  	%rd20279, %rd20278, %rd20277;
	shf.l.wrap.b32 	%r13569, %r13563, %r13564, 25;
	shf.l.wrap.b32 	%r13570, %r13564, %r13563, 25;
	mov.b64 	%rd20280, {%r13570, %r13569};
	xor.b64  	%rd20281, %rd20279, %rd20280;
	xor.b64  	%rd20282, %rd21825, %rd20211;
	xor.b64  	%rd20283, %rd21825, %rd21826;
	and.b64  	%rd20284, %rd20283, %rd20282;
	xor.b64  	%rd20285, %rd20284, %rd21825;
	add.s64 	%rd20286, %rd20276, %rd20285;
	add.s64 	%rd21824, %rd20286, %rd20281;
	add.s32 	%r13571, %r14507, 15;
	mul.wide.s32 	%rd20287, %r13571, 8;
	add.s64 	%rd20288, %rd19888, %rd20287;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13572,%dummy}, %rd21828;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13573}, %rd21828;
	}
	shf.r.wrap.b32 	%r13574, %r13573, %r13572, 14;
	shf.r.wrap.b32 	%r13575, %r13572, %r13573, 14;
	mov.b64 	%rd20289, {%r13575, %r13574};
	shf.r.wrap.b32 	%r13576, %r13573, %r13572, 18;
	shf.r.wrap.b32 	%r13577, %r13572, %r13573, 18;
	mov.b64 	%rd20290, {%r13577, %r13576};
	xor.b64  	%rd20291, %rd20290, %rd20289;
	shf.l.wrap.b32 	%r13578, %r13572, %r13573, 23;
	shf.l.wrap.b32 	%r13579, %r13573, %r13572, 23;
	mov.b64 	%rd20292, {%r13579, %r13578};
	xor.b64  	%rd20293, %rd20291, %rd20292;
	xor.b64  	%rd20294, %rd21829, %rd21830;
	and.b64  	%rd20295, %rd21828, %rd20294;
	xor.b64  	%rd20296, %rd20295, %rd21830;
	add.s64 	%rd20297, %rd20200, %rd21815;
	ld.const.u64 	%rd20298, [%rd20288];
	add.s64 	%rd20299, %rd20297, %rd20298;
	add.s64 	%rd20300, %rd20299, %rd20296;
	add.s64 	%rd20301, %rd20300, %rd20293;
	add.s64 	%rd21827, %rd20301, %rd20211;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13580,%dummy}, %rd21824;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13581}, %rd21824;
	}
	shf.r.wrap.b32 	%r13582, %r13581, %r13580, 28;
	shf.r.wrap.b32 	%r13583, %r13580, %r13581, 28;
	mov.b64 	%rd20302, {%r13583, %r13582};
	shf.l.wrap.b32 	%r13584, %r13580, %r13581, 30;
	shf.l.wrap.b32 	%r13585, %r13581, %r13580, 30;
	mov.b64 	%rd20303, {%r13585, %r13584};
	xor.b64  	%rd20304, %rd20303, %rd20302;
	shf.l.wrap.b32 	%r13586, %r13580, %r13581, 25;
	shf.l.wrap.b32 	%r13587, %r13581, %r13580, 25;
	mov.b64 	%rd20305, {%r13587, %r13586};
	xor.b64  	%rd20306, %rd20304, %rd20305;
	xor.b64  	%rd20307, %rd21824, %rd21826;
	xor.b64  	%rd20308, %rd21824, %rd21825;
	and.b64  	%rd20309, %rd20308, %rd20307;
	xor.b64  	%rd20310, %rd20309, %rd21824;
	add.s64 	%rd20311, %rd20301, %rd20310;
	add.s64 	%rd21823, %rd20311, %rd20306;
	add.s32 	%r14507, %r14507, 16;
	setp.lt.s32	%p219, %r14507, 80;
	@%p219 bra 	BB3_349;

	add.s64 	%rd21846, %rd1623, %rd21823;
	st.local.u64 	[%rd1], %rd21846;
	add.s64 	%rd21845, %rd1625, %rd21824;
	st.local.u64 	[%rd1+8], %rd21845;
	add.s64 	%rd21844, %rd1624, %rd21825;
	st.local.u64 	[%rd1+16], %rd21844;
	add.s64 	%rd21843, %rd1622, %rd21826;
	st.local.u64 	[%rd1+24], %rd21843;
	add.s64 	%rd21842, %rd1618, %rd21827;
	st.local.u64 	[%rd1+32], %rd21842;
	add.s64 	%rd21841, %rd1620, %rd21828;
	st.local.u64 	[%rd1+40], %rd21841;
	add.s64 	%rd21840, %rd1619, %rd21829;
	st.local.u64 	[%rd1+48], %rd21840;
	add.s64 	%rd21839, %rd1621, %rd21830;
	st.local.u64 	[%rd1+56], %rd21839;
	mov.u64 	%rd21847, 0;
	st.local.u64 	[%rd1+64], %rd21847;
	st.local.u64 	[%rd1+72], %rd21847;
	st.local.u64 	[%rd1+80], %rd21847;
	st.local.u64 	[%rd1+88], %rd21847;
	st.local.u64 	[%rd1+96], %rd21847;
	st.local.u64 	[%rd1+104], %rd21847;
	st.local.u64 	[%rd1+112], %rd21847;
	st.local.u64 	[%rd1+120], %rd21847;
	st.local.u64 	[%rd1+128], %rd21847;
	st.local.u64 	[%rd1+136], %rd21847;
	st.local.u64 	[%rd1+144], %rd21847;
	st.local.u64 	[%rd1+152], %rd21847;
	st.local.u64 	[%rd1+160], %rd21847;
	st.local.u64 	[%rd1+168], %rd21847;
	st.local.u64 	[%rd1+176], %rd21847;
	st.local.u64 	[%rd1+184], %rd21847;
	mov.u64 	%rd21848, %rd21847;
	mov.u64 	%rd21849, %rd21847;
	mov.u64 	%rd21850, %rd21847;
	mov.u64 	%rd21851, %rd21847;
	mov.u64 	%rd21852, %rd21847;
	mov.u64 	%rd21853, %rd21847;
	mov.u64 	%rd21854, %rd21847;
	mov.u64 	%rd21855, %rd21847;
	mov.u64 	%rd21856, %rd21847;
	mov.u64 	%rd21857, %rd21847;
	mov.u64 	%rd21858, %rd21847;
	mov.u64 	%rd21859, %rd21847;
	mov.u64 	%rd21860, %rd21847;
	mov.u64 	%rd21861, %rd21847;
	bra.uni 	BB3_351;

BB3_347:
	ld.local.u64 	%rd21860, [%rd1+72];
	ld.local.u64 	%rd21859, [%rd1+80];
	ld.local.u64 	%rd21858, [%rd1+88];
	ld.local.u64 	%rd21857, [%rd1+96];
	ld.local.u64 	%rd21856, [%rd1+104];
	ld.local.u64 	%rd21855, [%rd1+112];
	ld.local.u64 	%rd21854, [%rd1+120];
	ld.local.u64 	%rd21853, [%rd1+128];
	ld.local.u64 	%rd21852, [%rd1+136];
	ld.local.u64 	%rd21851, [%rd1+144];
	ld.local.u64 	%rd21850, [%rd1+152];
	ld.local.u64 	%rd21849, [%rd1+160];
	ld.local.u64 	%rd21848, [%rd1+168];
	ld.local.u64 	%rd21847, [%rd1+176];
	ld.local.u64 	%rd21846, [%rd1];
	ld.local.u64 	%rd21845, [%rd1+8];
	ld.local.u64 	%rd21844, [%rd1+16];
	ld.local.u64 	%rd21843, [%rd1+24];
	ld.local.u64 	%rd21842, [%rd1+32];
	ld.local.u64 	%rd21841, [%rd1+40];
	ld.local.u64 	%rd21840, [%rd1+48];
	ld.local.u64 	%rd21839, [%rd1+56];

BB3_351:
	ld.local.u32 	%r13589, [%rd1+192];
	shl.b32 	%r13590, %r13589, 3;
	cvt.s64.s32	%rd20328, %r13590;
	st.local.u64 	[%rd1+184], %rd20328;
	shr.u64 	%rd20329, %rd21861, 32;
	shr.u64 	%rd20330, %rd21860, 32;
	shr.u64 	%rd20331, %rd21859, 32;
	shr.u64 	%rd20332, %rd21858, 32;
	shr.u64 	%rd20333, %rd21857, 32;
	shr.u64 	%rd20334, %rd21856, 32;
	shr.u64 	%rd20335, %rd21855, 32;
	shr.u64 	%rd20336, %rd21854, 32;
	shr.u64 	%rd20337, %rd21853, 32;
	shr.u64 	%rd20338, %rd21852, 32;
	shr.u64 	%rd20339, %rd21851, 32;
	shr.u64 	%rd20340, %rd21850, 32;
	shr.u64 	%rd20341, %rd21849, 32;
	shr.u64 	%rd20342, %rd21848, 32;
	shr.u64 	%rd20343, %rd21847, 32;
	shr.u64 	%rd20344, %rd20328, 32;
	bfi.b64 	%rd21879, %rd20329, %rd21861, 32, 32;
	bfi.b64 	%rd21880, %rd20330, %rd21860, 32, 32;
	bfi.b64 	%rd21881, %rd20331, %rd21859, 32, 32;
	bfi.b64 	%rd21882, %rd20332, %rd21858, 32, 32;
	bfi.b64 	%rd21883, %rd20333, %rd21857, 32, 32;
	bfi.b64 	%rd21884, %rd20334, %rd21856, 32, 32;
	bfi.b64 	%rd21885, %rd20335, %rd21855, 32, 32;
	bfi.b64 	%rd21886, %rd20336, %rd21854, 32, 32;
	bfi.b64 	%rd21870, %rd20337, %rd21853, 32, 32;
	bfi.b64 	%rd21869, %rd20338, %rd21852, 32, 32;
	bfi.b64 	%rd21868, %rd20339, %rd21851, 32, 32;
	bfi.b64 	%rd21867, %rd20340, %rd21850, 32, 32;
	bfi.b64 	%rd21866, %rd20341, %rd21849, 32, 32;
	bfi.b64 	%rd21865, %rd20342, %rd21848, 32, 32;
	bfi.b64 	%rd21864, %rd20343, %rd21847, 32, 32;
	cvt.u32.u64	%r13591, %rd20344;
	mov.b64	%rd21863, {%r13590, %r13591};
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13592,%dummy}, %rd21842;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13593}, %rd21842;
	}
	shf.r.wrap.b32 	%r13594, %r13593, %r13592, 18;
	shf.r.wrap.b32 	%r13595, %r13592, %r13593, 18;
	mov.b64 	%rd20345, {%r13595, %r13594};
	shf.r.wrap.b32 	%r13596, %r13593, %r13592, 14;
	shf.r.wrap.b32 	%r13597, %r13592, %r13593, 14;
	mov.b64 	%rd20346, {%r13597, %r13596};
	xor.b64  	%rd20347, %rd20345, %rd20346;
	shf.l.wrap.b32 	%r13598, %r13592, %r13593, 23;
	shf.l.wrap.b32 	%r13599, %r13593, %r13592, 23;
	mov.b64 	%rd20348, {%r13599, %r13598};
	xor.b64  	%rd20349, %rd20347, %rd20348;
	xor.b64  	%rd20350, %rd21840, %rd21841;
	and.b64  	%rd20351, %rd20350, %rd21842;
	xor.b64  	%rd20352, %rd20351, %rd21840;
	add.s64 	%rd20353, %rd21839, %rd21879;
	add.s64 	%rd20354, %rd20353, %rd21454;
	add.s64 	%rd20355, %rd20354, %rd20352;
	add.s64 	%rd20356, %rd20355, %rd20349;
	add.s64 	%rd20357, %rd20356, %rd21843;
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13600}, %rd21846;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13601,%dummy}, %rd21846;
	}
	shf.l.wrap.b32 	%r13602, %r13601, %r13600, 30;
	shf.l.wrap.b32 	%r13603, %r13600, %r13601, 30;
	mov.b64 	%rd20358, {%r13603, %r13602};
	shf.r.wrap.b32 	%r13604, %r13600, %r13601, 28;
	shf.r.wrap.b32 	%r13605, %r13601, %r13600, 28;
	mov.b64 	%rd20359, {%r13605, %r13604};
	xor.b64  	%rd20360, %rd20358, %rd20359;
	shf.l.wrap.b32 	%r13606, %r13601, %r13600, 25;
	shf.l.wrap.b32 	%r13607, %r13600, %r13601, 25;
	mov.b64 	%rd20361, {%r13607, %r13606};
	xor.b64  	%rd20362, %rd20360, %rd20361;
	xor.b64  	%rd20363, %rd21845, %rd21846;
	xor.b64  	%rd20364, %rd21844, %rd21846;
	and.b64  	%rd20365, %rd20364, %rd20363;
	xor.b64  	%rd20366, %rd20365, %rd21846;
	add.s64 	%rd20367, %rd20356, %rd20366;
	add.s64 	%rd20368, %rd20367, %rd20362;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13608,%dummy}, %rd20357;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13609}, %rd20357;
	}
	shf.r.wrap.b32 	%r13610, %r13609, %r13608, 14;
	shf.r.wrap.b32 	%r13611, %r13608, %r13609, 14;
	mov.b64 	%rd20369, {%r13611, %r13610};
	shf.r.wrap.b32 	%r13612, %r13609, %r13608, 18;
	shf.r.wrap.b32 	%r13613, %r13608, %r13609, 18;
	mov.b64 	%rd20370, {%r13613, %r13612};
	xor.b64  	%rd20371, %rd20370, %rd20369;
	shf.l.wrap.b32 	%r13614, %r13608, %r13609, 23;
	shf.l.wrap.b32 	%r13615, %r13609, %r13608, 23;
	mov.b64 	%rd20372, {%r13615, %r13614};
	xor.b64  	%rd20373, %rd20371, %rd20372;
	xor.b64  	%rd20374, %rd21841, %rd21842;
	and.b64  	%rd20375, %rd20357, %rd20374;
	xor.b64  	%rd20376, %rd20375, %rd21841;
	add.s64 	%rd20377, %rd21840, %rd21880;
	add.s64 	%rd20378, %rd20377, %rd21453;
	add.s64 	%rd20379, %rd20378, %rd20376;
	add.s64 	%rd20380, %rd20379, %rd20373;
	add.s64 	%rd20381, %rd20380, %rd21844;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13616,%dummy}, %rd20368;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13617}, %rd20368;
	}
	shf.r.wrap.b32 	%r13618, %r13617, %r13616, 28;
	shf.r.wrap.b32 	%r13619, %r13616, %r13617, 28;
	mov.b64 	%rd20382, {%r13619, %r13618};
	shf.l.wrap.b32 	%r13620, %r13616, %r13617, 30;
	shf.l.wrap.b32 	%r13621, %r13617, %r13616, 30;
	mov.b64 	%rd20383, {%r13621, %r13620};
	xor.b64  	%rd20384, %rd20383, %rd20382;
	shf.l.wrap.b32 	%r13622, %r13616, %r13617, 25;
	shf.l.wrap.b32 	%r13623, %r13617, %r13616, 25;
	mov.b64 	%rd20385, {%r13623, %r13622};
	xor.b64  	%rd20386, %rd20384, %rd20385;
	xor.b64  	%rd20387, %rd20368, %rd21845;
	xor.b64  	%rd20388, %rd20368, %rd21846;
	and.b64  	%rd20389, %rd20388, %rd20387;
	xor.b64  	%rd20390, %rd20389, %rd20368;
	add.s64 	%rd20391, %rd20380, %rd20390;
	add.s64 	%rd20392, %rd20391, %rd20386;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13624,%dummy}, %rd20381;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13625}, %rd20381;
	}
	shf.r.wrap.b32 	%r13626, %r13625, %r13624, 14;
	shf.r.wrap.b32 	%r13627, %r13624, %r13625, 14;
	mov.b64 	%rd20393, {%r13627, %r13626};
	shf.r.wrap.b32 	%r13628, %r13625, %r13624, 18;
	shf.r.wrap.b32 	%r13629, %r13624, %r13625, 18;
	mov.b64 	%rd20394, {%r13629, %r13628};
	xor.b64  	%rd20395, %rd20394, %rd20393;
	shf.l.wrap.b32 	%r13630, %r13624, %r13625, 23;
	shf.l.wrap.b32 	%r13631, %r13625, %r13624, 23;
	mov.b64 	%rd20396, {%r13631, %r13630};
	xor.b64  	%rd20397, %rd20395, %rd20396;
	xor.b64  	%rd20398, %rd20357, %rd21842;
	and.b64  	%rd20399, %rd20381, %rd20398;
	xor.b64  	%rd20400, %rd20399, %rd21842;
	add.s64 	%rd20401, %rd21841, %rd21881;
	add.s64 	%rd20402, %rd20401, %rd21452;
	add.s64 	%rd20403, %rd20402, %rd20400;
	add.s64 	%rd20404, %rd20403, %rd20397;
	add.s64 	%rd20405, %rd20404, %rd21845;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13632,%dummy}, %rd20392;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13633}, %rd20392;
	}
	shf.r.wrap.b32 	%r13634, %r13633, %r13632, 28;
	shf.r.wrap.b32 	%r13635, %r13632, %r13633, 28;
	mov.b64 	%rd20406, {%r13635, %r13634};
	shf.l.wrap.b32 	%r13636, %r13632, %r13633, 30;
	shf.l.wrap.b32 	%r13637, %r13633, %r13632, 30;
	mov.b64 	%rd20407, {%r13637, %r13636};
	xor.b64  	%rd20408, %rd20407, %rd20406;
	shf.l.wrap.b32 	%r13638, %r13632, %r13633, 25;
	shf.l.wrap.b32 	%r13639, %r13633, %r13632, 25;
	mov.b64 	%rd20409, {%r13639, %r13638};
	xor.b64  	%rd20410, %rd20408, %rd20409;
	xor.b64  	%rd20411, %rd20392, %rd21846;
	xor.b64  	%rd20412, %rd20392, %rd20368;
	and.b64  	%rd20413, %rd20412, %rd20411;
	xor.b64  	%rd20414, %rd20413, %rd20392;
	add.s64 	%rd20415, %rd20404, %rd20414;
	add.s64 	%rd20416, %rd20415, %rd20410;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13640,%dummy}, %rd20405;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13641}, %rd20405;
	}
	shf.r.wrap.b32 	%r13642, %r13641, %r13640, 14;
	shf.r.wrap.b32 	%r13643, %r13640, %r13641, 14;
	mov.b64 	%rd20417, {%r13643, %r13642};
	shf.r.wrap.b32 	%r13644, %r13641, %r13640, 18;
	shf.r.wrap.b32 	%r13645, %r13640, %r13641, 18;
	mov.b64 	%rd20418, {%r13645, %r13644};
	xor.b64  	%rd20419, %rd20418, %rd20417;
	shf.l.wrap.b32 	%r13646, %r13640, %r13641, 23;
	shf.l.wrap.b32 	%r13647, %r13641, %r13640, 23;
	mov.b64 	%rd20420, {%r13647, %r13646};
	xor.b64  	%rd20421, %rd20419, %rd20420;
	xor.b64  	%rd20422, %rd20381, %rd20357;
	and.b64  	%rd20423, %rd20405, %rd20422;
	xor.b64  	%rd20424, %rd20423, %rd20357;
	add.s64 	%rd20425, %rd21842, %rd21882;
	add.s64 	%rd20426, %rd20425, %rd21451;
	add.s64 	%rd20427, %rd20426, %rd20424;
	add.s64 	%rd20428, %rd20427, %rd20421;
	add.s64 	%rd20429, %rd20428, %rd21846;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13648,%dummy}, %rd20416;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13649}, %rd20416;
	}
	shf.r.wrap.b32 	%r13650, %r13649, %r13648, 28;
	shf.r.wrap.b32 	%r13651, %r13648, %r13649, 28;
	mov.b64 	%rd20430, {%r13651, %r13650};
	shf.l.wrap.b32 	%r13652, %r13648, %r13649, 30;
	shf.l.wrap.b32 	%r13653, %r13649, %r13648, 30;
	mov.b64 	%rd20431, {%r13653, %r13652};
	xor.b64  	%rd20432, %rd20431, %rd20430;
	shf.l.wrap.b32 	%r13654, %r13648, %r13649, 25;
	shf.l.wrap.b32 	%r13655, %r13649, %r13648, 25;
	mov.b64 	%rd20433, {%r13655, %r13654};
	xor.b64  	%rd20434, %rd20432, %rd20433;
	xor.b64  	%rd20435, %rd20416, %rd20368;
	xor.b64  	%rd20436, %rd20416, %rd20392;
	and.b64  	%rd20437, %rd20436, %rd20435;
	xor.b64  	%rd20438, %rd20437, %rd20416;
	add.s64 	%rd20439, %rd20428, %rd20438;
	add.s64 	%rd20440, %rd20439, %rd20434;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13656,%dummy}, %rd20429;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13657}, %rd20429;
	}
	shf.r.wrap.b32 	%r13658, %r13657, %r13656, 14;
	shf.r.wrap.b32 	%r13659, %r13656, %r13657, 14;
	mov.b64 	%rd20441, {%r13659, %r13658};
	shf.r.wrap.b32 	%r13660, %r13657, %r13656, 18;
	shf.r.wrap.b32 	%r13661, %r13656, %r13657, 18;
	mov.b64 	%rd20442, {%r13661, %r13660};
	xor.b64  	%rd20443, %rd20442, %rd20441;
	shf.l.wrap.b32 	%r13662, %r13656, %r13657, 23;
	shf.l.wrap.b32 	%r13663, %r13657, %r13656, 23;
	mov.b64 	%rd20444, {%r13663, %r13662};
	xor.b64  	%rd20445, %rd20443, %rd20444;
	xor.b64  	%rd20446, %rd20405, %rd20381;
	and.b64  	%rd20447, %rd20429, %rd20446;
	xor.b64  	%rd20448, %rd20447, %rd20381;
	add.s64 	%rd20449, %rd20357, %rd21883;
	add.s64 	%rd20450, %rd20449, %rd21450;
	add.s64 	%rd20451, %rd20450, %rd20448;
	add.s64 	%rd20452, %rd20451, %rd20445;
	add.s64 	%rd20453, %rd20452, %rd20368;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13664,%dummy}, %rd20440;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13665}, %rd20440;
	}
	shf.r.wrap.b32 	%r13666, %r13665, %r13664, 28;
	shf.r.wrap.b32 	%r13667, %r13664, %r13665, 28;
	mov.b64 	%rd20454, {%r13667, %r13666};
	shf.l.wrap.b32 	%r13668, %r13664, %r13665, 30;
	shf.l.wrap.b32 	%r13669, %r13665, %r13664, 30;
	mov.b64 	%rd20455, {%r13669, %r13668};
	xor.b64  	%rd20456, %rd20455, %rd20454;
	shf.l.wrap.b32 	%r13670, %r13664, %r13665, 25;
	shf.l.wrap.b32 	%r13671, %r13665, %r13664, 25;
	mov.b64 	%rd20457, {%r13671, %r13670};
	xor.b64  	%rd20458, %rd20456, %rd20457;
	xor.b64  	%rd20459, %rd20440, %rd20392;
	xor.b64  	%rd20460, %rd20440, %rd20416;
	and.b64  	%rd20461, %rd20460, %rd20459;
	xor.b64  	%rd20462, %rd20461, %rd20440;
	add.s64 	%rd20463, %rd20452, %rd20462;
	add.s64 	%rd20464, %rd20463, %rd20458;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13672,%dummy}, %rd20453;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13673}, %rd20453;
	}
	shf.r.wrap.b32 	%r13674, %r13673, %r13672, 14;
	shf.r.wrap.b32 	%r13675, %r13672, %r13673, 14;
	mov.b64 	%rd20465, {%r13675, %r13674};
	shf.r.wrap.b32 	%r13676, %r13673, %r13672, 18;
	shf.r.wrap.b32 	%r13677, %r13672, %r13673, 18;
	mov.b64 	%rd20466, {%r13677, %r13676};
	xor.b64  	%rd20467, %rd20466, %rd20465;
	shf.l.wrap.b32 	%r13678, %r13672, %r13673, 23;
	shf.l.wrap.b32 	%r13679, %r13673, %r13672, 23;
	mov.b64 	%rd20468, {%r13679, %r13678};
	xor.b64  	%rd20469, %rd20467, %rd20468;
	xor.b64  	%rd20470, %rd20429, %rd20405;
	and.b64  	%rd20471, %rd20453, %rd20470;
	xor.b64  	%rd20472, %rd20471, %rd20405;
	add.s64 	%rd20473, %rd20381, %rd21884;
	add.s64 	%rd20474, %rd20473, %rd21449;
	add.s64 	%rd20475, %rd20474, %rd20472;
	add.s64 	%rd20476, %rd20475, %rd20469;
	add.s64 	%rd20477, %rd20476, %rd20392;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13680,%dummy}, %rd20464;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13681}, %rd20464;
	}
	shf.r.wrap.b32 	%r13682, %r13681, %r13680, 28;
	shf.r.wrap.b32 	%r13683, %r13680, %r13681, 28;
	mov.b64 	%rd20478, {%r13683, %r13682};
	shf.l.wrap.b32 	%r13684, %r13680, %r13681, 30;
	shf.l.wrap.b32 	%r13685, %r13681, %r13680, 30;
	mov.b64 	%rd20479, {%r13685, %r13684};
	xor.b64  	%rd20480, %rd20479, %rd20478;
	shf.l.wrap.b32 	%r13686, %r13680, %r13681, 25;
	shf.l.wrap.b32 	%r13687, %r13681, %r13680, 25;
	mov.b64 	%rd20481, {%r13687, %r13686};
	xor.b64  	%rd20482, %rd20480, %rd20481;
	xor.b64  	%rd20483, %rd20464, %rd20416;
	xor.b64  	%rd20484, %rd20464, %rd20440;
	and.b64  	%rd20485, %rd20484, %rd20483;
	xor.b64  	%rd20486, %rd20485, %rd20464;
	add.s64 	%rd20487, %rd20476, %rd20486;
	add.s64 	%rd20488, %rd20487, %rd20482;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13688,%dummy}, %rd20477;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13689}, %rd20477;
	}
	shf.r.wrap.b32 	%r13690, %r13689, %r13688, 14;
	shf.r.wrap.b32 	%r13691, %r13688, %r13689, 14;
	mov.b64 	%rd20489, {%r13691, %r13690};
	shf.r.wrap.b32 	%r13692, %r13689, %r13688, 18;
	shf.r.wrap.b32 	%r13693, %r13688, %r13689, 18;
	mov.b64 	%rd20490, {%r13693, %r13692};
	xor.b64  	%rd20491, %rd20490, %rd20489;
	shf.l.wrap.b32 	%r13694, %r13688, %r13689, 23;
	shf.l.wrap.b32 	%r13695, %r13689, %r13688, 23;
	mov.b64 	%rd20492, {%r13695, %r13694};
	xor.b64  	%rd20493, %rd20491, %rd20492;
	xor.b64  	%rd20494, %rd20453, %rd20429;
	and.b64  	%rd20495, %rd20477, %rd20494;
	xor.b64  	%rd20496, %rd20495, %rd20429;
	add.s64 	%rd20497, %rd20405, %rd21885;
	add.s64 	%rd20498, %rd20497, %rd21448;
	add.s64 	%rd20499, %rd20498, %rd20496;
	add.s64 	%rd20500, %rd20499, %rd20493;
	add.s64 	%rd20501, %rd20500, %rd20416;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13696,%dummy}, %rd20488;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13697}, %rd20488;
	}
	shf.r.wrap.b32 	%r13698, %r13697, %r13696, 28;
	shf.r.wrap.b32 	%r13699, %r13696, %r13697, 28;
	mov.b64 	%rd20502, {%r13699, %r13698};
	shf.l.wrap.b32 	%r13700, %r13696, %r13697, 30;
	shf.l.wrap.b32 	%r13701, %r13697, %r13696, 30;
	mov.b64 	%rd20503, {%r13701, %r13700};
	xor.b64  	%rd20504, %rd20503, %rd20502;
	shf.l.wrap.b32 	%r13702, %r13696, %r13697, 25;
	shf.l.wrap.b32 	%r13703, %r13697, %r13696, 25;
	mov.b64 	%rd20505, {%r13703, %r13702};
	xor.b64  	%rd20506, %rd20504, %rd20505;
	xor.b64  	%rd20507, %rd20488, %rd20440;
	xor.b64  	%rd20508, %rd20488, %rd20464;
	and.b64  	%rd20509, %rd20508, %rd20507;
	xor.b64  	%rd20510, %rd20509, %rd20488;
	add.s64 	%rd20511, %rd20500, %rd20510;
	add.s64 	%rd20512, %rd20511, %rd20506;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13704,%dummy}, %rd20501;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13705}, %rd20501;
	}
	shf.r.wrap.b32 	%r13706, %r13705, %r13704, 14;
	shf.r.wrap.b32 	%r13707, %r13704, %r13705, 14;
	mov.b64 	%rd20513, {%r13707, %r13706};
	shf.r.wrap.b32 	%r13708, %r13705, %r13704, 18;
	shf.r.wrap.b32 	%r13709, %r13704, %r13705, 18;
	mov.b64 	%rd20514, {%r13709, %r13708};
	xor.b64  	%rd20515, %rd20514, %rd20513;
	shf.l.wrap.b32 	%r13710, %r13704, %r13705, 23;
	shf.l.wrap.b32 	%r13711, %r13705, %r13704, 23;
	mov.b64 	%rd20516, {%r13711, %r13710};
	xor.b64  	%rd20517, %rd20515, %rd20516;
	xor.b64  	%rd20518, %rd20477, %rd20453;
	and.b64  	%rd20519, %rd20501, %rd20518;
	xor.b64  	%rd20520, %rd20519, %rd20453;
	add.s64 	%rd20521, %rd20429, %rd21886;
	add.s64 	%rd20522, %rd20521, %rd21447;
	add.s64 	%rd20523, %rd20522, %rd20520;
	add.s64 	%rd20524, %rd20523, %rd20517;
	add.s64 	%rd20525, %rd20524, %rd20440;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13712,%dummy}, %rd20512;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13713}, %rd20512;
	}
	shf.r.wrap.b32 	%r13714, %r13713, %r13712, 28;
	shf.r.wrap.b32 	%r13715, %r13712, %r13713, 28;
	mov.b64 	%rd20526, {%r13715, %r13714};
	shf.l.wrap.b32 	%r13716, %r13712, %r13713, 30;
	shf.l.wrap.b32 	%r13717, %r13713, %r13712, 30;
	mov.b64 	%rd20527, {%r13717, %r13716};
	xor.b64  	%rd20528, %rd20527, %rd20526;
	shf.l.wrap.b32 	%r13718, %r13712, %r13713, 25;
	shf.l.wrap.b32 	%r13719, %r13713, %r13712, 25;
	mov.b64 	%rd20529, {%r13719, %r13718};
	xor.b64  	%rd20530, %rd20528, %rd20529;
	xor.b64  	%rd20531, %rd20512, %rd20464;
	xor.b64  	%rd20532, %rd20512, %rd20488;
	and.b64  	%rd20533, %rd20532, %rd20531;
	xor.b64  	%rd20534, %rd20533, %rd20512;
	add.s64 	%rd20535, %rd20524, %rd20534;
	add.s64 	%rd20536, %rd20535, %rd20530;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13720,%dummy}, %rd20525;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13721}, %rd20525;
	}
	shf.r.wrap.b32 	%r13722, %r13721, %r13720, 14;
	shf.r.wrap.b32 	%r13723, %r13720, %r13721, 14;
	mov.b64 	%rd20537, {%r13723, %r13722};
	shf.r.wrap.b32 	%r13724, %r13721, %r13720, 18;
	shf.r.wrap.b32 	%r13725, %r13720, %r13721, 18;
	mov.b64 	%rd20538, {%r13725, %r13724};
	xor.b64  	%rd20539, %rd20538, %rd20537;
	shf.l.wrap.b32 	%r13726, %r13720, %r13721, 23;
	shf.l.wrap.b32 	%r13727, %r13721, %r13720, 23;
	mov.b64 	%rd20540, {%r13727, %r13726};
	xor.b64  	%rd20541, %rd20539, %rd20540;
	xor.b64  	%rd20542, %rd20501, %rd20477;
	and.b64  	%rd20543, %rd20525, %rd20542;
	xor.b64  	%rd20544, %rd20543, %rd20477;
	add.s64 	%rd20545, %rd20453, %rd21870;
	add.s64 	%rd20546, %rd20545, %rd21446;
	add.s64 	%rd20547, %rd20546, %rd20544;
	add.s64 	%rd20548, %rd20547, %rd20541;
	add.s64 	%rd20549, %rd20548, %rd20464;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13728,%dummy}, %rd20536;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13729}, %rd20536;
	}
	shf.r.wrap.b32 	%r13730, %r13729, %r13728, 28;
	shf.r.wrap.b32 	%r13731, %r13728, %r13729, 28;
	mov.b64 	%rd20550, {%r13731, %r13730};
	shf.l.wrap.b32 	%r13732, %r13728, %r13729, 30;
	shf.l.wrap.b32 	%r13733, %r13729, %r13728, 30;
	mov.b64 	%rd20551, {%r13733, %r13732};
	xor.b64  	%rd20552, %rd20551, %rd20550;
	shf.l.wrap.b32 	%r13734, %r13728, %r13729, 25;
	shf.l.wrap.b32 	%r13735, %r13729, %r13728, 25;
	mov.b64 	%rd20553, {%r13735, %r13734};
	xor.b64  	%rd20554, %rd20552, %rd20553;
	xor.b64  	%rd20555, %rd20536, %rd20488;
	xor.b64  	%rd20556, %rd20536, %rd20512;
	and.b64  	%rd20557, %rd20556, %rd20555;
	xor.b64  	%rd20558, %rd20557, %rd20536;
	add.s64 	%rd20559, %rd20548, %rd20558;
	add.s64 	%rd20560, %rd20559, %rd20554;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13736,%dummy}, %rd20549;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13737}, %rd20549;
	}
	shf.r.wrap.b32 	%r13738, %r13737, %r13736, 14;
	shf.r.wrap.b32 	%r13739, %r13736, %r13737, 14;
	mov.b64 	%rd20561, {%r13739, %r13738};
	shf.r.wrap.b32 	%r13740, %r13737, %r13736, 18;
	shf.r.wrap.b32 	%r13741, %r13736, %r13737, 18;
	mov.b64 	%rd20562, {%r13741, %r13740};
	xor.b64  	%rd20563, %rd20562, %rd20561;
	shf.l.wrap.b32 	%r13742, %r13736, %r13737, 23;
	shf.l.wrap.b32 	%r13743, %r13737, %r13736, 23;
	mov.b64 	%rd20564, {%r13743, %r13742};
	xor.b64  	%rd20565, %rd20563, %rd20564;
	xor.b64  	%rd20566, %rd20525, %rd20501;
	and.b64  	%rd20567, %rd20549, %rd20566;
	xor.b64  	%rd20568, %rd20567, %rd20501;
	add.s64 	%rd20569, %rd20477, %rd21869;
	add.s64 	%rd20570, %rd20569, %rd21445;
	add.s64 	%rd20571, %rd20570, %rd20568;
	add.s64 	%rd20572, %rd20571, %rd20565;
	add.s64 	%rd20573, %rd20572, %rd20488;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13744,%dummy}, %rd20560;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13745}, %rd20560;
	}
	shf.r.wrap.b32 	%r13746, %r13745, %r13744, 28;
	shf.r.wrap.b32 	%r13747, %r13744, %r13745, 28;
	mov.b64 	%rd20574, {%r13747, %r13746};
	shf.l.wrap.b32 	%r13748, %r13744, %r13745, 30;
	shf.l.wrap.b32 	%r13749, %r13745, %r13744, 30;
	mov.b64 	%rd20575, {%r13749, %r13748};
	xor.b64  	%rd20576, %rd20575, %rd20574;
	shf.l.wrap.b32 	%r13750, %r13744, %r13745, 25;
	shf.l.wrap.b32 	%r13751, %r13745, %r13744, 25;
	mov.b64 	%rd20577, {%r13751, %r13750};
	xor.b64  	%rd20578, %rd20576, %rd20577;
	xor.b64  	%rd20579, %rd20560, %rd20512;
	xor.b64  	%rd20580, %rd20560, %rd20536;
	and.b64  	%rd20581, %rd20580, %rd20579;
	xor.b64  	%rd20582, %rd20581, %rd20560;
	add.s64 	%rd20583, %rd20572, %rd20582;
	add.s64 	%rd20584, %rd20583, %rd20578;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13752,%dummy}, %rd20573;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13753}, %rd20573;
	}
	shf.r.wrap.b32 	%r13754, %r13753, %r13752, 14;
	shf.r.wrap.b32 	%r13755, %r13752, %r13753, 14;
	mov.b64 	%rd20585, {%r13755, %r13754};
	shf.r.wrap.b32 	%r13756, %r13753, %r13752, 18;
	shf.r.wrap.b32 	%r13757, %r13752, %r13753, 18;
	mov.b64 	%rd20586, {%r13757, %r13756};
	xor.b64  	%rd20587, %rd20586, %rd20585;
	shf.l.wrap.b32 	%r13758, %r13752, %r13753, 23;
	shf.l.wrap.b32 	%r13759, %r13753, %r13752, 23;
	mov.b64 	%rd20588, {%r13759, %r13758};
	xor.b64  	%rd20589, %rd20587, %rd20588;
	xor.b64  	%rd20590, %rd20549, %rd20525;
	and.b64  	%rd20591, %rd20573, %rd20590;
	xor.b64  	%rd20592, %rd20591, %rd20525;
	add.s64 	%rd20593, %rd20501, %rd21868;
	add.s64 	%rd20594, %rd20593, %rd21444;
	add.s64 	%rd20595, %rd20594, %rd20592;
	add.s64 	%rd20596, %rd20595, %rd20589;
	add.s64 	%rd20597, %rd20596, %rd20512;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13760,%dummy}, %rd20584;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13761}, %rd20584;
	}
	shf.r.wrap.b32 	%r13762, %r13761, %r13760, 28;
	shf.r.wrap.b32 	%r13763, %r13760, %r13761, 28;
	mov.b64 	%rd20598, {%r13763, %r13762};
	shf.l.wrap.b32 	%r13764, %r13760, %r13761, 30;
	shf.l.wrap.b32 	%r13765, %r13761, %r13760, 30;
	mov.b64 	%rd20599, {%r13765, %r13764};
	xor.b64  	%rd20600, %rd20599, %rd20598;
	shf.l.wrap.b32 	%r13766, %r13760, %r13761, 25;
	shf.l.wrap.b32 	%r13767, %r13761, %r13760, 25;
	mov.b64 	%rd20601, {%r13767, %r13766};
	xor.b64  	%rd20602, %rd20600, %rd20601;
	xor.b64  	%rd20603, %rd20584, %rd20536;
	xor.b64  	%rd20604, %rd20584, %rd20560;
	and.b64  	%rd20605, %rd20604, %rd20603;
	xor.b64  	%rd20606, %rd20605, %rd20584;
	add.s64 	%rd20607, %rd20596, %rd20606;
	add.s64 	%rd20608, %rd20607, %rd20602;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13768,%dummy}, %rd20597;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13769}, %rd20597;
	}
	shf.r.wrap.b32 	%r13770, %r13769, %r13768, 14;
	shf.r.wrap.b32 	%r13771, %r13768, %r13769, 14;
	mov.b64 	%rd20609, {%r13771, %r13770};
	shf.r.wrap.b32 	%r13772, %r13769, %r13768, 18;
	shf.r.wrap.b32 	%r13773, %r13768, %r13769, 18;
	mov.b64 	%rd20610, {%r13773, %r13772};
	xor.b64  	%rd20611, %rd20610, %rd20609;
	shf.l.wrap.b32 	%r13774, %r13768, %r13769, 23;
	shf.l.wrap.b32 	%r13775, %r13769, %r13768, 23;
	mov.b64 	%rd20612, {%r13775, %r13774};
	xor.b64  	%rd20613, %rd20611, %rd20612;
	xor.b64  	%rd20614, %rd20573, %rd20549;
	and.b64  	%rd20615, %rd20597, %rd20614;
	xor.b64  	%rd20616, %rd20615, %rd20549;
	add.s64 	%rd20617, %rd20525, %rd21867;
	add.s64 	%rd20618, %rd20617, %rd21443;
	add.s64 	%rd20619, %rd20618, %rd20616;
	add.s64 	%rd20620, %rd20619, %rd20613;
	add.s64 	%rd20621, %rd20620, %rd20536;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13776,%dummy}, %rd20608;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13777}, %rd20608;
	}
	shf.r.wrap.b32 	%r13778, %r13777, %r13776, 28;
	shf.r.wrap.b32 	%r13779, %r13776, %r13777, 28;
	mov.b64 	%rd20622, {%r13779, %r13778};
	shf.l.wrap.b32 	%r13780, %r13776, %r13777, 30;
	shf.l.wrap.b32 	%r13781, %r13777, %r13776, 30;
	mov.b64 	%rd20623, {%r13781, %r13780};
	xor.b64  	%rd20624, %rd20623, %rd20622;
	shf.l.wrap.b32 	%r13782, %r13776, %r13777, 25;
	shf.l.wrap.b32 	%r13783, %r13777, %r13776, 25;
	mov.b64 	%rd20625, {%r13783, %r13782};
	xor.b64  	%rd20626, %rd20624, %rd20625;
	xor.b64  	%rd20627, %rd20608, %rd20560;
	xor.b64  	%rd20628, %rd20608, %rd20584;
	and.b64  	%rd20629, %rd20628, %rd20627;
	xor.b64  	%rd20630, %rd20629, %rd20608;
	add.s64 	%rd20631, %rd20620, %rd20630;
	add.s64 	%rd20632, %rd20631, %rd20626;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13784,%dummy}, %rd20621;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13785}, %rd20621;
	}
	shf.r.wrap.b32 	%r13786, %r13785, %r13784, 14;
	shf.r.wrap.b32 	%r13787, %r13784, %r13785, 14;
	mov.b64 	%rd20633, {%r13787, %r13786};
	shf.r.wrap.b32 	%r13788, %r13785, %r13784, 18;
	shf.r.wrap.b32 	%r13789, %r13784, %r13785, 18;
	mov.b64 	%rd20634, {%r13789, %r13788};
	xor.b64  	%rd20635, %rd20634, %rd20633;
	shf.l.wrap.b32 	%r13790, %r13784, %r13785, 23;
	shf.l.wrap.b32 	%r13791, %r13785, %r13784, 23;
	mov.b64 	%rd20636, {%r13791, %r13790};
	xor.b64  	%rd20637, %rd20635, %rd20636;
	xor.b64  	%rd20638, %rd20597, %rd20573;
	and.b64  	%rd20639, %rd20621, %rd20638;
	xor.b64  	%rd20640, %rd20639, %rd20573;
	add.s64 	%rd20641, %rd20549, %rd21866;
	add.s64 	%rd20642, %rd20641, %rd21442;
	add.s64 	%rd20643, %rd20642, %rd20640;
	add.s64 	%rd20644, %rd20643, %rd20637;
	add.s64 	%rd21878, %rd20644, %rd20560;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13792,%dummy}, %rd20632;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13793}, %rd20632;
	}
	shf.r.wrap.b32 	%r13794, %r13793, %r13792, 28;
	shf.r.wrap.b32 	%r13795, %r13792, %r13793, 28;
	mov.b64 	%rd20645, {%r13795, %r13794};
	shf.l.wrap.b32 	%r13796, %r13792, %r13793, 30;
	shf.l.wrap.b32 	%r13797, %r13793, %r13792, 30;
	mov.b64 	%rd20646, {%r13797, %r13796};
	xor.b64  	%rd20647, %rd20646, %rd20645;
	shf.l.wrap.b32 	%r13798, %r13792, %r13793, 25;
	shf.l.wrap.b32 	%r13799, %r13793, %r13792, 25;
	mov.b64 	%rd20648, {%r13799, %r13798};
	xor.b64  	%rd20649, %rd20647, %rd20648;
	xor.b64  	%rd20650, %rd20632, %rd20584;
	xor.b64  	%rd20651, %rd20632, %rd20608;
	and.b64  	%rd20652, %rd20651, %rd20650;
	xor.b64  	%rd20653, %rd20652, %rd20632;
	add.s64 	%rd20654, %rd20644, %rd20653;
	add.s64 	%rd21874, %rd20654, %rd20649;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13800,%dummy}, %rd21878;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13801}, %rd21878;
	}
	shf.r.wrap.b32 	%r13802, %r13801, %r13800, 14;
	shf.r.wrap.b32 	%r13803, %r13800, %r13801, 14;
	mov.b64 	%rd20655, {%r13803, %r13802};
	shf.r.wrap.b32 	%r13804, %r13801, %r13800, 18;
	shf.r.wrap.b32 	%r13805, %r13800, %r13801, 18;
	mov.b64 	%rd20656, {%r13805, %r13804};
	xor.b64  	%rd20657, %rd20656, %rd20655;
	shf.l.wrap.b32 	%r13806, %r13800, %r13801, 23;
	shf.l.wrap.b32 	%r13807, %r13801, %r13800, 23;
	mov.b64 	%rd20658, {%r13807, %r13806};
	xor.b64  	%rd20659, %rd20657, %rd20658;
	xor.b64  	%rd20660, %rd20621, %rd20597;
	and.b64  	%rd20661, %rd21878, %rd20660;
	xor.b64  	%rd20662, %rd20661, %rd20597;
	add.s64 	%rd20663, %rd20573, %rd21865;
	add.s64 	%rd20664, %rd20663, %rd21441;
	add.s64 	%rd20665, %rd20664, %rd20662;
	add.s64 	%rd20666, %rd20665, %rd20659;
	add.s64 	%rd21877, %rd20666, %rd20584;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13808,%dummy}, %rd21874;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13809}, %rd21874;
	}
	shf.r.wrap.b32 	%r13810, %r13809, %r13808, 28;
	shf.r.wrap.b32 	%r13811, %r13808, %r13809, 28;
	mov.b64 	%rd20667, {%r13811, %r13810};
	shf.l.wrap.b32 	%r13812, %r13808, %r13809, 30;
	shf.l.wrap.b32 	%r13813, %r13809, %r13808, 30;
	mov.b64 	%rd20668, {%r13813, %r13812};
	xor.b64  	%rd20669, %rd20668, %rd20667;
	shf.l.wrap.b32 	%r13814, %r13808, %r13809, 25;
	shf.l.wrap.b32 	%r13815, %r13809, %r13808, 25;
	mov.b64 	%rd20670, {%r13815, %r13814};
	xor.b64  	%rd20671, %rd20669, %rd20670;
	xor.b64  	%rd20672, %rd21874, %rd20608;
	xor.b64  	%rd20673, %rd21874, %rd20632;
	and.b64  	%rd20674, %rd20673, %rd20672;
	xor.b64  	%rd20675, %rd20674, %rd21874;
	add.s64 	%rd20676, %rd20666, %rd20675;
	add.s64 	%rd21873, %rd20676, %rd20671;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13816,%dummy}, %rd21877;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13817}, %rd21877;
	}
	shf.r.wrap.b32 	%r13818, %r13817, %r13816, 14;
	shf.r.wrap.b32 	%r13819, %r13816, %r13817, 14;
	mov.b64 	%rd20677, {%r13819, %r13818};
	shf.r.wrap.b32 	%r13820, %r13817, %r13816, 18;
	shf.r.wrap.b32 	%r13821, %r13816, %r13817, 18;
	mov.b64 	%rd20678, {%r13821, %r13820};
	xor.b64  	%rd20679, %rd20678, %rd20677;
	shf.l.wrap.b32 	%r13822, %r13816, %r13817, 23;
	shf.l.wrap.b32 	%r13823, %r13817, %r13816, 23;
	mov.b64 	%rd20680, {%r13823, %r13822};
	xor.b64  	%rd20681, %rd20679, %rd20680;
	xor.b64  	%rd20682, %rd21878, %rd20621;
	and.b64  	%rd20683, %rd21877, %rd20682;
	xor.b64  	%rd20684, %rd20683, %rd20621;
	add.s64 	%rd20685, %rd20597, %rd21864;
	add.s64 	%rd20686, %rd20685, %rd21440;
	add.s64 	%rd20687, %rd20686, %rd20684;
	add.s64 	%rd20688, %rd20687, %rd20681;
	add.s64 	%rd21876, %rd20688, %rd20608;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13824,%dummy}, %rd21873;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13825}, %rd21873;
	}
	shf.r.wrap.b32 	%r13826, %r13825, %r13824, 28;
	shf.r.wrap.b32 	%r13827, %r13824, %r13825, 28;
	mov.b64 	%rd20689, {%r13827, %r13826};
	shf.l.wrap.b32 	%r13828, %r13824, %r13825, 30;
	shf.l.wrap.b32 	%r13829, %r13825, %r13824, 30;
	mov.b64 	%rd20690, {%r13829, %r13828};
	xor.b64  	%rd20691, %rd20690, %rd20689;
	shf.l.wrap.b32 	%r13830, %r13824, %r13825, 25;
	shf.l.wrap.b32 	%r13831, %r13825, %r13824, 25;
	mov.b64 	%rd20692, {%r13831, %r13830};
	xor.b64  	%rd20693, %rd20691, %rd20692;
	xor.b64  	%rd20694, %rd21873, %rd20632;
	xor.b64  	%rd20695, %rd21873, %rd21874;
	and.b64  	%rd20696, %rd20695, %rd20694;
	xor.b64  	%rd20697, %rd20696, %rd21873;
	add.s64 	%rd20698, %rd20688, %rd20697;
	add.s64 	%rd21872, %rd20698, %rd20693;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13832,%dummy}, %rd21876;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13833}, %rd21876;
	}
	shf.r.wrap.b32 	%r13834, %r13833, %r13832, 14;
	shf.r.wrap.b32 	%r13835, %r13832, %r13833, 14;
	mov.b64 	%rd20699, {%r13835, %r13834};
	shf.r.wrap.b32 	%r13836, %r13833, %r13832, 18;
	shf.r.wrap.b32 	%r13837, %r13832, %r13833, 18;
	mov.b64 	%rd20700, {%r13837, %r13836};
	xor.b64  	%rd20701, %rd20700, %rd20699;
	shf.l.wrap.b32 	%r13838, %r13832, %r13833, 23;
	shf.l.wrap.b32 	%r13839, %r13833, %r13832, 23;
	mov.b64 	%rd20702, {%r13839, %r13838};
	xor.b64  	%rd20703, %rd20701, %rd20702;
	xor.b64  	%rd20704, %rd21877, %rd21878;
	and.b64  	%rd20705, %rd21876, %rd20704;
	xor.b64  	%rd20706, %rd20705, %rd21878;
	add.s64 	%rd20707, %rd20621, %rd21863;
	add.s64 	%rd20708, %rd20707, %rd21439;
	add.s64 	%rd20709, %rd20708, %rd20706;
	add.s64 	%rd20710, %rd20709, %rd20703;
	add.s64 	%rd21875, %rd20710, %rd20632;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13840,%dummy}, %rd21872;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13841}, %rd21872;
	}
	shf.r.wrap.b32 	%r13842, %r13841, %r13840, 28;
	shf.r.wrap.b32 	%r13843, %r13840, %r13841, 28;
	mov.b64 	%rd20711, {%r13843, %r13842};
	shf.l.wrap.b32 	%r13844, %r13840, %r13841, 30;
	shf.l.wrap.b32 	%r13845, %r13841, %r13840, 30;
	mov.b64 	%rd20712, {%r13845, %r13844};
	xor.b64  	%rd20713, %rd20712, %rd20711;
	shf.l.wrap.b32 	%r13846, %r13840, %r13841, 25;
	shf.l.wrap.b32 	%r13847, %r13841, %r13840, 25;
	mov.b64 	%rd20714, {%r13847, %r13846};
	xor.b64  	%rd20715, %rd20713, %rd20714;
	xor.b64  	%rd20716, %rd21872, %rd21874;
	xor.b64  	%rd20717, %rd21872, %rd21873;
	and.b64  	%rd20718, %rd20717, %rd20716;
	xor.b64  	%rd20719, %rd20718, %rd21872;
	add.s64 	%rd20720, %rd20710, %rd20719;
	add.s64 	%rd21871, %rd20720, %rd20715;
	mov.u32 	%r14508, 16;
	mov.u64 	%rd21862, k_sha512;

BB3_352:
	shr.u64 	%rd20721, %rd21864, 6;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13848,%dummy}, %rd21864;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13849}, %rd21864;
	}
	shf.r.wrap.b32 	%r13850, %r13849, %r13848, 19;
	shf.r.wrap.b32 	%r13851, %r13848, %r13849, 19;
	mov.b64 	%rd20722, {%r13851, %r13850};
	xor.b64  	%rd20723, %rd20722, %rd20721;
	shf.l.wrap.b32 	%r13852, %r13848, %r13849, 3;
	shf.l.wrap.b32 	%r13853, %r13849, %r13848, 3;
	mov.b64 	%rd20724, {%r13853, %r13852};
	xor.b64  	%rd20725, %rd20723, %rd20724;
	shr.u64 	%rd20726, %rd21880, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13854,%dummy}, %rd21880;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13855}, %rd21880;
	}
	shf.r.wrap.b32 	%r13856, %r13855, %r13854, 1;
	shf.r.wrap.b32 	%r13857, %r13854, %r13855, 1;
	mov.b64 	%rd20727, {%r13857, %r13856};
	xor.b64  	%rd20728, %rd20727, %rd20726;
	shf.r.wrap.b32 	%r13858, %r13855, %r13854, 8;
	shf.r.wrap.b32 	%r13859, %r13854, %r13855, 8;
	mov.b64 	%rd20729, {%r13859, %r13858};
	xor.b64  	%rd20730, %rd20728, %rd20729;
	add.s64 	%rd20731, %rd21869, %rd21879;
	add.s64 	%rd20732, %rd20731, %rd20725;
	add.s64 	%rd21879, %rd20732, %rd20730;
	shr.u64 	%rd20733, %rd21863, 6;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13860,%dummy}, %rd21863;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13861}, %rd21863;
	}
	shf.r.wrap.b32 	%r13862, %r13861, %r13860, 19;
	shf.r.wrap.b32 	%r13863, %r13860, %r13861, 19;
	mov.b64 	%rd20734, {%r13863, %r13862};
	xor.b64  	%rd20735, %rd20734, %rd20733;
	shf.l.wrap.b32 	%r13864, %r13860, %r13861, 3;
	shf.l.wrap.b32 	%r13865, %r13861, %r13860, 3;
	mov.b64 	%rd20736, {%r13865, %r13864};
	xor.b64  	%rd20737, %rd20735, %rd20736;
	shr.u64 	%rd20738, %rd21881, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13866,%dummy}, %rd21881;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13867}, %rd21881;
	}
	shf.r.wrap.b32 	%r13868, %r13867, %r13866, 1;
	shf.r.wrap.b32 	%r13869, %r13866, %r13867, 1;
	mov.b64 	%rd20739, {%r13869, %r13868};
	xor.b64  	%rd20740, %rd20739, %rd20738;
	shf.r.wrap.b32 	%r13870, %r13867, %r13866, 8;
	shf.r.wrap.b32 	%r13871, %r13866, %r13867, 8;
	mov.b64 	%rd20741, {%r13871, %r13870};
	xor.b64  	%rd20742, %rd20740, %rd20741;
	add.s64 	%rd20743, %rd21868, %rd21880;
	add.s64 	%rd20744, %rd20743, %rd20737;
	add.s64 	%rd21880, %rd20744, %rd20742;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13872,%dummy}, %rd21879;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13873}, %rd21879;
	}
	shf.r.wrap.b32 	%r13874, %r13873, %r13872, 19;
	shf.r.wrap.b32 	%r13875, %r13872, %r13873, 19;
	mov.b64 	%rd20745, {%r13875, %r13874};
	shf.l.wrap.b32 	%r13876, %r13872, %r13873, 3;
	shf.l.wrap.b32 	%r13877, %r13873, %r13872, 3;
	mov.b64 	%rd20746, {%r13877, %r13876};
	shr.u64 	%rd20747, %rd21879, 6;
	xor.b64  	%rd20748, %rd20745, %rd20747;
	xor.b64  	%rd20749, %rd20748, %rd20746;
	shr.u64 	%rd20750, %rd21882, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13878,%dummy}, %rd21882;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13879}, %rd21882;
	}
	shf.r.wrap.b32 	%r13880, %r13879, %r13878, 1;
	shf.r.wrap.b32 	%r13881, %r13878, %r13879, 1;
	mov.b64 	%rd20751, {%r13881, %r13880};
	xor.b64  	%rd20752, %rd20751, %rd20750;
	shf.r.wrap.b32 	%r13882, %r13879, %r13878, 8;
	shf.r.wrap.b32 	%r13883, %r13878, %r13879, 8;
	mov.b64 	%rd20753, {%r13883, %r13882};
	xor.b64  	%rd20754, %rd20752, %rd20753;
	add.s64 	%rd20755, %rd21867, %rd21881;
	add.s64 	%rd20756, %rd20755, %rd20749;
	add.s64 	%rd21881, %rd20756, %rd20754;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13884,%dummy}, %rd21880;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13885}, %rd21880;
	}
	shf.r.wrap.b32 	%r13886, %r13885, %r13884, 19;
	shf.r.wrap.b32 	%r13887, %r13884, %r13885, 19;
	mov.b64 	%rd20757, {%r13887, %r13886};
	shf.l.wrap.b32 	%r13888, %r13884, %r13885, 3;
	shf.l.wrap.b32 	%r13889, %r13885, %r13884, 3;
	mov.b64 	%rd20758, {%r13889, %r13888};
	shr.u64 	%rd20759, %rd21880, 6;
	xor.b64  	%rd20760, %rd20757, %rd20759;
	xor.b64  	%rd20761, %rd20760, %rd20758;
	shr.u64 	%rd20762, %rd21883, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13890,%dummy}, %rd21883;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13891}, %rd21883;
	}
	shf.r.wrap.b32 	%r13892, %r13891, %r13890, 1;
	shf.r.wrap.b32 	%r13893, %r13890, %r13891, 1;
	mov.b64 	%rd20763, {%r13893, %r13892};
	xor.b64  	%rd20764, %rd20763, %rd20762;
	shf.r.wrap.b32 	%r13894, %r13891, %r13890, 8;
	shf.r.wrap.b32 	%r13895, %r13890, %r13891, 8;
	mov.b64 	%rd20765, {%r13895, %r13894};
	xor.b64  	%rd20766, %rd20764, %rd20765;
	add.s64 	%rd20767, %rd21866, %rd21882;
	add.s64 	%rd20768, %rd20767, %rd20761;
	add.s64 	%rd21882, %rd20768, %rd20766;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13896,%dummy}, %rd21881;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13897}, %rd21881;
	}
	shf.r.wrap.b32 	%r13898, %r13897, %r13896, 19;
	shf.r.wrap.b32 	%r13899, %r13896, %r13897, 19;
	mov.b64 	%rd20769, {%r13899, %r13898};
	shf.l.wrap.b32 	%r13900, %r13896, %r13897, 3;
	shf.l.wrap.b32 	%r13901, %r13897, %r13896, 3;
	mov.b64 	%rd20770, {%r13901, %r13900};
	shr.u64 	%rd20771, %rd21881, 6;
	xor.b64  	%rd20772, %rd20769, %rd20771;
	xor.b64  	%rd20773, %rd20772, %rd20770;
	shr.u64 	%rd20774, %rd21884, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13902,%dummy}, %rd21884;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13903}, %rd21884;
	}
	shf.r.wrap.b32 	%r13904, %r13903, %r13902, 1;
	shf.r.wrap.b32 	%r13905, %r13902, %r13903, 1;
	mov.b64 	%rd20775, {%r13905, %r13904};
	xor.b64  	%rd20776, %rd20775, %rd20774;
	shf.r.wrap.b32 	%r13906, %r13903, %r13902, 8;
	shf.r.wrap.b32 	%r13907, %r13902, %r13903, 8;
	mov.b64 	%rd20777, {%r13907, %r13906};
	xor.b64  	%rd20778, %rd20776, %rd20777;
	add.s64 	%rd20779, %rd21865, %rd21883;
	add.s64 	%rd20780, %rd20779, %rd20773;
	add.s64 	%rd21883, %rd20780, %rd20778;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13908,%dummy}, %rd21882;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13909}, %rd21882;
	}
	shf.r.wrap.b32 	%r13910, %r13909, %r13908, 19;
	shf.r.wrap.b32 	%r13911, %r13908, %r13909, 19;
	mov.b64 	%rd20781, {%r13911, %r13910};
	shf.l.wrap.b32 	%r13912, %r13908, %r13909, 3;
	shf.l.wrap.b32 	%r13913, %r13909, %r13908, 3;
	mov.b64 	%rd20782, {%r13913, %r13912};
	shr.u64 	%rd20783, %rd21882, 6;
	xor.b64  	%rd20784, %rd20781, %rd20783;
	xor.b64  	%rd20785, %rd20784, %rd20782;
	shr.u64 	%rd20786, %rd21885, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13914,%dummy}, %rd21885;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13915}, %rd21885;
	}
	shf.r.wrap.b32 	%r13916, %r13915, %r13914, 1;
	shf.r.wrap.b32 	%r13917, %r13914, %r13915, 1;
	mov.b64 	%rd20787, {%r13917, %r13916};
	xor.b64  	%rd20788, %rd20787, %rd20786;
	shf.r.wrap.b32 	%r13918, %r13915, %r13914, 8;
	shf.r.wrap.b32 	%r13919, %r13914, %r13915, 8;
	mov.b64 	%rd20789, {%r13919, %r13918};
	xor.b64  	%rd20790, %rd20788, %rd20789;
	add.s64 	%rd20791, %rd21864, %rd21884;
	add.s64 	%rd20792, %rd20791, %rd20785;
	add.s64 	%rd21884, %rd20792, %rd20790;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13920,%dummy}, %rd21883;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13921}, %rd21883;
	}
	shf.r.wrap.b32 	%r13922, %r13921, %r13920, 19;
	shf.r.wrap.b32 	%r13923, %r13920, %r13921, 19;
	mov.b64 	%rd20793, {%r13923, %r13922};
	shf.l.wrap.b32 	%r13924, %r13920, %r13921, 3;
	shf.l.wrap.b32 	%r13925, %r13921, %r13920, 3;
	mov.b64 	%rd20794, {%r13925, %r13924};
	shr.u64 	%rd20795, %rd21883, 6;
	xor.b64  	%rd20796, %rd20793, %rd20795;
	xor.b64  	%rd20797, %rd20796, %rd20794;
	shr.u64 	%rd20798, %rd21886, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13926,%dummy}, %rd21886;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13927}, %rd21886;
	}
	shf.r.wrap.b32 	%r13928, %r13927, %r13926, 1;
	shf.r.wrap.b32 	%r13929, %r13926, %r13927, 1;
	mov.b64 	%rd20799, {%r13929, %r13928};
	xor.b64  	%rd20800, %rd20799, %rd20798;
	shf.r.wrap.b32 	%r13930, %r13927, %r13926, 8;
	shf.r.wrap.b32 	%r13931, %r13926, %r13927, 8;
	mov.b64 	%rd20801, {%r13931, %r13930};
	xor.b64  	%rd20802, %rd20800, %rd20801;
	add.s64 	%rd20803, %rd21863, %rd21885;
	add.s64 	%rd20804, %rd20803, %rd20797;
	add.s64 	%rd21885, %rd20804, %rd20802;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13932,%dummy}, %rd21884;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13933}, %rd21884;
	}
	shf.r.wrap.b32 	%r13934, %r13933, %r13932, 19;
	shf.r.wrap.b32 	%r13935, %r13932, %r13933, 19;
	mov.b64 	%rd20805, {%r13935, %r13934};
	shf.l.wrap.b32 	%r13936, %r13932, %r13933, 3;
	shf.l.wrap.b32 	%r13937, %r13933, %r13932, 3;
	mov.b64 	%rd20806, {%r13937, %r13936};
	shr.u64 	%rd20807, %rd21884, 6;
	xor.b64  	%rd20808, %rd20805, %rd20807;
	xor.b64  	%rd20809, %rd20808, %rd20806;
	shr.u64 	%rd20810, %rd21870, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13938,%dummy}, %rd21870;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13939}, %rd21870;
	}
	shf.r.wrap.b32 	%r13940, %r13939, %r13938, 1;
	shf.r.wrap.b32 	%r13941, %r13938, %r13939, 1;
	mov.b64 	%rd20811, {%r13941, %r13940};
	xor.b64  	%rd20812, %rd20811, %rd20810;
	shf.r.wrap.b32 	%r13942, %r13939, %r13938, 8;
	shf.r.wrap.b32 	%r13943, %r13938, %r13939, 8;
	mov.b64 	%rd20813, {%r13943, %r13942};
	xor.b64  	%rd20814, %rd20812, %rd20813;
	add.s64 	%rd20815, %rd21879, %rd21886;
	add.s64 	%rd20816, %rd20815, %rd20809;
	add.s64 	%rd21886, %rd20816, %rd20814;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13944,%dummy}, %rd21885;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13945}, %rd21885;
	}
	shf.r.wrap.b32 	%r13946, %r13945, %r13944, 19;
	shf.r.wrap.b32 	%r13947, %r13944, %r13945, 19;
	mov.b64 	%rd20817, {%r13947, %r13946};
	shf.l.wrap.b32 	%r13948, %r13944, %r13945, 3;
	shf.l.wrap.b32 	%r13949, %r13945, %r13944, 3;
	mov.b64 	%rd20818, {%r13949, %r13948};
	shr.u64 	%rd20819, %rd21885, 6;
	xor.b64  	%rd20820, %rd20817, %rd20819;
	xor.b64  	%rd20821, %rd20820, %rd20818;
	shr.u64 	%rd20822, %rd21869, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13950,%dummy}, %rd21869;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13951}, %rd21869;
	}
	shf.r.wrap.b32 	%r13952, %r13951, %r13950, 1;
	shf.r.wrap.b32 	%r13953, %r13950, %r13951, 1;
	mov.b64 	%rd20823, {%r13953, %r13952};
	xor.b64  	%rd20824, %rd20823, %rd20822;
	shf.r.wrap.b32 	%r13954, %r13951, %r13950, 8;
	shf.r.wrap.b32 	%r13955, %r13950, %r13951, 8;
	mov.b64 	%rd20825, {%r13955, %r13954};
	xor.b64  	%rd20826, %rd20824, %rd20825;
	add.s64 	%rd20827, %rd21880, %rd21870;
	add.s64 	%rd20828, %rd20827, %rd20821;
	add.s64 	%rd21870, %rd20828, %rd20826;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13956,%dummy}, %rd21886;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13957}, %rd21886;
	}
	shf.r.wrap.b32 	%r13958, %r13957, %r13956, 19;
	shf.r.wrap.b32 	%r13959, %r13956, %r13957, 19;
	mov.b64 	%rd20829, {%r13959, %r13958};
	shf.l.wrap.b32 	%r13960, %r13956, %r13957, 3;
	shf.l.wrap.b32 	%r13961, %r13957, %r13956, 3;
	mov.b64 	%rd20830, {%r13961, %r13960};
	shr.u64 	%rd20831, %rd21886, 6;
	xor.b64  	%rd20832, %rd20829, %rd20831;
	xor.b64  	%rd20833, %rd20832, %rd20830;
	shr.u64 	%rd20834, %rd21868, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13962,%dummy}, %rd21868;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13963}, %rd21868;
	}
	shf.r.wrap.b32 	%r13964, %r13963, %r13962, 1;
	shf.r.wrap.b32 	%r13965, %r13962, %r13963, 1;
	mov.b64 	%rd20835, {%r13965, %r13964};
	xor.b64  	%rd20836, %rd20835, %rd20834;
	shf.r.wrap.b32 	%r13966, %r13963, %r13962, 8;
	shf.r.wrap.b32 	%r13967, %r13962, %r13963, 8;
	mov.b64 	%rd20837, {%r13967, %r13966};
	xor.b64  	%rd20838, %rd20836, %rd20837;
	add.s64 	%rd20839, %rd21881, %rd21869;
	add.s64 	%rd20840, %rd20839, %rd20833;
	add.s64 	%rd21869, %rd20840, %rd20838;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13968,%dummy}, %rd21870;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13969}, %rd21870;
	}
	shf.r.wrap.b32 	%r13970, %r13969, %r13968, 19;
	shf.r.wrap.b32 	%r13971, %r13968, %r13969, 19;
	mov.b64 	%rd20841, {%r13971, %r13970};
	shf.l.wrap.b32 	%r13972, %r13968, %r13969, 3;
	shf.l.wrap.b32 	%r13973, %r13969, %r13968, 3;
	mov.b64 	%rd20842, {%r13973, %r13972};
	shr.u64 	%rd20843, %rd21870, 6;
	xor.b64  	%rd20844, %rd20841, %rd20843;
	xor.b64  	%rd20845, %rd20844, %rd20842;
	shr.u64 	%rd20846, %rd21867, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13974,%dummy}, %rd21867;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13975}, %rd21867;
	}
	shf.r.wrap.b32 	%r13976, %r13975, %r13974, 1;
	shf.r.wrap.b32 	%r13977, %r13974, %r13975, 1;
	mov.b64 	%rd20847, {%r13977, %r13976};
	xor.b64  	%rd20848, %rd20847, %rd20846;
	shf.r.wrap.b32 	%r13978, %r13975, %r13974, 8;
	shf.r.wrap.b32 	%r13979, %r13974, %r13975, 8;
	mov.b64 	%rd20849, {%r13979, %r13978};
	xor.b64  	%rd20850, %rd20848, %rd20849;
	add.s64 	%rd20851, %rd21882, %rd21868;
	add.s64 	%rd20852, %rd20851, %rd20845;
	add.s64 	%rd21868, %rd20852, %rd20850;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13980,%dummy}, %rd21869;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13981}, %rd21869;
	}
	shf.r.wrap.b32 	%r13982, %r13981, %r13980, 19;
	shf.r.wrap.b32 	%r13983, %r13980, %r13981, 19;
	mov.b64 	%rd20853, {%r13983, %r13982};
	shf.l.wrap.b32 	%r13984, %r13980, %r13981, 3;
	shf.l.wrap.b32 	%r13985, %r13981, %r13980, 3;
	mov.b64 	%rd20854, {%r13985, %r13984};
	shr.u64 	%rd20855, %rd21869, 6;
	xor.b64  	%rd20856, %rd20853, %rd20855;
	xor.b64  	%rd20857, %rd20856, %rd20854;
	shr.u64 	%rd20858, %rd21866, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13986,%dummy}, %rd21866;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13987}, %rd21866;
	}
	shf.r.wrap.b32 	%r13988, %r13987, %r13986, 1;
	shf.r.wrap.b32 	%r13989, %r13986, %r13987, 1;
	mov.b64 	%rd20859, {%r13989, %r13988};
	xor.b64  	%rd20860, %rd20859, %rd20858;
	shf.r.wrap.b32 	%r13990, %r13987, %r13986, 8;
	shf.r.wrap.b32 	%r13991, %r13986, %r13987, 8;
	mov.b64 	%rd20861, {%r13991, %r13990};
	xor.b64  	%rd20862, %rd20860, %rd20861;
	add.s64 	%rd20863, %rd21883, %rd21867;
	add.s64 	%rd20864, %rd20863, %rd20857;
	add.s64 	%rd21867, %rd20864, %rd20862;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13992,%dummy}, %rd21868;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13993}, %rd21868;
	}
	shf.r.wrap.b32 	%r13994, %r13993, %r13992, 19;
	shf.r.wrap.b32 	%r13995, %r13992, %r13993, 19;
	mov.b64 	%rd20865, {%r13995, %r13994};
	shf.l.wrap.b32 	%r13996, %r13992, %r13993, 3;
	shf.l.wrap.b32 	%r13997, %r13993, %r13992, 3;
	mov.b64 	%rd20866, {%r13997, %r13996};
	shr.u64 	%rd20867, %rd21868, 6;
	xor.b64  	%rd20868, %rd20865, %rd20867;
	xor.b64  	%rd20869, %rd20868, %rd20866;
	shr.u64 	%rd20870, %rd21865, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r13998,%dummy}, %rd21865;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r13999}, %rd21865;
	}
	shf.r.wrap.b32 	%r14000, %r13999, %r13998, 1;
	shf.r.wrap.b32 	%r14001, %r13998, %r13999, 1;
	mov.b64 	%rd20871, {%r14001, %r14000};
	xor.b64  	%rd20872, %rd20871, %rd20870;
	shf.r.wrap.b32 	%r14002, %r13999, %r13998, 8;
	shf.r.wrap.b32 	%r14003, %r13998, %r13999, 8;
	mov.b64 	%rd20873, {%r14003, %r14002};
	xor.b64  	%rd20874, %rd20872, %rd20873;
	add.s64 	%rd20875, %rd21884, %rd21866;
	add.s64 	%rd20876, %rd20875, %rd20869;
	add.s64 	%rd21866, %rd20876, %rd20874;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r14004,%dummy}, %rd21867;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r14005}, %rd21867;
	}
	shf.r.wrap.b32 	%r14006, %r14005, %r14004, 19;
	shf.r.wrap.b32 	%r14007, %r14004, %r14005, 19;
	mov.b64 	%rd20877, {%r14007, %r14006};
	shf.l.wrap.b32 	%r14008, %r14004, %r14005, 3;
	shf.l.wrap.b32 	%r14009, %r14005, %r14004, 3;
	mov.b64 	%rd20878, {%r14009, %r14008};
	shr.u64 	%rd20879, %rd21867, 6;
	xor.b64  	%rd20880, %rd20877, %rd20879;
	xor.b64  	%rd20881, %rd20880, %rd20878;
	shr.u64 	%rd20882, %rd21864, 7;
	shf.r.wrap.b32 	%r14010, %r13849, %r13848, 1;
	shf.r.wrap.b32 	%r14011, %r13848, %r13849, 1;
	mov.b64 	%rd20883, {%r14011, %r14010};
	xor.b64  	%rd20884, %rd20883, %rd20882;
	shf.r.wrap.b32 	%r14012, %r13849, %r13848, 8;
	shf.r.wrap.b32 	%r14013, %r13848, %r13849, 8;
	mov.b64 	%rd20885, {%r14013, %r14012};
	xor.b64  	%rd20886, %rd20884, %rd20885;
	add.s64 	%rd20887, %rd21885, %rd21865;
	add.s64 	%rd20888, %rd20887, %rd20881;
	add.s64 	%rd21865, %rd20888, %rd20886;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r14014,%dummy}, %rd21866;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r14015}, %rd21866;
	}
	shf.r.wrap.b32 	%r14016, %r14015, %r14014, 19;
	shf.r.wrap.b32 	%r14017, %r14014, %r14015, 19;
	mov.b64 	%rd20889, {%r14017, %r14016};
	shf.l.wrap.b32 	%r14018, %r14014, %r14015, 3;
	shf.l.wrap.b32 	%r14019, %r14015, %r14014, 3;
	mov.b64 	%rd20890, {%r14019, %r14018};
	shr.u64 	%rd20891, %rd21866, 6;
	xor.b64  	%rd20892, %rd20889, %rd20891;
	xor.b64  	%rd20893, %rd20892, %rd20890;
	shr.u64 	%rd20894, %rd21863, 7;
	shf.r.wrap.b32 	%r14020, %r13861, %r13860, 1;
	shf.r.wrap.b32 	%r14021, %r13860, %r13861, 1;
	mov.b64 	%rd20895, {%r14021, %r14020};
	xor.b64  	%rd20896, %rd20895, %rd20894;
	shf.r.wrap.b32 	%r14022, %r13861, %r13860, 8;
	shf.r.wrap.b32 	%r14023, %r13860, %r13861, 8;
	mov.b64 	%rd20897, {%r14023, %r14022};
	xor.b64  	%rd20898, %rd20896, %rd20897;
	add.s64 	%rd20899, %rd21886, %rd21864;
	add.s64 	%rd20900, %rd20899, %rd20893;
	add.s64 	%rd21864, %rd20900, %rd20898;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r14024,%dummy}, %rd21865;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r14025}, %rd21865;
	}
	shf.r.wrap.b32 	%r14026, %r14025, %r14024, 19;
	shf.r.wrap.b32 	%r14027, %r14024, %r14025, 19;
	mov.b64 	%rd20901, {%r14027, %r14026};
	shf.l.wrap.b32 	%r14028, %r14024, %r14025, 3;
	shf.l.wrap.b32 	%r14029, %r14025, %r14024, 3;
	mov.b64 	%rd20902, {%r14029, %r14028};
	shr.u64 	%rd20903, %rd21865, 6;
	xor.b64  	%rd20904, %rd20901, %rd20903;
	xor.b64  	%rd20905, %rd20904, %rd20902;
	shf.r.wrap.b32 	%r14030, %r13873, %r13872, 1;
	shf.r.wrap.b32 	%r14031, %r13872, %r13873, 1;
	mov.b64 	%rd20906, {%r14031, %r14030};
	shf.r.wrap.b32 	%r14032, %r13873, %r13872, 8;
	shf.r.wrap.b32 	%r14033, %r13872, %r13873, 8;
	mov.b64 	%rd20907, {%r14033, %r14032};
	shr.u64 	%rd20908, %rd21879, 7;
	xor.b64  	%rd20909, %rd20906, %rd20908;
	xor.b64  	%rd20910, %rd20909, %rd20907;
	add.s64 	%rd20911, %rd21870, %rd21863;
	add.s64 	%rd20912, %rd20911, %rd20905;
	add.s64 	%rd21863, %rd20912, %rd20910;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r14034,%dummy}, %rd21875;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r14035}, %rd21875;
	}
	shf.r.wrap.b32 	%r14036, %r14035, %r14034, 18;
	shf.r.wrap.b32 	%r14037, %r14034, %r14035, 18;
	mov.b64 	%rd20913, {%r14037, %r14036};
	shf.r.wrap.b32 	%r14038, %r14035, %r14034, 14;
	shf.r.wrap.b32 	%r14039, %r14034, %r14035, 14;
	mov.b64 	%rd20914, {%r14039, %r14038};
	xor.b64  	%rd20915, %rd20913, %rd20914;
	shf.l.wrap.b32 	%r14040, %r14034, %r14035, 23;
	shf.l.wrap.b32 	%r14041, %r14035, %r14034, 23;
	mov.b64 	%rd20916, {%r14041, %r14040};
	xor.b64  	%rd20917, %rd20915, %rd20916;
	xor.b64  	%rd20918, %rd21876, %rd21877;
	and.b64  	%rd20919, %rd20918, %rd21875;
	xor.b64  	%rd20920, %rd20919, %rd21877;
	add.s64 	%rd20921, %rd20920, %rd21878;
	add.s64 	%rd20922, %rd20921, %rd21879;
	add.s64 	%rd1786, %rd21862, 128;
	ld.const.u64 	%rd20923, [%rd21862+128];
	add.s64 	%rd20924, %rd20922, %rd20923;
	add.s64 	%rd20925, %rd20924, %rd20917;
	add.s64 	%rd20926, %rd20925, %rd21874;
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r14042}, %rd21871;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%r14043,%dummy}, %rd21871;
	}
	shf.l.wrap.b32 	%r14044, %r14043, %r14042, 30;
	shf.l.wrap.b32 	%r14045, %r14042, %r14043, 30;
	mov.b64 	%rd20927, {%r14045, %r14044};
	shf.r.wrap.b32 	%r14046, %r14042, %r14043, 28;
	shf.r.wrap.b32 	%r14047, %r14043, %r14042, 28;
	mov.b64 	%rd20928, {%r14047, %r14046};
	xor.b64  	%rd20929, %rd20927, %rd20928;
	shf.l.wrap.b32 	%r14048, %r14043, %r14042, 25;
	shf.l.wrap.b32 	%r14049, %r14042, %r14043, 25;
	mov.b64 	%rd20930, {%r14049, %r14048};
	xor.b64  	%rd20931, %rd20929, %rd20930;
	xor.b64  	%rd20932, %rd21871, %rd21872;
	xor.b64  	%rd20933, %rd21871, %rd21873;
	and.b64  	%rd20934, %rd20932, %rd20933;
	xor.b64  	%rd20935, %rd20934, %rd21871;
	add.s64 	%rd20936, %rd20925, %rd20935;
	add.s64 	%rd20937, %rd20936, %rd20931;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r14050,%dummy}, %rd20926;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r14051}, %rd20926;
	}
	shf.r.wrap.b32 	%r14052, %r14051, %r14050, 14;
	shf.r.wrap.b32 	%r14053, %r14050, %r14051, 14;
	mov.b64 	%rd20938, {%r14053, %r14052};
	shf.r.wrap.b32 	%r14054, %r14051, %r14050, 18;
	shf.r.wrap.b32 	%r14055, %r14050, %r14051, 18;
	mov.b64 	%rd20939, {%r14055, %r14054};
	xor.b64  	%rd20940, %rd20939, %rd20938;
	shf.l.wrap.b32 	%r14056, %r14050, %r14051, 23;
	shf.l.wrap.b32 	%r14057, %r14051, %r14050, 23;
	mov.b64 	%rd20941, {%r14057, %r14056};
	xor.b64  	%rd20942, %rd20940, %rd20941;
	xor.b64  	%rd20943, %rd21875, %rd21876;
	and.b64  	%rd20944, %rd20926, %rd20943;
	xor.b64  	%rd20945, %rd20944, %rd21876;
	add.s64 	%rd20946, %rd21880, %rd21877;
	ld.const.u64 	%rd20947, [%rd21862+136];
	add.s64 	%rd20948, %rd20946, %rd20947;
	add.s64 	%rd20949, %rd20948, %rd20945;
	add.s64 	%rd20950, %rd20949, %rd20942;
	add.s64 	%rd20951, %rd20950, %rd21873;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r14058,%dummy}, %rd20937;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r14059}, %rd20937;
	}
	shf.r.wrap.b32 	%r14060, %r14059, %r14058, 28;
	shf.r.wrap.b32 	%r14061, %r14058, %r14059, 28;
	mov.b64 	%rd20952, {%r14061, %r14060};
	shf.l.wrap.b32 	%r14062, %r14058, %r14059, 30;
	shf.l.wrap.b32 	%r14063, %r14059, %r14058, 30;
	mov.b64 	%rd20953, {%r14063, %r14062};
	xor.b64  	%rd20954, %rd20953, %rd20952;
	shf.l.wrap.b32 	%r14064, %r14058, %r14059, 25;
	shf.l.wrap.b32 	%r14065, %r14059, %r14058, 25;
	mov.b64 	%rd20955, {%r14065, %r14064};
	xor.b64  	%rd20956, %rd20954, %rd20955;
	xor.b64  	%rd20957, %rd20937, %rd21872;
	xor.b64  	%rd20958, %rd20937, %rd21871;
	and.b64  	%rd20959, %rd20958, %rd20957;
	xor.b64  	%rd20960, %rd20959, %rd20937;
	add.s64 	%rd20961, %rd20950, %rd20960;
	add.s64 	%rd20962, %rd20961, %rd20956;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r14066,%dummy}, %rd20951;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r14067}, %rd20951;
	}
	shf.r.wrap.b32 	%r14068, %r14067, %r14066, 14;
	shf.r.wrap.b32 	%r14069, %r14066, %r14067, 14;
	mov.b64 	%rd20963, {%r14069, %r14068};
	shf.r.wrap.b32 	%r14070, %r14067, %r14066, 18;
	shf.r.wrap.b32 	%r14071, %r14066, %r14067, 18;
	mov.b64 	%rd20964, {%r14071, %r14070};
	xor.b64  	%rd20965, %rd20964, %rd20963;
	shf.l.wrap.b32 	%r14072, %r14066, %r14067, 23;
	shf.l.wrap.b32 	%r14073, %r14067, %r14066, 23;
	mov.b64 	%rd20966, {%r14073, %r14072};
	xor.b64  	%rd20967, %rd20965, %rd20966;
	xor.b64  	%rd20968, %rd20926, %rd21875;
	and.b64  	%rd20969, %rd20951, %rd20968;
	xor.b64  	%rd20970, %rd20969, %rd21875;
	add.s64 	%rd20971, %rd21881, %rd21876;
	ld.const.u64 	%rd20972, [%rd21862+144];
	add.s64 	%rd20973, %rd20971, %rd20972;
	add.s64 	%rd20974, %rd20973, %rd20970;
	add.s64 	%rd20975, %rd20974, %rd20967;
	add.s64 	%rd20976, %rd20975, %rd21872;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r14074,%dummy}, %rd20962;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r14075}, %rd20962;
	}
	shf.r.wrap.b32 	%r14076, %r14075, %r14074, 28;
	shf.r.wrap.b32 	%r14077, %r14074, %r14075, 28;
	mov.b64 	%rd20977, {%r14077, %r14076};
	shf.l.wrap.b32 	%r14078, %r14074, %r14075, 30;
	shf.l.wrap.b32 	%r14079, %r14075, %r14074, 30;
	mov.b64 	%rd20978, {%r14079, %r14078};
	xor.b64  	%rd20979, %rd20978, %rd20977;
	shf.l.wrap.b32 	%r14080, %r14074, %r14075, 25;
	shf.l.wrap.b32 	%r14081, %r14075, %r14074, 25;
	mov.b64 	%rd20980, {%r14081, %r14080};
	xor.b64  	%rd20981, %rd20979, %rd20980;
	xor.b64  	%rd20982, %rd20962, %rd21871;
	xor.b64  	%rd20983, %rd20962, %rd20937;
	and.b64  	%rd20984, %rd20983, %rd20982;
	xor.b64  	%rd20985, %rd20984, %rd20962;
	add.s64 	%rd20986, %rd20975, %rd20985;
	add.s64 	%rd20987, %rd20986, %rd20981;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r14082,%dummy}, %rd20976;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r14083}, %rd20976;
	}
	shf.r.wrap.b32 	%r14084, %r14083, %r14082, 14;
	shf.r.wrap.b32 	%r14085, %r14082, %r14083, 14;
	mov.b64 	%rd20988, {%r14085, %r14084};
	shf.r.wrap.b32 	%r14086, %r14083, %r14082, 18;
	shf.r.wrap.b32 	%r14087, %r14082, %r14083, 18;
	mov.b64 	%rd20989, {%r14087, %r14086};
	xor.b64  	%rd20990, %rd20989, %rd20988;
	shf.l.wrap.b32 	%r14088, %r14082, %r14083, 23;
	shf.l.wrap.b32 	%r14089, %r14083, %r14082, 23;
	mov.b64 	%rd20991, {%r14089, %r14088};
	xor.b64  	%rd20992, %rd20990, %rd20991;
	xor.b64  	%rd20993, %rd20951, %rd20926;
	and.b64  	%rd20994, %rd20976, %rd20993;
	xor.b64  	%rd20995, %rd20994, %rd20926;
	add.s64 	%rd20996, %rd21882, %rd21875;
	ld.const.u64 	%rd20997, [%rd21862+152];
	add.s64 	%rd20998, %rd20996, %rd20997;
	add.s64 	%rd20999, %rd20998, %rd20995;
	add.s64 	%rd21000, %rd20999, %rd20992;
	add.s64 	%rd21001, %rd21000, %rd21871;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r14090,%dummy}, %rd20987;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r14091}, %rd20987;
	}
	shf.r.wrap.b32 	%r14092, %r14091, %r14090, 28;
	shf.r.wrap.b32 	%r14093, %r14090, %r14091, 28;
	mov.b64 	%rd21002, {%r14093, %r14092};
	shf.l.wrap.b32 	%r14094, %r14090, %r14091, 30;
	shf.l.wrap.b32 	%r14095, %r14091, %r14090, 30;
	mov.b64 	%rd21003, {%r14095, %r14094};
	xor.b64  	%rd21004, %rd21003, %rd21002;
	shf.l.wrap.b32 	%r14096, %r14090, %r14091, 25;
	shf.l.wrap.b32 	%r14097, %r14091, %r14090, 25;
	mov.b64 	%rd21005, {%r14097, %r14096};
	xor.b64  	%rd21006, %rd21004, %rd21005;
	xor.b64  	%rd21007, %rd20987, %rd20937;
	xor.b64  	%rd21008, %rd20987, %rd20962;
	and.b64  	%rd21009, %rd21008, %rd21007;
	xor.b64  	%rd21010, %rd21009, %rd20987;
	add.s64 	%rd21011, %rd21000, %rd21010;
	add.s64 	%rd21012, %rd21011, %rd21006;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r14098,%dummy}, %rd21001;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r14099}, %rd21001;
	}
	shf.r.wrap.b32 	%r14100, %r14099, %r14098, 14;
	shf.r.wrap.b32 	%r14101, %r14098, %r14099, 14;
	mov.b64 	%rd21013, {%r14101, %r14100};
	shf.r.wrap.b32 	%r14102, %r14099, %r14098, 18;
	shf.r.wrap.b32 	%r14103, %r14098, %r14099, 18;
	mov.b64 	%rd21014, {%r14103, %r14102};
	xor.b64  	%rd21015, %rd21014, %rd21013;
	shf.l.wrap.b32 	%r14104, %r14098, %r14099, 23;
	shf.l.wrap.b32 	%r14105, %r14099, %r14098, 23;
	mov.b64 	%rd21016, {%r14105, %r14104};
	xor.b64  	%rd21017, %rd21015, %rd21016;
	xor.b64  	%rd21018, %rd20976, %rd20951;
	and.b64  	%rd21019, %rd21001, %rd21018;
	xor.b64  	%rd21020, %rd21019, %rd20951;
	add.s64 	%rd21021, %rd20926, %rd21883;
	ld.const.u64 	%rd21022, [%rd21862+160];
	add.s64 	%rd21023, %rd21021, %rd21022;
	add.s64 	%rd21024, %rd21023, %rd21020;
	add.s64 	%rd21025, %rd21024, %rd21017;
	add.s64 	%rd21026, %rd21025, %rd20937;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r14106,%dummy}, %rd21012;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r14107}, %rd21012;
	}
	shf.r.wrap.b32 	%r14108, %r14107, %r14106, 28;
	shf.r.wrap.b32 	%r14109, %r14106, %r14107, 28;
	mov.b64 	%rd21027, {%r14109, %r14108};
	shf.l.wrap.b32 	%r14110, %r14106, %r14107, 30;
	shf.l.wrap.b32 	%r14111, %r14107, %r14106, 30;
	mov.b64 	%rd21028, {%r14111, %r14110};
	xor.b64  	%rd21029, %rd21028, %rd21027;
	shf.l.wrap.b32 	%r14112, %r14106, %r14107, 25;
	shf.l.wrap.b32 	%r14113, %r14107, %r14106, 25;
	mov.b64 	%rd21030, {%r14113, %r14112};
	xor.b64  	%rd21031, %rd21029, %rd21030;
	xor.b64  	%rd21032, %rd21012, %rd20962;
	xor.b64  	%rd21033, %rd21012, %rd20987;
	and.b64  	%rd21034, %rd21033, %rd21032;
	xor.b64  	%rd21035, %rd21034, %rd21012;
	add.s64 	%rd21036, %rd21025, %rd21035;
	add.s64 	%rd21037, %rd21036, %rd21031;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r14114,%dummy}, %rd21026;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r14115}, %rd21026;
	}
	shf.r.wrap.b32 	%r14116, %r14115, %r14114, 14;
	shf.r.wrap.b32 	%r14117, %r14114, %r14115, 14;
	mov.b64 	%rd21038, {%r14117, %r14116};
	shf.r.wrap.b32 	%r14118, %r14115, %r14114, 18;
	shf.r.wrap.b32 	%r14119, %r14114, %r14115, 18;
	mov.b64 	%rd21039, {%r14119, %r14118};
	xor.b64  	%rd21040, %rd21039, %rd21038;
	shf.l.wrap.b32 	%r14120, %r14114, %r14115, 23;
	shf.l.wrap.b32 	%r14121, %r14115, %r14114, 23;
	mov.b64 	%rd21041, {%r14121, %r14120};
	xor.b64  	%rd21042, %rd21040, %rd21041;
	xor.b64  	%rd21043, %rd21001, %rd20976;
	and.b64  	%rd21044, %rd21026, %rd21043;
	xor.b64  	%rd21045, %rd21044, %rd20976;
	add.s64 	%rd21046, %rd20951, %rd21884;
	ld.const.u64 	%rd21047, [%rd21862+168];
	add.s64 	%rd21048, %rd21046, %rd21047;
	add.s64 	%rd21049, %rd21048, %rd21045;
	add.s64 	%rd21050, %rd21049, %rd21042;
	add.s64 	%rd21051, %rd21050, %rd20962;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r14122,%dummy}, %rd21037;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r14123}, %rd21037;
	}
	shf.r.wrap.b32 	%r14124, %r14123, %r14122, 28;
	shf.r.wrap.b32 	%r14125, %r14122, %r14123, 28;
	mov.b64 	%rd21052, {%r14125, %r14124};
	shf.l.wrap.b32 	%r14126, %r14122, %r14123, 30;
	shf.l.wrap.b32 	%r14127, %r14123, %r14122, 30;
	mov.b64 	%rd21053, {%r14127, %r14126};
	xor.b64  	%rd21054, %rd21053, %rd21052;
	shf.l.wrap.b32 	%r14128, %r14122, %r14123, 25;
	shf.l.wrap.b32 	%r14129, %r14123, %r14122, 25;
	mov.b64 	%rd21055, {%r14129, %r14128};
	xor.b64  	%rd21056, %rd21054, %rd21055;
	xor.b64  	%rd21057, %rd21037, %rd20987;
	xor.b64  	%rd21058, %rd21037, %rd21012;
	and.b64  	%rd21059, %rd21058, %rd21057;
	xor.b64  	%rd21060, %rd21059, %rd21037;
	add.s64 	%rd21061, %rd21050, %rd21060;
	add.s64 	%rd21062, %rd21061, %rd21056;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r14130,%dummy}, %rd21051;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r14131}, %rd21051;
	}
	shf.r.wrap.b32 	%r14132, %r14131, %r14130, 14;
	shf.r.wrap.b32 	%r14133, %r14130, %r14131, 14;
	mov.b64 	%rd21063, {%r14133, %r14132};
	shf.r.wrap.b32 	%r14134, %r14131, %r14130, 18;
	shf.r.wrap.b32 	%r14135, %r14130, %r14131, 18;
	mov.b64 	%rd21064, {%r14135, %r14134};
	xor.b64  	%rd21065, %rd21064, %rd21063;
	shf.l.wrap.b32 	%r14136, %r14130, %r14131, 23;
	shf.l.wrap.b32 	%r14137, %r14131, %r14130, 23;
	mov.b64 	%rd21066, {%r14137, %r14136};
	xor.b64  	%rd21067, %rd21065, %rd21066;
	xor.b64  	%rd21068, %rd21026, %rd21001;
	and.b64  	%rd21069, %rd21051, %rd21068;
	xor.b64  	%rd21070, %rd21069, %rd21001;
	add.s64 	%rd21071, %rd20976, %rd21885;
	ld.const.u64 	%rd21072, [%rd21862+176];
	add.s64 	%rd21073, %rd21071, %rd21072;
	add.s64 	%rd21074, %rd21073, %rd21070;
	add.s64 	%rd21075, %rd21074, %rd21067;
	add.s64 	%rd21076, %rd21075, %rd20987;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r14138,%dummy}, %rd21062;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r14139}, %rd21062;
	}
	shf.r.wrap.b32 	%r14140, %r14139, %r14138, 28;
	shf.r.wrap.b32 	%r14141, %r14138, %r14139, 28;
	mov.b64 	%rd21077, {%r14141, %r14140};
	shf.l.wrap.b32 	%r14142, %r14138, %r14139, 30;
	shf.l.wrap.b32 	%r14143, %r14139, %r14138, 30;
	mov.b64 	%rd21078, {%r14143, %r14142};
	xor.b64  	%rd21079, %rd21078, %rd21077;
	shf.l.wrap.b32 	%r14144, %r14138, %r14139, 25;
	shf.l.wrap.b32 	%r14145, %r14139, %r14138, 25;
	mov.b64 	%rd21080, {%r14145, %r14144};
	xor.b64  	%rd21081, %rd21079, %rd21080;
	xor.b64  	%rd21082, %rd21062, %rd21012;
	xor.b64  	%rd21083, %rd21062, %rd21037;
	and.b64  	%rd21084, %rd21083, %rd21082;
	xor.b64  	%rd21085, %rd21084, %rd21062;
	add.s64 	%rd21086, %rd21075, %rd21085;
	add.s64 	%rd21087, %rd21086, %rd21081;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r14146,%dummy}, %rd21076;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r14147}, %rd21076;
	}
	shf.r.wrap.b32 	%r14148, %r14147, %r14146, 14;
	shf.r.wrap.b32 	%r14149, %r14146, %r14147, 14;
	mov.b64 	%rd21088, {%r14149, %r14148};
	shf.r.wrap.b32 	%r14150, %r14147, %r14146, 18;
	shf.r.wrap.b32 	%r14151, %r14146, %r14147, 18;
	mov.b64 	%rd21089, {%r14151, %r14150};
	xor.b64  	%rd21090, %rd21089, %rd21088;
	shf.l.wrap.b32 	%r14152, %r14146, %r14147, 23;
	shf.l.wrap.b32 	%r14153, %r14147, %r14146, 23;
	mov.b64 	%rd21091, {%r14153, %r14152};
	xor.b64  	%rd21092, %rd21090, %rd21091;
	xor.b64  	%rd21093, %rd21051, %rd21026;
	and.b64  	%rd21094, %rd21076, %rd21093;
	xor.b64  	%rd21095, %rd21094, %rd21026;
	add.s64 	%rd21096, %rd21001, %rd21886;
	ld.const.u64 	%rd21097, [%rd21862+184];
	add.s64 	%rd21098, %rd21096, %rd21097;
	add.s64 	%rd21099, %rd21098, %rd21095;
	add.s64 	%rd21100, %rd21099, %rd21092;
	add.s64 	%rd21101, %rd21100, %rd21012;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r14154,%dummy}, %rd21087;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r14155}, %rd21087;
	}
	shf.r.wrap.b32 	%r14156, %r14155, %r14154, 28;
	shf.r.wrap.b32 	%r14157, %r14154, %r14155, 28;
	mov.b64 	%rd21102, {%r14157, %r14156};
	shf.l.wrap.b32 	%r14158, %r14154, %r14155, 30;
	shf.l.wrap.b32 	%r14159, %r14155, %r14154, 30;
	mov.b64 	%rd21103, {%r14159, %r14158};
	xor.b64  	%rd21104, %rd21103, %rd21102;
	shf.l.wrap.b32 	%r14160, %r14154, %r14155, 25;
	shf.l.wrap.b32 	%r14161, %r14155, %r14154, 25;
	mov.b64 	%rd21105, {%r14161, %r14160};
	xor.b64  	%rd21106, %rd21104, %rd21105;
	xor.b64  	%rd21107, %rd21087, %rd21037;
	xor.b64  	%rd21108, %rd21087, %rd21062;
	and.b64  	%rd21109, %rd21108, %rd21107;
	xor.b64  	%rd21110, %rd21109, %rd21087;
	add.s64 	%rd21111, %rd21100, %rd21110;
	add.s64 	%rd21112, %rd21111, %rd21106;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r14162,%dummy}, %rd21101;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r14163}, %rd21101;
	}
	shf.r.wrap.b32 	%r14164, %r14163, %r14162, 14;
	shf.r.wrap.b32 	%r14165, %r14162, %r14163, 14;
	mov.b64 	%rd21113, {%r14165, %r14164};
	shf.r.wrap.b32 	%r14166, %r14163, %r14162, 18;
	shf.r.wrap.b32 	%r14167, %r14162, %r14163, 18;
	mov.b64 	%rd21114, {%r14167, %r14166};
	xor.b64  	%rd21115, %rd21114, %rd21113;
	shf.l.wrap.b32 	%r14168, %r14162, %r14163, 23;
	shf.l.wrap.b32 	%r14169, %r14163, %r14162, 23;
	mov.b64 	%rd21116, {%r14169, %r14168};
	xor.b64  	%rd21117, %rd21115, %rd21116;
	xor.b64  	%rd21118, %rd21076, %rd21051;
	and.b64  	%rd21119, %rd21101, %rd21118;
	xor.b64  	%rd21120, %rd21119, %rd21051;
	add.s64 	%rd21121, %rd21026, %rd21870;
	ld.const.u64 	%rd21122, [%rd21862+192];
	add.s64 	%rd21123, %rd21121, %rd21122;
	add.s64 	%rd21124, %rd21123, %rd21120;
	add.s64 	%rd21125, %rd21124, %rd21117;
	add.s64 	%rd21126, %rd21125, %rd21037;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r14170,%dummy}, %rd21112;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r14171}, %rd21112;
	}
	shf.r.wrap.b32 	%r14172, %r14171, %r14170, 28;
	shf.r.wrap.b32 	%r14173, %r14170, %r14171, 28;
	mov.b64 	%rd21127, {%r14173, %r14172};
	shf.l.wrap.b32 	%r14174, %r14170, %r14171, 30;
	shf.l.wrap.b32 	%r14175, %r14171, %r14170, 30;
	mov.b64 	%rd21128, {%r14175, %r14174};
	xor.b64  	%rd21129, %rd21128, %rd21127;
	shf.l.wrap.b32 	%r14176, %r14170, %r14171, 25;
	shf.l.wrap.b32 	%r14177, %r14171, %r14170, 25;
	mov.b64 	%rd21130, {%r14177, %r14176};
	xor.b64  	%rd21131, %rd21129, %rd21130;
	xor.b64  	%rd21132, %rd21112, %rd21062;
	xor.b64  	%rd21133, %rd21112, %rd21087;
	and.b64  	%rd21134, %rd21133, %rd21132;
	xor.b64  	%rd21135, %rd21134, %rd21112;
	add.s64 	%rd21136, %rd21125, %rd21135;
	add.s64 	%rd21137, %rd21136, %rd21131;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r14178,%dummy}, %rd21126;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r14179}, %rd21126;
	}
	shf.r.wrap.b32 	%r14180, %r14179, %r14178, 14;
	shf.r.wrap.b32 	%r14181, %r14178, %r14179, 14;
	mov.b64 	%rd21138, {%r14181, %r14180};
	shf.r.wrap.b32 	%r14182, %r14179, %r14178, 18;
	shf.r.wrap.b32 	%r14183, %r14178, %r14179, 18;
	mov.b64 	%rd21139, {%r14183, %r14182};
	xor.b64  	%rd21140, %rd21139, %rd21138;
	shf.l.wrap.b32 	%r14184, %r14178, %r14179, 23;
	shf.l.wrap.b32 	%r14185, %r14179, %r14178, 23;
	mov.b64 	%rd21141, {%r14185, %r14184};
	xor.b64  	%rd21142, %rd21140, %rd21141;
	xor.b64  	%rd21143, %rd21101, %rd21076;
	and.b64  	%rd21144, %rd21126, %rd21143;
	xor.b64  	%rd21145, %rd21144, %rd21076;
	add.s64 	%rd21146, %rd21051, %rd21869;
	ld.const.u64 	%rd21147, [%rd21862+200];
	add.s64 	%rd21148, %rd21146, %rd21147;
	add.s64 	%rd21149, %rd21148, %rd21145;
	add.s64 	%rd21150, %rd21149, %rd21142;
	add.s64 	%rd21151, %rd21150, %rd21062;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r14186,%dummy}, %rd21137;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r14187}, %rd21137;
	}
	shf.r.wrap.b32 	%r14188, %r14187, %r14186, 28;
	shf.r.wrap.b32 	%r14189, %r14186, %r14187, 28;
	mov.b64 	%rd21152, {%r14189, %r14188};
	shf.l.wrap.b32 	%r14190, %r14186, %r14187, 30;
	shf.l.wrap.b32 	%r14191, %r14187, %r14186, 30;
	mov.b64 	%rd21153, {%r14191, %r14190};
	xor.b64  	%rd21154, %rd21153, %rd21152;
	shf.l.wrap.b32 	%r14192, %r14186, %r14187, 25;
	shf.l.wrap.b32 	%r14193, %r14187, %r14186, 25;
	mov.b64 	%rd21155, {%r14193, %r14192};
	xor.b64  	%rd21156, %rd21154, %rd21155;
	xor.b64  	%rd21157, %rd21137, %rd21087;
	xor.b64  	%rd21158, %rd21137, %rd21112;
	and.b64  	%rd21159, %rd21158, %rd21157;
	xor.b64  	%rd21160, %rd21159, %rd21137;
	add.s64 	%rd21161, %rd21150, %rd21160;
	add.s64 	%rd21162, %rd21161, %rd21156;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r14194,%dummy}, %rd21151;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r14195}, %rd21151;
	}
	shf.r.wrap.b32 	%r14196, %r14195, %r14194, 14;
	shf.r.wrap.b32 	%r14197, %r14194, %r14195, 14;
	mov.b64 	%rd21163, {%r14197, %r14196};
	shf.r.wrap.b32 	%r14198, %r14195, %r14194, 18;
	shf.r.wrap.b32 	%r14199, %r14194, %r14195, 18;
	mov.b64 	%rd21164, {%r14199, %r14198};
	xor.b64  	%rd21165, %rd21164, %rd21163;
	shf.l.wrap.b32 	%r14200, %r14194, %r14195, 23;
	shf.l.wrap.b32 	%r14201, %r14195, %r14194, 23;
	mov.b64 	%rd21166, {%r14201, %r14200};
	xor.b64  	%rd21167, %rd21165, %rd21166;
	xor.b64  	%rd21168, %rd21126, %rd21101;
	and.b64  	%rd21169, %rd21151, %rd21168;
	xor.b64  	%rd21170, %rd21169, %rd21101;
	add.s64 	%rd21171, %rd21076, %rd21868;
	ld.const.u64 	%rd21172, [%rd21862+208];
	add.s64 	%rd21173, %rd21171, %rd21172;
	add.s64 	%rd21174, %rd21173, %rd21170;
	add.s64 	%rd21175, %rd21174, %rd21167;
	add.s64 	%rd21176, %rd21175, %rd21087;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r14202,%dummy}, %rd21162;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r14203}, %rd21162;
	}
	shf.r.wrap.b32 	%r14204, %r14203, %r14202, 28;
	shf.r.wrap.b32 	%r14205, %r14202, %r14203, 28;
	mov.b64 	%rd21177, {%r14205, %r14204};
	shf.l.wrap.b32 	%r14206, %r14202, %r14203, 30;
	shf.l.wrap.b32 	%r14207, %r14203, %r14202, 30;
	mov.b64 	%rd21178, {%r14207, %r14206};
	xor.b64  	%rd21179, %rd21178, %rd21177;
	shf.l.wrap.b32 	%r14208, %r14202, %r14203, 25;
	shf.l.wrap.b32 	%r14209, %r14203, %r14202, 25;
	mov.b64 	%rd21180, {%r14209, %r14208};
	xor.b64  	%rd21181, %rd21179, %rd21180;
	xor.b64  	%rd21182, %rd21162, %rd21112;
	xor.b64  	%rd21183, %rd21162, %rd21137;
	and.b64  	%rd21184, %rd21183, %rd21182;
	xor.b64  	%rd21185, %rd21184, %rd21162;
	add.s64 	%rd21186, %rd21175, %rd21185;
	add.s64 	%rd21187, %rd21186, %rd21181;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r14210,%dummy}, %rd21176;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r14211}, %rd21176;
	}
	shf.r.wrap.b32 	%r14212, %r14211, %r14210, 14;
	shf.r.wrap.b32 	%r14213, %r14210, %r14211, 14;
	mov.b64 	%rd21188, {%r14213, %r14212};
	shf.r.wrap.b32 	%r14214, %r14211, %r14210, 18;
	shf.r.wrap.b32 	%r14215, %r14210, %r14211, 18;
	mov.b64 	%rd21189, {%r14215, %r14214};
	xor.b64  	%rd21190, %rd21189, %rd21188;
	shf.l.wrap.b32 	%r14216, %r14210, %r14211, 23;
	shf.l.wrap.b32 	%r14217, %r14211, %r14210, 23;
	mov.b64 	%rd21191, {%r14217, %r14216};
	xor.b64  	%rd21192, %rd21190, %rd21191;
	xor.b64  	%rd21193, %rd21151, %rd21126;
	and.b64  	%rd21194, %rd21176, %rd21193;
	xor.b64  	%rd21195, %rd21194, %rd21126;
	add.s64 	%rd21196, %rd21101, %rd21867;
	ld.const.u64 	%rd21197, [%rd21862+216];
	add.s64 	%rd21198, %rd21196, %rd21197;
	add.s64 	%rd21199, %rd21198, %rd21195;
	add.s64 	%rd21200, %rd21199, %rd21192;
	add.s64 	%rd21201, %rd21200, %rd21112;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r14218,%dummy}, %rd21187;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r14219}, %rd21187;
	}
	shf.r.wrap.b32 	%r14220, %r14219, %r14218, 28;
	shf.r.wrap.b32 	%r14221, %r14218, %r14219, 28;
	mov.b64 	%rd21202, {%r14221, %r14220};
	shf.l.wrap.b32 	%r14222, %r14218, %r14219, 30;
	shf.l.wrap.b32 	%r14223, %r14219, %r14218, 30;
	mov.b64 	%rd21203, {%r14223, %r14222};
	xor.b64  	%rd21204, %rd21203, %rd21202;
	shf.l.wrap.b32 	%r14224, %r14218, %r14219, 25;
	shf.l.wrap.b32 	%r14225, %r14219, %r14218, 25;
	mov.b64 	%rd21205, {%r14225, %r14224};
	xor.b64  	%rd21206, %rd21204, %rd21205;
	xor.b64  	%rd21207, %rd21187, %rd21137;
	xor.b64  	%rd21208, %rd21187, %rd21162;
	and.b64  	%rd21209, %rd21208, %rd21207;
	xor.b64  	%rd21210, %rd21209, %rd21187;
	add.s64 	%rd21211, %rd21200, %rd21210;
	add.s64 	%rd21212, %rd21211, %rd21206;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r14226,%dummy}, %rd21201;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r14227}, %rd21201;
	}
	shf.r.wrap.b32 	%r14228, %r14227, %r14226, 14;
	shf.r.wrap.b32 	%r14229, %r14226, %r14227, 14;
	mov.b64 	%rd21213, {%r14229, %r14228};
	shf.r.wrap.b32 	%r14230, %r14227, %r14226, 18;
	shf.r.wrap.b32 	%r14231, %r14226, %r14227, 18;
	mov.b64 	%rd21214, {%r14231, %r14230};
	xor.b64  	%rd21215, %rd21214, %rd21213;
	shf.l.wrap.b32 	%r14232, %r14226, %r14227, 23;
	shf.l.wrap.b32 	%r14233, %r14227, %r14226, 23;
	mov.b64 	%rd21216, {%r14233, %r14232};
	xor.b64  	%rd21217, %rd21215, %rd21216;
	xor.b64  	%rd21218, %rd21176, %rd21151;
	and.b64  	%rd21219, %rd21201, %rd21218;
	xor.b64  	%rd21220, %rd21219, %rd21151;
	add.s64 	%rd21221, %rd21126, %rd21866;
	ld.const.u64 	%rd21222, [%rd21862+224];
	add.s64 	%rd21223, %rd21221, %rd21222;
	add.s64 	%rd21224, %rd21223, %rd21220;
	add.s64 	%rd21225, %rd21224, %rd21217;
	add.s64 	%rd21878, %rd21225, %rd21137;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r14234,%dummy}, %rd21212;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r14235}, %rd21212;
	}
	shf.r.wrap.b32 	%r14236, %r14235, %r14234, 28;
	shf.r.wrap.b32 	%r14237, %r14234, %r14235, 28;
	mov.b64 	%rd21226, {%r14237, %r14236};
	shf.l.wrap.b32 	%r14238, %r14234, %r14235, 30;
	shf.l.wrap.b32 	%r14239, %r14235, %r14234, 30;
	mov.b64 	%rd21227, {%r14239, %r14238};
	xor.b64  	%rd21228, %rd21227, %rd21226;
	shf.l.wrap.b32 	%r14240, %r14234, %r14235, 25;
	shf.l.wrap.b32 	%r14241, %r14235, %r14234, 25;
	mov.b64 	%rd21229, {%r14241, %r14240};
	xor.b64  	%rd21230, %rd21228, %rd21229;
	xor.b64  	%rd21231, %rd21212, %rd21162;
	xor.b64  	%rd21232, %rd21212, %rd21187;
	and.b64  	%rd21233, %rd21232, %rd21231;
	xor.b64  	%rd21234, %rd21233, %rd21212;
	add.s64 	%rd21235, %rd21225, %rd21234;
	add.s64 	%rd21874, %rd21235, %rd21230;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r14242,%dummy}, %rd21878;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r14243}, %rd21878;
	}
	shf.r.wrap.b32 	%r14244, %r14243, %r14242, 14;
	shf.r.wrap.b32 	%r14245, %r14242, %r14243, 14;
	mov.b64 	%rd21236, {%r14245, %r14244};
	shf.r.wrap.b32 	%r14246, %r14243, %r14242, 18;
	shf.r.wrap.b32 	%r14247, %r14242, %r14243, 18;
	mov.b64 	%rd21237, {%r14247, %r14246};
	xor.b64  	%rd21238, %rd21237, %rd21236;
	shf.l.wrap.b32 	%r14248, %r14242, %r14243, 23;
	shf.l.wrap.b32 	%r14249, %r14243, %r14242, 23;
	mov.b64 	%rd21239, {%r14249, %r14248};
	xor.b64  	%rd21240, %rd21238, %rd21239;
	xor.b64  	%rd21241, %rd21201, %rd21176;
	and.b64  	%rd21242, %rd21878, %rd21241;
	xor.b64  	%rd21243, %rd21242, %rd21176;
	add.s64 	%rd21244, %rd21151, %rd21865;
	ld.const.u64 	%rd21245, [%rd21862+232];
	add.s64 	%rd21246, %rd21244, %rd21245;
	add.s64 	%rd21247, %rd21246, %rd21243;
	add.s64 	%rd21248, %rd21247, %rd21240;
	add.s64 	%rd21877, %rd21248, %rd21162;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r14250,%dummy}, %rd21874;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r14251}, %rd21874;
	}
	shf.r.wrap.b32 	%r14252, %r14251, %r14250, 28;
	shf.r.wrap.b32 	%r14253, %r14250, %r14251, 28;
	mov.b64 	%rd21249, {%r14253, %r14252};
	shf.l.wrap.b32 	%r14254, %r14250, %r14251, 30;
	shf.l.wrap.b32 	%r14255, %r14251, %r14250, 30;
	mov.b64 	%rd21250, {%r14255, %r14254};
	xor.b64  	%rd21251, %rd21250, %rd21249;
	shf.l.wrap.b32 	%r14256, %r14250, %r14251, 25;
	shf.l.wrap.b32 	%r14257, %r14251, %r14250, 25;
	mov.b64 	%rd21252, {%r14257, %r14256};
	xor.b64  	%rd21253, %rd21251, %rd21252;
	xor.b64  	%rd21254, %rd21874, %rd21187;
	xor.b64  	%rd21255, %rd21874, %rd21212;
	and.b64  	%rd21256, %rd21255, %rd21254;
	xor.b64  	%rd21257, %rd21256, %rd21874;
	add.s64 	%rd21258, %rd21248, %rd21257;
	add.s64 	%rd21873, %rd21258, %rd21253;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r14258,%dummy}, %rd21877;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r14259}, %rd21877;
	}
	shf.r.wrap.b32 	%r14260, %r14259, %r14258, 14;
	shf.r.wrap.b32 	%r14261, %r14258, %r14259, 14;
	mov.b64 	%rd21259, {%r14261, %r14260};
	shf.r.wrap.b32 	%r14262, %r14259, %r14258, 18;
	shf.r.wrap.b32 	%r14263, %r14258, %r14259, 18;
	mov.b64 	%rd21260, {%r14263, %r14262};
	xor.b64  	%rd21261, %rd21260, %rd21259;
	shf.l.wrap.b32 	%r14264, %r14258, %r14259, 23;
	shf.l.wrap.b32 	%r14265, %r14259, %r14258, 23;
	mov.b64 	%rd21262, {%r14265, %r14264};
	xor.b64  	%rd21263, %rd21261, %rd21262;
	xor.b64  	%rd21264, %rd21878, %rd21201;
	and.b64  	%rd21265, %rd21877, %rd21264;
	xor.b64  	%rd21266, %rd21265, %rd21201;
	add.s64 	%rd21267, %rd21176, %rd21864;
	ld.const.u64 	%rd21268, [%rd21862+240];
	add.s64 	%rd21269, %rd21267, %rd21268;
	add.s64 	%rd21270, %rd21269, %rd21266;
	add.s64 	%rd21271, %rd21270, %rd21263;
	add.s64 	%rd21876, %rd21271, %rd21187;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r14266,%dummy}, %rd21873;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r14267}, %rd21873;
	}
	shf.r.wrap.b32 	%r14268, %r14267, %r14266, 28;
	shf.r.wrap.b32 	%r14269, %r14266, %r14267, 28;
	mov.b64 	%rd21272, {%r14269, %r14268};
	shf.l.wrap.b32 	%r14270, %r14266, %r14267, 30;
	shf.l.wrap.b32 	%r14271, %r14267, %r14266, 30;
	mov.b64 	%rd21273, {%r14271, %r14270};
	xor.b64  	%rd21274, %rd21273, %rd21272;
	shf.l.wrap.b32 	%r14272, %r14266, %r14267, 25;
	shf.l.wrap.b32 	%r14273, %r14267, %r14266, 25;
	mov.b64 	%rd21275, {%r14273, %r14272};
	xor.b64  	%rd21276, %rd21274, %rd21275;
	xor.b64  	%rd21277, %rd21873, %rd21212;
	xor.b64  	%rd21278, %rd21873, %rd21874;
	and.b64  	%rd21279, %rd21278, %rd21277;
	xor.b64  	%rd21280, %rd21279, %rd21873;
	add.s64 	%rd21281, %rd21271, %rd21280;
	add.s64 	%rd21872, %rd21281, %rd21276;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r14274,%dummy}, %rd21876;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r14275}, %rd21876;
	}
	shf.r.wrap.b32 	%r14276, %r14275, %r14274, 14;
	shf.r.wrap.b32 	%r14277, %r14274, %r14275, 14;
	mov.b64 	%rd21282, {%r14277, %r14276};
	shf.r.wrap.b32 	%r14278, %r14275, %r14274, 18;
	shf.r.wrap.b32 	%r14279, %r14274, %r14275, 18;
	mov.b64 	%rd21283, {%r14279, %r14278};
	xor.b64  	%rd21284, %rd21283, %rd21282;
	shf.l.wrap.b32 	%r14280, %r14274, %r14275, 23;
	shf.l.wrap.b32 	%r14281, %r14275, %r14274, 23;
	mov.b64 	%rd21285, {%r14281, %r14280};
	xor.b64  	%rd21286, %rd21284, %rd21285;
	xor.b64  	%rd21287, %rd21877, %rd21878;
	and.b64  	%rd21288, %rd21876, %rd21287;
	xor.b64  	%rd21289, %rd21288, %rd21878;
	add.s64 	%rd21290, %rd21201, %rd21863;
	ld.const.u64 	%rd21291, [%rd21862+248];
	add.s64 	%rd21292, %rd21290, %rd21291;
	add.s64 	%rd21293, %rd21292, %rd21289;
	add.s64 	%rd21294, %rd21293, %rd21286;
	add.s64 	%rd21875, %rd21294, %rd21212;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r14282,%dummy}, %rd21872;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r14283}, %rd21872;
	}
	shf.r.wrap.b32 	%r14284, %r14283, %r14282, 28;
	shf.r.wrap.b32 	%r14285, %r14282, %r14283, 28;
	mov.b64 	%rd21295, {%r14285, %r14284};
	shf.l.wrap.b32 	%r14286, %r14282, %r14283, 30;
	shf.l.wrap.b32 	%r14287, %r14283, %r14282, 30;
	mov.b64 	%rd21296, {%r14287, %r14286};
	xor.b64  	%rd21297, %rd21296, %rd21295;
	shf.l.wrap.b32 	%r14288, %r14282, %r14283, 25;
	shf.l.wrap.b32 	%r14289, %r14283, %r14282, 25;
	mov.b64 	%rd21298, {%r14289, %r14288};
	xor.b64  	%rd21299, %rd21297, %rd21298;
	xor.b64  	%rd21300, %rd21872, %rd21874;
	xor.b64  	%rd21301, %rd21872, %rd21873;
	and.b64  	%rd21302, %rd21301, %rd21300;
	xor.b64  	%rd21303, %rd21302, %rd21872;
	add.s64 	%rd21304, %rd21294, %rd21303;
	add.s64 	%rd21871, %rd21304, %rd21299;
	add.s32 	%r14508, %r14508, 16;
	setp.lt.s32	%p220, %r14508, 80;
	mov.u64 	%rd21862, %rd1786;
	@%p220 bra 	BB3_352;

	add.s64 	%rd21305, %rd21846, %rd21871;
	st.local.u64 	[%rd1], %rd21305;
	add.s64 	%rd21306, %rd21845, %rd21872;
	st.local.u64 	[%rd1+8], %rd21306;
	add.s64 	%rd21307, %rd21844, %rd21873;
	st.local.u64 	[%rd1+16], %rd21307;
	add.s64 	%rd21308, %rd21843, %rd21874;
	st.local.u64 	[%rd1+24], %rd21308;
	add.s64 	%rd21309, %rd21842, %rd21875;
	st.local.u64 	[%rd1+32], %rd21309;
	add.s64 	%rd21310, %rd21841, %rd21876;
	st.local.u64 	[%rd1+40], %rd21310;
	add.s64 	%rd21311, %rd21840, %rd21877;
	st.local.u64 	[%rd1+48], %rd21311;
	add.s64 	%rd21312, %rd21839, %rd21878;
	st.local.u64 	[%rd1+56], %rd21312;
	st.global.u64 	[%rd14937+80], %rd21305;
	st.global.u64 	[%rd14937+88], %rd21306;

BB3_354:
	ret;
}

	// .globl	m01800_loop
.entry m01800_loop(
	.param .u64 .ptr .global .align 4 m01800_loop_param_0,
	.param .u64 .ptr .global .align 4 m01800_loop_param_1,
	.param .u64 .ptr .global .align 4 m01800_loop_param_2,
	.param .u64 .ptr .global .align 4 m01800_loop_param_3,
	.param .u64 .ptr .global .align 8 m01800_loop_param_4,
	.param .u64 .ptr .global .align 1 m01800_loop_param_5,
	.param .u64 .ptr .global .align 4 m01800_loop_param_6,
	.param .u64 .ptr .global .align 4 m01800_loop_param_7,
	.param .u64 .ptr .global .align 4 m01800_loop_param_8,
	.param .u64 .ptr .global .align 4 m01800_loop_param_9,
	.param .u64 .ptr .global .align 4 m01800_loop_param_10,
	.param .u64 .ptr .global .align 4 m01800_loop_param_11,
	.param .u64 .ptr .global .align 4 m01800_loop_param_12,
	.param .u64 .ptr .global .align 4 m01800_loop_param_13,
	.param .u64 .ptr .global .align 8 m01800_loop_param_14,
	.param .u64 .ptr .global .align 4 m01800_loop_param_15,
	.param .u64 .ptr .global .align 4 m01800_loop_param_16,
	.param .u64 .ptr .global .align 4 m01800_loop_param_17,
	.param .u64 .ptr .global .align 1 m01800_loop_param_18,
	.param .u64 .ptr .global .align 4 m01800_loop_param_19,
	.param .u64 .ptr .global .align 4 m01800_loop_param_20,
	.param .u64 .ptr .global .align 4 m01800_loop_param_21,
	.param .u64 .ptr .global .align 4 m01800_loop_param_22,
	.param .u64 .ptr .global .align 4 m01800_loop_param_23,
	.param .u32 m01800_loop_param_24,
	.param .u32 m01800_loop_param_25,
	.param .u32 m01800_loop_param_26,
	.param .u32 m01800_loop_param_27,
	.param .u32 m01800_loop_param_28,
	.param .u32 m01800_loop_param_29,
	.param .u32 m01800_loop_param_30,
	.param .u32 m01800_loop_param_31,
	.param .u32 m01800_loop_param_32,
	.param .u32 m01800_loop_param_33,
	.param .u64 m01800_loop_param_34
)
{
	.local .align 16 .b8 	__local_depot4[1216];
	.reg .b64 	%SP;
	.reg .b64 	%SPL;
	.reg .pred 	%p<41>;
	.reg .b16 	%rs<30>;
	.reg .b32 	%r<1082>;
	.reg .b64 	%rd<1599>;


	mov.u64 	%SPL, __local_depot4;
	ld.param.u64 	%rd189, [m01800_loop_param_0];
	ld.param.u64 	%rd190, [m01800_loop_param_4];
	ld.param.u64 	%rd191, [m01800_loop_param_17];
	ld.param.u32 	%r84, [m01800_loop_param_27];
	ld.param.u32 	%r1079, [m01800_loop_param_28];
	ld.param.u32 	%r86, [m01800_loop_param_29];
	ld.param.u64 	%rd192, [m01800_loop_param_34];
	add.u64 	%rd1, %SPL, 32;
	add.u64 	%rd2, %SPL, 64;
	mov.u32 	%r87, %ctaid.x;
	mov.u32 	%r88, %ntid.x;
	mov.b32	%r89, %envreg3;
	mad.lo.s32 	%r90, %r87, %r88, %r89;
	mov.u32 	%r91, %tid.x;
	add.s32 	%r1, %r90, %r91;
	cvt.s64.s32	%rd195, %r1;
	setp.ge.u64	%p1, %rd195, %rd192;
	@%p1 bra 	BB4_58;

	mul.wide.s32 	%rd196, %r1, 672;
	add.s64 	%rd197, %rd190, %rd196;
	mov.u32 	%r92, 0;
	ld.global.u64 	%rd198, [%rd197+64];
	ld.global.u64 	%rd199, [%rd197+72];
	add.u64 	%rd201, %SPL, 0;
	ld.global.u64 	%rd202, [%rd197+80];
	ld.global.u64 	%rd203, [%rd197+88];
	st.local.v2.u64 	[%rd201], {%rd198, %rd199};
	mul.wide.s32 	%rd204, %r1, 260;
	add.s64 	%rd205, %rd189, %rd204;
	ld.global.u32 	%r2, [%rd205+256];
	add.u64 	%rd207, %SPL, 16;
	st.local.v2.u64 	[%rd207], {%rd202, %rd203};
	mul.wide.u32 	%rd208, %r84, 560;
	add.s64 	%rd209, %rd191, %rd208;
	ld.global.u32 	%r3, [%rd209+512];
	add.s32 	%r93, %r3, %r2;
	add.s32 	%r94, %r2, 64;
	add.s32 	%r95, %r94, %r3;
	add.s32 	%r96, %r93, 64;
	st.local.v4.u32 	[%rd1], {%r94, %r94, %r95, %r96};
	add.s32 	%r97, %r94, %r2;
	add.s32 	%r98, %r94, %r93;
	add.s32 	%r99, %r95, %r2;
	st.local.v4.u32 	[%rd1+16], {%r97, %r97, %r99, %r98};
	mov.u64 	%rd1541, %rd2;
	mov.u32 	%r1041, %r92;

BB4_2:
	st.local.v2.u32 	[%rd1541], {%r92, %r92};
	add.s64 	%rd1541, %rd1541, 8;
	add.s32 	%r1041, %r1041, 1;
	setp.lt.u32	%p2, %r1041, 128;
	@%p2 bra 	BB4_2;

	and.b32  	%r9, %r2, 3;
	add.s64 	%rd11, %rd201, 7;
	and.b32  	%r8, %r3, 3;
	add.s64 	%rd10, %rd207, 7;
	mov.u32 	%r1042, 0;

BB4_4:
	and.b32  	%r11, %r1042, 1;
	setp.eq.s32	%p3, %r11, 0;
	setp.eq.s32	%p4, %r2, 0;
	or.pred  	%p5, %p3, %p4;
	shl.b32 	%r102, %r11, 6;
	xor.b32  	%r24, %r102, 64;
	@%p5 bra 	BB4_13;

	setp.eq.s32	%p6, %r9, 0;
	mov.u32 	%r1046, 0;
	mul.wide.u32 	%rd215, %r1042, 128;
	add.s64 	%rd12, %rd2, %rd215;
	@%p6 bra 	BB4_11;

	setp.eq.s32	%p7, %r9, 1;
	mov.u32 	%r1044, 0;
	@%p7 bra 	BB4_10;

	setp.eq.s32	%p8, %r9, 2;
	mov.u32 	%r1043, 0;
	@%p8 bra 	BB4_9;

	ld.local.u8 	%rs1, [%rd11];
	st.local.u8 	[%rd12+7], %rs1;
	mov.u32 	%r1043, 1;

BB4_9:
	xor.b32  	%r108, %r1043, 7;
	cvt.u64.u32	%rd216, %r108;
	add.s64 	%rd217, %rd201, %rd216;
	ld.local.u8 	%rs2, [%rd217];
	add.s64 	%rd218, %rd12, %rd216;
	st.local.u8 	[%rd218], %rs2;
	add.s32 	%r1044, %r1043, 1;

BB4_10:
	xor.b32  	%r109, %r1044, 7;
	cvt.u64.u32	%rd219, %r109;
	add.s64 	%rd220, %rd201, %rd219;
	ld.local.u8 	%rs3, [%rd220];
	add.s64 	%rd221, %rd12, %rd219;
	st.local.u8 	[%rd221], %rs3;
	add.s32 	%r1046, %r1044, 1;

BB4_11:
	setp.lt.u32	%p9, %r2, 4;
	mov.u32 	%r24, %r1046;
	@%p9 bra 	BB4_13;

BB4_12:
	xor.b32  	%r110, %r1046, 7;
	cvt.u64.u32	%rd222, %r110;
	add.s64 	%rd223, %rd201, %rd222;
	ld.local.u8 	%rs4, [%rd223];
	xor.b32  	%r111, %r24, 7;
	cvt.u64.u32	%rd224, %r111;
	add.s64 	%rd225, %rd12, %rd224;
	st.local.u8 	[%rd225], %rs4;
	add.s32 	%r112, %r1046, 1;
	xor.b32  	%r113, %r112, 7;
	cvt.u64.u32	%rd226, %r113;
	add.s64 	%rd227, %rd201, %rd226;
	ld.local.u8 	%rs5, [%rd227];
	add.s32 	%r114, %r24, 1;
	xor.b32  	%r115, %r114, 7;
	cvt.u64.u32	%rd228, %r115;
	add.s64 	%rd229, %rd12, %rd228;
	st.local.u8 	[%rd229], %rs5;
	add.s32 	%r116, %r1046, 2;
	xor.b32  	%r117, %r116, 7;
	cvt.u64.u32	%rd230, %r117;
	add.s64 	%rd231, %rd201, %rd230;
	ld.local.u8 	%rs6, [%rd231];
	add.s32 	%r118, %r24, 2;
	xor.b32  	%r119, %r118, 7;
	cvt.u64.u32	%rd232, %r119;
	add.s64 	%rd233, %rd12, %rd232;
	st.local.u8 	[%rd233], %rs6;
	add.s32 	%r120, %r1046, 3;
	xor.b32  	%r121, %r120, 7;
	cvt.u64.u32	%rd234, %r121;
	add.s64 	%rd235, %rd201, %rd234;
	ld.local.u8 	%rs7, [%rd235];
	add.s32 	%r122, %r24, 3;
	xor.b32  	%r123, %r122, 7;
	cvt.u64.u32	%rd236, %r123;
	add.s64 	%rd237, %rd12, %rd236;
	st.local.u8 	[%rd237], %rs7;
	add.s32 	%r24, %r24, 4;
	add.s32 	%r1046, %r1046, 4;
	setp.lt.u32	%p10, %r1046, %r2;
	@%p10 bra 	BB4_12;

BB4_13:
	and.b32  	%r124, %r1042, 2;
	setp.eq.s32	%p11, %r124, 0;
	setp.eq.s32	%p12, %r3, 0;
	or.pred  	%p13, %p11, %p12;
	@%p13 bra 	BB4_14;
	bra.uni 	BB4_15;

BB4_14:
	mov.u32 	%r41, %r24;
	bra.uni 	BB4_24;

BB4_15:
	mul.wide.u32 	%rd238, %r1042, 128;
	add.s64 	%rd13, %rd2, %rd238;
	mov.u32 	%r1049, 0;
	setp.eq.s32	%p14, %r8, 0;
	@%p14 bra 	BB4_16;

	setp.eq.s32	%p15, %r8, 1;
	@%p15 bra 	BB4_21;

	setp.eq.s32	%p16, %r8, 2;
	@%p16 bra 	BB4_20;

	ld.local.u8 	%rs8, [%rd10];
	xor.b32  	%r130, %r24, 7;
	cvt.u64.u32	%rd239, %r130;
	add.s64 	%rd240, %rd13, %rd239;
	st.local.u8 	[%rd240], %rs8;
	add.s32 	%r24, %r24, 1;
	mov.u32 	%r1049, 1;

BB4_20:
	xor.b32  	%r131, %r1049, 7;
	cvt.u64.u32	%rd241, %r131;
	add.s64 	%rd242, %rd207, %rd241;
	ld.local.u8 	%rs9, [%rd242];
	xor.b32  	%r132, %r24, 7;
	cvt.u64.u32	%rd243, %r132;
	add.s64 	%rd244, %rd13, %rd243;
	st.local.u8 	[%rd244], %rs9;
	add.s32 	%r24, %r24, 1;
	add.s32 	%r1049, %r1049, 1;

BB4_21:
	xor.b32  	%r133, %r1049, 7;
	cvt.u64.u32	%rd245, %r133;
	add.s64 	%rd246, %rd207, %rd245;
	ld.local.u8 	%rs10, [%rd246];
	xor.b32  	%r134, %r24, 7;
	cvt.u64.u32	%rd247, %r134;
	add.s64 	%rd248, %rd13, %rd247;
	st.local.u8 	[%rd248], %rs10;
	add.s32 	%r24, %r24, 1;
	add.s32 	%r1049, %r1049, 1;
	mov.u32 	%r41, %r24;
	bra.uni 	BB4_22;

BB4_16:
	mov.u32 	%r41, %r1049;

BB4_22:
	setp.lt.u32	%p17, %r3, 4;
	@%p17 bra 	BB4_24;

BB4_23:
	xor.b32  	%r135, %r1049, 7;
	cvt.u64.u32	%rd249, %r135;
	add.s64 	%rd250, %rd207, %rd249;
	ld.local.u8 	%rs11, [%rd250];
	xor.b32  	%r136, %r24, 7;
	cvt.u64.u32	%rd251, %r136;
	add.s64 	%rd252, %rd13, %rd251;
	st.local.u8 	[%rd252], %rs11;
	add.s32 	%r137, %r1049, 1;
	xor.b32  	%r138, %r137, 7;
	cvt.u64.u32	%rd253, %r138;
	add.s64 	%rd254, %rd207, %rd253;
	ld.local.u8 	%rs12, [%rd254];
	add.s32 	%r139, %r24, 1;
	xor.b32  	%r140, %r139, 7;
	cvt.u64.u32	%rd255, %r140;
	add.s64 	%rd256, %rd13, %rd255;
	st.local.u8 	[%rd256], %rs12;
	add.s32 	%r141, %r1049, 2;
	xor.b32  	%r142, %r141, 7;
	cvt.u64.u32	%rd257, %r142;
	add.s64 	%rd258, %rd207, %rd257;
	ld.local.u8 	%rs13, [%rd258];
	add.s32 	%r143, %r24, 2;
	xor.b32  	%r144, %r143, 7;
	cvt.u64.u32	%rd259, %r144;
	add.s64 	%rd260, %rd13, %rd259;
	st.local.u8 	[%rd260], %rs13;
	add.s32 	%r145, %r1049, 3;
	xor.b32  	%r146, %r145, 7;
	cvt.u64.u32	%rd261, %r146;
	add.s64 	%rd262, %rd207, %rd261;
	ld.local.u8 	%rs14, [%rd262];
	add.s32 	%r147, %r24, 3;
	xor.b32  	%r148, %r147, 7;
	cvt.u64.u32	%rd263, %r148;
	add.s64 	%rd264, %rd13, %rd263;
	st.local.u8 	[%rd264], %rs14;
	add.s32 	%r24, %r24, 4;
	add.s32 	%r1049, %r1049, 4;
	setp.lt.u32	%p18, %r1049, %r3;
	mov.u32 	%r41, %r24;
	@%p18 bra 	BB4_23;

BB4_24:
	and.b32  	%r149, %r1042, 4;
	setp.eq.s32	%p19, %r149, 0;
	or.pred  	%p21, %p19, %p4;
	@%p21 bra 	BB4_25;
	bra.uni 	BB4_26;

BB4_25:
	mov.u32 	%r58, %r41;
	bra.uni 	BB4_35;

BB4_26:
	setp.eq.s32	%p22, %r9, 0;
	mov.u32 	%r1066, 0;
	mul.wide.u32 	%rd265, %r1042, 128;
	add.s64 	%rd14, %rd2, %rd265;
	@%p22 bra 	BB4_27;
	bra.uni 	BB4_28;

BB4_27:
	mov.u32 	%r58, %r1066;
	bra.uni 	BB4_33;

BB4_28:
	setp.eq.s32	%p23, %r9, 1;
	mov.u32 	%r1061, 0;
	@%p23 bra 	BB4_32;

	setp.eq.s32	%p24, %r9, 2;
	mov.u32 	%r1059, 0;
	@%p24 bra 	BB4_31;

	ld.local.u8 	%rs15, [%rd11];
	xor.b32  	%r155, %r41, 7;
	cvt.u64.u32	%rd266, %r155;
	add.s64 	%rd267, %rd14, %rd266;
	st.local.u8 	[%rd267], %rs15;
	add.s32 	%r41, %r41, 1;
	mov.u32 	%r1059, 1;

BB4_31:
	xor.b32  	%r156, %r1059, 7;
	cvt.u64.u32	%rd268, %r156;
	add.s64 	%rd269, %rd201, %rd268;
	ld.local.u8 	%rs16, [%rd269];
	xor.b32  	%r157, %r41, 7;
	cvt.u64.u32	%rd270, %r157;
	add.s64 	%rd271, %rd14, %rd270;
	st.local.u8 	[%rd271], %rs16;
	add.s32 	%r41, %r41, 1;
	add.s32 	%r1061, %r1059, 1;

BB4_32:
	xor.b32  	%r158, %r1061, 7;
	cvt.u64.u32	%rd272, %r158;
	add.s64 	%rd273, %rd201, %rd272;
	ld.local.u8 	%rs17, [%rd273];
	xor.b32  	%r159, %r41, 7;
	cvt.u64.u32	%rd274, %r159;
	add.s64 	%rd275, %rd14, %rd274;
	st.local.u8 	[%rd275], %rs17;
	add.s32 	%r41, %r41, 1;
	add.s32 	%r1066, %r1061, 1;
	mov.u32 	%r58, %r41;

BB4_33:
	setp.lt.u32	%p25, %r2, 4;
	@%p25 bra 	BB4_35;

BB4_34:
	xor.b32  	%r160, %r1066, 7;
	cvt.u64.u32	%rd276, %r160;
	add.s64 	%rd277, %rd201, %rd276;
	ld.local.u8 	%rs18, [%rd277];
	xor.b32  	%r161, %r41, 7;
	cvt.u64.u32	%rd278, %r161;
	add.s64 	%rd279, %rd14, %rd278;
	st.local.u8 	[%rd279], %rs18;
	add.s32 	%r162, %r1066, 1;
	xor.b32  	%r163, %r162, 7;
	cvt.u64.u32	%rd280, %r163;
	add.s64 	%rd281, %rd201, %rd280;
	ld.local.u8 	%rs19, [%rd281];
	add.s32 	%r164, %r41, 1;
	xor.b32  	%r165, %r164, 7;
	cvt.u64.u32	%rd282, %r165;
	add.s64 	%rd283, %rd14, %rd282;
	st.local.u8 	[%rd283], %rs19;
	add.s32 	%r166, %r1066, 2;
	xor.b32  	%r167, %r166, 7;
	cvt.u64.u32	%rd284, %r167;
	add.s64 	%rd285, %rd201, %rd284;
	ld.local.u8 	%rs20, [%rd285];
	add.s32 	%r168, %r41, 2;
	xor.b32  	%r169, %r168, 7;
	cvt.u64.u32	%rd286, %r169;
	add.s64 	%rd287, %rd14, %rd286;
	st.local.u8 	[%rd287], %rs20;
	add.s32 	%r170, %r1066, 3;
	xor.b32  	%r171, %r170, 7;
	cvt.u64.u32	%rd288, %r171;
	add.s64 	%rd289, %rd201, %rd288;
	ld.local.u8 	%rs21, [%rd289];
	add.s32 	%r172, %r41, 3;
	xor.b32  	%r173, %r172, 7;
	cvt.u64.u32	%rd290, %r173;
	add.s64 	%rd291, %rd14, %rd290;
	st.local.u8 	[%rd291], %rs21;
	add.s32 	%r41, %r41, 4;
	add.s32 	%r1066, %r1066, 4;
	setp.lt.u32	%p26, %r1066, %r2;
	mov.u32 	%r58, %r41;
	@%p26 bra 	BB4_34;

BB4_35:
	@%p3 bra 	BB4_37;
	bra.uni 	BB4_36;

BB4_37:
	@%p4 bra 	BB4_38;
	bra.uni 	BB4_39;

BB4_38:
	mov.u32 	%r1078, %r58;
	bra.uni 	BB4_48;

BB4_36:
	add.s32 	%r1078, %r58, 64;
	bra.uni 	BB4_48;

BB4_39:
	setp.eq.s32	%p29, %r9, 0;
	mov.u32 	%r1076, 0;
	mul.wide.u32 	%rd292, %r1042, 128;
	add.s64 	%rd15, %rd2, %rd292;
	@%p29 bra 	BB4_40;
	bra.uni 	BB4_41;

BB4_40:
	mov.u32 	%r1078, %r1076;
	bra.uni 	BB4_46;

BB4_41:
	setp.eq.s32	%p30, %r9, 1;
	mov.u32 	%r1071, 0;
	@%p30 bra 	BB4_45;

	setp.eq.s32	%p31, %r9, 2;
	mov.u32 	%r1069, 0;
	@%p31 bra 	BB4_44;

	ld.local.u8 	%rs22, [%rd11];
	xor.b32  	%r179, %r58, 7;
	cvt.u64.u32	%rd293, %r179;
	add.s64 	%rd294, %rd15, %rd293;
	st.local.u8 	[%rd294], %rs22;
	add.s32 	%r58, %r58, 1;
	mov.u32 	%r1069, 1;

BB4_44:
	xor.b32  	%r180, %r1069, 7;
	cvt.u64.u32	%rd295, %r180;
	add.s64 	%rd296, %rd201, %rd295;
	ld.local.u8 	%rs23, [%rd296];
	xor.b32  	%r181, %r58, 7;
	cvt.u64.u32	%rd297, %r181;
	add.s64 	%rd298, %rd15, %rd297;
	st.local.u8 	[%rd298], %rs23;
	add.s32 	%r58, %r58, 1;
	add.s32 	%r1071, %r1069, 1;

BB4_45:
	xor.b32  	%r182, %r1071, 7;
	cvt.u64.u32	%rd299, %r182;
	add.s64 	%rd300, %rd201, %rd299;
	ld.local.u8 	%rs24, [%rd300];
	xor.b32  	%r183, %r58, 7;
	cvt.u64.u32	%rd301, %r183;
	add.s64 	%rd302, %rd15, %rd301;
	st.local.u8 	[%rd302], %rs24;
	add.s32 	%r58, %r58, 1;
	add.s32 	%r1076, %r1071, 1;
	mov.u32 	%r1078, %r58;

BB4_46:
	setp.lt.u32	%p32, %r2, 4;
	@%p32 bra 	BB4_48;

BB4_47:
	xor.b32  	%r184, %r1076, 7;
	cvt.u64.u32	%rd303, %r184;
	add.s64 	%rd304, %rd201, %rd303;
	ld.local.u8 	%rs25, [%rd304];
	xor.b32  	%r185, %r58, 7;
	cvt.u64.u32	%rd305, %r185;
	add.s64 	%rd306, %rd15, %rd305;
	st.local.u8 	[%rd306], %rs25;
	add.s32 	%r186, %r1076, 1;
	xor.b32  	%r187, %r186, 7;
	cvt.u64.u32	%rd307, %r187;
	add.s64 	%rd308, %rd201, %rd307;
	ld.local.u8 	%rs26, [%rd308];
	add.s32 	%r188, %r58, 1;
	xor.b32  	%r189, %r188, 7;
	cvt.u64.u32	%rd309, %r189;
	add.s64 	%rd310, %rd15, %rd309;
	st.local.u8 	[%rd310], %rs26;
	add.s32 	%r190, %r1076, 2;
	xor.b32  	%r191, %r190, 7;
	cvt.u64.u32	%rd311, %r191;
	add.s64 	%rd312, %rd201, %rd311;
	ld.local.u8 	%rs27, [%rd312];
	add.s32 	%r192, %r58, 2;
	xor.b32  	%r193, %r192, 7;
	cvt.u64.u32	%rd313, %r193;
	add.s64 	%rd314, %rd15, %rd313;
	st.local.u8 	[%rd314], %rs27;
	add.s32 	%r194, %r1076, 3;
	xor.b32  	%r195, %r194, 7;
	cvt.u64.u32	%rd315, %r195;
	add.s64 	%rd316, %rd201, %rd315;
	ld.local.u8 	%rs28, [%rd316];
	add.s32 	%r196, %r58, 3;
	xor.b32  	%r197, %r196, 7;
	cvt.u64.u32	%rd317, %r197;
	add.s64 	%rd318, %rd15, %rd317;
	st.local.u8 	[%rd318], %rs28;
	add.s32 	%r58, %r58, 4;
	add.s32 	%r1076, %r1076, 4;
	setp.lt.u32	%p33, %r1076, %r2;
	mov.u32 	%r1078, %r58;
	@%p33 bra 	BB4_47;

BB4_48:
	xor.b32  	%r198, %r1078, 7;
	cvt.u64.u32	%rd319, %r198;
	mul.wide.u32 	%rd320, %r1042, 128;
	add.s64 	%rd321, %rd2, %rd320;
	add.s64 	%rd322, %rd321, %rd319;
	mov.u16 	%rs29, 128;
	st.local.u8 	[%rd322], %rs29;
	shl.b32 	%r199, %r1078, 3;
	cvt.u64.u32	%rd323, %r199;
	st.local.u64 	[%rd321+120], %rd323;
	add.s32 	%r1042, %r1042, 1;
	setp.lt.u32	%p34, %r1042, 8;
	@%p34 bra 	BB4_4;

	ld.global.u64 	%rd1549, [%rd197];
	ld.global.u64 	%rd1548, [%rd197+8];
	ld.global.u64 	%rd1547, [%rd197+16];
	ld.global.u64 	%rd1546, [%rd197+24];
	ld.global.u64 	%rd1545, [%rd197+32];
	ld.global.u64 	%rd1544, [%rd197+40];
	ld.global.u64 	%rd1543, [%rd197+48];
	ld.global.u64 	%rd1542, [%rd197+56];
	setp.eq.s32	%p35, %r86, 0;
	@%p35 bra 	BB4_57;

	ld.const.u64 	%rd24, [k_sha512];
	ld.const.u64 	%rd25, [k_sha512+8];
	ld.const.u64 	%rd26, [k_sha512+16];
	ld.const.u64 	%rd27, [k_sha512+24];
	ld.const.u64 	%rd28, [k_sha512+32];
	ld.const.u64 	%rd29, [k_sha512+40];
	ld.const.u64 	%rd30, [k_sha512+48];
	ld.const.u64 	%rd31, [k_sha512+56];
	ld.const.u64 	%rd32, [k_sha512+64];
	ld.const.u64 	%rd33, [k_sha512+72];
	ld.const.u64 	%rd34, [k_sha512+80];
	ld.const.u64 	%rd35, [k_sha512+88];
	ld.const.u64 	%rd36, [k_sha512+96];
	ld.const.u64 	%rd37, [k_sha512+104];
	ld.const.u64 	%rd38, [k_sha512+112];
	ld.const.u64 	%rd39, [k_sha512+120];
	mov.u64 	%rd326, 5840696475078001361;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r201,%dummy}, %rd326;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r202}, %rd326;
	}
	shf.r.wrap.b32 	%r203, %r202, %r201, 18;
	shf.r.wrap.b32 	%r204, %r201, %r202, 18;
	mov.b64 	%rd327, {%r204, %r203};
	shf.r.wrap.b32 	%r205, %r202, %r201, 14;
	shf.r.wrap.b32 	%r206, %r201, %r202, 14;
	mov.b64 	%rd328, {%r206, %r205};
	xor.b64  	%rd329, %rd327, %rd328;
	shf.l.wrap.b32 	%r207, %r201, %r202, 23;
	shf.l.wrap.b32 	%r208, %r202, %r201, 23;
	mov.b64 	%rd330, {%r208, %r207};
	xor.b64  	%rd40, %rd329, %rd330;
	mov.u64 	%rd331, 7640891576956012808;
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r209}, %rd331;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%r210,%dummy}, %rd331;
	}
	shf.l.wrap.b32 	%r211, %r210, %r209, 30;
	shf.l.wrap.b32 	%r212, %r209, %r210, 30;
	mov.b64 	%rd332, {%r212, %r211};
	shf.r.wrap.b32 	%r213, %r209, %r210, 28;
	shf.r.wrap.b32 	%r214, %r210, %r209, 28;
	mov.b64 	%rd333, {%r214, %r213};
	xor.b64  	%rd334, %rd332, %rd333;
	shf.l.wrap.b32 	%r215, %r210, %r209, 25;
	shf.l.wrap.b32 	%r216, %r209, %r210, 25;
	mov.b64 	%rd335, {%r216, %r215};
	xor.b64  	%rd41, %rd334, %rd335;
	mov.u32 	%r1080, 0;

BB4_51:
	add.u64 	%rd1537, %SPL, 64;
	and.b32  	%r217, %r1079, 1;
	setp.eq.b32	%p36, %r217, 1;
	cvt.u64.u32	%rd336, %r217;
	mul.wide.u32 	%rd337, %r1079, -1431655765;
	shr.u64 	%rd338, %rd337, 33;
	cvt.u32.u64	%r218, %rd338;
	mul.lo.s32 	%r219, %r218, 3;
	sub.s32 	%r220, %r1079, %r219;
	setp.ne.s32	%p37, %r220, 0;
	selp.b64	%rd339, 2, 0, %p37;
	mul.wide.u32 	%rd340, %r1079, 613566757;
	shr.u64 	%rd341, %rd340, 32;
	cvt.u32.u64	%r221, %rd341;
	sub.s32 	%r222, %r1079, %r221;
	shr.u32 	%r223, %r222, 1;
	add.s32 	%r224, %r223, %r221;
	shr.u32 	%r225, %r224, 2;
	mul.lo.s32 	%r226, %r225, 7;
	sub.s32 	%r227, %r1079, %r226;
	setp.ne.s32	%p38, %r227, 0;
	selp.b64	%rd342, 4, 0, %p38;
	or.b64  	%rd343, %rd339, %rd336;
	or.b64  	%rd50, %rd343, %rd342;
	shl.b64 	%rd344, %rd50, 7;
	add.s64 	%rd345, %rd1537, %rd344;
	ld.local.v2.u64 	{%rd346, %rd347}, [%rd345];
	add.u64 	%rd351, %SPL, 1088;
	st.local.v2.u64 	[%rd351], {%rd346, %rd347};
	ld.local.v2.u64 	{%rd352, %rd353}, [%rd345+16];
	st.local.v2.u64 	[%rd351+16], {%rd352, %rd353};
	ld.local.v2.u64 	{%rd356, %rd357}, [%rd345+32];
	st.local.v2.u64 	[%rd351+32], {%rd356, %rd357};
	ld.local.v2.u64 	{%rd360, %rd361}, [%rd345+48];
	st.local.v2.u64 	[%rd351+48], {%rd360, %rd361};
	ld.local.v2.u64 	{%rd1557, %rd1556}, [%rd345+64];
	st.local.v2.u64 	[%rd351+64], {%rd1557, %rd1556};
	ld.local.v2.u64 	{%rd1555, %rd1554}, [%rd345+80];
	st.local.v2.u64 	[%rd351+80], {%rd1555, %rd1554};
	ld.local.v2.u64 	{%rd1553, %rd1552}, [%rd345+96];
	st.local.v2.u64 	[%rd351+96], {%rd1553, %rd1552};
	ld.local.v2.u64 	{%rd1551, %rd1550}, [%rd345+112];
	st.local.v2.u64 	[%rd351+112], {%rd1551, %rd1550};
	@%p36 bra 	BB4_53;
	bra.uni 	BB4_52;

BB4_53:
	add.u64 	%rd1539, %SPL, 32;
	shl.b64 	%rd374, %rd50, 2;
	add.s64 	%rd375, %rd1539, %rd374;
	ld.local.u32 	%r228, [%rd375];
	add.s32 	%r229, %r228, -64;
	shr.u64 	%rd376, %rd1549, 56;
	xor.b32  	%r230, %r229, 7;
	cvt.u64.u32	%rd377, %r230;
	add.s64 	%rd380, %rd351, %rd377;
	st.local.u8 	[%rd380], %rd376;
	add.s32 	%r231, %r228, -63;
	shr.u64 	%rd381, %rd1549, 48;
	xor.b32  	%r232, %r231, 7;
	cvt.u64.u32	%rd382, %r232;
	add.s64 	%rd383, %rd351, %rd382;
	st.local.u8 	[%rd383], %rd381;
	add.s32 	%r233, %r228, -62;
	shr.u64 	%rd384, %rd1549, 40;
	xor.b32  	%r234, %r233, 7;
	cvt.u64.u32	%rd385, %r234;
	add.s64 	%rd386, %rd351, %rd385;
	st.local.u8 	[%rd386], %rd384;
	add.s32 	%r235, %r228, -61;
	shr.u64 	%rd387, %rd1549, 32;
	xor.b32  	%r236, %r235, 7;
	cvt.u64.u32	%rd388, %r236;
	add.s64 	%rd389, %rd351, %rd388;
	st.local.u8 	[%rd389], %rd387;
	add.s32 	%r237, %r228, -60;
	shr.u64 	%rd390, %rd1549, 24;
	xor.b32  	%r238, %r237, 7;
	cvt.u64.u32	%rd391, %r238;
	add.s64 	%rd392, %rd351, %rd391;
	st.local.u8 	[%rd392], %rd390;
	add.s32 	%r239, %r228, -59;
	shr.u64 	%rd393, %rd1549, 16;
	xor.b32  	%r240, %r239, 7;
	cvt.u64.u32	%rd394, %r240;
	add.s64 	%rd395, %rd351, %rd394;
	st.local.u8 	[%rd395], %rd393;
	add.s32 	%r241, %r228, -58;
	shr.u64 	%rd396, %rd1549, 8;
	xor.b32  	%r242, %r241, 7;
	cvt.u64.u32	%rd397, %r242;
	add.s64 	%rd398, %rd351, %rd397;
	st.local.u8 	[%rd398], %rd396;
	add.s32 	%r243, %r228, -57;
	xor.b32  	%r244, %r243, 7;
	cvt.u64.u32	%rd399, %r244;
	add.s64 	%rd400, %rd351, %rd399;
	st.local.u8 	[%rd400], %rd1549;
	add.s32 	%r245, %r228, -56;
	shr.u64 	%rd401, %rd1548, 56;
	xor.b32  	%r246, %r245, 7;
	cvt.u64.u32	%rd402, %r246;
	add.s64 	%rd403, %rd351, %rd402;
	st.local.u8 	[%rd403], %rd401;
	add.s32 	%r247, %r228, -55;
	shr.u64 	%rd404, %rd1548, 48;
	xor.b32  	%r248, %r247, 7;
	cvt.u64.u32	%rd405, %r248;
	add.s64 	%rd406, %rd351, %rd405;
	st.local.u8 	[%rd406], %rd404;
	add.s32 	%r249, %r228, -54;
	shr.u64 	%rd407, %rd1548, 40;
	xor.b32  	%r250, %r249, 7;
	cvt.u64.u32	%rd408, %r250;
	add.s64 	%rd409, %rd351, %rd408;
	st.local.u8 	[%rd409], %rd407;
	add.s32 	%r251, %r228, -53;
	shr.u64 	%rd410, %rd1548, 32;
	xor.b32  	%r252, %r251, 7;
	cvt.u64.u32	%rd411, %r252;
	add.s64 	%rd412, %rd351, %rd411;
	st.local.u8 	[%rd412], %rd410;
	add.s32 	%r253, %r228, -52;
	shr.u64 	%rd413, %rd1548, 24;
	xor.b32  	%r254, %r253, 7;
	cvt.u64.u32	%rd414, %r254;
	add.s64 	%rd415, %rd351, %rd414;
	st.local.u8 	[%rd415], %rd413;
	add.s32 	%r255, %r228, -51;
	shr.u64 	%rd416, %rd1548, 16;
	xor.b32  	%r256, %r255, 7;
	cvt.u64.u32	%rd417, %r256;
	add.s64 	%rd418, %rd351, %rd417;
	st.local.u8 	[%rd418], %rd416;
	add.s32 	%r257, %r228, -50;
	shr.u64 	%rd419, %rd1548, 8;
	xor.b32  	%r258, %r257, 7;
	cvt.u64.u32	%rd420, %r258;
	add.s64 	%rd421, %rd351, %rd420;
	st.local.u8 	[%rd421], %rd419;
	add.s32 	%r259, %r228, -49;
	xor.b32  	%r260, %r259, 7;
	cvt.u64.u32	%rd422, %r260;
	add.s64 	%rd423, %rd351, %rd422;
	st.local.u8 	[%rd423], %rd1548;
	add.s32 	%r261, %r228, -48;
	shr.u64 	%rd424, %rd1547, 56;
	xor.b32  	%r262, %r261, 7;
	cvt.u64.u32	%rd425, %r262;
	add.s64 	%rd426, %rd351, %rd425;
	st.local.u8 	[%rd426], %rd424;
	add.s32 	%r263, %r228, -47;
	shr.u64 	%rd427, %rd1547, 48;
	xor.b32  	%r264, %r263, 7;
	cvt.u64.u32	%rd428, %r264;
	add.s64 	%rd429, %rd351, %rd428;
	st.local.u8 	[%rd429], %rd427;
	add.s32 	%r265, %r228, -46;
	shr.u64 	%rd430, %rd1547, 40;
	xor.b32  	%r266, %r265, 7;
	cvt.u64.u32	%rd431, %r266;
	add.s64 	%rd432, %rd351, %rd431;
	st.local.u8 	[%rd432], %rd430;
	add.s32 	%r267, %r228, -45;
	shr.u64 	%rd433, %rd1547, 32;
	xor.b32  	%r268, %r267, 7;
	cvt.u64.u32	%rd434, %r268;
	add.s64 	%rd435, %rd351, %rd434;
	st.local.u8 	[%rd435], %rd433;
	add.s32 	%r269, %r228, -44;
	shr.u64 	%rd436, %rd1547, 24;
	xor.b32  	%r270, %r269, 7;
	cvt.u64.u32	%rd437, %r270;
	add.s64 	%rd438, %rd351, %rd437;
	st.local.u8 	[%rd438], %rd436;
	add.s32 	%r271, %r228, -43;
	shr.u64 	%rd439, %rd1547, 16;
	xor.b32  	%r272, %r271, 7;
	cvt.u64.u32	%rd440, %r272;
	add.s64 	%rd441, %rd351, %rd440;
	st.local.u8 	[%rd441], %rd439;
	add.s32 	%r273, %r228, -42;
	shr.u64 	%rd442, %rd1547, 8;
	xor.b32  	%r274, %r273, 7;
	cvt.u64.u32	%rd443, %r274;
	add.s64 	%rd444, %rd351, %rd443;
	st.local.u8 	[%rd444], %rd442;
	add.s32 	%r275, %r228, -41;
	xor.b32  	%r276, %r275, 7;
	cvt.u64.u32	%rd445, %r276;
	add.s64 	%rd446, %rd351, %rd445;
	st.local.u8 	[%rd446], %rd1547;
	add.s32 	%r277, %r228, -40;
	shr.u64 	%rd447, %rd1546, 56;
	xor.b32  	%r278, %r277, 7;
	cvt.u64.u32	%rd448, %r278;
	add.s64 	%rd449, %rd351, %rd448;
	st.local.u8 	[%rd449], %rd447;
	add.s32 	%r279, %r228, -39;
	shr.u64 	%rd450, %rd1546, 48;
	xor.b32  	%r280, %r279, 7;
	cvt.u64.u32	%rd451, %r280;
	add.s64 	%rd452, %rd351, %rd451;
	st.local.u8 	[%rd452], %rd450;
	add.s32 	%r281, %r228, -38;
	shr.u64 	%rd453, %rd1546, 40;
	xor.b32  	%r282, %r281, 7;
	cvt.u64.u32	%rd454, %r282;
	add.s64 	%rd455, %rd351, %rd454;
	st.local.u8 	[%rd455], %rd453;
	add.s32 	%r283, %r228, -37;
	shr.u64 	%rd456, %rd1546, 32;
	xor.b32  	%r284, %r283, 7;
	cvt.u64.u32	%rd457, %r284;
	add.s64 	%rd458, %rd351, %rd457;
	st.local.u8 	[%rd458], %rd456;
	add.s32 	%r285, %r228, -36;
	shr.u64 	%rd459, %rd1546, 24;
	xor.b32  	%r286, %r285, 7;
	cvt.u64.u32	%rd460, %r286;
	add.s64 	%rd461, %rd351, %rd460;
	st.local.u8 	[%rd461], %rd459;
	add.s32 	%r287, %r228, -35;
	shr.u64 	%rd462, %rd1546, 16;
	xor.b32  	%r288, %r287, 7;
	cvt.u64.u32	%rd463, %r288;
	add.s64 	%rd464, %rd351, %rd463;
	st.local.u8 	[%rd464], %rd462;
	add.s32 	%r289, %r228, -34;
	shr.u64 	%rd465, %rd1546, 8;
	xor.b32  	%r290, %r289, 7;
	cvt.u64.u32	%rd466, %r290;
	add.s64 	%rd467, %rd351, %rd466;
	st.local.u8 	[%rd467], %rd465;
	add.s32 	%r291, %r228, -33;
	xor.b32  	%r292, %r291, 7;
	cvt.u64.u32	%rd468, %r292;
	add.s64 	%rd469, %rd351, %rd468;
	st.local.u8 	[%rd469], %rd1546;
	add.s32 	%r293, %r228, -32;
	shr.u64 	%rd470, %rd1545, 56;
	xor.b32  	%r294, %r293, 7;
	cvt.u64.u32	%rd471, %r294;
	add.s64 	%rd472, %rd351, %rd471;
	st.local.u8 	[%rd472], %rd470;
	add.s32 	%r295, %r228, -31;
	shr.u64 	%rd473, %rd1545, 48;
	xor.b32  	%r296, %r295, 7;
	cvt.u64.u32	%rd474, %r296;
	add.s64 	%rd475, %rd351, %rd474;
	st.local.u8 	[%rd475], %rd473;
	add.s32 	%r297, %r228, -30;
	shr.u64 	%rd476, %rd1545, 40;
	xor.b32  	%r298, %r297, 7;
	cvt.u64.u32	%rd477, %r298;
	add.s64 	%rd478, %rd351, %rd477;
	st.local.u8 	[%rd478], %rd476;
	add.s32 	%r299, %r228, -29;
	shr.u64 	%rd479, %rd1545, 32;
	xor.b32  	%r300, %r299, 7;
	cvt.u64.u32	%rd480, %r300;
	add.s64 	%rd481, %rd351, %rd480;
	st.local.u8 	[%rd481], %rd479;
	add.s32 	%r301, %r228, -28;
	shr.u64 	%rd482, %rd1545, 24;
	xor.b32  	%r302, %r301, 7;
	cvt.u64.u32	%rd483, %r302;
	add.s64 	%rd484, %rd351, %rd483;
	st.local.u8 	[%rd484], %rd482;
	add.s32 	%r303, %r228, -27;
	shr.u64 	%rd485, %rd1545, 16;
	xor.b32  	%r304, %r303, 7;
	cvt.u64.u32	%rd486, %r304;
	add.s64 	%rd487, %rd351, %rd486;
	st.local.u8 	[%rd487], %rd485;
	add.s32 	%r305, %r228, -26;
	shr.u64 	%rd488, %rd1545, 8;
	xor.b32  	%r306, %r305, 7;
	cvt.u64.u32	%rd489, %r306;
	add.s64 	%rd490, %rd351, %rd489;
	st.local.u8 	[%rd490], %rd488;
	add.s32 	%r307, %r228, -25;
	xor.b32  	%r308, %r307, 7;
	cvt.u64.u32	%rd491, %r308;
	add.s64 	%rd492, %rd351, %rd491;
	st.local.u8 	[%rd492], %rd1545;
	add.s32 	%r309, %r228, -24;
	shr.u64 	%rd493, %rd1544, 56;
	xor.b32  	%r310, %r309, 7;
	cvt.u64.u32	%rd494, %r310;
	add.s64 	%rd495, %rd351, %rd494;
	st.local.u8 	[%rd495], %rd493;
	add.s32 	%r311, %r228, -23;
	shr.u64 	%rd496, %rd1544, 48;
	xor.b32  	%r312, %r311, 7;
	cvt.u64.u32	%rd497, %r312;
	add.s64 	%rd498, %rd351, %rd497;
	st.local.u8 	[%rd498], %rd496;
	add.s32 	%r313, %r228, -22;
	shr.u64 	%rd499, %rd1544, 40;
	xor.b32  	%r314, %r313, 7;
	cvt.u64.u32	%rd500, %r314;
	add.s64 	%rd501, %rd351, %rd500;
	st.local.u8 	[%rd501], %rd499;
	add.s32 	%r315, %r228, -21;
	shr.u64 	%rd502, %rd1544, 32;
	xor.b32  	%r316, %r315, 7;
	cvt.u64.u32	%rd503, %r316;
	add.s64 	%rd504, %rd351, %rd503;
	st.local.u8 	[%rd504], %rd502;
	add.s32 	%r317, %r228, -20;
	shr.u64 	%rd505, %rd1544, 24;
	xor.b32  	%r318, %r317, 7;
	cvt.u64.u32	%rd506, %r318;
	add.s64 	%rd507, %rd351, %rd506;
	st.local.u8 	[%rd507], %rd505;
	add.s32 	%r319, %r228, -19;
	shr.u64 	%rd508, %rd1544, 16;
	xor.b32  	%r320, %r319, 7;
	cvt.u64.u32	%rd509, %r320;
	add.s64 	%rd510, %rd351, %rd509;
	st.local.u8 	[%rd510], %rd508;
	add.s32 	%r321, %r228, -18;
	shr.u64 	%rd511, %rd1544, 8;
	xor.b32  	%r322, %r321, 7;
	cvt.u64.u32	%rd512, %r322;
	add.s64 	%rd513, %rd351, %rd512;
	st.local.u8 	[%rd513], %rd511;
	add.s32 	%r323, %r228, -17;
	xor.b32  	%r324, %r323, 7;
	cvt.u64.u32	%rd514, %r324;
	add.s64 	%rd515, %rd351, %rd514;
	st.local.u8 	[%rd515], %rd1544;
	add.s32 	%r325, %r228, -16;
	shr.u64 	%rd516, %rd1543, 56;
	xor.b32  	%r326, %r325, 7;
	cvt.u64.u32	%rd517, %r326;
	add.s64 	%rd518, %rd351, %rd517;
	st.local.u8 	[%rd518], %rd516;
	add.s32 	%r327, %r228, -15;
	shr.u64 	%rd519, %rd1543, 48;
	xor.b32  	%r328, %r327, 7;
	cvt.u64.u32	%rd520, %r328;
	add.s64 	%rd521, %rd351, %rd520;
	st.local.u8 	[%rd521], %rd519;
	add.s32 	%r329, %r228, -14;
	shr.u64 	%rd522, %rd1543, 40;
	xor.b32  	%r330, %r329, 7;
	cvt.u64.u32	%rd523, %r330;
	add.s64 	%rd524, %rd351, %rd523;
	st.local.u8 	[%rd524], %rd522;
	add.s32 	%r331, %r228, -13;
	shr.u64 	%rd525, %rd1543, 32;
	xor.b32  	%r332, %r331, 7;
	cvt.u64.u32	%rd526, %r332;
	add.s64 	%rd527, %rd351, %rd526;
	st.local.u8 	[%rd527], %rd525;
	add.s32 	%r333, %r228, -12;
	shr.u64 	%rd528, %rd1543, 24;
	xor.b32  	%r334, %r333, 7;
	cvt.u64.u32	%rd529, %r334;
	add.s64 	%rd530, %rd351, %rd529;
	st.local.u8 	[%rd530], %rd528;
	add.s32 	%r335, %r228, -11;
	shr.u64 	%rd531, %rd1543, 16;
	xor.b32  	%r336, %r335, 7;
	cvt.u64.u32	%rd532, %r336;
	add.s64 	%rd533, %rd351, %rd532;
	st.local.u8 	[%rd533], %rd531;
	add.s32 	%r337, %r228, -10;
	shr.u64 	%rd534, %rd1543, 8;
	xor.b32  	%r338, %r337, 7;
	cvt.u64.u32	%rd535, %r338;
	add.s64 	%rd536, %rd351, %rd535;
	st.local.u8 	[%rd536], %rd534;
	add.s32 	%r339, %r228, -9;
	xor.b32  	%r340, %r339, 7;
	cvt.u64.u32	%rd537, %r340;
	add.s64 	%rd538, %rd351, %rd537;
	st.local.u8 	[%rd538], %rd1543;
	add.s32 	%r341, %r228, -8;
	shr.u64 	%rd539, %rd1542, 56;
	xor.b32  	%r342, %r341, 7;
	cvt.u64.u32	%rd540, %r342;
	add.s64 	%rd541, %rd351, %rd540;
	st.local.u8 	[%rd541], %rd539;
	add.s32 	%r343, %r228, -7;
	shr.u64 	%rd542, %rd1542, 48;
	xor.b32  	%r344, %r343, 7;
	cvt.u64.u32	%rd543, %r344;
	add.s64 	%rd544, %rd351, %rd543;
	st.local.u8 	[%rd544], %rd542;
	add.s32 	%r345, %r228, -6;
	shr.u64 	%rd545, %rd1542, 40;
	xor.b32  	%r346, %r345, 7;
	cvt.u64.u32	%rd546, %r346;
	add.s64 	%rd547, %rd351, %rd546;
	st.local.u8 	[%rd547], %rd545;
	add.s32 	%r347, %r228, -5;
	shr.u64 	%rd548, %rd1542, 32;
	xor.b32  	%r348, %r347, 7;
	cvt.u64.u32	%rd549, %r348;
	add.s64 	%rd550, %rd351, %rd549;
	st.local.u8 	[%rd550], %rd548;
	add.s32 	%r349, %r228, -4;
	shr.u64 	%rd551, %rd1542, 24;
	xor.b32  	%r350, %r349, 7;
	cvt.u64.u32	%rd552, %r350;
	add.s64 	%rd553, %rd351, %rd552;
	st.local.u8 	[%rd553], %rd551;
	add.s32 	%r351, %r228, -3;
	shr.u64 	%rd554, %rd1542, 16;
	xor.b32  	%r352, %r351, 7;
	cvt.u64.u32	%rd555, %r352;
	add.s64 	%rd556, %rd351, %rd555;
	st.local.u8 	[%rd556], %rd554;
	add.s32 	%r353, %r228, -2;
	shr.u64 	%rd557, %rd1542, 8;
	xor.b32  	%r354, %r353, 7;
	cvt.u64.u32	%rd558, %r354;
	add.s64 	%rd559, %rd351, %rd558;
	st.local.u8 	[%rd559], %rd557;
	add.s32 	%r355, %r228, -1;
	xor.b32  	%r356, %r355, 7;
	cvt.u64.u32	%rd560, %r356;
	add.s64 	%rd561, %rd351, %rd560;
	st.local.u8 	[%rd561], %rd1542;
	ld.local.v2.u64 	{%rd1549, %rd1548}, [%rd351];
	ld.local.v2.u64 	{%rd1547, %rd1546}, [%rd351+16];
	ld.local.v2.u64 	{%rd1545, %rd1544}, [%rd351+32];
	ld.local.v2.u64 	{%rd1543, %rd1542}, [%rd351+48];
	ld.local.v2.u64 	{%rd1557, %rd1556}, [%rd351+64];
	ld.local.v2.u64 	{%rd1555, %rd1554}, [%rd351+80];
	ld.local.v2.u64 	{%rd1553, %rd1552}, [%rd351+96];
	ld.local.v2.u64 	{%rd1551, %rd1550}, [%rd351+112];
	bra.uni 	BB4_54;

BB4_52:
	st.local.v2.u64 	[%rd351], {%rd1549, %rd1548};
	st.local.v2.u64 	[%rd351+16], {%rd1547, %rd1546};
	st.local.v2.u64 	[%rd351+32], {%rd1545, %rd1544};
	st.local.v2.u64 	[%rd351+48], {%rd1543, %rd1542};

BB4_54:
	shr.u64 	%rd579, %rd1549, 32;
	shr.u64 	%rd580, %rd1548, 32;
	shr.u64 	%rd581, %rd1547, 32;
	shr.u64 	%rd582, %rd1546, 32;
	shr.u64 	%rd583, %rd1545, 32;
	shr.u64 	%rd584, %rd1544, 32;
	shr.u64 	%rd585, %rd1543, 32;
	shr.u64 	%rd586, %rd1542, 32;
	shr.u64 	%rd587, %rd1557, 32;
	shr.u64 	%rd588, %rd1556, 32;
	shr.u64 	%rd589, %rd1555, 32;
	shr.u64 	%rd590, %rd1554, 32;
	shr.u64 	%rd591, %rd1553, 32;
	shr.u64 	%rd592, %rd1552, 32;
	shr.u64 	%rd593, %rd1551, 32;
	shr.u64 	%rd594, %rd1550, 32;
	bfi.b64 	%rd1583, %rd579, %rd1549, 32, 32;
	bfi.b64 	%rd1584, %rd580, %rd1548, 32, 32;
	bfi.b64 	%rd1585, %rd581, %rd1547, 32, 32;
	bfi.b64 	%rd1586, %rd582, %rd1546, 32, 32;
	bfi.b64 	%rd1587, %rd583, %rd1545, 32, 32;
	bfi.b64 	%rd1588, %rd584, %rd1544, 32, 32;
	bfi.b64 	%rd1589, %rd585, %rd1543, 32, 32;
	bfi.b64 	%rd1590, %rd586, %rd1542, 32, 32;
	bfi.b64 	%rd1574, %rd587, %rd1557, 32, 32;
	bfi.b64 	%rd1573, %rd588, %rd1556, 32, 32;
	bfi.b64 	%rd1572, %rd589, %rd1555, 32, 32;
	bfi.b64 	%rd1571, %rd590, %rd1554, 32, 32;
	bfi.b64 	%rd1570, %rd591, %rd1553, 32, 32;
	bfi.b64 	%rd1569, %rd592, %rd1552, 32, 32;
	bfi.b64 	%rd1568, %rd593, %rd1551, 32, 32;
	bfi.b64 	%rd1567, %rd594, %rd1550, 32, 32;
	add.s64 	%rd595, %rd1583, %rd24;
	add.s64 	%rd596, %rd595, %rd40;
	add.s64 	%rd597, %rd596, %rd41;
	add.s64 	%rd598, %rd596, 2357225248857953701;
	add.s64 	%rd599, %rd597, -5343946410804754465;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r358,%dummy}, %rd598;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r359}, %rd598;
	}
	shf.r.wrap.b32 	%r360, %r359, %r358, 14;
	shf.r.wrap.b32 	%r361, %r358, %r359, 14;
	mov.b64 	%rd600, {%r361, %r360};
	shf.r.wrap.b32 	%r362, %r359, %r358, 18;
	shf.r.wrap.b32 	%r363, %r358, %r359, 18;
	mov.b64 	%rd601, {%r363, %r362};
	xor.b64  	%rd602, %rd601, %rd600;
	shf.l.wrap.b32 	%r364, %r358, %r359, 23;
	shf.l.wrap.b32 	%r365, %r359, %r358, 23;
	mov.b64 	%rd603, {%r365, %r364};
	xor.b64  	%rd604, %rd602, %rd603;
	and.b64  	%rd605, %rd598, -3887949035690463538;
	xor.b64  	%rd606, %rd605, -7276294671716946913;
	add.s64 	%rd607, %rd1584, %rd25;
	add.s64 	%rd608, %rd607, %rd606;
	add.s64 	%rd609, %rd608, %rd604;
	xor.b64  	%rd610, %rd599, -4942790177534073029;
	xor.b64  	%rd611, %rd599, 7640891576956012808;
	and.b64  	%rd612, %rd611, %rd610;
	xor.b64  	%rd613, %rd612, %rd599;
	add.s64 	%rd614, %rd609, %rd613;
	add.s64 	%rd615, %rd609, 6625583534739731862;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r366,%dummy}, %rd599;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r367}, %rd599;
	}
	shf.r.wrap.b32 	%r368, %r367, %r366, 28;
	shf.r.wrap.b32 	%r369, %r366, %r367, 28;
	mov.b64 	%rd616, {%r369, %r368};
	shf.l.wrap.b32 	%r370, %r366, %r367, 30;
	shf.l.wrap.b32 	%r371, %r367, %r366, 30;
	mov.b64 	%rd617, {%r371, %r370};
	xor.b64  	%rd618, %rd617, %rd616;
	shf.l.wrap.b32 	%r372, %r366, %r367, 25;
	shf.l.wrap.b32 	%r373, %r367, %r366, 25;
	mov.b64 	%rd619, {%r373, %r372};
	xor.b64  	%rd620, %rd618, %rd619;
	add.s64 	%rd621, %rd614, %rd620;
	add.s64 	%rd622, %rd621, 2270897969802886507;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r374,%dummy}, %rd615;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r375}, %rd615;
	}
	shf.r.wrap.b32 	%r376, %r375, %r374, 14;
	shf.r.wrap.b32 	%r377, %r374, %r375, 14;
	mov.b64 	%rd623, {%r377, %r376};
	shf.r.wrap.b32 	%r378, %r375, %r374, 18;
	shf.r.wrap.b32 	%r379, %r374, %r375, 18;
	mov.b64 	%rd624, {%r379, %r378};
	xor.b64  	%rd625, %rd624, %rd623;
	shf.l.wrap.b32 	%r380, %r374, %r375, 23;
	shf.l.wrap.b32 	%r381, %r375, %r374, 23;
	mov.b64 	%rd626, {%r381, %r380};
	xor.b64  	%rd627, %rd625, %rd626;
	xor.b64  	%rd628, %rd598, 5840696475078001361;
	and.b64  	%rd629, %rd615, %rd628;
	xor.b64  	%rd630, %rd629, 5840696475078001361;
	add.s64 	%rd631, %rd1585, %rd26;
	add.s64 	%rd632, %rd631, %rd630;
	add.s64 	%rd633, %rd632, %rd627;
	xor.b64  	%rd634, %rd622, 7640891576956012808;
	xor.b64  	%rd635, %rd622, %rd599;
	and.b64  	%rd636, %rd635, %rd634;
	xor.b64  	%rd637, %rd636, %rd622;
	add.s64 	%rd638, %rd633, %rd637;
	add.s64 	%rd639, %rd633, 6227659224458531674;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r382,%dummy}, %rd622;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r383}, %rd622;
	}
	shf.r.wrap.b32 	%r384, %r383, %r382, 28;
	shf.r.wrap.b32 	%r385, %r382, %r383, 28;
	mov.b64 	%rd640, {%r385, %r384};
	shf.l.wrap.b32 	%r386, %r382, %r383, 30;
	shf.l.wrap.b32 	%r387, %r383, %r382, 30;
	mov.b64 	%rd641, {%r387, %r386};
	xor.b64  	%rd642, %rd641, %rd640;
	shf.l.wrap.b32 	%r388, %r382, %r383, 25;
	shf.l.wrap.b32 	%r389, %r383, %r382, 25;
	mov.b64 	%rd643, {%r389, %r388};
	xor.b64  	%rd644, %rd642, %rd643;
	add.s64 	%rd645, %rd638, %rd644;
	add.s64 	%rd646, %rd645, -7276294671716946913;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r390,%dummy}, %rd639;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r391}, %rd639;
	}
	shf.r.wrap.b32 	%r392, %r391, %r390, 14;
	shf.r.wrap.b32 	%r393, %r390, %r391, 14;
	mov.b64 	%rd647, {%r393, %r392};
	shf.r.wrap.b32 	%r394, %r391, %r390, 18;
	shf.r.wrap.b32 	%r395, %r390, %r391, 18;
	mov.b64 	%rd648, {%r395, %r394};
	xor.b64  	%rd649, %rd648, %rd647;
	shf.l.wrap.b32 	%r396, %r390, %r391, 23;
	shf.l.wrap.b32 	%r397, %r391, %r390, 23;
	mov.b64 	%rd650, {%r397, %r396};
	xor.b64  	%rd651, %rd649, %rd650;
	xor.b64  	%rd652, %rd615, %rd598;
	and.b64  	%rd653, %rd639, %rd652;
	xor.b64  	%rd654, %rd653, %rd598;
	add.s64 	%rd655, %rd1586, %rd27;
	add.s64 	%rd656, %rd655, %rd654;
	add.s64 	%rd657, %rd656, %rd651;
	xor.b64  	%rd658, %rd646, %rd599;
	xor.b64  	%rd659, %rd646, %rd622;
	and.b64  	%rd660, %rd659, %rd658;
	xor.b64  	%rd661, %rd660, %rd646;
	add.s64 	%rd662, %rd657, %rd661;
	add.s64 	%rd663, %rd657, -4965156021675537447;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r398,%dummy}, %rd646;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r399}, %rd646;
	}
	shf.r.wrap.b32 	%r400, %r399, %r398, 28;
	shf.r.wrap.b32 	%r401, %r398, %r399, 28;
	mov.b64 	%rd664, {%r401, %r400};
	shf.l.wrap.b32 	%r402, %r398, %r399, 30;
	shf.l.wrap.b32 	%r403, %r399, %r398, 30;
	mov.b64 	%rd665, {%r403, %r402};
	xor.b64  	%rd666, %rd665, %rd664;
	shf.l.wrap.b32 	%r404, %r398, %r399, 25;
	shf.l.wrap.b32 	%r405, %r399, %r398, 25;
	mov.b64 	%rd667, {%r405, %r404};
	xor.b64  	%rd668, %rd666, %rd667;
	add.s64 	%rd669, %rd662, %rd668;
	add.s64 	%rd670, %rd669, 5840696475078001361;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r406,%dummy}, %rd663;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r407}, %rd663;
	}
	shf.r.wrap.b32 	%r408, %r407, %r406, 14;
	shf.r.wrap.b32 	%r409, %r406, %r407, 14;
	mov.b64 	%rd671, {%r409, %r408};
	shf.r.wrap.b32 	%r410, %r407, %r406, 18;
	shf.r.wrap.b32 	%r411, %r406, %r407, 18;
	mov.b64 	%rd672, {%r411, %r410};
	xor.b64  	%rd673, %rd672, %rd671;
	shf.l.wrap.b32 	%r412, %r406, %r407, 23;
	shf.l.wrap.b32 	%r413, %r407, %r406, 23;
	mov.b64 	%rd674, {%r413, %r412};
	xor.b64  	%rd675, %rd673, %rd674;
	xor.b64  	%rd676, %rd639, %rd615;
	and.b64  	%rd677, %rd663, %rd676;
	xor.b64  	%rd678, %rd677, %rd615;
	add.s64 	%rd679, %rd598, %rd1587;
	add.s64 	%rd680, %rd679, %rd28;
	add.s64 	%rd681, %rd680, %rd678;
	add.s64 	%rd682, %rd681, %rd675;
	add.s64 	%rd683, %rd682, %rd599;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r414,%dummy}, %rd670;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r415}, %rd670;
	}
	shf.r.wrap.b32 	%r416, %r415, %r414, 28;
	shf.r.wrap.b32 	%r417, %r414, %r415, 28;
	mov.b64 	%rd684, {%r417, %r416};
	shf.l.wrap.b32 	%r418, %r414, %r415, 30;
	shf.l.wrap.b32 	%r419, %r415, %r414, 30;
	mov.b64 	%rd685, {%r419, %r418};
	xor.b64  	%rd686, %rd685, %rd684;
	shf.l.wrap.b32 	%r420, %r414, %r415, 25;
	shf.l.wrap.b32 	%r421, %r415, %r414, 25;
	mov.b64 	%rd687, {%r421, %r420};
	xor.b64  	%rd688, %rd686, %rd687;
	xor.b64  	%rd689, %rd670, %rd622;
	xor.b64  	%rd690, %rd670, %rd646;
	and.b64  	%rd691, %rd690, %rd689;
	xor.b64  	%rd692, %rd691, %rd670;
	add.s64 	%rd693, %rd682, %rd692;
	add.s64 	%rd694, %rd693, %rd688;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r422,%dummy}, %rd683;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r423}, %rd683;
	}
	shf.r.wrap.b32 	%r424, %r423, %r422, 14;
	shf.r.wrap.b32 	%r425, %r422, %r423, 14;
	mov.b64 	%rd695, {%r425, %r424};
	shf.r.wrap.b32 	%r426, %r423, %r422, 18;
	shf.r.wrap.b32 	%r427, %r422, %r423, 18;
	mov.b64 	%rd696, {%r427, %r426};
	xor.b64  	%rd697, %rd696, %rd695;
	shf.l.wrap.b32 	%r428, %r422, %r423, 23;
	shf.l.wrap.b32 	%r429, %r423, %r422, 23;
	mov.b64 	%rd698, {%r429, %r428};
	xor.b64  	%rd699, %rd697, %rd698;
	xor.b64  	%rd700, %rd663, %rd639;
	and.b64  	%rd701, %rd683, %rd700;
	xor.b64  	%rd702, %rd701, %rd639;
	add.s64 	%rd703, %rd615, %rd1588;
	add.s64 	%rd704, %rd703, %rd29;
	add.s64 	%rd705, %rd704, %rd702;
	add.s64 	%rd706, %rd705, %rd699;
	add.s64 	%rd707, %rd706, %rd622;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r430,%dummy}, %rd694;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r431}, %rd694;
	}
	shf.r.wrap.b32 	%r432, %r431, %r430, 28;
	shf.r.wrap.b32 	%r433, %r430, %r431, 28;
	mov.b64 	%rd708, {%r433, %r432};
	shf.l.wrap.b32 	%r434, %r430, %r431, 30;
	shf.l.wrap.b32 	%r435, %r431, %r430, 30;
	mov.b64 	%rd709, {%r435, %r434};
	xor.b64  	%rd710, %rd709, %rd708;
	shf.l.wrap.b32 	%r436, %r430, %r431, 25;
	shf.l.wrap.b32 	%r437, %r431, %r430, 25;
	mov.b64 	%rd711, {%r437, %r436};
	xor.b64  	%rd712, %rd710, %rd711;
	xor.b64  	%rd713, %rd694, %rd646;
	xor.b64  	%rd714, %rd694, %rd670;
	and.b64  	%rd715, %rd714, %rd713;
	xor.b64  	%rd716, %rd715, %rd694;
	add.s64 	%rd717, %rd706, %rd716;
	add.s64 	%rd718, %rd717, %rd712;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r438,%dummy}, %rd707;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r439}, %rd707;
	}
	shf.r.wrap.b32 	%r440, %r439, %r438, 14;
	shf.r.wrap.b32 	%r441, %r438, %r439, 14;
	mov.b64 	%rd719, {%r441, %r440};
	shf.r.wrap.b32 	%r442, %r439, %r438, 18;
	shf.r.wrap.b32 	%r443, %r438, %r439, 18;
	mov.b64 	%rd720, {%r443, %r442};
	xor.b64  	%rd721, %rd720, %rd719;
	shf.l.wrap.b32 	%r444, %r438, %r439, 23;
	shf.l.wrap.b32 	%r445, %r439, %r438, 23;
	mov.b64 	%rd722, {%r445, %r444};
	xor.b64  	%rd723, %rd721, %rd722;
	xor.b64  	%rd724, %rd683, %rd663;
	and.b64  	%rd725, %rd707, %rd724;
	xor.b64  	%rd726, %rd725, %rd663;
	add.s64 	%rd727, %rd639, %rd1589;
	add.s64 	%rd728, %rd727, %rd30;
	add.s64 	%rd729, %rd728, %rd726;
	add.s64 	%rd730, %rd729, %rd723;
	add.s64 	%rd731, %rd730, %rd646;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r446,%dummy}, %rd718;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r447}, %rd718;
	}
	shf.r.wrap.b32 	%r448, %r447, %r446, 28;
	shf.r.wrap.b32 	%r449, %r446, %r447, 28;
	mov.b64 	%rd732, {%r449, %r448};
	shf.l.wrap.b32 	%r450, %r446, %r447, 30;
	shf.l.wrap.b32 	%r451, %r447, %r446, 30;
	mov.b64 	%rd733, {%r451, %r450};
	xor.b64  	%rd734, %rd733, %rd732;
	shf.l.wrap.b32 	%r452, %r446, %r447, 25;
	shf.l.wrap.b32 	%r453, %r447, %r446, 25;
	mov.b64 	%rd735, {%r453, %r452};
	xor.b64  	%rd736, %rd734, %rd735;
	xor.b64  	%rd737, %rd718, %rd670;
	xor.b64  	%rd738, %rd718, %rd694;
	and.b64  	%rd739, %rd738, %rd737;
	xor.b64  	%rd740, %rd739, %rd718;
	add.s64 	%rd741, %rd730, %rd740;
	add.s64 	%rd742, %rd741, %rd736;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r454,%dummy}, %rd731;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r455}, %rd731;
	}
	shf.r.wrap.b32 	%r456, %r455, %r454, 14;
	shf.r.wrap.b32 	%r457, %r454, %r455, 14;
	mov.b64 	%rd743, {%r457, %r456};
	shf.r.wrap.b32 	%r458, %r455, %r454, 18;
	shf.r.wrap.b32 	%r459, %r454, %r455, 18;
	mov.b64 	%rd744, {%r459, %r458};
	xor.b64  	%rd745, %rd744, %rd743;
	shf.l.wrap.b32 	%r460, %r454, %r455, 23;
	shf.l.wrap.b32 	%r461, %r455, %r454, 23;
	mov.b64 	%rd746, {%r461, %r460};
	xor.b64  	%rd747, %rd745, %rd746;
	xor.b64  	%rd748, %rd707, %rd683;
	and.b64  	%rd749, %rd731, %rd748;
	xor.b64  	%rd750, %rd749, %rd683;
	add.s64 	%rd751, %rd663, %rd1590;
	add.s64 	%rd752, %rd751, %rd31;
	add.s64 	%rd753, %rd752, %rd750;
	add.s64 	%rd754, %rd753, %rd747;
	add.s64 	%rd755, %rd754, %rd670;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r462,%dummy}, %rd742;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r463}, %rd742;
	}
	shf.r.wrap.b32 	%r464, %r463, %r462, 28;
	shf.r.wrap.b32 	%r465, %r462, %r463, 28;
	mov.b64 	%rd756, {%r465, %r464};
	shf.l.wrap.b32 	%r466, %r462, %r463, 30;
	shf.l.wrap.b32 	%r467, %r463, %r462, 30;
	mov.b64 	%rd757, {%r467, %r466};
	xor.b64  	%rd758, %rd757, %rd756;
	shf.l.wrap.b32 	%r468, %r462, %r463, 25;
	shf.l.wrap.b32 	%r469, %r463, %r462, 25;
	mov.b64 	%rd759, {%r469, %r468};
	xor.b64  	%rd760, %rd758, %rd759;
	xor.b64  	%rd761, %rd742, %rd694;
	xor.b64  	%rd762, %rd742, %rd718;
	and.b64  	%rd763, %rd762, %rd761;
	xor.b64  	%rd764, %rd763, %rd742;
	add.s64 	%rd765, %rd754, %rd764;
	add.s64 	%rd766, %rd765, %rd760;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r470,%dummy}, %rd755;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r471}, %rd755;
	}
	shf.r.wrap.b32 	%r472, %r471, %r470, 14;
	shf.r.wrap.b32 	%r473, %r470, %r471, 14;
	mov.b64 	%rd767, {%r473, %r472};
	shf.r.wrap.b32 	%r474, %r471, %r470, 18;
	shf.r.wrap.b32 	%r475, %r470, %r471, 18;
	mov.b64 	%rd768, {%r475, %r474};
	xor.b64  	%rd769, %rd768, %rd767;
	shf.l.wrap.b32 	%r476, %r470, %r471, 23;
	shf.l.wrap.b32 	%r477, %r471, %r470, 23;
	mov.b64 	%rd770, {%r477, %r476};
	xor.b64  	%rd771, %rd769, %rd770;
	xor.b64  	%rd772, %rd731, %rd707;
	and.b64  	%rd773, %rd755, %rd772;
	xor.b64  	%rd774, %rd773, %rd707;
	add.s64 	%rd775, %rd683, %rd1574;
	add.s64 	%rd776, %rd775, %rd32;
	add.s64 	%rd777, %rd776, %rd774;
	add.s64 	%rd778, %rd777, %rd771;
	add.s64 	%rd779, %rd778, %rd694;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r478,%dummy}, %rd766;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r479}, %rd766;
	}
	shf.r.wrap.b32 	%r480, %r479, %r478, 28;
	shf.r.wrap.b32 	%r481, %r478, %r479, 28;
	mov.b64 	%rd780, {%r481, %r480};
	shf.l.wrap.b32 	%r482, %r478, %r479, 30;
	shf.l.wrap.b32 	%r483, %r479, %r478, 30;
	mov.b64 	%rd781, {%r483, %r482};
	xor.b64  	%rd782, %rd781, %rd780;
	shf.l.wrap.b32 	%r484, %r478, %r479, 25;
	shf.l.wrap.b32 	%r485, %r479, %r478, 25;
	mov.b64 	%rd783, {%r485, %r484};
	xor.b64  	%rd784, %rd782, %rd783;
	xor.b64  	%rd785, %rd766, %rd718;
	xor.b64  	%rd786, %rd766, %rd742;
	and.b64  	%rd787, %rd786, %rd785;
	xor.b64  	%rd788, %rd787, %rd766;
	add.s64 	%rd789, %rd778, %rd788;
	add.s64 	%rd790, %rd789, %rd784;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r486,%dummy}, %rd779;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r487}, %rd779;
	}
	shf.r.wrap.b32 	%r488, %r487, %r486, 14;
	shf.r.wrap.b32 	%r489, %r486, %r487, 14;
	mov.b64 	%rd791, {%r489, %r488};
	shf.r.wrap.b32 	%r490, %r487, %r486, 18;
	shf.r.wrap.b32 	%r491, %r486, %r487, 18;
	mov.b64 	%rd792, {%r491, %r490};
	xor.b64  	%rd793, %rd792, %rd791;
	shf.l.wrap.b32 	%r492, %r486, %r487, 23;
	shf.l.wrap.b32 	%r493, %r487, %r486, 23;
	mov.b64 	%rd794, {%r493, %r492};
	xor.b64  	%rd795, %rd793, %rd794;
	xor.b64  	%rd796, %rd755, %rd731;
	and.b64  	%rd797, %rd779, %rd796;
	xor.b64  	%rd798, %rd797, %rd731;
	add.s64 	%rd799, %rd707, %rd1573;
	add.s64 	%rd800, %rd799, %rd33;
	add.s64 	%rd801, %rd800, %rd798;
	add.s64 	%rd802, %rd801, %rd795;
	add.s64 	%rd803, %rd802, %rd718;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r494,%dummy}, %rd790;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r495}, %rd790;
	}
	shf.r.wrap.b32 	%r496, %r495, %r494, 28;
	shf.r.wrap.b32 	%r497, %r494, %r495, 28;
	mov.b64 	%rd804, {%r497, %r496};
	shf.l.wrap.b32 	%r498, %r494, %r495, 30;
	shf.l.wrap.b32 	%r499, %r495, %r494, 30;
	mov.b64 	%rd805, {%r499, %r498};
	xor.b64  	%rd806, %rd805, %rd804;
	shf.l.wrap.b32 	%r500, %r494, %r495, 25;
	shf.l.wrap.b32 	%r501, %r495, %r494, 25;
	mov.b64 	%rd807, {%r501, %r500};
	xor.b64  	%rd808, %rd806, %rd807;
	xor.b64  	%rd809, %rd790, %rd742;
	xor.b64  	%rd810, %rd790, %rd766;
	and.b64  	%rd811, %rd810, %rd809;
	xor.b64  	%rd812, %rd811, %rd790;
	add.s64 	%rd813, %rd802, %rd812;
	add.s64 	%rd814, %rd813, %rd808;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r502,%dummy}, %rd803;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r503}, %rd803;
	}
	shf.r.wrap.b32 	%r504, %r503, %r502, 14;
	shf.r.wrap.b32 	%r505, %r502, %r503, 14;
	mov.b64 	%rd815, {%r505, %r504};
	shf.r.wrap.b32 	%r506, %r503, %r502, 18;
	shf.r.wrap.b32 	%r507, %r502, %r503, 18;
	mov.b64 	%rd816, {%r507, %r506};
	xor.b64  	%rd817, %rd816, %rd815;
	shf.l.wrap.b32 	%r508, %r502, %r503, 23;
	shf.l.wrap.b32 	%r509, %r503, %r502, 23;
	mov.b64 	%rd818, {%r509, %r508};
	xor.b64  	%rd819, %rd817, %rd818;
	xor.b64  	%rd820, %rd779, %rd755;
	and.b64  	%rd821, %rd803, %rd820;
	xor.b64  	%rd822, %rd821, %rd755;
	add.s64 	%rd823, %rd731, %rd1572;
	add.s64 	%rd824, %rd823, %rd34;
	add.s64 	%rd825, %rd824, %rd822;
	add.s64 	%rd826, %rd825, %rd819;
	add.s64 	%rd827, %rd826, %rd742;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r510,%dummy}, %rd814;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r511}, %rd814;
	}
	shf.r.wrap.b32 	%r512, %r511, %r510, 28;
	shf.r.wrap.b32 	%r513, %r510, %r511, 28;
	mov.b64 	%rd828, {%r513, %r512};
	shf.l.wrap.b32 	%r514, %r510, %r511, 30;
	shf.l.wrap.b32 	%r515, %r511, %r510, 30;
	mov.b64 	%rd829, {%r515, %r514};
	xor.b64  	%rd830, %rd829, %rd828;
	shf.l.wrap.b32 	%r516, %r510, %r511, 25;
	shf.l.wrap.b32 	%r517, %r511, %r510, 25;
	mov.b64 	%rd831, {%r517, %r516};
	xor.b64  	%rd832, %rd830, %rd831;
	xor.b64  	%rd833, %rd814, %rd766;
	xor.b64  	%rd834, %rd814, %rd790;
	and.b64  	%rd835, %rd834, %rd833;
	xor.b64  	%rd836, %rd835, %rd814;
	add.s64 	%rd837, %rd826, %rd836;
	add.s64 	%rd838, %rd837, %rd832;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r518,%dummy}, %rd827;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r519}, %rd827;
	}
	shf.r.wrap.b32 	%r520, %r519, %r518, 14;
	shf.r.wrap.b32 	%r521, %r518, %r519, 14;
	mov.b64 	%rd839, {%r521, %r520};
	shf.r.wrap.b32 	%r522, %r519, %r518, 18;
	shf.r.wrap.b32 	%r523, %r518, %r519, 18;
	mov.b64 	%rd840, {%r523, %r522};
	xor.b64  	%rd841, %rd840, %rd839;
	shf.l.wrap.b32 	%r524, %r518, %r519, 23;
	shf.l.wrap.b32 	%r525, %r519, %r518, 23;
	mov.b64 	%rd842, {%r525, %r524};
	xor.b64  	%rd843, %rd841, %rd842;
	xor.b64  	%rd844, %rd803, %rd779;
	and.b64  	%rd845, %rd827, %rd844;
	xor.b64  	%rd846, %rd845, %rd779;
	add.s64 	%rd847, %rd755, %rd1571;
	add.s64 	%rd848, %rd847, %rd35;
	add.s64 	%rd849, %rd848, %rd846;
	add.s64 	%rd850, %rd849, %rd843;
	add.s64 	%rd851, %rd850, %rd766;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r526,%dummy}, %rd838;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r527}, %rd838;
	}
	shf.r.wrap.b32 	%r528, %r527, %r526, 28;
	shf.r.wrap.b32 	%r529, %r526, %r527, 28;
	mov.b64 	%rd852, {%r529, %r528};
	shf.l.wrap.b32 	%r530, %r526, %r527, 30;
	shf.l.wrap.b32 	%r531, %r527, %r526, 30;
	mov.b64 	%rd853, {%r531, %r530};
	xor.b64  	%rd854, %rd853, %rd852;
	shf.l.wrap.b32 	%r532, %r526, %r527, 25;
	shf.l.wrap.b32 	%r533, %r527, %r526, 25;
	mov.b64 	%rd855, {%r533, %r532};
	xor.b64  	%rd856, %rd854, %rd855;
	xor.b64  	%rd857, %rd838, %rd790;
	xor.b64  	%rd858, %rd838, %rd814;
	and.b64  	%rd859, %rd858, %rd857;
	xor.b64  	%rd860, %rd859, %rd838;
	add.s64 	%rd861, %rd850, %rd860;
	add.s64 	%rd862, %rd861, %rd856;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r534,%dummy}, %rd851;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r535}, %rd851;
	}
	shf.r.wrap.b32 	%r536, %r535, %r534, 14;
	shf.r.wrap.b32 	%r537, %r534, %r535, 14;
	mov.b64 	%rd863, {%r537, %r536};
	shf.r.wrap.b32 	%r538, %r535, %r534, 18;
	shf.r.wrap.b32 	%r539, %r534, %r535, 18;
	mov.b64 	%rd864, {%r539, %r538};
	xor.b64  	%rd865, %rd864, %rd863;
	shf.l.wrap.b32 	%r540, %r534, %r535, 23;
	shf.l.wrap.b32 	%r541, %r535, %r534, 23;
	mov.b64 	%rd866, {%r541, %r540};
	xor.b64  	%rd867, %rd865, %rd866;
	xor.b64  	%rd868, %rd827, %rd803;
	and.b64  	%rd869, %rd851, %rd868;
	xor.b64  	%rd870, %rd869, %rd803;
	add.s64 	%rd871, %rd779, %rd1570;
	add.s64 	%rd872, %rd871, %rd36;
	add.s64 	%rd873, %rd872, %rd870;
	add.s64 	%rd874, %rd873, %rd867;
	add.s64 	%rd1582, %rd874, %rd790;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r542,%dummy}, %rd862;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r543}, %rd862;
	}
	shf.r.wrap.b32 	%r544, %r543, %r542, 28;
	shf.r.wrap.b32 	%r545, %r542, %r543, 28;
	mov.b64 	%rd875, {%r545, %r544};
	shf.l.wrap.b32 	%r546, %r542, %r543, 30;
	shf.l.wrap.b32 	%r547, %r543, %r542, 30;
	mov.b64 	%rd876, {%r547, %r546};
	xor.b64  	%rd877, %rd876, %rd875;
	shf.l.wrap.b32 	%r548, %r542, %r543, 25;
	shf.l.wrap.b32 	%r549, %r543, %r542, 25;
	mov.b64 	%rd878, {%r549, %r548};
	xor.b64  	%rd879, %rd877, %rd878;
	xor.b64  	%rd880, %rd862, %rd814;
	xor.b64  	%rd881, %rd862, %rd838;
	and.b64  	%rd882, %rd881, %rd880;
	xor.b64  	%rd883, %rd882, %rd862;
	add.s64 	%rd884, %rd874, %rd883;
	add.s64 	%rd1578, %rd884, %rd879;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r550,%dummy}, %rd1582;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r551}, %rd1582;
	}
	shf.r.wrap.b32 	%r552, %r551, %r550, 14;
	shf.r.wrap.b32 	%r553, %r550, %r551, 14;
	mov.b64 	%rd885, {%r553, %r552};
	shf.r.wrap.b32 	%r554, %r551, %r550, 18;
	shf.r.wrap.b32 	%r555, %r550, %r551, 18;
	mov.b64 	%rd886, {%r555, %r554};
	xor.b64  	%rd887, %rd886, %rd885;
	shf.l.wrap.b32 	%r556, %r550, %r551, 23;
	shf.l.wrap.b32 	%r557, %r551, %r550, 23;
	mov.b64 	%rd888, {%r557, %r556};
	xor.b64  	%rd889, %rd887, %rd888;
	xor.b64  	%rd890, %rd851, %rd827;
	and.b64  	%rd891, %rd1582, %rd890;
	xor.b64  	%rd892, %rd891, %rd827;
	add.s64 	%rd893, %rd803, %rd1569;
	add.s64 	%rd894, %rd893, %rd37;
	add.s64 	%rd895, %rd894, %rd892;
	add.s64 	%rd896, %rd895, %rd889;
	add.s64 	%rd1581, %rd896, %rd814;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r558,%dummy}, %rd1578;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r559}, %rd1578;
	}
	shf.r.wrap.b32 	%r560, %r559, %r558, 28;
	shf.r.wrap.b32 	%r561, %r558, %r559, 28;
	mov.b64 	%rd897, {%r561, %r560};
	shf.l.wrap.b32 	%r562, %r558, %r559, 30;
	shf.l.wrap.b32 	%r563, %r559, %r558, 30;
	mov.b64 	%rd898, {%r563, %r562};
	xor.b64  	%rd899, %rd898, %rd897;
	shf.l.wrap.b32 	%r564, %r558, %r559, 25;
	shf.l.wrap.b32 	%r565, %r559, %r558, 25;
	mov.b64 	%rd900, {%r565, %r564};
	xor.b64  	%rd901, %rd899, %rd900;
	xor.b64  	%rd902, %rd1578, %rd838;
	xor.b64  	%rd903, %rd1578, %rd862;
	and.b64  	%rd904, %rd903, %rd902;
	xor.b64  	%rd905, %rd904, %rd1578;
	add.s64 	%rd906, %rd896, %rd905;
	add.s64 	%rd1577, %rd906, %rd901;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r566,%dummy}, %rd1581;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r567}, %rd1581;
	}
	shf.r.wrap.b32 	%r568, %r567, %r566, 14;
	shf.r.wrap.b32 	%r569, %r566, %r567, 14;
	mov.b64 	%rd907, {%r569, %r568};
	shf.r.wrap.b32 	%r570, %r567, %r566, 18;
	shf.r.wrap.b32 	%r571, %r566, %r567, 18;
	mov.b64 	%rd908, {%r571, %r570};
	xor.b64  	%rd909, %rd908, %rd907;
	shf.l.wrap.b32 	%r572, %r566, %r567, 23;
	shf.l.wrap.b32 	%r573, %r567, %r566, 23;
	mov.b64 	%rd910, {%r573, %r572};
	xor.b64  	%rd911, %rd909, %rd910;
	xor.b64  	%rd912, %rd1582, %rd851;
	and.b64  	%rd913, %rd1581, %rd912;
	xor.b64  	%rd914, %rd913, %rd851;
	add.s64 	%rd915, %rd827, %rd1568;
	add.s64 	%rd916, %rd915, %rd38;
	add.s64 	%rd917, %rd916, %rd914;
	add.s64 	%rd918, %rd917, %rd911;
	add.s64 	%rd1580, %rd918, %rd838;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r574,%dummy}, %rd1577;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r575}, %rd1577;
	}
	shf.r.wrap.b32 	%r576, %r575, %r574, 28;
	shf.r.wrap.b32 	%r577, %r574, %r575, 28;
	mov.b64 	%rd919, {%r577, %r576};
	shf.l.wrap.b32 	%r578, %r574, %r575, 30;
	shf.l.wrap.b32 	%r579, %r575, %r574, 30;
	mov.b64 	%rd920, {%r579, %r578};
	xor.b64  	%rd921, %rd920, %rd919;
	shf.l.wrap.b32 	%r580, %r574, %r575, 25;
	shf.l.wrap.b32 	%r581, %r575, %r574, 25;
	mov.b64 	%rd922, {%r581, %r580};
	xor.b64  	%rd923, %rd921, %rd922;
	xor.b64  	%rd924, %rd1577, %rd862;
	xor.b64  	%rd925, %rd1577, %rd1578;
	and.b64  	%rd926, %rd925, %rd924;
	xor.b64  	%rd927, %rd926, %rd1577;
	add.s64 	%rd928, %rd918, %rd927;
	add.s64 	%rd1576, %rd928, %rd923;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r582,%dummy}, %rd1580;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r583}, %rd1580;
	}
	shf.r.wrap.b32 	%r584, %r583, %r582, 14;
	shf.r.wrap.b32 	%r585, %r582, %r583, 14;
	mov.b64 	%rd929, {%r585, %r584};
	shf.r.wrap.b32 	%r586, %r583, %r582, 18;
	shf.r.wrap.b32 	%r587, %r582, %r583, 18;
	mov.b64 	%rd930, {%r587, %r586};
	xor.b64  	%rd931, %rd930, %rd929;
	shf.l.wrap.b32 	%r588, %r582, %r583, 23;
	shf.l.wrap.b32 	%r589, %r583, %r582, 23;
	mov.b64 	%rd932, {%r589, %r588};
	xor.b64  	%rd933, %rd931, %rd932;
	xor.b64  	%rd934, %rd1581, %rd1582;
	and.b64  	%rd935, %rd1580, %rd934;
	xor.b64  	%rd936, %rd935, %rd1582;
	add.s64 	%rd937, %rd851, %rd1567;
	add.s64 	%rd938, %rd937, %rd39;
	add.s64 	%rd939, %rd938, %rd936;
	add.s64 	%rd940, %rd939, %rd933;
	add.s64 	%rd1579, %rd940, %rd862;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r590,%dummy}, %rd1576;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r591}, %rd1576;
	}
	shf.r.wrap.b32 	%r592, %r591, %r590, 28;
	shf.r.wrap.b32 	%r593, %r590, %r591, 28;
	mov.b64 	%rd941, {%r593, %r592};
	shf.l.wrap.b32 	%r594, %r590, %r591, 30;
	shf.l.wrap.b32 	%r595, %r591, %r590, 30;
	mov.b64 	%rd942, {%r595, %r594};
	xor.b64  	%rd943, %rd942, %rd941;
	shf.l.wrap.b32 	%r596, %r590, %r591, 25;
	shf.l.wrap.b32 	%r597, %r591, %r590, 25;
	mov.b64 	%rd944, {%r597, %r596};
	xor.b64  	%rd945, %rd943, %rd944;
	xor.b64  	%rd946, %rd1576, %rd1578;
	xor.b64  	%rd947, %rd1576, %rd1577;
	and.b64  	%rd948, %rd947, %rd946;
	xor.b64  	%rd949, %rd948, %rd1576;
	add.s64 	%rd950, %rd940, %rd949;
	add.s64 	%rd1575, %rd950, %rd945;
	mov.u32 	%r1081, 16;
	mov.u64 	%rd1566, k_sha512;

BB4_55:
	shr.u64 	%rd951, %rd1568, 6;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r598,%dummy}, %rd1568;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r599}, %rd1568;
	}
	shf.r.wrap.b32 	%r600, %r599, %r598, 19;
	shf.r.wrap.b32 	%r601, %r598, %r599, 19;
	mov.b64 	%rd952, {%r601, %r600};
	xor.b64  	%rd953, %rd952, %rd951;
	shf.l.wrap.b32 	%r602, %r598, %r599, 3;
	shf.l.wrap.b32 	%r603, %r599, %r598, 3;
	mov.b64 	%rd954, {%r603, %r602};
	xor.b64  	%rd955, %rd953, %rd954;
	shr.u64 	%rd956, %rd1584, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r604,%dummy}, %rd1584;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r605}, %rd1584;
	}
	shf.r.wrap.b32 	%r606, %r605, %r604, 1;
	shf.r.wrap.b32 	%r607, %r604, %r605, 1;
	mov.b64 	%rd957, {%r607, %r606};
	xor.b64  	%rd958, %rd957, %rd956;
	shf.r.wrap.b32 	%r608, %r605, %r604, 8;
	shf.r.wrap.b32 	%r609, %r604, %r605, 8;
	mov.b64 	%rd959, {%r609, %r608};
	xor.b64  	%rd960, %rd958, %rd959;
	add.s64 	%rd961, %rd1573, %rd1583;
	add.s64 	%rd962, %rd961, %rd955;
	add.s64 	%rd1583, %rd962, %rd960;
	shr.u64 	%rd963, %rd1567, 6;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r610,%dummy}, %rd1567;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r611}, %rd1567;
	}
	shf.r.wrap.b32 	%r612, %r611, %r610, 19;
	shf.r.wrap.b32 	%r613, %r610, %r611, 19;
	mov.b64 	%rd964, {%r613, %r612};
	xor.b64  	%rd965, %rd964, %rd963;
	shf.l.wrap.b32 	%r614, %r610, %r611, 3;
	shf.l.wrap.b32 	%r615, %r611, %r610, 3;
	mov.b64 	%rd966, {%r615, %r614};
	xor.b64  	%rd967, %rd965, %rd966;
	shr.u64 	%rd968, %rd1585, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r616,%dummy}, %rd1585;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r617}, %rd1585;
	}
	shf.r.wrap.b32 	%r618, %r617, %r616, 1;
	shf.r.wrap.b32 	%r619, %r616, %r617, 1;
	mov.b64 	%rd969, {%r619, %r618};
	xor.b64  	%rd970, %rd969, %rd968;
	shf.r.wrap.b32 	%r620, %r617, %r616, 8;
	shf.r.wrap.b32 	%r621, %r616, %r617, 8;
	mov.b64 	%rd971, {%r621, %r620};
	xor.b64  	%rd972, %rd970, %rd971;
	add.s64 	%rd973, %rd1572, %rd1584;
	add.s64 	%rd974, %rd973, %rd967;
	add.s64 	%rd1584, %rd974, %rd972;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r622,%dummy}, %rd1583;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r623}, %rd1583;
	}
	shf.r.wrap.b32 	%r624, %r623, %r622, 19;
	shf.r.wrap.b32 	%r625, %r622, %r623, 19;
	mov.b64 	%rd975, {%r625, %r624};
	shf.l.wrap.b32 	%r626, %r622, %r623, 3;
	shf.l.wrap.b32 	%r627, %r623, %r622, 3;
	mov.b64 	%rd976, {%r627, %r626};
	shr.u64 	%rd977, %rd1583, 6;
	xor.b64  	%rd978, %rd975, %rd977;
	xor.b64  	%rd979, %rd978, %rd976;
	shr.u64 	%rd980, %rd1586, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r628,%dummy}, %rd1586;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r629}, %rd1586;
	}
	shf.r.wrap.b32 	%r630, %r629, %r628, 1;
	shf.r.wrap.b32 	%r631, %r628, %r629, 1;
	mov.b64 	%rd981, {%r631, %r630};
	xor.b64  	%rd982, %rd981, %rd980;
	shf.r.wrap.b32 	%r632, %r629, %r628, 8;
	shf.r.wrap.b32 	%r633, %r628, %r629, 8;
	mov.b64 	%rd983, {%r633, %r632};
	xor.b64  	%rd984, %rd982, %rd983;
	add.s64 	%rd985, %rd1571, %rd1585;
	add.s64 	%rd986, %rd985, %rd979;
	add.s64 	%rd1585, %rd986, %rd984;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r634,%dummy}, %rd1584;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r635}, %rd1584;
	}
	shf.r.wrap.b32 	%r636, %r635, %r634, 19;
	shf.r.wrap.b32 	%r637, %r634, %r635, 19;
	mov.b64 	%rd987, {%r637, %r636};
	shf.l.wrap.b32 	%r638, %r634, %r635, 3;
	shf.l.wrap.b32 	%r639, %r635, %r634, 3;
	mov.b64 	%rd988, {%r639, %r638};
	shr.u64 	%rd989, %rd1584, 6;
	xor.b64  	%rd990, %rd987, %rd989;
	xor.b64  	%rd991, %rd990, %rd988;
	shr.u64 	%rd992, %rd1587, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r640,%dummy}, %rd1587;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r641}, %rd1587;
	}
	shf.r.wrap.b32 	%r642, %r641, %r640, 1;
	shf.r.wrap.b32 	%r643, %r640, %r641, 1;
	mov.b64 	%rd993, {%r643, %r642};
	xor.b64  	%rd994, %rd993, %rd992;
	shf.r.wrap.b32 	%r644, %r641, %r640, 8;
	shf.r.wrap.b32 	%r645, %r640, %r641, 8;
	mov.b64 	%rd995, {%r645, %r644};
	xor.b64  	%rd996, %rd994, %rd995;
	add.s64 	%rd997, %rd1570, %rd1586;
	add.s64 	%rd998, %rd997, %rd991;
	add.s64 	%rd1586, %rd998, %rd996;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r646,%dummy}, %rd1585;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r647}, %rd1585;
	}
	shf.r.wrap.b32 	%r648, %r647, %r646, 19;
	shf.r.wrap.b32 	%r649, %r646, %r647, 19;
	mov.b64 	%rd999, {%r649, %r648};
	shf.l.wrap.b32 	%r650, %r646, %r647, 3;
	shf.l.wrap.b32 	%r651, %r647, %r646, 3;
	mov.b64 	%rd1000, {%r651, %r650};
	shr.u64 	%rd1001, %rd1585, 6;
	xor.b64  	%rd1002, %rd999, %rd1001;
	xor.b64  	%rd1003, %rd1002, %rd1000;
	shr.u64 	%rd1004, %rd1588, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r652,%dummy}, %rd1588;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r653}, %rd1588;
	}
	shf.r.wrap.b32 	%r654, %r653, %r652, 1;
	shf.r.wrap.b32 	%r655, %r652, %r653, 1;
	mov.b64 	%rd1005, {%r655, %r654};
	xor.b64  	%rd1006, %rd1005, %rd1004;
	shf.r.wrap.b32 	%r656, %r653, %r652, 8;
	shf.r.wrap.b32 	%r657, %r652, %r653, 8;
	mov.b64 	%rd1007, {%r657, %r656};
	xor.b64  	%rd1008, %rd1006, %rd1007;
	add.s64 	%rd1009, %rd1569, %rd1587;
	add.s64 	%rd1010, %rd1009, %rd1003;
	add.s64 	%rd1587, %rd1010, %rd1008;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r658,%dummy}, %rd1586;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r659}, %rd1586;
	}
	shf.r.wrap.b32 	%r660, %r659, %r658, 19;
	shf.r.wrap.b32 	%r661, %r658, %r659, 19;
	mov.b64 	%rd1011, {%r661, %r660};
	shf.l.wrap.b32 	%r662, %r658, %r659, 3;
	shf.l.wrap.b32 	%r663, %r659, %r658, 3;
	mov.b64 	%rd1012, {%r663, %r662};
	shr.u64 	%rd1013, %rd1586, 6;
	xor.b64  	%rd1014, %rd1011, %rd1013;
	xor.b64  	%rd1015, %rd1014, %rd1012;
	shr.u64 	%rd1016, %rd1589, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r664,%dummy}, %rd1589;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r665}, %rd1589;
	}
	shf.r.wrap.b32 	%r666, %r665, %r664, 1;
	shf.r.wrap.b32 	%r667, %r664, %r665, 1;
	mov.b64 	%rd1017, {%r667, %r666};
	xor.b64  	%rd1018, %rd1017, %rd1016;
	shf.r.wrap.b32 	%r668, %r665, %r664, 8;
	shf.r.wrap.b32 	%r669, %r664, %r665, 8;
	mov.b64 	%rd1019, {%r669, %r668};
	xor.b64  	%rd1020, %rd1018, %rd1019;
	add.s64 	%rd1021, %rd1568, %rd1588;
	add.s64 	%rd1022, %rd1021, %rd1015;
	add.s64 	%rd1588, %rd1022, %rd1020;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r670,%dummy}, %rd1587;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r671}, %rd1587;
	}
	shf.r.wrap.b32 	%r672, %r671, %r670, 19;
	shf.r.wrap.b32 	%r673, %r670, %r671, 19;
	mov.b64 	%rd1023, {%r673, %r672};
	shf.l.wrap.b32 	%r674, %r670, %r671, 3;
	shf.l.wrap.b32 	%r675, %r671, %r670, 3;
	mov.b64 	%rd1024, {%r675, %r674};
	shr.u64 	%rd1025, %rd1587, 6;
	xor.b64  	%rd1026, %rd1023, %rd1025;
	xor.b64  	%rd1027, %rd1026, %rd1024;
	shr.u64 	%rd1028, %rd1590, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r676,%dummy}, %rd1590;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r677}, %rd1590;
	}
	shf.r.wrap.b32 	%r678, %r677, %r676, 1;
	shf.r.wrap.b32 	%r679, %r676, %r677, 1;
	mov.b64 	%rd1029, {%r679, %r678};
	xor.b64  	%rd1030, %rd1029, %rd1028;
	shf.r.wrap.b32 	%r680, %r677, %r676, 8;
	shf.r.wrap.b32 	%r681, %r676, %r677, 8;
	mov.b64 	%rd1031, {%r681, %r680};
	xor.b64  	%rd1032, %rd1030, %rd1031;
	add.s64 	%rd1033, %rd1567, %rd1589;
	add.s64 	%rd1034, %rd1033, %rd1027;
	add.s64 	%rd1589, %rd1034, %rd1032;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r682,%dummy}, %rd1588;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r683}, %rd1588;
	}
	shf.r.wrap.b32 	%r684, %r683, %r682, 19;
	shf.r.wrap.b32 	%r685, %r682, %r683, 19;
	mov.b64 	%rd1035, {%r685, %r684};
	shf.l.wrap.b32 	%r686, %r682, %r683, 3;
	shf.l.wrap.b32 	%r687, %r683, %r682, 3;
	mov.b64 	%rd1036, {%r687, %r686};
	shr.u64 	%rd1037, %rd1588, 6;
	xor.b64  	%rd1038, %rd1035, %rd1037;
	xor.b64  	%rd1039, %rd1038, %rd1036;
	shr.u64 	%rd1040, %rd1574, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r688,%dummy}, %rd1574;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r689}, %rd1574;
	}
	shf.r.wrap.b32 	%r690, %r689, %r688, 1;
	shf.r.wrap.b32 	%r691, %r688, %r689, 1;
	mov.b64 	%rd1041, {%r691, %r690};
	xor.b64  	%rd1042, %rd1041, %rd1040;
	shf.r.wrap.b32 	%r692, %r689, %r688, 8;
	shf.r.wrap.b32 	%r693, %r688, %r689, 8;
	mov.b64 	%rd1043, {%r693, %r692};
	xor.b64  	%rd1044, %rd1042, %rd1043;
	add.s64 	%rd1045, %rd1583, %rd1590;
	add.s64 	%rd1046, %rd1045, %rd1039;
	add.s64 	%rd1590, %rd1046, %rd1044;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r694,%dummy}, %rd1589;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r695}, %rd1589;
	}
	shf.r.wrap.b32 	%r696, %r695, %r694, 19;
	shf.r.wrap.b32 	%r697, %r694, %r695, 19;
	mov.b64 	%rd1047, {%r697, %r696};
	shf.l.wrap.b32 	%r698, %r694, %r695, 3;
	shf.l.wrap.b32 	%r699, %r695, %r694, 3;
	mov.b64 	%rd1048, {%r699, %r698};
	shr.u64 	%rd1049, %rd1589, 6;
	xor.b64  	%rd1050, %rd1047, %rd1049;
	xor.b64  	%rd1051, %rd1050, %rd1048;
	shr.u64 	%rd1052, %rd1573, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r700,%dummy}, %rd1573;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r701}, %rd1573;
	}
	shf.r.wrap.b32 	%r702, %r701, %r700, 1;
	shf.r.wrap.b32 	%r703, %r700, %r701, 1;
	mov.b64 	%rd1053, {%r703, %r702};
	xor.b64  	%rd1054, %rd1053, %rd1052;
	shf.r.wrap.b32 	%r704, %r701, %r700, 8;
	shf.r.wrap.b32 	%r705, %r700, %r701, 8;
	mov.b64 	%rd1055, {%r705, %r704};
	xor.b64  	%rd1056, %rd1054, %rd1055;
	add.s64 	%rd1057, %rd1584, %rd1574;
	add.s64 	%rd1058, %rd1057, %rd1051;
	add.s64 	%rd1574, %rd1058, %rd1056;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r706,%dummy}, %rd1590;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r707}, %rd1590;
	}
	shf.r.wrap.b32 	%r708, %r707, %r706, 19;
	shf.r.wrap.b32 	%r709, %r706, %r707, 19;
	mov.b64 	%rd1059, {%r709, %r708};
	shf.l.wrap.b32 	%r710, %r706, %r707, 3;
	shf.l.wrap.b32 	%r711, %r707, %r706, 3;
	mov.b64 	%rd1060, {%r711, %r710};
	shr.u64 	%rd1061, %rd1590, 6;
	xor.b64  	%rd1062, %rd1059, %rd1061;
	xor.b64  	%rd1063, %rd1062, %rd1060;
	shr.u64 	%rd1064, %rd1572, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r712,%dummy}, %rd1572;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r713}, %rd1572;
	}
	shf.r.wrap.b32 	%r714, %r713, %r712, 1;
	shf.r.wrap.b32 	%r715, %r712, %r713, 1;
	mov.b64 	%rd1065, {%r715, %r714};
	xor.b64  	%rd1066, %rd1065, %rd1064;
	shf.r.wrap.b32 	%r716, %r713, %r712, 8;
	shf.r.wrap.b32 	%r717, %r712, %r713, 8;
	mov.b64 	%rd1067, {%r717, %r716};
	xor.b64  	%rd1068, %rd1066, %rd1067;
	add.s64 	%rd1069, %rd1585, %rd1573;
	add.s64 	%rd1070, %rd1069, %rd1063;
	add.s64 	%rd1573, %rd1070, %rd1068;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r718,%dummy}, %rd1574;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r719}, %rd1574;
	}
	shf.r.wrap.b32 	%r720, %r719, %r718, 19;
	shf.r.wrap.b32 	%r721, %r718, %r719, 19;
	mov.b64 	%rd1071, {%r721, %r720};
	shf.l.wrap.b32 	%r722, %r718, %r719, 3;
	shf.l.wrap.b32 	%r723, %r719, %r718, 3;
	mov.b64 	%rd1072, {%r723, %r722};
	shr.u64 	%rd1073, %rd1574, 6;
	xor.b64  	%rd1074, %rd1071, %rd1073;
	xor.b64  	%rd1075, %rd1074, %rd1072;
	shr.u64 	%rd1076, %rd1571, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r724,%dummy}, %rd1571;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r725}, %rd1571;
	}
	shf.r.wrap.b32 	%r726, %r725, %r724, 1;
	shf.r.wrap.b32 	%r727, %r724, %r725, 1;
	mov.b64 	%rd1077, {%r727, %r726};
	xor.b64  	%rd1078, %rd1077, %rd1076;
	shf.r.wrap.b32 	%r728, %r725, %r724, 8;
	shf.r.wrap.b32 	%r729, %r724, %r725, 8;
	mov.b64 	%rd1079, {%r729, %r728};
	xor.b64  	%rd1080, %rd1078, %rd1079;
	add.s64 	%rd1081, %rd1586, %rd1572;
	add.s64 	%rd1082, %rd1081, %rd1075;
	add.s64 	%rd1572, %rd1082, %rd1080;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r730,%dummy}, %rd1573;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r731}, %rd1573;
	}
	shf.r.wrap.b32 	%r732, %r731, %r730, 19;
	shf.r.wrap.b32 	%r733, %r730, %r731, 19;
	mov.b64 	%rd1083, {%r733, %r732};
	shf.l.wrap.b32 	%r734, %r730, %r731, 3;
	shf.l.wrap.b32 	%r735, %r731, %r730, 3;
	mov.b64 	%rd1084, {%r735, %r734};
	shr.u64 	%rd1085, %rd1573, 6;
	xor.b64  	%rd1086, %rd1083, %rd1085;
	xor.b64  	%rd1087, %rd1086, %rd1084;
	shr.u64 	%rd1088, %rd1570, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r736,%dummy}, %rd1570;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r737}, %rd1570;
	}
	shf.r.wrap.b32 	%r738, %r737, %r736, 1;
	shf.r.wrap.b32 	%r739, %r736, %r737, 1;
	mov.b64 	%rd1089, {%r739, %r738};
	xor.b64  	%rd1090, %rd1089, %rd1088;
	shf.r.wrap.b32 	%r740, %r737, %r736, 8;
	shf.r.wrap.b32 	%r741, %r736, %r737, 8;
	mov.b64 	%rd1091, {%r741, %r740};
	xor.b64  	%rd1092, %rd1090, %rd1091;
	add.s64 	%rd1093, %rd1587, %rd1571;
	add.s64 	%rd1094, %rd1093, %rd1087;
	add.s64 	%rd1571, %rd1094, %rd1092;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r742,%dummy}, %rd1572;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r743}, %rd1572;
	}
	shf.r.wrap.b32 	%r744, %r743, %r742, 19;
	shf.r.wrap.b32 	%r745, %r742, %r743, 19;
	mov.b64 	%rd1095, {%r745, %r744};
	shf.l.wrap.b32 	%r746, %r742, %r743, 3;
	shf.l.wrap.b32 	%r747, %r743, %r742, 3;
	mov.b64 	%rd1096, {%r747, %r746};
	shr.u64 	%rd1097, %rd1572, 6;
	xor.b64  	%rd1098, %rd1095, %rd1097;
	xor.b64  	%rd1099, %rd1098, %rd1096;
	shr.u64 	%rd1100, %rd1569, 7;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r748,%dummy}, %rd1569;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r749}, %rd1569;
	}
	shf.r.wrap.b32 	%r750, %r749, %r748, 1;
	shf.r.wrap.b32 	%r751, %r748, %r749, 1;
	mov.b64 	%rd1101, {%r751, %r750};
	xor.b64  	%rd1102, %rd1101, %rd1100;
	shf.r.wrap.b32 	%r752, %r749, %r748, 8;
	shf.r.wrap.b32 	%r753, %r748, %r749, 8;
	mov.b64 	%rd1103, {%r753, %r752};
	xor.b64  	%rd1104, %rd1102, %rd1103;
	add.s64 	%rd1105, %rd1588, %rd1570;
	add.s64 	%rd1106, %rd1105, %rd1099;
	add.s64 	%rd1570, %rd1106, %rd1104;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r754,%dummy}, %rd1571;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r755}, %rd1571;
	}
	shf.r.wrap.b32 	%r756, %r755, %r754, 19;
	shf.r.wrap.b32 	%r757, %r754, %r755, 19;
	mov.b64 	%rd1107, {%r757, %r756};
	shf.l.wrap.b32 	%r758, %r754, %r755, 3;
	shf.l.wrap.b32 	%r759, %r755, %r754, 3;
	mov.b64 	%rd1108, {%r759, %r758};
	shr.u64 	%rd1109, %rd1571, 6;
	xor.b64  	%rd1110, %rd1107, %rd1109;
	xor.b64  	%rd1111, %rd1110, %rd1108;
	shr.u64 	%rd1112, %rd1568, 7;
	shf.r.wrap.b32 	%r760, %r599, %r598, 1;
	shf.r.wrap.b32 	%r761, %r598, %r599, 1;
	mov.b64 	%rd1113, {%r761, %r760};
	xor.b64  	%rd1114, %rd1113, %rd1112;
	shf.r.wrap.b32 	%r762, %r599, %r598, 8;
	shf.r.wrap.b32 	%r763, %r598, %r599, 8;
	mov.b64 	%rd1115, {%r763, %r762};
	xor.b64  	%rd1116, %rd1114, %rd1115;
	add.s64 	%rd1117, %rd1589, %rd1569;
	add.s64 	%rd1118, %rd1117, %rd1111;
	add.s64 	%rd1569, %rd1118, %rd1116;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r764,%dummy}, %rd1570;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r765}, %rd1570;
	}
	shf.r.wrap.b32 	%r766, %r765, %r764, 19;
	shf.r.wrap.b32 	%r767, %r764, %r765, 19;
	mov.b64 	%rd1119, {%r767, %r766};
	shf.l.wrap.b32 	%r768, %r764, %r765, 3;
	shf.l.wrap.b32 	%r769, %r765, %r764, 3;
	mov.b64 	%rd1120, {%r769, %r768};
	shr.u64 	%rd1121, %rd1570, 6;
	xor.b64  	%rd1122, %rd1119, %rd1121;
	xor.b64  	%rd1123, %rd1122, %rd1120;
	shr.u64 	%rd1124, %rd1567, 7;
	shf.r.wrap.b32 	%r770, %r611, %r610, 1;
	shf.r.wrap.b32 	%r771, %r610, %r611, 1;
	mov.b64 	%rd1125, {%r771, %r770};
	xor.b64  	%rd1126, %rd1125, %rd1124;
	shf.r.wrap.b32 	%r772, %r611, %r610, 8;
	shf.r.wrap.b32 	%r773, %r610, %r611, 8;
	mov.b64 	%rd1127, {%r773, %r772};
	xor.b64  	%rd1128, %rd1126, %rd1127;
	add.s64 	%rd1129, %rd1590, %rd1568;
	add.s64 	%rd1130, %rd1129, %rd1123;
	add.s64 	%rd1568, %rd1130, %rd1128;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r774,%dummy}, %rd1569;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r775}, %rd1569;
	}
	shf.r.wrap.b32 	%r776, %r775, %r774, 19;
	shf.r.wrap.b32 	%r777, %r774, %r775, 19;
	mov.b64 	%rd1131, {%r777, %r776};
	shf.l.wrap.b32 	%r778, %r774, %r775, 3;
	shf.l.wrap.b32 	%r779, %r775, %r774, 3;
	mov.b64 	%rd1132, {%r779, %r778};
	shr.u64 	%rd1133, %rd1569, 6;
	xor.b64  	%rd1134, %rd1131, %rd1133;
	xor.b64  	%rd1135, %rd1134, %rd1132;
	shf.r.wrap.b32 	%r780, %r623, %r622, 1;
	shf.r.wrap.b32 	%r781, %r622, %r623, 1;
	mov.b64 	%rd1136, {%r781, %r780};
	shf.r.wrap.b32 	%r782, %r623, %r622, 8;
	shf.r.wrap.b32 	%r783, %r622, %r623, 8;
	mov.b64 	%rd1137, {%r783, %r782};
	shr.u64 	%rd1138, %rd1583, 7;
	xor.b64  	%rd1139, %rd1136, %rd1138;
	xor.b64  	%rd1140, %rd1139, %rd1137;
	add.s64 	%rd1141, %rd1574, %rd1567;
	add.s64 	%rd1142, %rd1141, %rd1135;
	add.s64 	%rd1567, %rd1142, %rd1140;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r784,%dummy}, %rd1579;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r785}, %rd1579;
	}
	shf.r.wrap.b32 	%r786, %r785, %r784, 18;
	shf.r.wrap.b32 	%r787, %r784, %r785, 18;
	mov.b64 	%rd1143, {%r787, %r786};
	shf.r.wrap.b32 	%r788, %r785, %r784, 14;
	shf.r.wrap.b32 	%r789, %r784, %r785, 14;
	mov.b64 	%rd1144, {%r789, %r788};
	xor.b64  	%rd1145, %rd1143, %rd1144;
	shf.l.wrap.b32 	%r790, %r784, %r785, 23;
	shf.l.wrap.b32 	%r791, %r785, %r784, 23;
	mov.b64 	%rd1146, {%r791, %r790};
	xor.b64  	%rd1147, %rd1145, %rd1146;
	xor.b64  	%rd1148, %rd1580, %rd1581;
	and.b64  	%rd1149, %rd1148, %rd1579;
	xor.b64  	%rd1150, %rd1149, %rd1581;
	add.s64 	%rd1151, %rd1150, %rd1582;
	add.s64 	%rd1152, %rd1151, %rd1583;
	add.s64 	%rd172, %rd1566, 128;
	ld.const.u64 	%rd1153, [%rd1566+128];
	add.s64 	%rd1154, %rd1152, %rd1153;
	add.s64 	%rd1155, %rd1154, %rd1147;
	add.s64 	%rd1156, %rd1155, %rd1578;
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r792}, %rd1575;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%r793,%dummy}, %rd1575;
	}
	shf.l.wrap.b32 	%r794, %r793, %r792, 30;
	shf.l.wrap.b32 	%r795, %r792, %r793, 30;
	mov.b64 	%rd1157, {%r795, %r794};
	shf.r.wrap.b32 	%r796, %r792, %r793, 28;
	shf.r.wrap.b32 	%r797, %r793, %r792, 28;
	mov.b64 	%rd1158, {%r797, %r796};
	xor.b64  	%rd1159, %rd1157, %rd1158;
	shf.l.wrap.b32 	%r798, %r793, %r792, 25;
	shf.l.wrap.b32 	%r799, %r792, %r793, 25;
	mov.b64 	%rd1160, {%r799, %r798};
	xor.b64  	%rd1161, %rd1159, %rd1160;
	xor.b64  	%rd1162, %rd1575, %rd1576;
	xor.b64  	%rd1163, %rd1575, %rd1577;
	and.b64  	%rd1164, %rd1162, %rd1163;
	xor.b64  	%rd1165, %rd1164, %rd1575;
	add.s64 	%rd1166, %rd1155, %rd1165;
	add.s64 	%rd1167, %rd1166, %rd1161;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r800,%dummy}, %rd1156;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r801}, %rd1156;
	}
	shf.r.wrap.b32 	%r802, %r801, %r800, 14;
	shf.r.wrap.b32 	%r803, %r800, %r801, 14;
	mov.b64 	%rd1168, {%r803, %r802};
	shf.r.wrap.b32 	%r804, %r801, %r800, 18;
	shf.r.wrap.b32 	%r805, %r800, %r801, 18;
	mov.b64 	%rd1169, {%r805, %r804};
	xor.b64  	%rd1170, %rd1169, %rd1168;
	shf.l.wrap.b32 	%r806, %r800, %r801, 23;
	shf.l.wrap.b32 	%r807, %r801, %r800, 23;
	mov.b64 	%rd1171, {%r807, %r806};
	xor.b64  	%rd1172, %rd1170, %rd1171;
	xor.b64  	%rd1173, %rd1579, %rd1580;
	and.b64  	%rd1174, %rd1156, %rd1173;
	xor.b64  	%rd1175, %rd1174, %rd1580;
	add.s64 	%rd1176, %rd1584, %rd1581;
	ld.const.u64 	%rd1177, [%rd1566+136];
	add.s64 	%rd1178, %rd1176, %rd1177;
	add.s64 	%rd1179, %rd1178, %rd1175;
	add.s64 	%rd1180, %rd1179, %rd1172;
	add.s64 	%rd1181, %rd1180, %rd1577;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r808,%dummy}, %rd1167;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r809}, %rd1167;
	}
	shf.r.wrap.b32 	%r810, %r809, %r808, 28;
	shf.r.wrap.b32 	%r811, %r808, %r809, 28;
	mov.b64 	%rd1182, {%r811, %r810};
	shf.l.wrap.b32 	%r812, %r808, %r809, 30;
	shf.l.wrap.b32 	%r813, %r809, %r808, 30;
	mov.b64 	%rd1183, {%r813, %r812};
	xor.b64  	%rd1184, %rd1183, %rd1182;
	shf.l.wrap.b32 	%r814, %r808, %r809, 25;
	shf.l.wrap.b32 	%r815, %r809, %r808, 25;
	mov.b64 	%rd1185, {%r815, %r814};
	xor.b64  	%rd1186, %rd1184, %rd1185;
	xor.b64  	%rd1187, %rd1167, %rd1576;
	xor.b64  	%rd1188, %rd1167, %rd1575;
	and.b64  	%rd1189, %rd1188, %rd1187;
	xor.b64  	%rd1190, %rd1189, %rd1167;
	add.s64 	%rd1191, %rd1180, %rd1190;
	add.s64 	%rd1192, %rd1191, %rd1186;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r816,%dummy}, %rd1181;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r817}, %rd1181;
	}
	shf.r.wrap.b32 	%r818, %r817, %r816, 14;
	shf.r.wrap.b32 	%r819, %r816, %r817, 14;
	mov.b64 	%rd1193, {%r819, %r818};
	shf.r.wrap.b32 	%r820, %r817, %r816, 18;
	shf.r.wrap.b32 	%r821, %r816, %r817, 18;
	mov.b64 	%rd1194, {%r821, %r820};
	xor.b64  	%rd1195, %rd1194, %rd1193;
	shf.l.wrap.b32 	%r822, %r816, %r817, 23;
	shf.l.wrap.b32 	%r823, %r817, %r816, 23;
	mov.b64 	%rd1196, {%r823, %r822};
	xor.b64  	%rd1197, %rd1195, %rd1196;
	xor.b64  	%rd1198, %rd1156, %rd1579;
	and.b64  	%rd1199, %rd1181, %rd1198;
	xor.b64  	%rd1200, %rd1199, %rd1579;
	add.s64 	%rd1201, %rd1585, %rd1580;
	ld.const.u64 	%rd1202, [%rd1566+144];
	add.s64 	%rd1203, %rd1201, %rd1202;
	add.s64 	%rd1204, %rd1203, %rd1200;
	add.s64 	%rd1205, %rd1204, %rd1197;
	add.s64 	%rd1206, %rd1205, %rd1576;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r824,%dummy}, %rd1192;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r825}, %rd1192;
	}
	shf.r.wrap.b32 	%r826, %r825, %r824, 28;
	shf.r.wrap.b32 	%r827, %r824, %r825, 28;
	mov.b64 	%rd1207, {%r827, %r826};
	shf.l.wrap.b32 	%r828, %r824, %r825, 30;
	shf.l.wrap.b32 	%r829, %r825, %r824, 30;
	mov.b64 	%rd1208, {%r829, %r828};
	xor.b64  	%rd1209, %rd1208, %rd1207;
	shf.l.wrap.b32 	%r830, %r824, %r825, 25;
	shf.l.wrap.b32 	%r831, %r825, %r824, 25;
	mov.b64 	%rd1210, {%r831, %r830};
	xor.b64  	%rd1211, %rd1209, %rd1210;
	xor.b64  	%rd1212, %rd1192, %rd1575;
	xor.b64  	%rd1213, %rd1192, %rd1167;
	and.b64  	%rd1214, %rd1213, %rd1212;
	xor.b64  	%rd1215, %rd1214, %rd1192;
	add.s64 	%rd1216, %rd1205, %rd1215;
	add.s64 	%rd1217, %rd1216, %rd1211;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r832,%dummy}, %rd1206;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r833}, %rd1206;
	}
	shf.r.wrap.b32 	%r834, %r833, %r832, 14;
	shf.r.wrap.b32 	%r835, %r832, %r833, 14;
	mov.b64 	%rd1218, {%r835, %r834};
	shf.r.wrap.b32 	%r836, %r833, %r832, 18;
	shf.r.wrap.b32 	%r837, %r832, %r833, 18;
	mov.b64 	%rd1219, {%r837, %r836};
	xor.b64  	%rd1220, %rd1219, %rd1218;
	shf.l.wrap.b32 	%r838, %r832, %r833, 23;
	shf.l.wrap.b32 	%r839, %r833, %r832, 23;
	mov.b64 	%rd1221, {%r839, %r838};
	xor.b64  	%rd1222, %rd1220, %rd1221;
	xor.b64  	%rd1223, %rd1181, %rd1156;
	and.b64  	%rd1224, %rd1206, %rd1223;
	xor.b64  	%rd1225, %rd1224, %rd1156;
	add.s64 	%rd1226, %rd1586, %rd1579;
	ld.const.u64 	%rd1227, [%rd1566+152];
	add.s64 	%rd1228, %rd1226, %rd1227;
	add.s64 	%rd1229, %rd1228, %rd1225;
	add.s64 	%rd1230, %rd1229, %rd1222;
	add.s64 	%rd1231, %rd1230, %rd1575;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r840,%dummy}, %rd1217;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r841}, %rd1217;
	}
	shf.r.wrap.b32 	%r842, %r841, %r840, 28;
	shf.r.wrap.b32 	%r843, %r840, %r841, 28;
	mov.b64 	%rd1232, {%r843, %r842};
	shf.l.wrap.b32 	%r844, %r840, %r841, 30;
	shf.l.wrap.b32 	%r845, %r841, %r840, 30;
	mov.b64 	%rd1233, {%r845, %r844};
	xor.b64  	%rd1234, %rd1233, %rd1232;
	shf.l.wrap.b32 	%r846, %r840, %r841, 25;
	shf.l.wrap.b32 	%r847, %r841, %r840, 25;
	mov.b64 	%rd1235, {%r847, %r846};
	xor.b64  	%rd1236, %rd1234, %rd1235;
	xor.b64  	%rd1237, %rd1217, %rd1167;
	xor.b64  	%rd1238, %rd1217, %rd1192;
	and.b64  	%rd1239, %rd1238, %rd1237;
	xor.b64  	%rd1240, %rd1239, %rd1217;
	add.s64 	%rd1241, %rd1230, %rd1240;
	add.s64 	%rd1242, %rd1241, %rd1236;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r848,%dummy}, %rd1231;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r849}, %rd1231;
	}
	shf.r.wrap.b32 	%r850, %r849, %r848, 14;
	shf.r.wrap.b32 	%r851, %r848, %r849, 14;
	mov.b64 	%rd1243, {%r851, %r850};
	shf.r.wrap.b32 	%r852, %r849, %r848, 18;
	shf.r.wrap.b32 	%r853, %r848, %r849, 18;
	mov.b64 	%rd1244, {%r853, %r852};
	xor.b64  	%rd1245, %rd1244, %rd1243;
	shf.l.wrap.b32 	%r854, %r848, %r849, 23;
	shf.l.wrap.b32 	%r855, %r849, %r848, 23;
	mov.b64 	%rd1246, {%r855, %r854};
	xor.b64  	%rd1247, %rd1245, %rd1246;
	xor.b64  	%rd1248, %rd1206, %rd1181;
	and.b64  	%rd1249, %rd1231, %rd1248;
	xor.b64  	%rd1250, %rd1249, %rd1181;
	add.s64 	%rd1251, %rd1156, %rd1587;
	ld.const.u64 	%rd1252, [%rd1566+160];
	add.s64 	%rd1253, %rd1251, %rd1252;
	add.s64 	%rd1254, %rd1253, %rd1250;
	add.s64 	%rd1255, %rd1254, %rd1247;
	add.s64 	%rd1256, %rd1255, %rd1167;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r856,%dummy}, %rd1242;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r857}, %rd1242;
	}
	shf.r.wrap.b32 	%r858, %r857, %r856, 28;
	shf.r.wrap.b32 	%r859, %r856, %r857, 28;
	mov.b64 	%rd1257, {%r859, %r858};
	shf.l.wrap.b32 	%r860, %r856, %r857, 30;
	shf.l.wrap.b32 	%r861, %r857, %r856, 30;
	mov.b64 	%rd1258, {%r861, %r860};
	xor.b64  	%rd1259, %rd1258, %rd1257;
	shf.l.wrap.b32 	%r862, %r856, %r857, 25;
	shf.l.wrap.b32 	%r863, %r857, %r856, 25;
	mov.b64 	%rd1260, {%r863, %r862};
	xor.b64  	%rd1261, %rd1259, %rd1260;
	xor.b64  	%rd1262, %rd1242, %rd1192;
	xor.b64  	%rd1263, %rd1242, %rd1217;
	and.b64  	%rd1264, %rd1263, %rd1262;
	xor.b64  	%rd1265, %rd1264, %rd1242;
	add.s64 	%rd1266, %rd1255, %rd1265;
	add.s64 	%rd1267, %rd1266, %rd1261;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r864,%dummy}, %rd1256;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r865}, %rd1256;
	}
	shf.r.wrap.b32 	%r866, %r865, %r864, 14;
	shf.r.wrap.b32 	%r867, %r864, %r865, 14;
	mov.b64 	%rd1268, {%r867, %r866};
	shf.r.wrap.b32 	%r868, %r865, %r864, 18;
	shf.r.wrap.b32 	%r869, %r864, %r865, 18;
	mov.b64 	%rd1269, {%r869, %r868};
	xor.b64  	%rd1270, %rd1269, %rd1268;
	shf.l.wrap.b32 	%r870, %r864, %r865, 23;
	shf.l.wrap.b32 	%r871, %r865, %r864, 23;
	mov.b64 	%rd1271, {%r871, %r870};
	xor.b64  	%rd1272, %rd1270, %rd1271;
	xor.b64  	%rd1273, %rd1231, %rd1206;
	and.b64  	%rd1274, %rd1256, %rd1273;
	xor.b64  	%rd1275, %rd1274, %rd1206;
	add.s64 	%rd1276, %rd1181, %rd1588;
	ld.const.u64 	%rd1277, [%rd1566+168];
	add.s64 	%rd1278, %rd1276, %rd1277;
	add.s64 	%rd1279, %rd1278, %rd1275;
	add.s64 	%rd1280, %rd1279, %rd1272;
	add.s64 	%rd1281, %rd1280, %rd1192;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r872,%dummy}, %rd1267;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r873}, %rd1267;
	}
	shf.r.wrap.b32 	%r874, %r873, %r872, 28;
	shf.r.wrap.b32 	%r875, %r872, %r873, 28;
	mov.b64 	%rd1282, {%r875, %r874};
	shf.l.wrap.b32 	%r876, %r872, %r873, 30;
	shf.l.wrap.b32 	%r877, %r873, %r872, 30;
	mov.b64 	%rd1283, {%r877, %r876};
	xor.b64  	%rd1284, %rd1283, %rd1282;
	shf.l.wrap.b32 	%r878, %r872, %r873, 25;
	shf.l.wrap.b32 	%r879, %r873, %r872, 25;
	mov.b64 	%rd1285, {%r879, %r878};
	xor.b64  	%rd1286, %rd1284, %rd1285;
	xor.b64  	%rd1287, %rd1267, %rd1217;
	xor.b64  	%rd1288, %rd1267, %rd1242;
	and.b64  	%rd1289, %rd1288, %rd1287;
	xor.b64  	%rd1290, %rd1289, %rd1267;
	add.s64 	%rd1291, %rd1280, %rd1290;
	add.s64 	%rd1292, %rd1291, %rd1286;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r880,%dummy}, %rd1281;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r881}, %rd1281;
	}
	shf.r.wrap.b32 	%r882, %r881, %r880, 14;
	shf.r.wrap.b32 	%r883, %r880, %r881, 14;
	mov.b64 	%rd1293, {%r883, %r882};
	shf.r.wrap.b32 	%r884, %r881, %r880, 18;
	shf.r.wrap.b32 	%r885, %r880, %r881, 18;
	mov.b64 	%rd1294, {%r885, %r884};
	xor.b64  	%rd1295, %rd1294, %rd1293;
	shf.l.wrap.b32 	%r886, %r880, %r881, 23;
	shf.l.wrap.b32 	%r887, %r881, %r880, 23;
	mov.b64 	%rd1296, {%r887, %r886};
	xor.b64  	%rd1297, %rd1295, %rd1296;
	xor.b64  	%rd1298, %rd1256, %rd1231;
	and.b64  	%rd1299, %rd1281, %rd1298;
	xor.b64  	%rd1300, %rd1299, %rd1231;
	add.s64 	%rd1301, %rd1206, %rd1589;
	ld.const.u64 	%rd1302, [%rd1566+176];
	add.s64 	%rd1303, %rd1301, %rd1302;
	add.s64 	%rd1304, %rd1303, %rd1300;
	add.s64 	%rd1305, %rd1304, %rd1297;
	add.s64 	%rd1306, %rd1305, %rd1217;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r888,%dummy}, %rd1292;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r889}, %rd1292;
	}
	shf.r.wrap.b32 	%r890, %r889, %r888, 28;
	shf.r.wrap.b32 	%r891, %r888, %r889, 28;
	mov.b64 	%rd1307, {%r891, %r890};
	shf.l.wrap.b32 	%r892, %r888, %r889, 30;
	shf.l.wrap.b32 	%r893, %r889, %r888, 30;
	mov.b64 	%rd1308, {%r893, %r892};
	xor.b64  	%rd1309, %rd1308, %rd1307;
	shf.l.wrap.b32 	%r894, %r888, %r889, 25;
	shf.l.wrap.b32 	%r895, %r889, %r888, 25;
	mov.b64 	%rd1310, {%r895, %r894};
	xor.b64  	%rd1311, %rd1309, %rd1310;
	xor.b64  	%rd1312, %rd1292, %rd1242;
	xor.b64  	%rd1313, %rd1292, %rd1267;
	and.b64  	%rd1314, %rd1313, %rd1312;
	xor.b64  	%rd1315, %rd1314, %rd1292;
	add.s64 	%rd1316, %rd1305, %rd1315;
	add.s64 	%rd1317, %rd1316, %rd1311;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r896,%dummy}, %rd1306;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r897}, %rd1306;
	}
	shf.r.wrap.b32 	%r898, %r897, %r896, 14;
	shf.r.wrap.b32 	%r899, %r896, %r897, 14;
	mov.b64 	%rd1318, {%r899, %r898};
	shf.r.wrap.b32 	%r900, %r897, %r896, 18;
	shf.r.wrap.b32 	%r901, %r896, %r897, 18;
	mov.b64 	%rd1319, {%r901, %r900};
	xor.b64  	%rd1320, %rd1319, %rd1318;
	shf.l.wrap.b32 	%r902, %r896, %r897, 23;
	shf.l.wrap.b32 	%r903, %r897, %r896, 23;
	mov.b64 	%rd1321, {%r903, %r902};
	xor.b64  	%rd1322, %rd1320, %rd1321;
	xor.b64  	%rd1323, %rd1281, %rd1256;
	and.b64  	%rd1324, %rd1306, %rd1323;
	xor.b64  	%rd1325, %rd1324, %rd1256;
	add.s64 	%rd1326, %rd1231, %rd1590;
	ld.const.u64 	%rd1327, [%rd1566+184];
	add.s64 	%rd1328, %rd1326, %rd1327;
	add.s64 	%rd1329, %rd1328, %rd1325;
	add.s64 	%rd1330, %rd1329, %rd1322;
	add.s64 	%rd1331, %rd1330, %rd1242;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r904,%dummy}, %rd1317;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r905}, %rd1317;
	}
	shf.r.wrap.b32 	%r906, %r905, %r904, 28;
	shf.r.wrap.b32 	%r907, %r904, %r905, 28;
	mov.b64 	%rd1332, {%r907, %r906};
	shf.l.wrap.b32 	%r908, %r904, %r905, 30;
	shf.l.wrap.b32 	%r909, %r905, %r904, 30;
	mov.b64 	%rd1333, {%r909, %r908};
	xor.b64  	%rd1334, %rd1333, %rd1332;
	shf.l.wrap.b32 	%r910, %r904, %r905, 25;
	shf.l.wrap.b32 	%r911, %r905, %r904, 25;
	mov.b64 	%rd1335, {%r911, %r910};
	xor.b64  	%rd1336, %rd1334, %rd1335;
	xor.b64  	%rd1337, %rd1317, %rd1267;
	xor.b64  	%rd1338, %rd1317, %rd1292;
	and.b64  	%rd1339, %rd1338, %rd1337;
	xor.b64  	%rd1340, %rd1339, %rd1317;
	add.s64 	%rd1341, %rd1330, %rd1340;
	add.s64 	%rd1342, %rd1341, %rd1336;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r912,%dummy}, %rd1331;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r913}, %rd1331;
	}
	shf.r.wrap.b32 	%r914, %r913, %r912, 14;
	shf.r.wrap.b32 	%r915, %r912, %r913, 14;
	mov.b64 	%rd1343, {%r915, %r914};
	shf.r.wrap.b32 	%r916, %r913, %r912, 18;
	shf.r.wrap.b32 	%r917, %r912, %r913, 18;
	mov.b64 	%rd1344, {%r917, %r916};
	xor.b64  	%rd1345, %rd1344, %rd1343;
	shf.l.wrap.b32 	%r918, %r912, %r913, 23;
	shf.l.wrap.b32 	%r919, %r913, %r912, 23;
	mov.b64 	%rd1346, {%r919, %r918};
	xor.b64  	%rd1347, %rd1345, %rd1346;
	xor.b64  	%rd1348, %rd1306, %rd1281;
	and.b64  	%rd1349, %rd1331, %rd1348;
	xor.b64  	%rd1350, %rd1349, %rd1281;
	add.s64 	%rd1351, %rd1256, %rd1574;
	ld.const.u64 	%rd1352, [%rd1566+192];
	add.s64 	%rd1353, %rd1351, %rd1352;
	add.s64 	%rd1354, %rd1353, %rd1350;
	add.s64 	%rd1355, %rd1354, %rd1347;
	add.s64 	%rd1356, %rd1355, %rd1267;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r920,%dummy}, %rd1342;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r921}, %rd1342;
	}
	shf.r.wrap.b32 	%r922, %r921, %r920, 28;
	shf.r.wrap.b32 	%r923, %r920, %r921, 28;
	mov.b64 	%rd1357, {%r923, %r922};
	shf.l.wrap.b32 	%r924, %r920, %r921, 30;
	shf.l.wrap.b32 	%r925, %r921, %r920, 30;
	mov.b64 	%rd1358, {%r925, %r924};
	xor.b64  	%rd1359, %rd1358, %rd1357;
	shf.l.wrap.b32 	%r926, %r920, %r921, 25;
	shf.l.wrap.b32 	%r927, %r921, %r920, 25;
	mov.b64 	%rd1360, {%r927, %r926};
	xor.b64  	%rd1361, %rd1359, %rd1360;
	xor.b64  	%rd1362, %rd1342, %rd1292;
	xor.b64  	%rd1363, %rd1342, %rd1317;
	and.b64  	%rd1364, %rd1363, %rd1362;
	xor.b64  	%rd1365, %rd1364, %rd1342;
	add.s64 	%rd1366, %rd1355, %rd1365;
	add.s64 	%rd1367, %rd1366, %rd1361;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r928,%dummy}, %rd1356;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r929}, %rd1356;
	}
	shf.r.wrap.b32 	%r930, %r929, %r928, 14;
	shf.r.wrap.b32 	%r931, %r928, %r929, 14;
	mov.b64 	%rd1368, {%r931, %r930};
	shf.r.wrap.b32 	%r932, %r929, %r928, 18;
	shf.r.wrap.b32 	%r933, %r928, %r929, 18;
	mov.b64 	%rd1369, {%r933, %r932};
	xor.b64  	%rd1370, %rd1369, %rd1368;
	shf.l.wrap.b32 	%r934, %r928, %r929, 23;
	shf.l.wrap.b32 	%r935, %r929, %r928, 23;
	mov.b64 	%rd1371, {%r935, %r934};
	xor.b64  	%rd1372, %rd1370, %rd1371;
	xor.b64  	%rd1373, %rd1331, %rd1306;
	and.b64  	%rd1374, %rd1356, %rd1373;
	xor.b64  	%rd1375, %rd1374, %rd1306;
	add.s64 	%rd1376, %rd1281, %rd1573;
	ld.const.u64 	%rd1377, [%rd1566+200];
	add.s64 	%rd1378, %rd1376, %rd1377;
	add.s64 	%rd1379, %rd1378, %rd1375;
	add.s64 	%rd1380, %rd1379, %rd1372;
	add.s64 	%rd1381, %rd1380, %rd1292;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r936,%dummy}, %rd1367;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r937}, %rd1367;
	}
	shf.r.wrap.b32 	%r938, %r937, %r936, 28;
	shf.r.wrap.b32 	%r939, %r936, %r937, 28;
	mov.b64 	%rd1382, {%r939, %r938};
	shf.l.wrap.b32 	%r940, %r936, %r937, 30;
	shf.l.wrap.b32 	%r941, %r937, %r936, 30;
	mov.b64 	%rd1383, {%r941, %r940};
	xor.b64  	%rd1384, %rd1383, %rd1382;
	shf.l.wrap.b32 	%r942, %r936, %r937, 25;
	shf.l.wrap.b32 	%r943, %r937, %r936, 25;
	mov.b64 	%rd1385, {%r943, %r942};
	xor.b64  	%rd1386, %rd1384, %rd1385;
	xor.b64  	%rd1387, %rd1367, %rd1317;
	xor.b64  	%rd1388, %rd1367, %rd1342;
	and.b64  	%rd1389, %rd1388, %rd1387;
	xor.b64  	%rd1390, %rd1389, %rd1367;
	add.s64 	%rd1391, %rd1380, %rd1390;
	add.s64 	%rd1392, %rd1391, %rd1386;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r944,%dummy}, %rd1381;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r945}, %rd1381;
	}
	shf.r.wrap.b32 	%r946, %r945, %r944, 14;
	shf.r.wrap.b32 	%r947, %r944, %r945, 14;
	mov.b64 	%rd1393, {%r947, %r946};
	shf.r.wrap.b32 	%r948, %r945, %r944, 18;
	shf.r.wrap.b32 	%r949, %r944, %r945, 18;
	mov.b64 	%rd1394, {%r949, %r948};
	xor.b64  	%rd1395, %rd1394, %rd1393;
	shf.l.wrap.b32 	%r950, %r944, %r945, 23;
	shf.l.wrap.b32 	%r951, %r945, %r944, 23;
	mov.b64 	%rd1396, {%r951, %r950};
	xor.b64  	%rd1397, %rd1395, %rd1396;
	xor.b64  	%rd1398, %rd1356, %rd1331;
	and.b64  	%rd1399, %rd1381, %rd1398;
	xor.b64  	%rd1400, %rd1399, %rd1331;
	add.s64 	%rd1401, %rd1306, %rd1572;
	ld.const.u64 	%rd1402, [%rd1566+208];
	add.s64 	%rd1403, %rd1401, %rd1402;
	add.s64 	%rd1404, %rd1403, %rd1400;
	add.s64 	%rd1405, %rd1404, %rd1397;
	add.s64 	%rd1406, %rd1405, %rd1317;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r952,%dummy}, %rd1392;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r953}, %rd1392;
	}
	shf.r.wrap.b32 	%r954, %r953, %r952, 28;
	shf.r.wrap.b32 	%r955, %r952, %r953, 28;
	mov.b64 	%rd1407, {%r955, %r954};
	shf.l.wrap.b32 	%r956, %r952, %r953, 30;
	shf.l.wrap.b32 	%r957, %r953, %r952, 30;
	mov.b64 	%rd1408, {%r957, %r956};
	xor.b64  	%rd1409, %rd1408, %rd1407;
	shf.l.wrap.b32 	%r958, %r952, %r953, 25;
	shf.l.wrap.b32 	%r959, %r953, %r952, 25;
	mov.b64 	%rd1410, {%r959, %r958};
	xor.b64  	%rd1411, %rd1409, %rd1410;
	xor.b64  	%rd1412, %rd1392, %rd1342;
	xor.b64  	%rd1413, %rd1392, %rd1367;
	and.b64  	%rd1414, %rd1413, %rd1412;
	xor.b64  	%rd1415, %rd1414, %rd1392;
	add.s64 	%rd1416, %rd1405, %rd1415;
	add.s64 	%rd1417, %rd1416, %rd1411;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r960,%dummy}, %rd1406;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r961}, %rd1406;
	}
	shf.r.wrap.b32 	%r962, %r961, %r960, 14;
	shf.r.wrap.b32 	%r963, %r960, %r961, 14;
	mov.b64 	%rd1418, {%r963, %r962};
	shf.r.wrap.b32 	%r964, %r961, %r960, 18;
	shf.r.wrap.b32 	%r965, %r960, %r961, 18;
	mov.b64 	%rd1419, {%r965, %r964};
	xor.b64  	%rd1420, %rd1419, %rd1418;
	shf.l.wrap.b32 	%r966, %r960, %r961, 23;
	shf.l.wrap.b32 	%r967, %r961, %r960, 23;
	mov.b64 	%rd1421, {%r967, %r966};
	xor.b64  	%rd1422, %rd1420, %rd1421;
	xor.b64  	%rd1423, %rd1381, %rd1356;
	and.b64  	%rd1424, %rd1406, %rd1423;
	xor.b64  	%rd1425, %rd1424, %rd1356;
	add.s64 	%rd1426, %rd1331, %rd1571;
	ld.const.u64 	%rd1427, [%rd1566+216];
	add.s64 	%rd1428, %rd1426, %rd1427;
	add.s64 	%rd1429, %rd1428, %rd1425;
	add.s64 	%rd1430, %rd1429, %rd1422;
	add.s64 	%rd1431, %rd1430, %rd1342;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r968,%dummy}, %rd1417;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r969}, %rd1417;
	}
	shf.r.wrap.b32 	%r970, %r969, %r968, 28;
	shf.r.wrap.b32 	%r971, %r968, %r969, 28;
	mov.b64 	%rd1432, {%r971, %r970};
	shf.l.wrap.b32 	%r972, %r968, %r969, 30;
	shf.l.wrap.b32 	%r973, %r969, %r968, 30;
	mov.b64 	%rd1433, {%r973, %r972};
	xor.b64  	%rd1434, %rd1433, %rd1432;
	shf.l.wrap.b32 	%r974, %r968, %r969, 25;
	shf.l.wrap.b32 	%r975, %r969, %r968, 25;
	mov.b64 	%rd1435, {%r975, %r974};
	xor.b64  	%rd1436, %rd1434, %rd1435;
	xor.b64  	%rd1437, %rd1417, %rd1367;
	xor.b64  	%rd1438, %rd1417, %rd1392;
	and.b64  	%rd1439, %rd1438, %rd1437;
	xor.b64  	%rd1440, %rd1439, %rd1417;
	add.s64 	%rd1441, %rd1430, %rd1440;
	add.s64 	%rd1442, %rd1441, %rd1436;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r976,%dummy}, %rd1431;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r977}, %rd1431;
	}
	shf.r.wrap.b32 	%r978, %r977, %r976, 14;
	shf.r.wrap.b32 	%r979, %r976, %r977, 14;
	mov.b64 	%rd1443, {%r979, %r978};
	shf.r.wrap.b32 	%r980, %r977, %r976, 18;
	shf.r.wrap.b32 	%r981, %r976, %r977, 18;
	mov.b64 	%rd1444, {%r981, %r980};
	xor.b64  	%rd1445, %rd1444, %rd1443;
	shf.l.wrap.b32 	%r982, %r976, %r977, 23;
	shf.l.wrap.b32 	%r983, %r977, %r976, 23;
	mov.b64 	%rd1446, {%r983, %r982};
	xor.b64  	%rd1447, %rd1445, %rd1446;
	xor.b64  	%rd1448, %rd1406, %rd1381;
	and.b64  	%rd1449, %rd1431, %rd1448;
	xor.b64  	%rd1450, %rd1449, %rd1381;
	add.s64 	%rd1451, %rd1356, %rd1570;
	ld.const.u64 	%rd1452, [%rd1566+224];
	add.s64 	%rd1453, %rd1451, %rd1452;
	add.s64 	%rd1454, %rd1453, %rd1450;
	add.s64 	%rd1455, %rd1454, %rd1447;
	add.s64 	%rd1582, %rd1455, %rd1367;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r984,%dummy}, %rd1442;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r985}, %rd1442;
	}
	shf.r.wrap.b32 	%r986, %r985, %r984, 28;
	shf.r.wrap.b32 	%r987, %r984, %r985, 28;
	mov.b64 	%rd1456, {%r987, %r986};
	shf.l.wrap.b32 	%r988, %r984, %r985, 30;
	shf.l.wrap.b32 	%r989, %r985, %r984, 30;
	mov.b64 	%rd1457, {%r989, %r988};
	xor.b64  	%rd1458, %rd1457, %rd1456;
	shf.l.wrap.b32 	%r990, %r984, %r985, 25;
	shf.l.wrap.b32 	%r991, %r985, %r984, 25;
	mov.b64 	%rd1459, {%r991, %r990};
	xor.b64  	%rd1460, %rd1458, %rd1459;
	xor.b64  	%rd1461, %rd1442, %rd1392;
	xor.b64  	%rd1462, %rd1442, %rd1417;
	and.b64  	%rd1463, %rd1462, %rd1461;
	xor.b64  	%rd1464, %rd1463, %rd1442;
	add.s64 	%rd1465, %rd1455, %rd1464;
	add.s64 	%rd1578, %rd1465, %rd1460;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r992,%dummy}, %rd1582;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r993}, %rd1582;
	}
	shf.r.wrap.b32 	%r994, %r993, %r992, 14;
	shf.r.wrap.b32 	%r995, %r992, %r993, 14;
	mov.b64 	%rd1466, {%r995, %r994};
	shf.r.wrap.b32 	%r996, %r993, %r992, 18;
	shf.r.wrap.b32 	%r997, %r992, %r993, 18;
	mov.b64 	%rd1467, {%r997, %r996};
	xor.b64  	%rd1468, %rd1467, %rd1466;
	shf.l.wrap.b32 	%r998, %r992, %r993, 23;
	shf.l.wrap.b32 	%r999, %r993, %r992, 23;
	mov.b64 	%rd1469, {%r999, %r998};
	xor.b64  	%rd1470, %rd1468, %rd1469;
	xor.b64  	%rd1471, %rd1431, %rd1406;
	and.b64  	%rd1472, %rd1582, %rd1471;
	xor.b64  	%rd1473, %rd1472, %rd1406;
	add.s64 	%rd1474, %rd1381, %rd1569;
	ld.const.u64 	%rd1475, [%rd1566+232];
	add.s64 	%rd1476, %rd1474, %rd1475;
	add.s64 	%rd1477, %rd1476, %rd1473;
	add.s64 	%rd1478, %rd1477, %rd1470;
	add.s64 	%rd1581, %rd1478, %rd1392;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1000,%dummy}, %rd1578;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1001}, %rd1578;
	}
	shf.r.wrap.b32 	%r1002, %r1001, %r1000, 28;
	shf.r.wrap.b32 	%r1003, %r1000, %r1001, 28;
	mov.b64 	%rd1479, {%r1003, %r1002};
	shf.l.wrap.b32 	%r1004, %r1000, %r1001, 30;
	shf.l.wrap.b32 	%r1005, %r1001, %r1000, 30;
	mov.b64 	%rd1480, {%r1005, %r1004};
	xor.b64  	%rd1481, %rd1480, %rd1479;
	shf.l.wrap.b32 	%r1006, %r1000, %r1001, 25;
	shf.l.wrap.b32 	%r1007, %r1001, %r1000, 25;
	mov.b64 	%rd1482, {%r1007, %r1006};
	xor.b64  	%rd1483, %rd1481, %rd1482;
	xor.b64  	%rd1484, %rd1578, %rd1417;
	xor.b64  	%rd1485, %rd1578, %rd1442;
	and.b64  	%rd1486, %rd1485, %rd1484;
	xor.b64  	%rd1487, %rd1486, %rd1578;
	add.s64 	%rd1488, %rd1478, %rd1487;
	add.s64 	%rd1577, %rd1488, %rd1483;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1008,%dummy}, %rd1581;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1009}, %rd1581;
	}
	shf.r.wrap.b32 	%r1010, %r1009, %r1008, 14;
	shf.r.wrap.b32 	%r1011, %r1008, %r1009, 14;
	mov.b64 	%rd1489, {%r1011, %r1010};
	shf.r.wrap.b32 	%r1012, %r1009, %r1008, 18;
	shf.r.wrap.b32 	%r1013, %r1008, %r1009, 18;
	mov.b64 	%rd1490, {%r1013, %r1012};
	xor.b64  	%rd1491, %rd1490, %rd1489;
	shf.l.wrap.b32 	%r1014, %r1008, %r1009, 23;
	shf.l.wrap.b32 	%r1015, %r1009, %r1008, 23;
	mov.b64 	%rd1492, {%r1015, %r1014};
	xor.b64  	%rd1493, %rd1491, %rd1492;
	xor.b64  	%rd1494, %rd1582, %rd1431;
	and.b64  	%rd1495, %rd1581, %rd1494;
	xor.b64  	%rd1496, %rd1495, %rd1431;
	add.s64 	%rd1497, %rd1406, %rd1568;
	ld.const.u64 	%rd1498, [%rd1566+240];
	add.s64 	%rd1499, %rd1497, %rd1498;
	add.s64 	%rd1500, %rd1499, %rd1496;
	add.s64 	%rd1501, %rd1500, %rd1493;
	add.s64 	%rd1580, %rd1501, %rd1417;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1016,%dummy}, %rd1577;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1017}, %rd1577;
	}
	shf.r.wrap.b32 	%r1018, %r1017, %r1016, 28;
	shf.r.wrap.b32 	%r1019, %r1016, %r1017, 28;
	mov.b64 	%rd1502, {%r1019, %r1018};
	shf.l.wrap.b32 	%r1020, %r1016, %r1017, 30;
	shf.l.wrap.b32 	%r1021, %r1017, %r1016, 30;
	mov.b64 	%rd1503, {%r1021, %r1020};
	xor.b64  	%rd1504, %rd1503, %rd1502;
	shf.l.wrap.b32 	%r1022, %r1016, %r1017, 25;
	shf.l.wrap.b32 	%r1023, %r1017, %r1016, 25;
	mov.b64 	%rd1505, {%r1023, %r1022};
	xor.b64  	%rd1506, %rd1504, %rd1505;
	xor.b64  	%rd1507, %rd1577, %rd1442;
	xor.b64  	%rd1508, %rd1577, %rd1578;
	and.b64  	%rd1509, %rd1508, %rd1507;
	xor.b64  	%rd1510, %rd1509, %rd1577;
	add.s64 	%rd1511, %rd1501, %rd1510;
	add.s64 	%rd1576, %rd1511, %rd1506;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1024,%dummy}, %rd1580;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1025}, %rd1580;
	}
	shf.r.wrap.b32 	%r1026, %r1025, %r1024, 14;
	shf.r.wrap.b32 	%r1027, %r1024, %r1025, 14;
	mov.b64 	%rd1512, {%r1027, %r1026};
	shf.r.wrap.b32 	%r1028, %r1025, %r1024, 18;
	shf.r.wrap.b32 	%r1029, %r1024, %r1025, 18;
	mov.b64 	%rd1513, {%r1029, %r1028};
	xor.b64  	%rd1514, %rd1513, %rd1512;
	shf.l.wrap.b32 	%r1030, %r1024, %r1025, 23;
	shf.l.wrap.b32 	%r1031, %r1025, %r1024, 23;
	mov.b64 	%rd1515, {%r1031, %r1030};
	xor.b64  	%rd1516, %rd1514, %rd1515;
	xor.b64  	%rd1517, %rd1581, %rd1582;
	and.b64  	%rd1518, %rd1580, %rd1517;
	xor.b64  	%rd1519, %rd1518, %rd1582;
	add.s64 	%rd1520, %rd1431, %rd1567;
	ld.const.u64 	%rd1521, [%rd1566+248];
	add.s64 	%rd1522, %rd1520, %rd1521;
	add.s64 	%rd1523, %rd1522, %rd1519;
	add.s64 	%rd1524, %rd1523, %rd1516;
	add.s64 	%rd1579, %rd1524, %rd1442;
	{
	.reg .b32 %dummy;
	mov.b64 	{%r1032,%dummy}, %rd1576;
	}
	{
	.reg .b32 %dummy;
	mov.b64 	{%dummy,%r1033}, %rd1576;
	}
	shf.r.wrap.b32 	%r1034, %r1033, %r1032, 28;
	shf.r.wrap.b32 	%r1035, %r1032, %r1033, 28;
	mov.b64 	%rd1525, {%r1035, %r1034};
	shf.l.wrap.b32 	%r1036, %r1032, %r1033, 30;
	shf.l.wrap.b32 	%r1037, %r1033, %r1032, 30;
	mov.b64 	%rd1526, {%r1037, %r1036};
	xor.b64  	%rd1527, %rd1526, %rd1525;
	shf.l.wrap.b32 	%r1038, %r1032, %r1033, 25;
	shf.l.wrap.b32 	%r1039, %r1033, %r1032, 25;
	mov.b64 	%rd1528, {%r1039, %r1038};
	xor.b64  	%rd1529, %rd1527, %rd1528;
	xor.b64  	%rd1530, %rd1576, %rd1578;
	xor.b64  	%rd1531, %rd1576, %rd1577;
	and.b64  	%rd1532, %rd1531, %rd1530;
	xor.b64  	%rd1533, %rd1532, %rd1576;
	add.s64 	%rd1534, %rd1524, %rd1533;
	add.s64 	%rd1575, %rd1534, %rd1529;
	add.s32 	%r1081, %r1081, 16;
	setp.lt.s32	%p39, %r1081, 80;
	mov.u64 	%rd1566, %rd172;
	@%p39 bra 	BB4_55;

	ld.param.u32 	%r1040, [m01800_loop_param_29];
	add.s64 	%rd1549, %rd1575, 7640891576956012808;
	add.s64 	%rd1548, %rd1576, -4942790177534073029;
	add.s64 	%rd1547, %rd1577, 4354685564936845355;
	add.s64 	%rd1546, %rd1578, -6534734903238641935;
	add.s64 	%rd1545, %rd1579, 5840696475078001361;
	add.s64 	%rd1544, %rd1580, -7276294671716946913;
	add.s64 	%rd1543, %rd1581, 2270897969802886507;
	add.s64 	%rd1542, %rd1582, 6620516959819538809;
	add.s32 	%r1079, %r1079, 1;
	add.s32 	%r1080, %r1080, 1;
	setp.lt.u32	%p40, %r1080, %r1040;
	@%p40 bra 	BB4_51;

BB4_57:
	st.global.u64 	[%rd197], %rd1549;
	st.global.u64 	[%rd197+8], %rd1548;
	st.global.u64 	[%rd197+16], %rd1547;
	st.global.u64 	[%rd197+24], %rd1546;
	st.global.u64 	[%rd197+32], %rd1545;
	st.global.u64 	[%rd197+40], %rd1544;
	st.global.u64 	[%rd197+48], %rd1543;
	st.global.u64 	[%rd197+56], %rd1542;

BB4_58:
	ret;
}

	// .globl	m01800_comp
.entry m01800_comp(
	.param .u64 .ptr .global .align 4 m01800_comp_param_0,
	.param .u64 .ptr .global .align 4 m01800_comp_param_1,
	.param .u64 .ptr .global .align 4 m01800_comp_param_2,
	.param .u64 .ptr .global .align 4 m01800_comp_param_3,
	.param .u64 .ptr .global .align 8 m01800_comp_param_4,
	.param .u64 .ptr .global .align 1 m01800_comp_param_5,
	.param .u64 .ptr .global .align 4 m01800_comp_param_6,
	.param .u64 .ptr .global .align 4 m01800_comp_param_7,
	.param .u64 .ptr .global .align 4 m01800_comp_param_8,
	.param .u64 .ptr .global .align 4 m01800_comp_param_9,
	.param .u64 .ptr .global .align 4 m01800_comp_param_10,
	.param .u64 .ptr .global .align 4 m01800_comp_param_11,
	.param .u64 .ptr .global .align 4 m01800_comp_param_12,
	.param .u64 .ptr .global .align 4 m01800_comp_param_13,
	.param .u64 .ptr .global .align 8 m01800_comp_param_14,
	.param .u64 .ptr .global .align 4 m01800_comp_param_15,
	.param .u64 .ptr .global .align 4 m01800_comp_param_16,
	.param .u64 .ptr .global .align 4 m01800_comp_param_17,
	.param .u64 .ptr .global .align 1 m01800_comp_param_18,
	.param .u64 .ptr .global .align 4 m01800_comp_param_19,
	.param .u64 .ptr .global .align 4 m01800_comp_param_20,
	.param .u64 .ptr .global .align 4 m01800_comp_param_21,
	.param .u64 .ptr .global .align 4 m01800_comp_param_22,
	.param .u64 .ptr .global .align 4 m01800_comp_param_23,
	.param .u32 m01800_comp_param_24,
	.param .u32 m01800_comp_param_25,
	.param .u32 m01800_comp_param_26,
	.param .u32 m01800_comp_param_27,
	.param .u32 m01800_comp_param_28,
	.param .u32 m01800_comp_param_29,
	.param .u32 m01800_comp_param_30,
	.param .u32 m01800_comp_param_31,
	.param .u32 m01800_comp_param_32,
	.param .u32 m01800_comp_param_33,
	.param .u64 m01800_comp_param_34
)
{
	.reg .pred 	%p<25>;
	.reg .b32 	%r<132>;
	.reg .b64 	%rd<62>;


	ld.param.u64 	%rd5, [m01800_comp_param_4];
	ld.param.u64 	%rd6, [m01800_comp_param_6];
	ld.param.u64 	%rd7, [m01800_comp_param_7];
	ld.param.u64 	%rd8, [m01800_comp_param_8];
	ld.param.u64 	%rd9, [m01800_comp_param_9];
	ld.param.u64 	%rd10, [m01800_comp_param_10];
	ld.param.u64 	%rd11, [m01800_comp_param_11];
	ld.param.u64 	%rd12, [m01800_comp_param_12];
	ld.param.u64 	%rd13, [m01800_comp_param_13];
	ld.param.u64 	%rd14, [m01800_comp_param_14];
	ld.param.u64 	%rd15, [m01800_comp_param_15];
	ld.param.u64 	%rd16, [m01800_comp_param_16];
	ld.param.u64 	%rd17, [m01800_comp_param_19];
	ld.param.u32 	%r22, [m01800_comp_param_24];
	ld.param.u32 	%r23, [m01800_comp_param_25];
	ld.param.u32 	%r24, [m01800_comp_param_26];
	ld.param.u32 	%r25, [m01800_comp_param_27];
	ld.param.u32 	%r26, [m01800_comp_param_31];
	ld.param.u32 	%r27, [m01800_comp_param_32];
	ld.param.u64 	%rd18, [m01800_comp_param_34];
	mov.b32	%r28, %envreg3;
	mov.u32 	%r29, %ctaid.x;
	mov.u32 	%r30, %ntid.x;
	mad.lo.s32 	%r31, %r29, %r30, %r28;
	mov.u32 	%r32, %tid.x;
	add.s32 	%r1, %r31, %r32;
	cvt.s64.s32	%rd1, %r1;
	setp.ge.u64	%p1, %rd1, %rd18;
	@%p1 bra 	BB5_29;

	mul.wide.s32 	%rd23, %r1, 672;
	add.s64 	%rd24, %rd5, %rd23;
	ld.global.u64 	%rd19, [%rd24];
	// inline asm
	mov.b64 {%r33, %r34}, %rd19;
	// inline asm
	// inline asm
	prmt.b32 %r35, %r33, 0, 0x0123;
	// inline asm
	// inline asm
	prmt.b32 %r37, %r34, 0, 0x0123;
	// inline asm
	// inline asm
	mov.b64 %rd20, {%r37, %r35};
	// inline asm
	ld.global.u64 	%rd21, [%rd24+8];
	// inline asm
	mov.b64 {%r41, %r42}, %rd21;
	// inline asm
	// inline asm
	prmt.b32 %r43, %r41, 0, 0x0123;
	// inline asm
	// inline asm
	prmt.b32 %r45, %r42, 0, 0x0123;
	// inline asm
	// inline asm
	mov.b64 %rd22, {%r45, %r43};
	// inline asm
	cvt.u32.u64	%r49, %rd20;
	shr.u64 	%rd25, %rd22, 32;
	cvt.u32.u64	%r2, %rd25;
	and.b32  	%r3, %r23, 31;
	shr.u32 	%r50, %r49, %r3;
	and.b32  	%r51, %r50, %r22;
	mul.wide.u32 	%rd26, %r51, 4;
	add.s64 	%rd27, %rd6, %rd26;
	and.b32  	%r52, %r49, 31;
	mov.u32 	%r53, 1;
	shl.b32 	%r4, %r53, %r52;
	ld.global.u32 	%r54, [%rd27];
	and.b32  	%r55, %r54, %r4;
	setp.eq.s32	%p2, %r55, 0;
	@%p2 bra 	BB5_29;

	shr.u64 	%rd28, %rd20, 32;
	cvt.u32.u64	%r56, %rd28;
	shr.u32 	%r57, %r56, %r3;
	and.b32  	%r58, %r57, %r22;
	mul.wide.u32 	%rd29, %r58, 4;
	add.s64 	%rd30, %rd7, %rd29;
	and.b32  	%r59, %r56, 31;
	shl.b32 	%r61, %r53, %r59;
	ld.global.u32 	%r62, [%rd30];
	and.b32  	%r63, %r62, %r61;
	setp.eq.s32	%p3, %r63, 0;
	@%p3 bra 	BB5_29;

	cvt.u32.u64	%r64, %rd22;
	shr.u32 	%r65, %r64, %r3;
	and.b32  	%r66, %r65, %r22;
	mul.wide.u32 	%rd31, %r66, 4;
	add.s64 	%rd32, %rd8, %rd31;
	and.b32  	%r67, %r64, 31;
	shl.b32 	%r69, %r53, %r67;
	ld.global.u32 	%r70, [%rd32];
	and.b32  	%r71, %r70, %r69;
	setp.eq.s32	%p4, %r71, 0;
	@%p4 bra 	BB5_29;

	shr.u32 	%r72, %r2, %r3;
	and.b32  	%r73, %r72, %r22;
	mul.wide.u32 	%rd33, %r73, 4;
	add.s64 	%rd34, %rd9, %rd33;
	and.b32  	%r74, %r2, 31;
	shl.b32 	%r5, %r53, %r74;
	ld.global.u32 	%r76, [%rd34];
	and.b32  	%r77, %r76, %r5;
	setp.eq.s32	%p5, %r77, 0;
	@%p5 bra 	BB5_29;

	and.b32  	%r6, %r24, 31;
	shr.u32 	%r79, %r49, %r6;
	and.b32  	%r80, %r79, %r22;
	mul.wide.u32 	%rd35, %r80, 4;
	add.s64 	%rd36, %rd10, %rd35;
	ld.global.u32 	%r81, [%rd36];
	and.b32  	%r82, %r81, %r4;
	setp.eq.s32	%p6, %r82, 0;
	@%p6 bra 	BB5_29;

	shr.u32 	%r84, %r56, %r6;
	and.b32  	%r85, %r84, %r22;
	mul.wide.u32 	%rd38, %r85, 4;
	add.s64 	%rd39, %rd11, %rd38;
	ld.global.u32 	%r89, [%rd39];
	and.b32  	%r90, %r89, %r61;
	setp.eq.s32	%p7, %r90, 0;
	@%p7 bra 	BB5_29;

	shr.u32 	%r92, %r64, %r6;
	and.b32  	%r93, %r92, %r22;
	mul.wide.u32 	%rd40, %r93, 4;
	add.s64 	%rd41, %rd12, %rd40;
	ld.global.u32 	%r97, [%rd41];
	and.b32  	%r98, %r97, %r69;
	setp.eq.s32	%p8, %r98, 0;
	@%p8 bra 	BB5_29;

	shr.u32 	%r99, %r2, %r6;
	and.b32  	%r100, %r99, %r22;
	mul.wide.u32 	%rd42, %r100, 4;
	add.s64 	%rd43, %rd13, %rd42;
	ld.global.u32 	%r101, [%rd43];
	and.b32  	%r102, %r101, %r5;
	setp.eq.s32	%p9, %r102, 0;
	@%p9 bra 	BB5_29;

	setp.eq.s32	%p10, %r26, 0;
	mov.u32 	%r129, 0;
	mov.u32 	%r103, -1;
	@%p10 bra 	BB5_23;

	mov.u32 	%r128, %r26;

BB5_11:
	shr.u32 	%r9, %r128, 1;
	add.s32 	%r131, %r9, %r129;
	cvt.u64.u32	%rd44, %r131;
	cvt.u64.u32	%rd45, %r27;
	add.s64 	%rd4, %rd44, %rd45;
	shl.b64 	%rd46, %rd4, 6;
	add.s64 	%rd47, %rd15, %rd46;
	ld.global.u32 	%r11, [%rd47+12];
	setp.gt.u32	%p11, %r2, %r11;
	mov.u32 	%r130, %r53;
	@%p11 bra 	BB5_21;

	setp.lt.u32	%p12, %r2, %r11;
	mov.u32 	%r107, -1;
	@%p12 bra 	BB5_13;
	bra.uni 	BB5_14;

BB5_13:
	mov.u32 	%r130, %r107;
	bra.uni 	BB5_21;

BB5_14:
	ld.global.u32 	%r12, [%rd47+8];
	setp.gt.u32	%p13, %r64, %r12;
	mov.u32 	%r130, %r53;
	@%p13 bra 	BB5_21;

	setp.lt.u32	%p14, %r64, %r12;
	@%p14 bra 	BB5_16;
	bra.uni 	BB5_17;

BB5_16:
	mov.u32 	%r130, %r107;
	bra.uni 	BB5_21;

BB5_17:
	ld.global.u32 	%r13, [%rd47+4];
	setp.gt.u32	%p15, %r56, %r13;
	mov.u32 	%r130, %r53;
	@%p15 bra 	BB5_21;

	setp.lt.u32	%p16, %r56, %r13;
	mov.u32 	%r130, %r107;
	@%p16 bra 	BB5_21;

	ld.global.u32 	%r14, [%rd47];
	setp.gt.u32	%p17, %r49, %r14;
	mov.u32 	%r130, %r53;
	@%p17 bra 	BB5_21;

	setp.lt.u32	%p18, %r49, %r14;
	selp.b32	%r130, -1, 0, %p18;

BB5_21:
	add.s32 	%r120, %r9, 1;
	setp.gt.s32	%p19, %r130, 0;
	selp.b32	%r121, %r120, 0, %p19;
	add.s32 	%r129, %r121, %r129;
	selp.b32	%r122, -1, 0, %p19;
	add.s32 	%r123, %r122, %r128;
	shr.u32 	%r128, %r123, 1;
	setp.eq.s32	%p20, %r130, 0;
	@%p20 bra 	BB5_24;

	setp.ne.s32	%p21, %r128, 0;
	@%p21 bra 	BB5_11;

BB5_23:
	mov.u32 	%r131, %r103;

BB5_24:
	setp.eq.s32	%p22, %r131, -1;
	@%p22 bra 	BB5_29;

	add.s32 	%r20, %r131, %r27;
	mul.wide.u32 	%rd58, %r20, 4;
	add.s64 	%rd59, %rd16, %rd58;
	atom.global.add.u32 	%r125, [%rd59], 1;
	setp.ne.s32	%p23, %r125, 0;
	@%p23 bra 	BB5_29;

	atom.global.add.u32 	%r21, [%rd17], 1;
	setp.lt.u32	%p24, %r21, %r26;
	@%p24 bra 	BB5_28;
	bra.uni 	BB5_27;

BB5_28:
	mul.wide.u32 	%rd60, %r21, 24;
	add.s64 	%rd61, %rd14, %rd60;
	st.global.v2.u32 	[%rd61+16], {%r131, %r20};
	mov.u32 	%r127, 0;
	st.global.v2.u32 	[%rd61+8], {%r127, %r25};
	st.global.u64 	[%rd61], %rd1;
	bra.uni 	BB5_29;

BB5_27:
	atom.global.add.u32 	%r126, [%rd17], -1;

BB5_29:
	ret;
}